Low dielectric constant silicon and carbon containing materials

Abstract

An exemplary method of semiconductor processing may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. A substrate may be disposed in the processing region of the semiconductor processing chamber. The method may include providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber. The method may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of about 700° C. or less. The method may include forming a silicon- and carbon-containing layer on the substrate.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. patent application Ser. No. 17 / 737,328, entitled "SILICON-AND-CARBON-CONTAINING MATERIALS WITH LOW DIELECTRIC CONSTANTS," filed May 5, 2022, which is incorporated by reference in its entirety into this specification.

[0002]

[0002] The present technology relates to methods and components for semiconductor processing. In particular, the present technology relates to systems and methods for fabricating silicon-and-carbon-containing films for semiconductor structures. [Background technology]

[0003]

[0003] Integrated circuits are made possible by processes that produce intricately patterned layers of material on a substrate surface. Producing patterned materials on a substrate requires controlled methods for forming and removing materials. As devices become smaller, the aspect ratios of structures can become larger, and maintaining the dimensions of these structures during processing steps can be difficult. It can be difficult to develop dielectric materials that can be sufficiently conformal across features. Furthermore, as the number of material layers patterned during processing increases, producing materials that can have improved removal selectivity relative to other exposed materials, along with maintaining material properties, becomes a greater challenge.

[0004]

[0004] Thus, there is a need for improved systems and methods that can be used to manufacture high quality devices and structures. These and other needs are addressed by the present technology. Summary of the Invention

[0005]

[0005] An exemplary method of semiconductor processing may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. A substrate may be disposed in the processing region of the semiconductor processing chamber. The method may include providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber. The method may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of about 700° C. or less. The method may include forming a silicon- and carbon-containing layer on the substrate.

[0006] In some embodiments, the oxygen-containing precursor can be or can include nitrous oxide. Thermally reacting the silicon-containing precursor, the carbon-containing layer precursor, and the oxygen-containing precursor can be carried out at a temperature of about 575° C. or less. During the formation of the silicon- and carbon-containing layers, the pressure in the semiconductor processing chamber can be maintained at about 3 Torr or greater. A processing region of the semiconductor processing chamber may be maintained plasma-free while forming the silicon- and carbon-containing layer on the substrate. The carbon-containing precursor may be provided at a flow ratio to the silicon-containing precursor of about 4:1 or greater. The substrate may be characterized by one or more features. The silicon- and carbon-containing layer may be formed around the one or more features with a conformality of about 80% or greater. The silicon- and carbon-containing layer may be characterized by a carbon concentration of about 30 atomic % or less. The method may include cycling a supply of an oxygen-containing precursor while maintaining the supply of the silicon-containing precursor and the carbon-containing precursor. The period for supplying the oxygen-containing precursor may be between about 0.5 seconds and about 10 seconds. The silicon- and carbon-containing layer may be formed at least in part around one or more alternating stacks of silicon and silicon germanium.

[0007]

[0007] Some embodiments of the present technology include a semiconductor processing method. The method may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The carbon-containing precursor may be provided at a flow ratio to the silicon-containing precursor of about 4:1 or greater. A substrate may be disposed in the processing region of the semiconductor processing chamber. The method may include providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber. The method may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of about 650° C. or less. The method may include forming a silicon- and carbon-containing layer on the substrate.

[0008] In some embodiments, the oxygen-containing precursor can be or can include nitrous oxide. The processing region of the semiconductor processing chamber can be maintained plasma-free during the semiconductor processing method. The method can include cycling a supply of the oxygen-containing precursor while maintaining a supply of the silicon-containing precursor and the carbon-containing precursor. The period for providing the oxygen-containing precursor is between about 0.5 seconds and about 10 seconds.

[0009]

[0009] Some embodiments of the present technology include a semiconductor processing method. The method may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The silicon-containing precursor may be or may include disilane. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. A substrate may be disposed in the processing region of the semiconductor processing chamber. One or more alternating stacks of silicon and silicon germanium may be disposed on the substrate. The method may include providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber. The oxygen-containing precursor may be or may include nitrous oxide. The oxygen-containing precursor may be provided discontinuously. The method may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of about 600° C. or less. The method may include forming a silicon- and carbon-containing layer on the substrate. The silicon- and carbon-containing layer may be formed at least partially around the one or more alternating stacks of silicon and silicon germanium.

[0010]

[0010] In some embodiments, a processing region of a semiconductor processing chamber can be maintained plasma-free during a semiconductor processing method. A silicon- and carbon-containing layer can be formed around one or more features with a conformality of about 85 percent or greater. The silicon- and carbon-containing layer can be characterized by a carbon concentration of about 30 atomic percent or less. The method can include exposing the silicon- and carbon-containing layer to an oxygen-containing plasma, a hydrogen-containing plasma, or a wet etching process. The silicon- and carbon-containing layer can be maintained at a thickness of at least 50%.

[0011]

[0011] Such techniques may provide numerous advantages over conventional systems and techniques. For example, embodiments of the present technique may produce silicon and carbon-containing materials characterized by higher carbon concentrations than conventional techniques. Additionally, the present technique may produce carbon-containing films having tunable film properties with improved mechanical and electrical properties. These and other embodiments, along with their many advantages and features, are described in more detail below and in the accompanying drawings.

[0012]

[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the drawings. [Brief description of the drawings]

[0013] [Figure 1]

[0013] A schematic cross-sectional view of an exemplary plasma system according to some embodiments of the present technique is shown. [Diagram 2]

[0014] 1 illustrates steps in a semiconductor processing method, in accordance with some embodiments of the present technique. [Figure 3A]

[0015] 3A-3C show schematic cross-sectional views of exemplary structures that may include layers of material and may be fabricated in accordance with some embodiments of the present technique. [Figure 3B] 3A-3C show schematic cross-sectional views of exemplary structures that may include layers of material and may be fabricated in accordance with some embodiments of the present technique. [Figure 3C] 3A-3C show schematic cross-sectional views of exemplary structures that may include layers of material and may be fabricated in accordance with some embodiments of the present technique. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014]

[0016] Some of the drawings are included as schematic diagrams. It should be understood that the drawings are for illustrative purposes and should not be considered to scale unless expressly stated to be to scale. Moreover, as schematic diagrams, the drawings are provided to aid in understanding and may not include all aspects or information compared to a realistic depiction and may include material that is emphasized for illustrative purposes.

[0015]

[0017] In the accompanying drawings, similar components and / or features may have the same reference numbers. Furthermore, various components of the same type may be distinguished according to the reference numbers, with a letter distinguishing between the similar components. If only a first reference number is used in this specification, the description is applicable to any of the similar components having the same first reference number, regardless of the letter.

[0016]

[0018] As device sizes continue to shrink, many material layers may be reduced in thickness and size to scale the devices. As structures become closer together within a device, maintaining uniformity across the structures may become more difficult. Additionally, dielectric materials may play a key role in limiting crosstalk and other electrical issues. Current materials may not be able to sufficiently lower the dielectric constant without sacrificing the material and electrical properties of the film. For example, tailoring the film properties to lower the dielectric constant of some materials may increase the leakage properties of the material or decrease the dielectric breakdown properties of the film, leading to device failure. Additionally, when incorporating these films into semiconductor integration, processing may include back-end-of-line annealing processes that may expose the structures to temperatures in excess of 600 degrees. Many films may be affected by this annealing, which may result in outgassing that may lead to an increase in the dielectric constant.

[0017]

[0019] The present technique overcomes these problems by performing thermal-based material deposition, which would not utilize plasma generation during the deposition process. By performing thermal reactions between specific silicon-containing, carbon-containing, and / or oxygen-containing precursors, the present technique may allow lower temperature chemical vapor deposition to be performed, which may provide conformal growth on any number of semiconductor structures. The process performed may allow for improved tailoring of the film being produced, providing films characterized by a variety of material properties for different applications.

[0018]

[0020] While the remainder of the disclosure routinely identifies a particular deposition process utilizing the disclosed technology and describes one type of semiconductor processing chamber, it will be readily understood that the described process may be performed in any number of semiconductor processing chambers, as well as any number of processing steps that may incorporate films as described. Thus, the present technology should not be considered limited to use with these particular deposition processes or chambers alone. The present disclosure will describe one possible chamber that may be used to perform processes according to embodiments of the present technology before methods of semiconductor processing according to the present technology are described.

[0019]

[0021] FIG. 1 illustrates a cross-sectional view of an exemplary processing chamber 100 according to some embodiments of the present technique. This diagram may provide an overview of a system that may be specifically configured to incorporate one or more aspects of the present technique and / or perform one or more processes according to some embodiments of the present technique. Further details of the chamber 100 or the method performed may be further described below. Although the chamber 100 may be utilized to form a film layer according to some embodiments of the present technique, it should be understood that the method may be similarly performed in any chamber in which film formation may occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed within the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and enclosing the substrate support 104 within a processing space 120. A substrate 103 may be provided to the processing space 120 through an opening 126, which may be conventionally sealed for processing using a slit valve or door. The substrate 103 may be placed on a surface 105 of the substrate support during processing. The substrate support 104 may be rotatable along an axis 147 about which the shaft 144 of the substrate support 104 may be positioned, as indicated by arrow 145. Alternatively, the substrate support 104 may be elevated and rotated as needed during the deposition process.

[0020]

[0022] A plasma profile modulator 111 may be disposed in the processing chamber 100 to control the distribution of plasma across the substrate 103 disposed on the substrate support 104. The plasma profile modulator 111 may include a first electrode 108. The first electrode 108 may be disposed adjacent to the chamber body 102 and may separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 may be part of the lid assembly 106 or may be a separate sidewall electrode. The first electrode 108 may be an annular or ring-shaped member and may be a ring electrode. The first electrode 108 may be a continuous loop around the periphery of the processing chamber 100 surrounding the processing space 120 or may be discontinuous at selected locations, if desired. The first electrode 108 may also be a perforated electrode, such as a perforated ring or mesh electrode, or may be a flat electrode, such as a secondary gas distributor.

[0021]

[0023] One or more insulators 110a, 110b, which may be, for example, a dielectric material such as a ceramic or metal oxide, such as aluminum oxide and / or aluminum nitride, may contact the first electrode 108 and electrically and thermally isolate the first electrode 108 from the gas distributor 112 and from the chamber body 102. The gas distributor 112 may define an opening 118 for distributing process precursors into the processing space 120. The gas distributor 112 may be coupled to a first power source 142, such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source that may be coupled to the processing chamber. In some embodiments, the first power source 142 may be an RF power source.

[0022]

[0024] The gas distributor 112 may be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 may also be formed of conductive and non-conductive components. For example, the body of the gas distributor 112 may be conductive while the faceplate of the gas distributor 112 may be non-conductive. The gas distributor 112 may be powered, such as by a first power source 142 as shown in FIG. 1, or in some embodiments, the gas distributor 112 may be coupled to ground.

[0023]

[0025] The first electrode 108 may be coupled to a first tuned circuit 128 that may control the ground path of the processing chamber 100. The first tuned circuit 128 may include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 may be or may include a variable capacitor or other circuit element. The first tuned circuit 128 may be or may include one or more inductors 132. The first tuned circuit 128 may be any circuit that allows for a variable or controllable impedance under the plasma conditions present in the processing space 120 during processing. In some embodiments as shown, the first tuned circuit 128 may include a first circuit leg and a second circuit leg coupled in parallel between ground and the first electronic sensor 130. The first circuit leg may include a first inductor 132A. The second circuit leg may include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B may be disposed between the first electronic controller 134 and a node coupling both the first and second circuit legs to the first electronic sensor 130. The first electronic sensor 130 may be a voltage or current sensor and may be coupled to the first electronic controller 134. The first electronic controller 134 may allow some closed-loop control of the plasma conditions inside the process space 120.

[0024]

[0026] A second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be embedded in the substrate support 104 or may be coupled to a surface of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a mesh, a wire screen, or other distributed arrangement of conductive elements. The second electrode 122 may be a tuning electrode and may be coupled to a second tuning circuit 136 by a conduit 146, such as a cable having a selected resistance, such as 50 ohms, disposed in a shaft 144 of the substrate support 104. The second tuning circuit 136 may include a second electronic sensor 138 and a second electronic controller 140. The second electronic controller 140 may be a second variable capacitor. The second electronic sensor 138 may be a voltage or current sensor and may be coupled to the second electronic controller 140 to further control the plasma conditions in the process space 120.

[0025]

[0027] A third electrode 124, which may be a bias electrode and / or an electrostatic chuck electrode, may be coupled to the substrate support 104. The third electrode may be coupled to a second power source 150 through a filter 148. The filter 148 may be an impedance matching circuit. The second power source 150 may be a DC power source, a pulsed DC power source, an RF bias power source, a pulsed RF source or a bias power source, or a combination or other power source. In some embodiments, the second power source 150 may be an RF bias power source. The substrate support 104 may also include one or more heating elements configured to heat the substrate to a processing temperature, which may be between about 25° C. and about 800° C. or above.

[0026]

[0028] The lid assembly 106 and substrate support 104 of FIG. 1 may be used with any processing chamber for plasma or thermal processing. In operation, the processing chamber 100 may allow real-time control of plasma conditions within the processing space 120. The substrate 103 may be placed on the substrate support 104, and process gases may be flowed through the lid assembly 106 using the inlet 114 according to any desired flow plan. The gases may exit the processing chamber 100 through the outlet 152. A power source may be coupled to the gas distributor 112 to establish a plasma within the processing space 120. In some embodiments, the substrate may be electrically biased using a third electrode 124.

[0027]

[0029] Upon exciting the plasma in the process space 120, a potential difference may be established between the plasma and the first electrode 108. Also, a potential difference may be established between the plasma and the second electrode 122. The electronic controllers 134, 140 may then be used to adjust the flow characteristics of the ground paths represented by the two tuned circuits 128, 136. Set points may be provided for the first tuned circuit 128 and the second tuned circuit 136 to provide independent control of the deposition rate and independent control of the center-to-edge plasma density uniformity. In embodiments where the electronic controllers can both be variable capacitors, the electronic sensors may independently adjust the variable capacitors to maximize the deposition rate and minimize the thickness non-uniformity.

[0028]

[0030] Each of the tuning circuits 128, 136 may have a variable impedance that may be adjusted using the respective electronic controller 134, 140. If the electronic controller 134, 140 is a variable capacitor, the capacitance range of each of the variable capacitors and the inductance of the first inductor 132A and the second inductor 132B may be selected to provide a range of impedances. This range depends on the frequency and voltage characteristics of the plasma, and there may be a minimum value in the capacitance range of each variable capacitor. Thus, when the capacitance of the first electronic controller 134 is at a minimum or maximum, the impedance of the first tuning circuit 128 may be high, resulting in a plasma shape with a minimum aerial or lateral coverage over the substrate support. When the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma may grow to a maximum, effectively covering the entire working area of ​​the substrate support 104. When the capacitance of the first electronic controller 134 is moved away from the minimum impedance setting, the plasma shape may shrink from the chamber walls, reducing the aerial coverage of the substrate support. The second electronic controller 140 has a similar effect, and as the capacitance of the second electronic controller 140 can be altered, the aerial coverage of the plasma on the substrate support can be increased or decreased.

[0029]

[0031] The electronic sensors 130, 138 may be used to tune the respective circuits 128, 136 in a closed loop. Depending on the type of sensor used, a current or voltage set point may be provided for each sensor, and the sensors may be provided with control software that determines adjustments to each respective electronic controller 134, 140 to minimize deviations from the set point. As a result, the plasma shape may be selected and dynamically controlled during processing. Although the above description is based on the electronic controller 134, 140 being a variable capacitor, it will be appreciated that any electronic component having adjustable characteristics may be used to provide the tuned circuits 128, 136 with adjustable impedance.

[0030]

[0032] As previously mentioned, a plasma processing chamber may be used for one or more aspects of the film processing according to the present technique, however, in some embodiments, forming silicon and carbon films may not utilize a plasma enhanced process. The use of plasma may limit the conformality of the film produced by further releasing carbon from the precursor, which may limit carbon incorporation in the film produced by allowing carbon to recombine with other radical species and flow out of the chamber. The present technique may, in some embodiments, form a film at least without generating a plasma. FIG. 2 illustrates exemplary operations in a processing method 200 according to some embodiments of the present technique. The method may be performed in a variety of processing chambers, including the processing chamber 100 described above, as well as any other chambers, including non-plasma chambers, in which steps may be performed. The method 200 may include several optional operations that may or may not be specifically associated with some embodiments of the method according to the present technique. For example, many of the operations are described to provide a broader scope of structure formation, but are not critical to the present technique or may be performed by alternative methodologies that will be readily understood. The method 200 may include a processing method that may include several steps to develop a silicon and carbon containing film. The film may include a tunable ratio of carbon within the film. As will be further described below, varying the ratio of silicon to carbon and how the materials are integrated within the film may provide several properties to facilitate device processing for several structures.

[0031]

[0033] In step 205, the method may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber in which a substrate may be housed. In step 210, which may occur simultaneously with step 205 and prior to a subsequent step 205, an oxygen-containing precursor may be provided to the processing region of the semiconductor processing chamber. In step 215, the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor may be thermally reacted in the processing region of the semiconductor processing chamber, which may form a silicon- and carbon-containing layer on the substrate in step 220.

[0032]

[0034] For reactions performed in some embodiments, the semiconductor processing chamber, pedestal, or substrate 305 may be maintained at a temperature of about 250° C. or greater, and in some embodiments may be maintained at a temperature of about 300° C. or greater, about 320° C. or greater, about 340° C. or greater, about 360° C. or greater, about 380° C. or greater, about 400° C. or greater, about 420° C. or greater, about 440° C. or greater, about 460° C. or greater, about 480° C. or greater, about 500° C. or greater, about 520° C. or greater, about 540° C. or greater, or greater. Similarly, in some embodiments, the semiconductor processing chamber, pedestal, or substrate 305 may be maintained at a temperature of about 700° C. or less, and in some embodiments, may be maintained at a temperature of about 680° C. or less, about 660° C. or less, about 640° C. or less, about 620° C. or less, about 600° C. or less, about 580° C. or less, about 575° C. or less, about 560° C. or less, about 540° C. or less, or lower.

[0033]

[0035] The semiconductor processing chamber may be maintained at a pressure of about 3 Torr or greater, and in some embodiments may be maintained at a pressure of about 5 Torr or greater, about 10 Torr or greater, about 15 Torr or greater, about 25 Torr or greater, about 50 Torr or greater, about 75 Torr or greater, about 100 Torr or greater, about 125 Torr or greater, about 150 Torr or greater, about 175 Torr or greater, about 200 Torr or greater, about 225 Torr or greater, about 250 Torr or greater, about 275 Torr or greater, about 300 Torr or greater, or more.

[0034]

[0036] As previously mentioned, some or all of the formation steps may be performed while the substrate processing region is maintained plasma-free. By performing thermal chemical vapor deposition, more conformal material formation may be produced, and the material is characterized by increased carbon incorporation. Non-limiting examples of silicon-containing precursors that may be used during processing according to some embodiments of the present technology may include silane, disilane, silicon tetrafluoride, silicon tetrachloride, dichlorosilane, tetraethyl orthosilicate, and any other silicon-containing precursor that may be used in silicon-containing film formation. The carbon-containing precursor may be or include any number of carbon-containing precursors. For example, the carbon-containing precursor may be or include any hydrocarbon, or any material that includes or is composed of carbon and hydrogen. In some embodiments, the carbon-containing precursor may be characterized by one or more carbon-carbon double bonds and / or one or more carbon-carbon triple bonds to facilitate the reaction between the carbon precursor and the silicon precursor or oxygen precursor. Thus, in some embodiments, the carbon-containing precursor may be or include an alkene, such as acetylene, ethylene, propene, or an alkyne, or any other carbon-containing material. The precursor may include a carbon- and hydrogen-containing precursor. The carbon- and hydrogen-containing precursor may include any amount of carbon and hydrogen bonds along with any other element bonds, but in some embodiments, the carbon-containing precursor may be composed of carbon-carbon and carbon-hydrogen bonds. The oxygen-containing precursor used in any process as described throughout the present technology may include diatomic oxygen, nitrous oxide, nitrogen dioxide, ozone, and any other oxygen-containing precursor that may be used in silicon oxide film formation, but in some embodiments, the oxygen-containing precursor may not include a hydroxyl moiety. By using an oxygen-containing precursor that may have a reduced oxygen content, such as one that includes single-bonded oxygen (including nitrous oxide as one non-limiting example), the reaction rate and oxygen incorporation may be more controlled as a result. This may facilitate further tuning of the carbon incorporation in the film to obtain film properties for various applications.

[0035]

[0037] There are many factors that can affect the silicon, oxygen, and carbon concentrations in the film. For example, in some embodiments, the produced film can be limited to or essentially composed of silicon, oxygen, carbon, and hydrogen, along with any trace materials that may be major contaminant sources, for example. In some embodiments, the silicon concentration in the film can be maintained at about 50 atomic % or less. This can help limit the leakage current of the produced film, since silicon-rich films can be characterized by higher leakage currents. Thus, in some embodiments, the produced material before or after annealing can be characterized by a silicon concentration of about 48 atomic % or less, and can be maintained at about 45 atomic % or less, about 40 atomic % or less, about 38 atomic % or less, about 36 atomic % or less, about 34 atomic % or less, about 32 atomic % or less, about 30 atomic % or less, about 28 atomic % or less, about 26 atomic % or less, about 24 atomic % or less, about 22 atomic % or less, about 20 atomic % or less, or less.

[0036]

[0038] The oxygen concentration in the film may be maintained at about 60 atomic % or less, which may indicate the amount of silicon and carbon remaining in the film after annealing. In this case, the lower the oxygen content, the more silicon and carbon may be retained. Thus, in some embodiments, the produced material before or after annealing, as described below, may be characterized by an oxygen concentration of about 5 atomic % or more, and may be about 10 atomic % or more, about 15 atomic % or more, about 20 atomic % or more, about 25 atomic %, about 30 atomic %, about 35 atomic %, about 40 atomic %, about 45 atomic %, about 50 atomic %, or more.

[0037]

[0039] The technique can adjust the carbon incorporation in the film based on the flow rate, as will be described below. In some embodiments of the technique, the produced film may be characterized by a carbon concentration in the produced material before or after annealing of about 30 atomic % or less, as will be described below, and may be maintained at about 28 atomic % or less, about 26 atomic % or less, about 24 atomic % or less, about 22 atomic % or less, about 20 atomic % or less, about 18 atomic % or less, about 16 atomic % or less, about 14 atomic % or less, about 12 atomic % or less, about 10 atomic % or less, or less. For example, the thermal reaction may proceed based on dissociation of the silicon-containing precursor. The radical release of the silicon-containing precursor may promote the dissociation of the carbon-containing precursor. However, the formation of silicon-silicon bonds may compete with the formation of silicon-carbon bonds, so that some carbon-containing precursors may limit the amount of carbon incorporation to a threshold of about 30 atomic % or less. Furthermore, carbon-containing precursors that contain carbon-carbon triple bonds may be more susceptible to dissociation than carbon-containing precursors that contain only one or more carbon-carbon double bonds. Thus, increasing the flow rate of a carbon-containing precursor containing one or more double bonds may be limited to producing carbon incorporation of about 25 atomic % or less, while increasing the flow rate of a carbon-containing precursor containing one or more triple bonds may result in carbon incorporation up to a threshold of about 30 atomic % or less.

[0038]

[0040] However, the present technique may further enhance the carbon concentration in the produced film by providing the oxygen-containing precursor discontinuously. That is, in some embodiments, the method 200 may include cycling the supply of the oxygen-containing precursor while maintaining the supply of the silicon-containing precursor and the carbon-containing precursor. This increases the amount of carbon radical species available for deposition compared to the oxygen radical species, potentially allowing for higher carbon concentrations compared to the prior art. Thus, in some embodiments, the oxygen-containing precursor may be cycled on and off for equal or unequal periods. The period for cycling the oxygen-containing precursor on and off may be about 0.5 seconds or more, about 1 second or more, about 3 seconds or more, about 5 seconds or more, about 7 seconds or more, about 9 seconds or more, or more. In some embodiments, the period for providing the oxygen-containing precursor may be between about 0.5 seconds and about 10 seconds.

[0039]

[0041] Hydrogen incorporation in the film can affect one or more material properties as well as the quality of the film produced. The carbon-containing precursor and / or the silicon-containing precursor can include hydrogen, but in some embodiments, no additional hydrogen source may be provided. An inert precursor or carrier gas may be provided with the silicon-containing precursor and the carbon-containing precursor, but in some embodiments, no other chemically reactive precursor may be provided with the precursor. By limiting the hydrogen provided to the chamber to that contained in the carbon-containing precursor and the silicon-containing precursor, the atomic ratio of hydrogen in the film produced may be lower than if hydrogen gas is also provided.

[0040]

[0042] To produce films characterized by lower dielectric constants while maintaining sufficient leakage and breakdown performance, the present technology can provide precursors to control atomic incorporation to promote bonding between silicon and carbon. This can improve film quality and performance. In many process steps, silicon can easily bond with itself and form in the film. At higher flow rates, carbon-hydrogen bonds can increase or carbon can bond with the surrounding oxygen. This can lead to outgassing from the film. Therefore, the flow rates of silicon-containing precursors and carbon-containing precursors can be kept low enough to ensure that bonds between carbon and silicon are increased. Therefore, the flow rate of silicon-containing precursors can be kept low to ensure that the incorporation of carbon materials is increased. For example, in some embodiments, the flow rate of the silicon-containing precursor may be maintained at about 100 sccm or less, about 75 sccm or less, about 50 sccm or less, about 25 sccm or less, about 20 sccm or less, about 15 sccm or less, about 10 sccm or less, about 9 sccm or less, about 8 sccm or less, about 7 sccm or less, about 6 sccm or less, about 5 sccm or less, or less. By keeping the flow rate of the silicon-containing precursor low enough, silicon incorporation can be controlled while allowing silicon radicals to facilitate dissociation of the carbon material.

[0041]

[0043] By keeping the flow rate of the carbon-containing precursor low enough, the carbon-silicon bond can be improved. This can limit shrinkage and outgassing during the subsequent annealing process. For example, when the flow rate of the carbon-containing precursor is 50 sccm or more, increased dangling bonds can be incorporated into the film. Annealing the film can further reduce the incorporation of carbon and hydrogen. This can lead to a higher dielectric constant. Therefore, by maintaining a lower flow rate of the carbon-containing precursor, the dielectric constant can be further lowered. This can also help maintain a higher breakdown voltage of the film produced. Thus, in some embodiments of the present technique, the flow rate of the carbon-containing precursor may be maintained at about 100 sccm or less, about 90 sccm or less, about 80 sccm or less, about 70 sccm or less, about 60 sccm or less, about 50 sccm or less, about 40 sccm or less, about 30 sccm or less, about 25 sccm or less, about 24 sccm or less, about 23 sccm or less, about 22 sccm or less, about 21 sccm or less, about 20 sccm or less, about 19 sccm, about 18 sccm, or less.

[0042]

[0044] Providing the precursors in a specific ratio to each other may also facilitate control of film formation resulting in the above-mentioned properties and characteristics. For example, in some embodiments, the flow rate of the carbon-containing precursor may be maintained higher than that of the silicon-containing precursor. This may help increase carbon incorporation in the film. Thus, in some embodiments, the flow rate ratio of the carbon-containing precursor to the silicon-containing precursor may be maintained at about 1:1 or more, about 2:1 or more, about 4:1 or more, about 5:1 or more, about 6:1 or more, or more.

[0043]

[0045] Although the material produced may be affected by annealing, the present technique may produce films characterized by a lower dielectric constant before or after annealing. The present technique may produce materials characterized by a dielectric constant of about 4.20 or less, and may be characterized by a dielectric constant of about 4.15 or less, about 4.10 or less, about 4.05 or less, about 4.00 or less, about 3.95 or less, about 3.90 or less, about 3.85 or less, about 3.80 or less, or lower. Furthermore, materials produced according to embodiments of the present technique may have a dielectric constant that increases by about 1.5 or less after annealing as described above, may have a dielectric constant that increases by about 1.4 or less, about 1.3 or less, about 1.2 or less, about 1.1 or less, about 1.0 or less, about 0.9 or less, about 0.8 or less, about 0.7 or less, about 0.6 or less, or the dielectric constant may remain substantially or essentially consistent after annealing. During annealing, the bonds between silicon and carbon in the film increase and, in some embodiments, the dielectric constant can increase. This increase can be the result of outgassing of residual hydrogen in the film during annealing and / or excess silicon or carbon in the film bonds.

[0044]

[0046] Leakage current and dielectric breakdown can be affected by atomic concentration in the fabricated material. However, by fabricating materials according to embodiments of the present technology, leakage current at 2 MV / cm is reduced to 5.0×10 -8 A / cm 2 May be maintained below 4.0 x 10 -8 A / cm 2 Below, 3.0 x 10 -8 A / cm 2 Below, 2.8 x 10 -8 A / cm 2 The following is 2.6 x 10 -8 A / cm 2 Below, 2.4 x 10 -8 A / cm 2 Below, 2.2 x 10 -8 A / cm 2 Below, 2.0 x 10 -8 A / cm 2 Below, 1.8 x 10 -8 A / cm 2 Below, 1.6 x 10-8 A / cm 2 The following is 1.4 x 10 -8 A / cm 2 Below, 1.2 x 10 -8 A / cm 2 Below, 1.0 x 10 -8 A / cm 2 It may be maintained at or below 0.001 A / cm 2 The breakdown voltage of the film at may be maintained at about 6.0 MV / cm or greater, about 6.5 MV / cm or greater, about 7.0 MV / cm or greater, about 7.5 MV / cm or greater, about 8.0 MV / cm or greater, about 8.5 MV / cm or greater, about 9.0 MV / cm or greater, about 9.5 MV / cm or greater, about 10.0 MV / cm or greater, about 10.5 MV / cm or greater, 11.0 MV / cm or greater, or greater.

[0045]

[0047] The silicon and carbon materials produced by the present technique may be used in some structures, for example, masks, liners, or spacers. They may be retained in the developed structure and may undergo some subsequent processing steps. In some embodiments, the silicon and carbon materials may be included as materials used in integration. The materials may be retained or removed after subsequent processing is performed. This processing may include annealing in downstream processes. The annealing may exceed a temperature of 700° C. and may be performed at temperatures of about 750° C. or higher, about 800° C. or higher, about 850° C. or higher, or higher. Due to the improved film bonding and growth produced by some embodiments of the present technique, low-k materials may be less susceptible to damage from the annealing process, enabling further integration steps for low-k materials. For example, during the formation of many silicon oxycarbide films, carbon may form around oxygen. This may increase carbon and hydrogen loss during annealing. By performing deposition according to embodiments of the present technique, carbon can be better retained during annealing as well as subsequent processing. Improved silicon-carbon bonding can be achieved in embodiments of the present technique. For example, in many applications where the material may be utilized as a low-k spacer, as will be further described below, subsequent processing and layer development may expose the film to photoresist or organic layer ashing, material etching and cleaning, or other processes that may damage the less structurally sound film. For example, materials produced by the present technique may be exposed to ashing with oxygen-containing and / or hydrogen-containing materials as well as etching with halogen-containing materials. By maintaining sufficient oxygen in the structure, the material can better withstand ashing, and by having sufficient carbon incorporation, the material can better withstand etching processes.

[0046]

[0048] The concentrations of silicon, oxygen, and carbon in the film may be adjusted depending on the desired ashing and etching survivability. As previously described, the film may be subjected to subsequent processing, including, but not limited to, an ashing and etching step in optional step 225. Films with lower carbon concentrations may exhibit higher survivability to the ashing step, and films with higher carbon concentrations may exhibit lower survivability to the ashing step. Conversely, films with lower carbon concentrations may exhibit lower survivability to the etching step. Films with higher carbon concentrations may exhibit higher survivability to the etching step. Additionally, the type of silicon and carbon bonds in the film may also affect survivability. For example, films with Si-C-Si bonds may be the most stable to the ashing step due to the reduced amount of hydrogen in the film, as opposed to Si-C, Si-CH3, or C-C bonds. The various forms of bonding may be manipulated by altering the precursors and flows. For example, incorporation of excess carbon in the film, either by the carbon-containing precursor or the flow of said precursors, may add unstable carbon in the film. Depending on the integration process, it may be desirable to tailor the carbon concentration and / or type of bonds in the film depending on the ashing and etching process subsequent to depositing the film of the present technology. In some embodiments where the etching process is increased relative to the ashing process, it may be desirable to increase the carbon concentration in the film. Conversely, in some embodiments where the ashing process is increased relative to the etching process, it may be desirable to decrease the carbon concentration in the film.

[0047]

[0049] As previously discussed, in some embodiments, thermal-based material formation may provide a more conformal film that may act as a liner, spacer, or other material used during semiconductor processing. While the remaining figures will describe a gate-all-around ("GAA") structure including a film fabricated by the present technique, the present technique may be used in any number of structures. For example, in some embodiments, the film may be used in memory applications such as DRAM. The material may be incorporated as a spacer around a structure, such as for a bit line spacer, as one non-limiting example. FIGS. 3A-3C show exemplary schematic cross-sectional structures that include and are fabricated with material layers according to some embodiments of the present technique. For example, as shown in FIG. 3A, structure 300 may include substrate 305, which may be any of several materials (such as a wafer or substrate 305 made of silicon or silicon-containing materials, other substrate 305 materials, as well as one or more materials that may be formed overlying substrate 305 during semiconductor processing). For example, in some embodiments, substrate 305 may be processed to include one or more materials or structures for semiconductor processing. The substrate 305 may be or include a dielectric material, such as an oxide or nitride of any number of materials. The substrate 305 may be processed to form one or more layers of material on the substrate 305. As shown in FIG. 3A, layers of material may be deposited to begin the formation of a GAA transistor structure. In some embodiments, the substrate 305 may include one or more features, such as an alternating stack of silicon 310 and silicon germanium 315, although it should be understood that the materials may be reversed in different regions along the substrate or device structure. The silicon germanium 315 may be recessed inwardly compared to the silicon 310. In subsequent processing, the silicon 310 may be exposed to form source and drain regions on opposite sides of the gate. A gate or gate placeholder 320 may be disposed on top of the alternating stack of silicon 310 and silicon germanium 315. A silicon oxide material 325 may be disposed on the bottom and top of the gate or gate placeholder 320. A liner material 330 may be placed on the sides of the gate or gate placeholder 320 .As shown in FIG. 3B, in some embodiments of the present technology, a silicon and carbon-containing layer 335 may be formed on the structure 300 (such as around one or more alternating stacks of silicon 310 and silicon germanium 315). It should be understood that this example is not intended to be limiting, as the present technology may be utilized in any number of processing steps, and the material of the structure 300 may be any other material as understood by those skilled in the art. The formation of the film may be based on the methods or steps described above, which allows for highly conformal deposition and advantageously accommodates gate structures having one or more recessed materials.

[0048]

[0050] Silicon and carbon films produced by the present technique may be characterized by complete coverage around the structure as shown. For example, the thickness of the film along the sidewall closer to the top of the structure may be substantially the same as the thickness of the film along the sidewall closer to the bottom of the structure. In that case, the film produced is substantially conformal. Thus, in some embodiments, the deposited film may be characterized by a conformality or similarity of about 80% or more of the thickness formed between any two regions, including across the top of the feature, along the sidewall, and / or at the base between the features, as well as any region along the film formed. In some embodiments, the conformality may be about 85% or more, about 90% or more, about 92% or more, about 94% or more, about 96% or more, about 98% or more, or more. Thus, the present technique may produce silicon and carbon-containing films characterized by a lower dielectric constant and increased carbon incorporation compared to previously developed films. Subsequent processing, such as that shown in FIG. 3C, may place spacer material of silicon- and carbon-containing layer 335 against recessed regions along the gate structure. Further processing may be performed in the development of the GAA transistor. This may include several processes (including plasma dry etching) that may expose the silicon- and carbon-containing layer 335 to etchant materials (which may include fluorine or chlorine, etc.), or wet etching, such as with low concentrations of HF or HCl. Additionally, the organic material may be ashed in one or more processing steps, exposing the material to oxygen, nitrogen, and / or hydrogen plasma effluents. The silicon- and carbon-containing material according to embodiments of the present technology may be substantially maintained during any of these steps, such as about 50% or more of the material illustrated in FIG. 3C. The silicon- and carbon-containing material may provide improved survivability compared to conventional films, while also maintaining a relatively low dielectric constant and improving electrical performance.

[0049]

[0051] In the foregoing description, for purposes of explanation, numerous details are presented in order to facilitate an understanding of various embodiments of the present technology. However, it will be apparent to one of ordinary skill in the art that certain embodiments may be practiced without some of these details or with additional details.

[0050]

[0052] Although several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative constructions, and equivalents may be used without departing from the spirit of the embodiments. Moreover, some well-known processes and elements have not been described to avoid unnecessarily obscuring the technology. Thus, the above description should not be construed as limiting the scope of the technology.

[0051]

[0053] Where a range of values ​​is provided, it is to be understood that each intervening value between the upper and lower limits of that range is specifically disclosed, to the smallest unit of the lower limit, unless the context clearly indicates otherwise. Any smaller ranges between any stated or unstated intervening value in a stated range, as well as any other stated or intervening value in that stated range, are also included. The upper and lower limits of these smaller ranges may be individually included or excluded from the range, and each range in which either, neither or both limits are included in the smaller ranges is also encompassed within the scope of the technology, subject to any specifically excluded limits in the stated range. Where a stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included.

[0052]

[0054] As used in this specification and claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, a reference to "a precursor" includes a plurality of such precursors, a reference to "the layer" includes a reference to one or more layers and equivalents thereof known to those skilled in the art, and so forth.

[0053]

[0055] Additionally, the terms "comprises," "comprising," "containing," "containing," "including," and "including," when used in this specification and claims, are intended to specify the presence of stated features, integers, components, or steps, but do not exclude the presence or addition of one or more other features, integers, components, steps, operations, or groups.

Claims

1. providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber, the carbon-containing precursor being characterized by a carbon-carbon double bond or a carbon-carbon triple bond, and a substrate being disposed within the processing region of the semiconductor processing chamber; providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber; thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of about 700° C. or less; and forming a silicon and carbon containing layer on the substrate.

2. The semiconductor processing method of claim 1 , wherein the oxygen-containing precursor comprises nitrous oxide.

3. 10. The semiconductor processing method of claim 1, wherein thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor is carried out at a temperature of about 575°C or less.

4. 10. The semiconductor processing method of claim 1, wherein a pressure within said semiconductor processing chamber is maintained at or above about 3 Torr while forming said silicon and carbon containing layer.

5. 10. The semiconductor processing method of claim 1, wherein the processing region of the semiconductor processing chamber is maintained plasma-free while forming the silicon and carbon containing layer on the substrate.

6. 10. The semiconductor processing method of claim 1, wherein the carbon-containing precursor is provided at a flow ratio to the silicon-containing precursor of about 4:1 or greater.

7. 10. The semiconductor processing method of claim 1, wherein the substrate is characterized by one or more features, and the silicon and carbon containing layer is formed around the one or more features with about 80% or greater conformality.

8. 10. The semiconductor processing method of claim 1, wherein the silicon and carbon containing layer is characterized by a carbon concentration of about 30 atomic percent or less.

9. 10. The semiconductor processing method of claim 1, further comprising cycling a supply of said oxygen-containing precursor while maintaining a supply of said silicon-containing precursor and said carbon-containing precursor.

10. 10. The semiconductor processing method of claim 9, wherein the period of providing the oxygen-containing precursor is between about 0.5 seconds and about 10 seconds.

11. 10. The semiconductor processing method of claim 1, wherein the silicon and carbon containing layer is formed at least in part around one or more alternating stacks of silicon and silicon germanium.

12. providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber, the carbon-containing precursor being provided at a flow ratio to the silicon-containing precursor of about 4:1 or greater, and a substrate being disposed within the processing region of the semiconductor processing chamber; providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber; thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of about 650° C. or less; and forming a silicon and carbon containing layer on the substrate.

13. The semiconductor processing method of claim 12 , wherein the oxygen-containing precursor comprises nitrous oxide.

14. 13. The semiconductor processing method of claim 12, wherein the processing region of the semiconductor processing chamber is maintained plasma-free during the semiconductor processing method.

15. 13. The semiconductor processing method of claim 12, further comprising cycling a supply of the oxygen-containing precursor while maintaining a supply of the silicon-containing precursor and the carbon-containing precursor, wherein a period for providing the oxygen-containing precursor is between about 0.5 seconds and about 10 seconds.

16. providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber, the silicon-containing precursor comprising disilane, the carbon-containing precursor being characterized by a carbon-carbon double bond or a carbon-carbon triple bond, a substrate being disposed in the processing region of the semiconductor processing chamber, and one or more alternating stacks of silicon and silicon germanium being disposed on the substrate; providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber, the oxygen-containing precursor comprising nitrous oxide, the oxygen-containing precursor being provided discontinuously; thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of about 600° C. or less; and 1. A semiconductor processing method comprising: forming a silicon and carbon containing layer on the substrate, the silicon and carbon containing layer being formed at least in part around one or more alternating stacks of silicon and silicon germanium.

17. 20. The semiconductor processing method of claim 16, wherein the processing region of the semiconductor processing chamber is maintained plasma-free during the semiconductor processing method.

18. 20. The semiconductor processing method of claim 16, wherein the silicon and carbon containing layer is formed around one or more features with a conformality of about 85 percent or greater.

19. 20. The semiconductor processing method of claim 16, wherein the silicon and carbon containing layer is characterized by a carbon concentration of about 30 atomic % or less.

20. 20. The semiconductor processing method of claim 16, further comprising exposing the silicon and carbon containing layer to an oxygen-containing plasma, a hydrogen-containing plasma, or a wet etching process, wherein the silicon and carbon containing layer is maintained at least 50% thick.

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