Control system for edge tilt with fixed RF and DC frequencies and phases and pulsed

Abstract

The method is performed within a plasma chamber. The method includes supplying a first power signal to an electrostatic chuck (ESC). The method includes supplying a second power signal to an edge ring. The method includes measuring an amplitude of a current signal generated at a joint between the ESC and the edge ring. The method includes adjusting one or more parameters of the first power signal and the second power signal to obtain a minimum amplitude of the current signal. The method includes determining a phase relationship between a phase of the current signal and a phase of a reference signal to determine a direction of an ion tilt at the joint. The method includes adjusting at least one parameter of the second power signal based on the phase relationship and the amplitude of the current signal to obtain a predetermined angle of the ion tilt at the joint.

Description

Technical Field

[0001] This embodiment relates to semiconductor manufacturing, and more specifically, to a system and method for measuring RF and pulsed DC currents at the joint between an electrostatic chuck and an edge ring to obtain a desired ion tilt at the edge of a wafer and to balance power and / or voltage at the joint.

Background Art

[0002] Many modern semiconductor chip manufacturing processes, such as plasma etching processes, are performed in a plasma processing chamber. In the plasma processing chamber, a substrate, for example, a wafer, is supported on an electrostatic chuck (ESC). In the plasma etching process, the wafer is exposed to the plasma generated in the plasma processing volume. The plasma contains various radicals, electrons, as well as positive and negative ions. Chemical reactions of various radicals, electrons, positive ions, and negative ions are used to etch features, surfaces, and materials of the wafer.

[0003] For example, when a process gas is supplied into the plasma processing chamber, a radio frequency (RF) signal supplies power and is applied to at least one of the electrodes of the plasma processing chamber to form an electric field between the electrodes. The process gas is plasma-ized by the RF signal, whereby plasma etching is performed on a predetermined layer disposed on the wafer. Unfortunately, during the processing of the wafer, ion angular diffusion (for example, ion tilt angle) may occur along the extreme edge of the wafer due to the plasma, resulting in feature non-uniformity along the extreme edge of the wafer.

[0004] Embodiments of the present disclosure arise from such a situation.

Summary of the Invention

[0005] This embodiment relates to a method and apparatus for balancing power and / or voltage at a joint between an electrostatic chuck and an edge ring in order to obtain a desired ion tilt at the edge of a wafer by measuring RF and pulsed DC currents at the joint. Embodiments of some of the inventions of the present disclosure are described below.

[0006] Embodiments of the present disclosure provide a method for obtaining a predetermined factor related to an edge region within a plasma chamber. The method includes supplying a first power signal to an electrostatic chuck (ESC) within the plasma chamber. The method includes supplying a second power signal to an edge ring within the plasma chamber. The method includes measuring an amplitude of a low-frequency current signal generated at a joint between the ESC and the edge ring. The method includes adjusting one or more parameters of the first power signal and the second power signal to obtain a minimum amplitude of the low-frequency current signal. The method includes determining a phase relationship between the phase of the low-frequency current signal and the phase of a reference signal to determine a direction of ion tilt at the joint between the ESC and the edge ring. The method includes adjusting at least one parameter of the second current signal based on the phase relationship and the amplitude of the low-frequency current signal to obtain a predetermined angle of ion tilt at the joint between the ESC and the edge ring.

[0007] Other embodiments of the present disclosure provide a non-transitory computer-readable medium storing a computer program for performing a method for obtaining a predetermined factor related to an edge region in a plasma chamber. The computer-readable medium includes program instructions for supplying a first power signal to an electrostatic chuck (ESC) in the plasma chamber. The computer-readable medium includes program instructions for supplying a second power signal to an edge ring in the plasma chamber. The computer-readable medium includes program instructions for measuring an amplitude of a low-frequency current signal generated at a junction between the ESC and the edge ring. The computer-readable medium includes program instructions for adjusting one or more parameters of the first power signal and the second power signal to obtain a minimum amplitude of the low-frequency current signal. The computer-readable medium includes program instructions for determining a phase relationship between a phase of the low-frequency current signal and a phase of a reference signal to determine a direction of ion tilt at a junction between the ESC and the edge ring. The computer-readable medium includes program instructions for adjusting at least one parameter of the second power signal based on the phase relationship and the amplitude of the low-frequency current signal to obtain a predetermined angle of ion tilt at a junction between the ESC and the edge ring.

[0008] Yet other embodiments of the present disclosure provide a computer system including a processor and a memory coupled to the processor. The memory stores instructions that, when executed by the computer system, cause the computer system to execute a method for obtaining predetermined factors related to an edge region in a plasma chamber. The method includes supplying a first power signal to an electrostatic chuck (ESC) in the plasma chamber. The method includes supplying a second power signal to an edge ring in the plasma chamber. The method includes measuring an amplitude of a low-frequency current signal generated at a joint between the ESC and the edge ring. The method includes adjusting one or more parameters of the first power signal and the second power signal to obtain a minimum amplitude of the low-frequency current signal. The method includes determining a phase relationship between a phase of the low-frequency current signal and a phase of a reference signal to determine a direction of ion tilt at a joint between the ESC and the edge ring. The method includes adjusting at least one parameter of the second power signal based on the phase relationship and the amplitude of the low-frequency current signal to obtain a predetermined angle of ion tilt at a joint between the ESC and the edge ring.

[0009] These and other advantages will be understood by those skilled in the art upon a reading of the following detailed description and claims.

Brief Description of the Drawings

[0010] This embodiment can be best understood by referring to the following description in conjunction with the accompanying drawings.

[0011]

Figure 1A

[0012]

Figure 1B-1

Figure 1B-2

Figure 1B-3

Figure 1B-4

Figure 1B-5

[0013]

Figure 2A

[0014]

Figure 2B

[0015]

Figure 3

[0016]

Figure 4

DETAILED DESCRIPTION OF THE INVENTION

[0017] The following detailed description includes many specific details for illustrative purposes, but those skilled in the art will understand that many variations and modifications to the following details are within the scope of this disclosure. Therefore, the aspects of this disclosure described below are presented without loss of generality and without imposing limitations on the claims that follow this description.

[0018] Generally, various embodiments of this disclosure describe methods and apparatuses for obtaining a desired ion tilt at the edge of a wafer. In particular, it has been advantageously recognized that the amount of RF current passing through the joint between the ESC and the edge ring is correlated with the ion tilt angle. That is, when the phase between the voltage sensors associated with the RF generators supplying the ESC and the edge ring is nominal for a given edge ring voltage setting, the pulsed DC or RF current at the joint between the ESC and the edge ring is at a minimum. Therefore, rather than measuring the voltage of the RF power signal in the matching network away from the joint, by focusing on measuring the RF current across the joint between the ESC and the edge ring, the time when the power and / or voltage of the generator are balanced can be determined more accurately, and a nearly vertical ion tilt generated at the joint can be obtained. Further, by adjusting the power or phase relationship between the voltage signals of the RF generator, the system can draw more power from the electrodes in the ESC towards the edge ring or push more power out at the joint towards the ESC at the joint. This adjustment of the power or phase relationship provides a means to control the vector direction of the local electric field at the joint, and thus provides a means to control the ion tilt of the etching cations at the joint.

[0019] As an advantage of various embodiments, by the method and apparatus of the present disclosure, a desired ion tilt is obtained at the edge of the wafer by measuring the RF current passing through the joint between the ESC and the edge ring, and by adjusting the power or phase relationship of the RF generator, it does not depend on sensor measurements located at a location away from the joint (e.g., a matching network adjacent to the generator), but rather a better correlation between the measured value at the joint and the actual ion tilt is brought about. In this way, a better and more accurate control mechanism for obtaining a desired ion tilt at the edge of the wafer is realized. Other advantages include providing a more direct measurement of the current generated at the joint, which does not depend on the drive impedance of the power supply that supplies power to the ESC and the edge ring. Still other advantages include a lower-cost edge control RF transmission system that uses a more direct method to obtain a desired result (e.g., ion tilt) with less total power required for a specific etching rate.

[0020] Based on the general understanding of the above various embodiments, with reference to various drawings, the exemplary details of the present embodiment will be described below. Elements and / or components labeled with the same reference numerals in one or more of the figures are intended to generally have the same configuration and / or functionality. Furthermore, although the figures may not be drawn to scale, they are intended to illustrate and emphasize novel concepts. It will be apparent that the present embodiment can be practiced without some or all of these specific details. In other instances, well-known process operations are not described in detail so as not to unnecessarily obscure the present embodiment.

[0021] Figures 1A and 1B-1 through 1B-5 illustrate exemplary embodiments of a plasma processing system utilized in operations including etching and / or deposition of a film, in accordance with embodiments of the present disclosure. The plasma processing system is used to process a wafer 120, for example, by performing plasma processing of the wafer 120. In particular, FIG. 1A shows a plasma processing system including a radio frequency (RF) power source. The plasma processing systems of FIGS. 1B-1 through 1B-5 show a plasma processing system including at least one pulsed direct current (DC) power source, which may or may not be combined with an RF power source. In an embodiment, the plasma processing system is a capacitively coupled plasma (CCP) processing system. In the plasma processing systems of FIGS. 1A and 1B-1 through 1B-5, like components are denoted with like reference numerals. The plasma processing system may be modified according to design to generate plasma by various methods, such as inductively coupled plasmas (ICPs). Embodiments of the present disclosure implemented using various configurations of the plasma processing system to obtain a desired ion tilt at the edge of the wafer based on measurement of a portion of the RF current may be implemented in various plasma processing systems (e.g., CCPs, ICPs, etc.) and each variation of their configurations.

[0022] Generally, the RF power sources of FIGS. 1A and 1B-1 through 1B-5 supply power via a sine wave or alternating current (AC) signal (i.e., by varying a voltage signal having a sine waveform), which may be pulsed or non-pulsed. Further, the DC power sources of FIGS. 1B-1 through 1B-5 generally supply power via a pulsed DC signal. For purposes of simplicity and clarity, the plasma processing systems of FIGS. 1A and 1B-1 through 1B-5 are described with an RF pulse generator and a DC pulse generator.

[0023] In particular, FIG. 1A shows an exemplary embodiment of a plasma processing system 100A configured as a CCP processing system and utilized for an etching operation including a CCP plasma processing chamber 102. Except for the power supply configuration, the description of the plasma processing system in FIG. 1A is generally applicable to the plasma processing systems in FIGS. 1B-1 through 1B-5, and like components are denoted by like reference numerals. The plasma processing chamber 102 includes a substrate support or pedestal, such as an electrostatic chuck (ESC) 118 or a magnetic chuck. In an embodiment, the ESC may have a plurality of circular rings of different types of materials to obtain a specific capacitive coupling between the ESC and a powered edge ring. The lower electrode 122 may be embedded within the electrostatic chuck 118. The substrate 120 may be placed on the pedestal for processing, and the substrate 120 is processed to create one or more semiconductor chips. The upper electrode 124 faces the pedestal. As shown, the upper electrode may be coupled to ground. In other embodiments, the upper electrode 124 may be coupled to an RF power supply (e.g., supply of high-frequency power, etc.) as further described below in connection with FIGS. 1B-2 through 1B-5. The upper electrode 124 may be configured with an extension 123 that may be formed in a ring shape. There is a gap between the upper electrode 124 and the lower electrode 122 that forms a processing volume within which a plasma 130 may be formed.

[0024] In addition, the plasma process chamber 102 includes an edge ring 126, such as an adjustable edge sheath (TES) ring surrounding the ESC 118. As an example, the edge ring 126 is manufactured from a conductive material such as silicon, boron-doped single-crystalline silicon, silicon carbide, an alloy of silicon, or a combination thereof. Note that the edge ring 126 has an annular shape, such as an annular body, a ring-shaped body, or a dish-shaped body. By way of illustration, the edge ring 126 has an inner radius and an outer radius, and the inner radius is larger than the radius of the ESC 118. The edge ring 126 serves many functions, such as positioning the substrate 120 on the ESC 118, confining the plasma to the region above the substrate 120, protecting the ESC 118 from erosion by the ions of the plasma, and shielding the underlying components of the plasma chamber 102 from damage by the ions of the plasma. Further, the edge ring is configured to improve the performance at the edge of the wafer. For example, by varying the amount of power coupled to the edge ring, the plasma density of the plasma in the edge region, the uniformity of the sheath of the plasma in the edge region, the uniformity of the etching rate of the plasma in the edge region, and the ion tilt at which the wafer is etched in the edge region may be controlled.

[0025] As shown, the plasma processing chamber 102 of FIG. 1A may include a C-shroud 150 extending from the upper electrode 124 to the ESC 118 including the lower electrode to provide additional plasma confinement. The C-shroud may have a plurality of openings so that gases and by-products can flow out of the C-shroud. The C-shroud may be grounded. In other embodiments, the plasma processing chamber may be configured differently to include a confinement ring (not shown) for confining the plasma 130 during the etching operation.

[0026] In another embodiment, the gas source(s) 114 is connected to the plasma process chamber 102 and configured to inject the desired process gas(es) into the plasma process chamber 102. As an example of plasma formation, after supplying one or more RF signals to the ESC 118 and injecting the process gas(es) into the plasma process chamber 102, a plasma 130 is formed between the upper electrode 124 and the ESC 118. The plasma 130 can be used to etch the surface of the wafer 120.

[0027] The plasma processing system 100A includes a plurality of power supplies including a main generator 110, a main generator 112, and a TES generator 113. For example, the main generator 110 and / or the main generator 112 supply a modified signal (supply power) to the lower electrode 122 of the ESC 118 via the main impedance matching network 106. The matching network enables dynamic adjustment of the power supplied to the lower electrode 122 by matching the impedance between the load (e.g., the plasma chamber and any connecting cables) and the source of the signal (e.g., the main HFRF generator 110 and the main generator 112 and any connecting cables). For example, the main generator 110 may be a high-frequency (HF) RF generator (hereinafter referred to as the main HFRF generator 110) and may be configured to generate a high frequency including frequencies in the range from 13 megahertz (MHz) to 120 MHz. For example, the high frequency is a baseline frequency of 13.56 MHz, or 27 MHz, or 40 MHz, or 60 MHz, or 100 MHz. Further, the main generator 112 may be a low-frequency (LF) RF generator (hereinafter referred to as the main LFRF generator 112) and may be configured to generate a frequency including frequencies in the range from 10 kilohertz (kHz) to 800 kHz. For example, the operating frequency of the main LFRF generator 112 is 400 kHz. Further, the main HFRF generator 110 and / or the main LFRF generator 112 may supply a pulsed signal or a non-pulsed signal. In one embodiment, the power signals are synchronized in a pulse system so that within one pulse, all three power signals (e.g., from the main HFRF generator 110, the main LFRF generator 112, and the TES generator 113) turn on at different levels and states.

[0028] Furthermore, the TES generator 113 supplies a power signal to the edge ring 126 via the TES impedance matching network 107. The TES power signal may be sent to the electrode 231 embedded in the edge ring 126 via the power pin 230 coupled to the TES impedance matching network 107. By matching the impedance between the load (e.g., the plasma chamber 102 and any connection cables) and the source (e.g., the TES generator 113 and any connection cables) by the TES matching network, the power supplied to the edge ring 126 can be dynamically adjusted. For example, the TES generator 113 may be a low-frequency RF generator (hereinafter referred to as the TES LFRF generator 113), and for example, the operating frequency may be from 10 kHz to 800 kHz or the like. For example, the operating frequency of the TES LFRF generator 113 is 400 kHz. In other embodiments, the TES LFRF generator 113 supplies a low-frequency signal via a corresponding matching network. Furthermore, the TES LFRF generator 113 may supply a pulsed signal or a non-pulsed signal. By controlling the power sent to the edge ring, control of the ion tilt (e.g., substantially normal angle to the wafer, perpendicular angle to the wafer, or other angle to the wafer) at the edge of the wafer is provided, and accordingly, control of the plasma sheath at the edge of the wafer is provided.

[0029] In some embodiments, the system may include a controller 116 used to control various components of the plasma processing system 100A. In one example, the controller 116 can be connected to a plasma generator (e.g., the main HFRF generator 110, the main LFRF generator 112, and the TESLFRF generator 113), a gas source(s) 114 coupled to the plasma process chamber 102, and other components. The controller 116 includes a processor, memory, software logic, hardware logic, and input and output subsystems that communicate with and monitor and control the plasma processing system 100A. In some embodiments, the controller 116 includes one or more recipes that include a plurality of setpoints and various operating parameters (e.g., voltage, current, frequency, pressure, flow rate, power level, temperature, timing parameters, process gas, mechanical movement of the substrate 120, etc.) for operating the plasma processing system 100A. For example, depending on the process being performed, the controller 116 controls the delivery of the process gas sent from the gas source(s) 114 to achieve the designed processing conditions, such as etching of features above the substrate 120 and / or deposition or formation of a film. Next, the selected gas is distributed into the spatial volume defined between the upper electrode 124 and the substrate 120 above the ESC 118.

[0030] Figures 1B-1 through 1B-5 illustrate a plasma processing system including at least one DC power supply that supplies a pulsed DC signal, as further described below, in accordance with an embodiment of the present disclosure. Generally, a DC signal of a constant voltage may be pulsed to supply a pulsed DC signal. Pulsed DC power may offer certain advantages over RF power, such as using less power and not requiring an impedance matching network (i.e., as implemented through a high voltage cable and / or a snubber circuit, etc.). Further, the plasma processing systems of FIGS. 1B-1 and 1B-1B-2 generate plasma by a main HFRF generator 110 coupled to a lower electrode 122 of an ESC. The upper electrode 124 is coupled to ground. On the other hand, the plasma processing systems of FIGS. 1B-3 through 1B-5 generate plasma by an HFRF generator 160 through a corresponding HFRF matching network 165 coupled to the upper electrode 124.

[0031] For example, a plasma processing system 100B-1 of FIG. 1B-1 includes a main HFRF generator 110 that supplies a pulsed RF signal through a main impedance matching network 106 to supply power to a lower electrode 122, in accordance with an embodiment of the present disclosure. Further, a DC pulse source 150A supplies a pulsed DC signal to the lower electrode 122 through a filter and snubber circuit 160A configured to reduce and / or remove any high frequency harmonics (e.g., by attenuation) that occur solely due to the pulsing and to control any oscillation of the signal. In one embodiment, the filter and snubber circuit 160A is located within the main impedance matching network 106, and in another embodiment, the filter and snubber circuit 160A bypasses the main impedance matching network 106. In either case, to generate plasma, a main HFRF signal is combined with the DC pulse signal to drive the lower electrode 122, and the upper electrode 124 is coupled to ground. Further, a TESLFRF generator 113 supplies a pulsed RF signal to an edge ring 126 through a TES impedance matching network 107.

[0032] Also, the plasma processing system 100B-2 of FIG. 1B-2 includes a main HFRF generator 110 that supplies a pulsed RF signal via a main impedance matching network 106 to supply power to the lower electrode 122 in accordance with an embodiment of the present disclosure. Further, the DC pulse source 150A supplies a pulsed DC signal to the lower electrode 122 via a filter and snubber circuit 160A configured to reduce and / or remove any high-frequency harmonics (e.g., by attenuation) that are all caused by pulsing and to control any oscillation of the signal. In one embodiment, the filter and snubber circuit 160A is located within the main impedance matching network 106, and in another embodiment, the filter and snubber circuit 160A bypasses the main impedance matching network 106. In either case, to generate plasma, the main HFRF signal is combined with the DC pulse signal to drive the lower electrode 122, and the upper electrode 124 is coupled to ground. Further, the DC pulse source 150B supplies a pulsed DC signal to the TES edge ring 126 via a filter and snubber circuit 160B. The filter and snubber circuit 160B is configured similarly to the filter and snubber circuit 160A to reduce and / or remove any high-frequency harmonics and to control the oscillation of the pulsed DC signal.

[0033] Furthermore, the plasma processing system 100B-3 of FIGS. 1B-3 includes an HFRF generator 160 that supplies a pulsed RF signal through an HFRF impedance matching network 165 to generate plasma and supplies power to the upper electrode 124. For example, the HFRF generator 160 may be configured to generate a high frequency including frequencies in the range from 13 megahertz (MHz) to 120 MHz, and includes operating at a baseline frequency of 13.56 MHz, or 27 MHz, or 40 MHz, or 60 MHz, or 100 MHz. The matching network 165 enables dynamic adjustment of the power supplied to the upper electrode 124 by matching the impedance between the load (e.g., the plasma chamber and any connecting cables) and the source (e.g., the HFRF generator 160 and any connecting cables). Also, the DC pulse source 150A supplies a pulsed DC signal to the lower electrode 122 through a filter and snubber circuit 160A. Furthermore, the DC pulse source 150B supplies a pulsed DC signal to the TES edge ring 126 through a filter and snubber circuit 160B.

[0034] The plasma processing system 100B-4 of FIG. 1B-4 includes an HFRF generator 160 that supplies a pulsed RF signal through an HFRF impedance matching network 165 to generate plasma and supplies power to the upper electrode 124. Also, the DC pulse source 150A supplies a pulsed DC signal to the lower electrode 122 through a filter and snubber circuit 160A. Furthermore, the TES LFRF generator 113 supplies a pulsed RF signal to the edge ring 126 through a TES impedance matching network 107.

[0035] In other embodiments, in a plasma processing system having a pulsed DC signal that drives the ESC and TES edge rings, the pulsed DC signal can be generated from a single DC pulse source. In that method, there is no time delay between the pulsed DC signals that drive the ESC and TES edge rings. For example, the plasma processing systems of FIGS. 1B-2 and 1B-3 may be configured to include a shared DC pulse source. For illustrative purposes only, FIG. 1B-5, which is a modification of the plasma processing system of FIG. 1B-3, is shown. In particular, the plasma processing system 100B-5 includes an HFRF generator 160 that supplies a pulsed RF signal through an HFRF impedance matching network 165 to supply power to the upper electrode 124 to generate plasma. Also, a shared DC pulse source 150C supplies a plurality of pulsed DC signals. For example, the shared DC pulse source 150C supplies a pulsed DC signal through a filter and snubber circuit 160A to drive the lower electrode 122 within the ESC 118. Also, the shared DC pulse source 150C supplies another pulsed DC signal to the TES edge ring 126 through a filter and snubber circuit 160B. That is, the shared DC pulse source 150C supplies separate pulsed DC signals through separate filter and snubber circuits to drive the edge ring 126 and the ESC 118. In another embodiment, since the shared DC pulse source is implementable within the plasma processing system of FIG. 1B-2, the modification to the plasma processing system of FIG. 1B-2 includes a shared DC pulse source for supplying separate pulsed DC signals and driving the edge ring and the ESC. In that case, the ESC is driven by both a high-frequency pulsed RF signal through a corresponding main impedance matching network and a pulsed DC signal for supplying power to the lower electrode within the ESC.

[0036] In other embodiments, other configurations of HFRF power, LFRF power, and DC power may be utilized where each power source can be pulsed or non-pulsed to supply power to the corresponding plasma processing system. For example, in some embodiments, instead of supplying a pulsed DC signal, a pulsed LFRF signal may be supplied to the lower electrode, including an LFRF generator coupled through a corresponding LFRF impedance matching network.

[0037] FIG. 2A shows a control system 200A utilized to obtain a desired ion tilt at the edge of a wafer by measuring an RF current at the junction between the ESC and the edge ring, according to one embodiment of the present disclosure. For purposes of illustration, control system 200 may be adapted for implementation within the exemplary plasma processing systems of FIGS. 1A and 1B-1 through 1B-5. For example, for purposes of simplicity and clarity, control system 200A includes the plasma processing system described in FIG. 1A (i.e., CCP plasma processing system 100A including an RF power source coupled to the TES edge ring and the ESC). However, the control system shown in FIG. 2A can be implemented with any power configuration of the plasma processing system partially described by FIGS. 1A and 1B-1 through 1B-5 (i.e., implementation of various configurations of pulsed or non-pulsed RF power sources and DC power sources).

[0038] Due to the trade-off between the profile angle or ion tilt at which the substrate is etched and the etching rate, it is difficult to meet the process specifications at the edge of substrate 120. The ion tilt and / or etching rate may be affected by the interaction between the wafer plasma sheath (i.e., the plasma above ESC 118 and substrate 120) and the edge ring plasma sheath (the plasma above edge ring 126 beyond the edge of substrate 120). For example, control of the thickness between the wafer plasma sheath and the edge ring plasma sheath, or particularly control of the plasma density at the junction between ESC 118 and edge ring 126, may be beneficial. In embodiments of the present disclosure, the control may be partially achieved by generating a desired ion tilt from the contributions of the wafer plasma sheath and the edge ring plasma sheath at the junction, and the desired ion tilt is partially achieved by measurement of the RF current and / or pulsed DC current at the junction.

[0039] Control system 200A implements a control method for controlling an adjustable edge ring plasma sheath or TES plasma sheath. As shown, RF power is independently applied to substrate 120 (e.g., via ESC 118) and capacitively coupled edge ring 126 by a plurality of generators. In particular, the plasma sheaths above the wafer and the edge of the substrate are driven by separate RF generators, but may be configured to supply any type of power (e.g., RF, DC, AC, pulsed, non-pulsed, etc.). For example, main HFRF generator 110 and main LFRF generator 112 may be configured as master RF generators, and TES generator 113 may be configured as a slave RF generator. As described above, in other configurations, the generator may be configured as a DC pulse generator that supplies a pulsed DC signal. Generally, the magnitude of the plasma sheath voltage and the phase angle between the wafer plasma sheath and the edge ring plasma sheath can be monitored by a voltage pickup (e.g., a voltage sensor, etc.). The magnitude of each plasma sheath can be adjusted to achieve a process result (e.g., one or more factors, etc.) at the wafer edge, as described below.

[0040] In one embodiment, the master and slave generators operate at the same RF frequency. For example, the phase of the RF voltage and RF power signal is measured at the outputs of the main impedance matching network 106 and the TES impedance matching network 107 by the measurement sensors and / or circuits 210 and 215. In some embodiments, since the measurement sensors and / or circuits are incorporated within the matching network, the measurement sensor and / or circuit 210 is included within the impedance matching network 106, and the measurement sensor and / or circuit 215 is included within the impedance matching network 107. In a configuration where the plasma processing system includes a DC pulse signal that delivers power to the TES 126 and / or the ESC 118, the corresponding measurement sensors and / or circuits may be included, for example, within a power source (such as a voltage sensor located within the DC pulse source) for controlling the same power source. The measured values may be sent to the controller 116, or a generator configured as a controller (such as the slave TES generator 113). After measurement, the frequency of the LFRF generator may be adjusted and fixed to operate at the same value. For example, the TES LFRF generator and / or the main LFRF generator (such as the one that supplies RF power to the ESC) may be fixed, or the LFRF TES generator and the main DC pulse source (such as the one that supplies DC power to the ESC) may be fixed. In particular, the measurement sensor 210 is coupled to the main impedance matching network 106 and configured to measure the modified RF signal supplied by the main LFRF generator 112. For example, the measurement sensor 210 may be configured to measure the voltage and / or phase of the contribution of the main LFRF generator 112 from the modified RF signal (the power combined from the main LFRF generator 112 and the main HFRF generator 110) supplied to the ESC 118 at the output of the main impedance matching network 106. In other power configurations of the corresponding plasma processing system, the measurement sensor is configured to measure the voltage and / or phase of the DC pulse power source. Further, the measurement sensor 215 is coupled to the TES impedance matching network 107 and configured to measure the TES signal supplied by the TES generator 113.For example, the measurement sensor 215 may be configured to measure the voltage and / or phase of the TES signal supplied to the edge ring 126 at the output of the TES impedance matching network 107, and the TES signal may be an RF signal (pulse or non-pulse sine wave signal) or a pulsed DC signal.

[0041] In particular, the control method of the control system 200A controls and / or obtains a desired ion tilt at the edge of the wafer by measuring the RF current and / or pulsed DC current 220 that crosses, passes through, and / or passes through the joint between the ESC and the edge ring, and by adjusting the power or phase relationship between RF generators (for example, various configurations of the main HFRF generator 110, the main LFRF generator 112, the TES LFRF generator 113, and the DC pulse generator), to control the parameters of the edge ring plasma sheath. As shown in the figure, the sensor 240 is placed within the edge ring 126, at a location suitable for measuring the current 220 (for example, RF current and / or pulsed DC current) that crosses the joint between the ESC 118 and the edge ring 126, adjacent to or surrounding the power pin 230. The measurement value from the sensor 240 is sent to the measurement circuit 250, and the measurement circuit 250 outputs one or more measurement values of the RF current and / or pulsed DC current 220, such as the magnitude and / or phase of the current signal 220. One or more measurement values of the current signal 220 are sent to the controller 116.

[0042] In one embodiment, one or more measured values of the current signal 220 are filtered by a filter 260. For example, the filter 260 may be configured to remove the current signal and / or components of the measured value contributed by the main HFRF generator 110, whereby the measured value of the current signal 220 will include only the low-frequency components of the current signal and / or measured value contributed by the main LFRF generator 112, the TES LFRF generator 113, and / or any DC pulse source. For purposes of illustration, the filter 260 may be configured as a band-pass filter that removes contributions from the high-frequency power source.

[0043] Based on the measured values of the current signal 220 (e.g., the phase and / or amplitude of the RF current and / or pulsed DC current), the slave output value is set to a specific value corresponding to the desired process result at the wafer edge. That is, the voltage and / or phase (e.g., the phase emission point) of the TES signal from the TES LFRF generator 113 (or corresponding DC pulse source) is adjusted to obtain the desired result. Thus, by intentionally adjusting and / or controlling the TES signal, the edge plasma sheath is adjusted at the wafer edge, and a predetermined performance at the wafer edge, such as a normal (i.e., 0-degree tilt perpendicular to the wafer) edge or ion tilt at the wafer edge, a predetermined edge or ion tilt at the wafer edge, etc., can be obtained.

[0044] FIG. 2B shows an exemplary sensor 240A configured to measure current (e.g., RF current and / or pulsed DC current) at the junction between the ESC and the edge ring, according to one embodiment of the present disclosure. In particular, the sensor 240A is one embodiment of the sensor 240 of FIG. 2A configured to measure the current traversing the junction between the ESC 118 and the edge ring 126 of the plasma processing system, and is shown for purposes of illustration only. That is, other sensors are also well-suited for measuring the current traversing the junction (i.e., Rogowski coils, Hall effect sensors, etc.).

[0045] As shown, for illustrative purposes only, sensor 240A is configured as a transformer. Sensor 240A is designed to generate a current signal that reflects current 220 that traverses the junction between ESC 118 and edge ring 126. In particular, the generated current 220 that traverses the junction also flows into power pin 230. Sensor 240A configured as a transformer is configured to measure the current flowing within power pin 230. For example, the transformer reflects the current flowing within power pin 230 and generates a current that accordingly reflects current 220. For illustrative purposes only, the current generated by the transformer is proportional to the current flowing within the power pin, which corresponds to current 220 flowing across the junction. The ratio of the current generated by the transformer can be selectable by design (e.g., the ratio is partially determined based on the number of turns of the transformer coil). In this way, current 220 flowing across the junction can be determined based on the current generated by the transformer.

[0046] FIG. 3 is a flow diagram 300 showing a method of obtaining a desired ion tilt at the edge of a wafer by measuring a low frequency current (e.g., RF current and / or pulsed DC current) at the junction between an ESC and an edge ring, according to an embodiment of the present disclosure. The method of flow diagram 300 may be implemented to control processes within the plasma processing systems of FIGS. 1A and 1B-1 through 1B-5, as well as other plasma processing systems. For example, the method of flow diagram 300 may be stored in a computer-readable form in a memory accessible by control module 116 of FIGS. 1A and 1B-1 through 1B-5 to perform the operations of flow diagram 300. Although the flow diagram may be generally applicable to various configurations of plasma processing systems, for illustrative purposes, specific operations may be described with reference to a plasma processing system including a pulsed RF generator, such as the plasma processing system shown in FIG. 1A.

[0047] At 310, the method includes supplying a first power signal to an ESC in a plasma chamber. Generally, the first power signal supplies at least a low-frequency power signal to the ESC. Depending on the configuration of the corresponding plasma processing system, the first power signal may be a pulsed or non-pulsed RF signal, or a pulsed DC signal. When the first power signal is generating plasma, the first power signal may have high-frequency and low-frequency components. For example, in a plasma processing system including a pulsed RF power generator, the first power signal is supplied to an electrostatic chuck (ESC) via a first impedance matching circuit. In particular, the first power signal is an RF signal generated from a first RF signal and a second RF signal. The first RF signal is supplied from a first high-frequency RF generator and supplied to the impedance matching circuit. The second RF signal is supplied from a low-frequency RF generator and supplied to the impedance matching circuit. The first RF signal and the second RF signal are combined such that the first impedance matching circuit outputs the first power signal and the first power signal is sent to the ESC.

[0048] At 320, the method includes supplying a second power signal to an edge ring within the plasma chamber. Generally, the second power signal supplies a low-frequency power signal to the edge ring. Depending on the configuration of the corresponding plasma processing system, the second power signal may be a pulsed or non-pulsed RF signal, or a pulsed DC signal. For example, in a plasma processing system including a pulsed RF power generator, the second power signal is supplied to the edge ring within the plasma chamber via a second impedance matching circuit. In one embodiment, the second power signal is a third RF signal generated from a first low-frequency RF generator, and the third RF signal is supplied to a second impedance matching circuit that outputs the second power signal sent to the edge ring. In one embodiment, the first power signal and the second power signal have fixed frequencies. For example, in a plasma processing system including a pulsed RF power generator, all power signals from various RF power generators have fixed frequencies. In certain embodiments, in a plasma processing system including a pulsed RF power generator, at least the low-frequency power generator has a fixed frequency. That is, at least the low-frequency components of the first power signal and the second power signal have fixed frequencies such that the frequencies of the second RF signal (e.g., low-frequency RF to the ESC) and the third RF signal (low-frequency RF to the edge ring) are fixed.

[0049] In other embodiments, the pulsed DC signal is sent to at least one of the ESC and the edge ring as described above. For example, in one configuration of the plasma processing system, the power delivery to the electrodes within the ESC is a pulsed DC signal at a high voltage optionally combined with a high frequency RF signal, and the power signal to the edge ring is a low frequency pulsed RF signal. In another configuration, the power delivery to the electrodes within the ESC is a pulsed DC signal at a high voltage optionally combined with a high frequency pulsed RF signal, and the power signal to the edge ring is a pulsed DC signal. In another configuration, the power delivery to the electrodes within the ESC is pulsed DC at a high voltage, and the power signal to the edge ring is also a pulsed DC signal, and both are pulsed at the same frequency. In yet another configuration, the power delivery to the electrodes within the ESC is a pulsed DC signal at a high voltage, and the power signal to the edge ring is a pulsed RF signal. The pulsed high voltage DC power source (e.g., a component of the main power) generates at the ESC a voltage sufficient to drive positive ions to the substrate due to the negative self - biasing action of the substrate. In still other embodiments, the main power delivery and the power signal to the edge ring can be pulsed or non - pulsed RF power signals. In still other embodiments, the main power delivery and the power signal to the edge ring are a combination of pulsed and non - pulsed RF power signals and DC power signals.

[0050] At 330, the method includes measuring the amplitude of a low-frequency current signal generated at the junction between the ESC and the edge ring. In one embodiment, the current signal is an RF current signal that crosses the junction, such as when the power delivery system to the main electrode of the ESC and the electrode in the edge ring operates at the same frequency. In other embodiments, the current signal is an RF current signal and / or a pulsed DC current signal that crosses the junction. Measuring the low-frequency current in this embodiment allows for a more direct measurement of the current generated at the junction and is independent of the drive impedance of the power source that supplies power to the ESC and the edge ring. This is more useful than conventional systems that relied on a voltage sensor remote (i.e., downstream) from the junction between the ESC and the edge ring to set a predetermined phase relationship between power signals transmitted by separate generators operating at the same frequency, a predetermined phase relationship that gives a desired result (e.g., a desired ion tilt). In conventional systems, voltage measurements had the inaccuracy of giving different phase information based on the source impedance of the matching network, the length of the RF cable feeding the edge ring, and the filter at the end of the RF cable.

[0051] In one embodiment, the measured low-frequency current signal is filtered from the RF current signal to remove the contribution of the high-frequency components generated by a first RF signal (e.g., generated by an HFRF generator). This is to focus on the contribution of a second low-frequency RF signal (e.g., a low-frequency RF signal from a low-frequency RF generator). For example, if the second RF signal is 400 kHz, the measured current signal is filtered to obtain the amount of current at 400 kHz at the junction.

[0052] At 340, the method includes adjusting one or more parameters of the first power signal and the second RF signal to obtain the minimum amplitude of the measured low-frequency current signal. In particular, although not wishing to be bound by theory or mechanism of action, the amount of current signal passing through the joint is thought to be correlated with ion tilt control. Therefore, a current (e.g., RF current and / or pulsed DC current) is measured at the joint between the ESC and the edge ring for the purpose of balancing the power and / or voltage at the joint. More specifically, when the phase between the voltage signals provided by the first power signal or main power signal sent to the ESC and the second power signal sent to the edge ring is at a nominal value (e.g., at the same phase) with respect to the voltage setpoint of a given edge ring, the RF current between the ESC and the edge ring is at a minimum value, and as a result, the power and / or voltage supplied by the power source is balanced at the joint. For purposes of illustration, when the power and / or voltage is balanced at the joint, during a given pulse, the plasma sheath along the edge ring 126 is coplanar with the plasma sheath along the wafer sheath, and as a result, the ion incidence is substantially perpendicular to the substrate (i.e., 0 degrees or perpendicular to the substrate). As a result, the spread of the ion angle (e.g., ion tilt angle) at the extreme of the substrate is reduced or eliminated.

[0053] At 350, the method includes determining the phase relationship between the phase of the low-frequency current signal and the phase of the reference signal to determine the direction of ion tilt at the joint between the ESC and the edge ring. For example, at the joint, the amplitude and phase of the low-frequency current signal are measured. Additionally, the phase of the reference signal may also be measured. In one embodiment, the reference signal is the main low-frequency RF power signal. In particular, when the phase of the low-frequency current signal lags behind the phase of the reference signal, this may indicate that the direction of ion tilt at the joint between the ESC and the edge ring is towards the center of the substrate or away from the center of the substrate. Conversely, when the phase of the low-frequency current signal leads the phase of the reference signal, this may indicate the opposite effect. When the phase of the low-frequency current signal lags behind the phase of the reference signal and the direction of ion tilt is towards the center of the substrate, when the phase of the low-frequency current signal leads the phase of the reference signal, the direction of ion tilt is reversed, i.e., the direction of ion tilt is away from the center of the substrate.

[0054] At 360, the method includes adjusting at least one parameter of a second power signal (e.g., a TES signal) based on the phase relationship and amplitude of a low-frequency current signal to obtain a predetermined angle of ion tilt at the junction between the ESC and the edge ring. In particular, as described above, the phase relationship may provide the direction of the ion tilt based on a measurement method (i.e., whether it is directed towards the center of the substrate or away from the center of the substrate), and the magnitude of the low-frequency current signal may provide the magnitude of the direction or the angle from perpendicular (i.e., 0 degrees). For example, a measurement method may be established by measuring a voltage signal at an appropriate location to determine the amplitude, phase relationship, and / or time delay of the arrival signal that crosses the junction between the ESC and the powered edge ring that produces the ESC and the desired result (e.g., a desired ion tilt angle, etc.). Generally, it is understood that by adjusting the relative power or voltage, phase relationship, and / or time delay between the power signals supplied to the ESC and the edge ring, the vector direction of the electric field that crosses the junction between the ESC and the edge ring can be controlled. The measurement method further includes understanding that the relative power or voltage, phase relationship, and / or time delay between the TES signal measured at the junction and the low-frequency current signal can be adjusted to similarly control the vector direction of the electric field that crosses the junction. For example, the power or voltage, phase relationship, and / or time delay of the power and / or current signal can be adjusted by changing one or more parameters of the TES signal supplied to the edge ring. By adjusting this power or voltage, phase, and / or time delay of the power and / or low-frequency current signal, more power is drawn from the electrodes in the ESC towards the edge of the substrate, or more power is pushed towards the ESC at the junction.

[0055] In particular, in one embodiment, the phase relationship is determined between the low-frequency RF signal supplied to the ESC and the low-frequency RF current signal. This phase relationship may be controlled by adjusting one or more parameters of the TES signal. In this way, the signals are ensured to reach the junction with the same amplitude, and there is no phase difference or there is a certain phase difference at the junction, so that they cancel each other out at the junction and the minimum low-frequency current (e.g., RF current) is generated by adjusting the phase relationship. For example, in order to generate a current that is approximately zero (0) at the junction, in some cases, the degree of the phase difference at the junction may be approximately zero (0) degrees (the signals reach the junction with the same amplitude and generate a zero (0) network current through the junction), in other cases, the degree of the phase difference may be approximately + / -180 degrees, and in other cases, the degree of the phase difference may be a value between 0 and + / -180 degrees. In another embodiment, the time delay of the pulsed DC signal to the ESC and / or the time delay of the pulsed DC signal to the TES edge ring are considered. That is, the length of the cable between the corresponding pulsed DC generator and the ESC or the TES edge ring causes the time delay of the corresponding pulsed DC signal. Determine the relationship between the time delay of the pulsed DC signal to the TES edge ring and the time delay of the pulsed DC signal to the ESC, and adjust so that the signals are ensured to reach the junction with the same amplitude but the phases are shifted by approximately + / -180 degrees, so that they cancel each other out at the junction and are adjusted to generate the minimum low-frequency current (e.g., about 400 KHz).

[0056] For example, FIG. 4 shows that, according to one embodiment of the present disclosure, the effective local electric field across the bonding portion 450 is affected by the electric field 430 of the wafer plasma sheath and the electric field 435 of the edge ring plasma sheath. When the power supplied by the power source to the ESC and / or the combination 410 of the substrates is balanced with the TES power source for the edge ring 126, the electric field is canceled (i.e., the effective electric field becomes zero (0)), and as a result, the ion tilt 420 becomes 0 degrees. The ion tilt can be adjusted by adjusting the power or voltage, phase relationship, and / or time delay of the power and / or current signal, such as by changing one or more parameters of the TES signal that supplies power to the edge ring. In one embodiment, the emission point of the TES signal is adjusted to obtain a desired result (e.g., a desired ion tilt) established by a measurement method. In another embodiment, the voltage of the TES signal is adjusted to obtain a desired result, such as a desired ion tilt that is at an angle away from 0 degrees (e.g., indicated by various angles on the dotted line 460). For example, merely by way of illustration, increasing the voltage of the TES signal may push more power from the edge ring to the ESC (e.g., the electric field of the edge ring plasma sheath), thereby achieving an ion tilt (e.g., tilt 423) directed towards the center of the substrate. Accordingly, the voltage of the TES signal may be decreased to draw power towards the edge ring, thereby achieving an ion tilt (e.g., tilt 425) directed away from the center of the substrate.

[0057] In one embodiment, when applying a pulsed high-voltage DC power source to supply power to the ESC, several precautions may be necessary. For example, the DC pulse supplies a high inrush current that drives the total capacitance presented to the power supply by the hardware of the process chamber. In some cases, the DC pulse generates ringing in the output of the power supply determined by the natural resonance of the chamber hardware and the lower electrode supply system that acts like a transmission line with a specific characteristic impedance. By using an appropriate snubber circuit, the ringing effect can be reduced, providing a smoother but faster rise time and fall time. For example, the snubber network may limit voltage transients (such as voltage spikes). The snubber circuit and / or the pulse shaping network may be composed of one or more of a resistor, an inductor, a capacitor, a clamping diode or a clover diode, and other circuit elements.

[0058] In an embodiment, the substrate positioning program may include program code for controlling chamber components used to place a substrate on a pedestal or chuck and control the spacing between the substrate and other components of the chamber such as gas inlets and / or targets. The substrate positioning program may be implemented by the control system 116 or a controller of FIGS. 1A and 1B-1 through 1B-5. In some embodiments, the controller may be part of the system and part of the example described above. Such a system may comprise a semiconductor processing apparatus including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (such as a substrate pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of semiconductor wafers or substrates. The controller may be programmed to control the processes implemented to operate any of the processes and plasma chambers disclosed herein, depending on the processing requirements and / or the type of system. The program instructions may be instructions transmitted to the controller in the form of various individual settings (or program files) that define the operating parameters for performing a particular process on or for a semiconductor substrate or for the system. The operating parameters may, in some embodiments, be part of a recipe defined by a process engineer to achieve one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0059] In some embodiments, the controller is part of a computer that is integrated with the system, coupled to the system, network-connected to the system, or a combination thereof, or may be coupled to a computer. For example, the controller may be within the "cloud" or be part of all or part of a fab host computer system, thereby enabling remote access for substrate processing. The computer may monitor the current progress of fabrication operations, verify the history of past fabrication operations, verify trends or performance metrics from multiple fabrication operations, change the parameters of the current process, set process steps following the current process, or initiate a new process by enabling remote access to the system. In some examples, a remote computer (e.g., a server) may provide a process recipe to the system through a network that may include a local network or the Internet.

[0060] Exemplary systems may include, but are not limited to, a plasma etching chamber or module, a deposition chamber or module, a spin rinse chamber or module, a metal plating chamber or module, a cleaning chamber or module, a bevel edge etching chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, a plasma enhanced chemical vapor deposition (PECVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etching (ALE) chamber or module, an ion implantation chamber or module, a tracking chamber or module, and any other semiconductor processing system related to or usable in the fabrication and / or manufacture of semiconductor wafers.

[0061] The description of the above embodiments is provided for purposes of illustration and explanation. It is not intended to be exclusive or to limit the disclosure. The individual elements or features of a particular embodiment are generally not limited to that particular embodiment and, where applicable, are interchangeable and usable in the selected embodiment even if not specifically illustrated or described. Similarly, many modifications may be made in various ways. Such variations are not regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.

[0062] The foregoing embodiments have been described in some detail for purposes of clarity of understanding, but it will be apparent that certain changes and modifications can be made within the scope of the appended claims. Accordingly, the embodiments are to be regarded as illustrative rather than restrictive, and the embodiments should not be limited to the details given herein, but may be modified within the scope and equivalents of the claims.

Claims

1. A method comprising: Supplying a first power signal to an electrostatic chuck (ESC) in a plasma chamber; Supplying a second power signal to an edge ring in the plasma chamber; Measuring an amplitude of a low-frequency current signal generated at a joint between the ESC and the edge ring; Adjusting one or more parameters of the first power signal and the second power signal to obtain a minimum amplitude of the low-frequency current signal; Determining a phase relationship between a phase of the low-frequency current signal and a phase of a reference signal to determine a direction of ion tilt at the joint between the ESC and the edge ring; Adjusting at least one parameter of the second current signal based on the phase relationship and the amplitude of the low-frequency current signal to obtain a predetermined angle of the ion tilt at the joint between the ESC and the edge ring A method.

2. The method according to claim 1, further comprising: Supplying a first RF signal from a first high-frequency RF generator through a first impedance matching circuit; Supplying a second RF signal from a low-frequency RF generator through the first impedance matching circuit; Combining the first RF signal and the second RF signal in the first impedance matching circuit to generate the first power signal And wherein The low-frequency current signal is an RF current signal.

3. The method according to claim 2, further comprising: Providing a third RF signal from the low-frequency RF generator to a second impedance matching circuit to generate the second power signal.

4. The method according to claim 3, wherein A method further comprising fixing the frequencies of the second RF signal from the low-frequency RF generator and the third RF signal from the low-frequency RF generator. **Claim 5** The method according to claim 2, further comprising filtering out the contribution of the first RF signal supplied by the first high-frequency RF generator from the low-frequency current signal. **Claim 6** The method according to claim 2, wherein the reference signal is the second RF signal from the low-frequency RF generator as a component of the first power signal. **Claim 7** The method according to claim 1, further comprising adjusting at least one of the emission point, voltage, and time delay of the second power signal to obtain the predetermined angle of the ion tilt. **Claim 8** The method according to claim 1, further comprising synchronously pulsing the first power signal and the second power signal. **Claim 9** The method according to claim 1, wherein the first power signal and the second power signal are pulsed RF signals, or continuous RF signals, or pulsed DC signals comprising. **Claim 10** A non-transitory computer-readable medium storing a computer program for performing the method, the computer-readable medium comprising program instructions for supplying a first power signal to an electrostatic chuck (ESC) in a plasma chamber, and program instructions for supplying a second power signal to an edge ring in the plasma chamber, Program instructions for measuring the amplitude of a low-frequency current signal generated at the joint between the ESC and the edge ring, Program instructions for adjusting one or more parameters of the first power signal and the second power signal to obtain the minimum amplitude of the low-frequency current signal, Program instructions for determining the phase relationship between the phase of the low-frequency current signal and the phase of a reference signal to determine the direction of ion tilt at the joint between the ESC and the edge ring, Program instructions for adjusting at least one parameter of the second power signal based on the phase relationship and the amplitude of the low-frequency current signal to obtain a predetermined angle of ion tilt at the joint between the ESC and the edge ring A non-transitory computer-readable medium comprising.

11. The non-transitory computer-readable medium according to claim 10, wherein Program instructions for supplying a first RF signal from a first high-frequency RF generator through a first impedance matching circuit, Program instructions for supplying a second RF signal from a low-frequency RF generator through the first impedance matching circuit, Program instructions for combining the first RF signal and the second RF signal in the first impedance matching circuit to generate the first power signal, Program instructions for supplying a third RF signal from the low-frequency RF generator to a second impedance matching circuit to generate the second power signal Further comprising, The non-transitory computer-readable medium, wherein the low-frequency current signal is an RF current signal.

12. The non-transitory computer-readable medium according to claim 11, wherein A non - transient computer - readable medium further comprising program instructions for fixing the frequencies of the second RF signal from the low - frequency RF generator and the third RF signal from the low - frequency RF generator. **Claim 13** The non - transient computer - readable medium according to claim 11, further comprising program instructions for filtering the contribution of the first RF signal supplied by the first high - frequency RF generator from the low - frequency current signal. **Claim 14** The non - transient computer - readable medium according to claim 11, further comprising program instructions for adjusting at least one of the emission point, voltage, and time delay of the second power signal to obtain the predetermined angle of the ion tilt. **Claim 15** The non - transient computer - readable medium according to claim 11, wherein in the method, the first power signal and the second power signal are pulsed RF signals, or continuous RF signals, or pulsed DC signals and comprising a non - transient computer - readable medium. **Claim 16** A computer system, comprising a processor and a memory coupled to the processor and storing instructions therein that, when executed by the computer system, cause the computer system to execute a method, wherein the method comprises supplying a first power signal to an electrostatic chuck (ESC) in a plasma chamber, supplying a second power signal to an edge ring in the plasma chamber, measuring the amplitude of a low - frequency current signal generated at a junction between the ESC and the edge ring. To obtain the minimum amplitude of the low-frequency current signal, adjusting one or more parameters of the first power signal and the second power signal; Determining the phase relationship between the phase of the low-frequency current signal and the phase of a reference signal to determine the direction of ion tilt at the joint between the ESC and the edge ring; Based on the phase relationship and the amplitude of the low-frequency current signal, adjusting at least one parameter of the second power signal to obtain a predetermined angle of the ion tilt at the joint between the ESC and the edge ring; A computer system comprising. **Claim 17** The computer system according to claim 16, wherein The method includes Supplying a first RF signal from a first high-frequency RF generator through a first impedance matching circuit; Supplying a second RF signal from a low-frequency RF generator through the first impedance matching circuit; Combining the first RF signal and the second RF signal in the first impedance matching circuit to generate the first power signal; Supplying a third RF signal from the low-frequency RF generator to a second impedance matching circuit to generate the second power signal; Further comprising, The computer system, wherein the low-frequency current signal is an RF current signal. **Claim 18** The computer system according to claim 17, wherein The method further includes Filtering the contribution of the first RF signal supplied by the first high-frequency RF generator from the low-frequency current signal. **Claim 19** The computer system according to claim 16, wherein The method includes A computer system further comprising adjusting at least one of the emission point, voltage, and time delay of the second power signal to obtain the predetermined angle of the ion tilt.

20. The computer system according to claim 16, In the method, the first power signal and the second power signal are a pulsed RF signal, or a continuous RF signal, or a pulsed DC signal and a computer system including the same.

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