Process for manufacturing a semiconductor or piezoelectric structure

Abstract

The present invention is a process for manufacturing a semiconductor or a piezoelectric structure, comprising: (a) providing a donor substrate (11) comprising a semiconductor or a piezoelectric layer (5); (b) providing a receiver substrate (12); (c) treating the free surface (7) of the donor substrate (11) and / or the free surface (9) of the receiver substrate (12); (d) bonding the donor substrate (11) to the receiver substrate (12), wherein at least one treated surface (7, 9) is at the interface between the donor substrate (11) and the receiver substrate (12); (e) transferring a portion of the semiconductor (3) or the piezoelectric layer (5) from the donor substrate (11) to the receiver substrate (12), and continuously including: The treatment of the free surface (7) of the donor substrate (11) and / or the free surface (9) of the receiver substrate (12) comprises: (c1) a chemical mechanical polishing step; (c2) a step of removing substances in the peripheral region of the polished surface (7, 9), and relates to a process.

Description

Technical Field

[0001] The present invention relates to a process for manufacturing a semiconductor or a piezoelectric structure.

Background Art

[0002] The transfer of an active layer, i.e., a layer intended for the formation of components for electronic, optical, or optoelectronic devices, onto a carrier substrate by an electrically insulating layer is widely used in the microelectronics industry.

[0003] In some cases, the active layer is obtained by thinning a donor substrate, which is carried out by removing material such as by grinding. In order to improve the surface finish of the active layer before bonding, it is generally necessary to perform chemical mechanical polishing (CMP).

[0004] This is particularly applicable when manufacturing high-frequency (RF) devices such as resonators or filters on a substrate that generally continuously comprises a carrier substrate made of a semiconductor material such as silicon, an electrically insulating layer, and a piezoelectric layer from the base to the surface.

[0005] The piezoelectric layer is typically obtained by transferring a thick substrate made of a piezoelectric material onto a carrier substrate.

[0006] The transfer of the piezoelectric layer involves bonding a thick piezoelectric substrate to a carrier substrate and then thinning the thick piezoelectric substrate so as to leave only a thin piezoelectric layer on the carrier substrate, and this layer has a thickness desirable for the manufacture of RF devices.

[0007] In order to obtain good adhesion between the piezoelectric substrate and the carrier substrate, generally, a layer of oxide (e.g., silicon oxide) is formed on each of the two substrates, and the substrates are bonded via the aforementioned oxide layer.

[0008] The oxide layer formed on the surface of the carrier substrate may be formed by thermal oxidation. For example, in the case of a silicon substrate, a silicon oxide layer can be formed. However, thermal oxidation has several drawbacks. This may be incompatible with certain materials, such as a layer for capturing charges made of polycrystalline silicon. Furthermore, thermal oxidation produces an oxide layer that does not allow good diffusion of, for example, lithium or hydrogen.

[0009] Therefore, the deposition of the oxide layer by PECVD is often preferred over thermal oxidation. The oxide layer can then be polished, for example, by chemical mechanical polishing.

[0010] To strengthen the oxide-oxide bond between the piezoelectric substrate and the carrier substrate, it is known to perform a strengthening anneal after bonding. The strengthening anneal is typically carried out at a temperature of 100°C to 300°C.

[0011] However, since the piezoelectric material and the material of the carrier substrate have very different coefficients of thermal expansion, implementing such an annealing may cause the assembly to deform significantly.

[0012] To overcome this type of problem, it is known to use a pseudo-donor substrate, i.e., a heterostructure in which the piezoelectric substrate is bonded to a handle substrate.

[0013] The process for manufacturing a pseudo-donor substrate generally includes several steps. Thereby, a thick layer made of a piezoelectric material is bonded to the handle substrate. Next, the layer made of the piezoelectric material is thinned and optionally trimmed. Finally, the free surface of the thinned layer made of the piezoelectric material is polished, for example, by a chemical mechanical polishing (CMP) process and optionally covered with a thin oxide layer to perform the oxide-oxide bond described above.

[0014] After joining the aforementioned pseudo-donor substrate and the carrier substrate, the piezoelectric substrate is held between the handle substrate and the carrier substrate. The selection of the materials and thicknesses of the handle substrate and the carrier substrate makes it possible to ensure a specific symmetry of the coefficient of thermal expansion, and thus makes it possible to minimize the deformation of the assembly during the application of heat treatment.

[0015] However, when implementing the process for manufacturing such a piezoelectric-on-insulator type structure, the applicants have observed defects in the joining between the pseudo-donor substrate and the carrier substrate in the form of voids called "edge joining voids" where joining does not occur at the peripheral part of the substrate. SUMMARY OF THE INVENTION MEANS FOR SOLVING THE PROBLEM

[0016] One object of the present invention is to improve the joining process between a donor substrate and a receiver substrate during the manufacture of an active layer-on-insulator type structure, wherein the surface of the donor substrate to be joined and / or the surface of the receiver substrate to be joined is polished before the joining.

[0017] For that purpose, the present invention (a) providing a donor substrate comprising a semiconductor or piezoelectric layer; (b) providing a receiver substrate; (c) treating the free surface of the donor substrate and / or the free surface of the receiver substrate; (d) joining the donor substrate to the receiver substrate, wherein at least one of the aforementioned treated surfaces is at the interface between the donor substrate and the receiver substrate; (e) transferring a portion of the semiconductor or piezoelectric (5) layer from the donor substrate to the receiver substrate, and continuously includes The treatment of the free surface of the donor substrate and / or the free surface of the receiver substrate is (c1) a chemical mechanical polishing step; A process for manufacturing a semiconductor or piezoelectric structure is proposed, which continuously includes a step of removing substances in the peripheral region of the polished surface.

[0018] By removing substances in the peripheral region of one and / or the other bonded surface of the pre-polished substrate, it becomes possible to improve the flatness of the surface before bonding, thereby improving the bonding quality.

[0019] According to other features of the present invention, which are optional and can be implemented alone or in combination when technically possible, At the end of the chemical mechanical polishing step of the donor substrate and / or the receiver substrate (c1), the polished surface has a relief at the periphery of the aforementioned substrate, whereby the step of removing substances (c2) in the peripheral region of the surface is carried out to flatten the relief. The removal of the peripheral substances is carried out by pulverizing with an ion beam focused on the region around the periphery of the polished semiconductor or piezoelectric layer, and the ion beam scans the entire periphery. The removal of the peripheral substances is carried out after recording the topographic shape of the polished surface by shape measurement, and the modified shape after substance removal has only one maximum value, and the maximum value is implemented such that it is the point closest to the center of the polished surface of the modified contour. A part of the semiconductor or piezoelectric layer of the donor substrate transferred to the receiver substrate is defined by forming a weakened region before bonding (d) of the donor substrate to the receiver substrate, whereby the transfer of the aforementioned part to the receiver substrate includes peeling the donor substrate along the weakened region. The weakened region in the donor substrate is formed by injecting hydrogen and / or helium. The donor substrate is provided with a piezoelectric layer, the surface of the donor substrate to be processed and bonded is the free surface of the piezoelectric layer, and the transferred part of the donor substrate is part of the piezoelectric layer. The provision of the donor substrate is such that chemical mechanical polishing (c1) is carried out on the free surface of the thinned piezoelectric layer on the side opposite to the handle substrate. (a1) bonding a thick piezoelectric layer to a handle substrate; (a2) successively including thinning the thick piezoelectric layer from a side opposite to the handle substrate; The thick piezoelectric layer has a thickness of 100 μm to 2 mm, preferably 200 μm to 1 mm, and the thinly polished piezoelectric layer has a thickness of 1 μm to 100 μm, preferably 5 μm to 50 μm. The step of the donor substrate further includes (a3) removing a peripheral portion of the donor substrate before chemical mechanical polishing (c1) of the free surface of the thinned piezoelectric layer. The donor substrate includes a semiconductor layer, the surface of the donor substrate to be processed and bonded is the free surface of the semiconductor layer, and a part of the donor substrate to be transferred is a part of the semiconductor layer. This process further includes forming an oxide layer on the free surface of the semiconductor layer or the piezoelectric layer, whereby bonding (d) of the donor substrate to the receiver substrate is performed through the oxide layer. The oxide layer formed on the surface of the polished semiconductor or piezoelectric layer has a thickness of 10 nm to 10 μm, preferably 30 nm to 5 μm. Step (c) includes treating the free surface of the semiconductor layer or the piezoelectric layer of the donor substrate, and forming the oxide layer on the free surface is performed after the aforementioned treatment step (c) and before bonding (d). Providing the receiver substrate (b) includes forming an electrically insulating layer, preferably an oxide layer, and the surface of the receiver substrate to be processed and bonded is the free surface of the electrically insulating layer. The electrically insulating layer formed on the surface of the receiver substrate has a thickness of 10 nm to 10 μm, preferably 30 nm to 5 μm. The electrically insulating layer is formed by plasma enhanced chemical vapor deposition (PECVD). The step of removing the substance (c2) is performed over the entire polished surface of the receiver substrate. The amount of the substance locally removed on the surface of the electrically insulating layer during the step of removing the substance on the surface of the aforementioned electrically insulating layer is determined based on the measured value of the thickness of the electrically insulating layer by ellipsometry and / or reflectance measurement.

Brief Description of the Drawings

[0020] Other features and advantages of the present invention will become apparent from the following detailed description with reference to the accompanying drawings.

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[0021] For ease of viewing, the drawings are not necessarily drawn to scale.

Best Mode for Carrying Out the Invention

[0022] The present invention relates to a process for manufacturing a multilayer component, which includes transferring an active layer from a donor substrate to a receiver substrate.

[0023] In order to improve the quality of the bond between the donor substrate and the receiver substrate during the implementation of the transfer, if the two surfaces forming the bonding interface are too rough to promote good bonding, it may be preferable to perform chemical mechanical polishing on at least one of the surfaces before the bonding. This is the case, for example, when one of the bonding surfaces is formed during thinning of the layer by grinding. Nevertheless, the multilayer structures resulting from such processes have many voids at their bonding interfaces around them, which impairs the quality of the bond between the transferred active layer and the receiver substrate.

[0024] The inventors have found that during the manufacture of such multilayer structures, tiny droplets of condensed water are trapped around the periphery of the substrate at the limit of the propagation of the bonding wave when the aforementioned substrates are bonded. The inventors believe that these condensed microdroplets cause voids visible in the final multilayer structure.

[0025] The inventors have also found that the free surface of a substrate polished by chemical mechanical polishing has a relief in the form of an excessive thickness around it. The inventors suggest that it is this peripheral relief that traps condensed water around the periphery of the substrate during bonding of the substrates and creates the voids observed in the final multilayer structure.

[0026] In this regard, the present invention relates to a process for manufacturing a multilayer structure including transferring an active layer from a donor substrate to a receiver substrate, at least one of the two bonding interfaces being polished before bonding of the two substrates, and the process further includes a step of removing peripheral material of at least one of the two polished surfaces.

[0027] A piezoelectric-on-insulator type multilayer structure 10 shown in FIG. 1, continuously from its back surface to its front surface, a carrier substrate 1, an electrical insulation layer 2, preferably an oxide layer, a piezoelectric layer 3, and a structure comprising the same is prepared. Specific embodiments of the present invention will be described below.

[0028] As an example, the piezoelectric layer 3 is made of a material such as lithium tantalate (LiTaO3), lithium niobate (LiNbO3), barium titanate (BaTiO3) and / or lead zirconate titanate (PZT). The piezoelectric layer 3 has a thickness of 50 nm to 20 μm, preferably 100 nm to 10 μm.

[0029] The electrical insulation layer 2 may contain silicon oxide, nitride and / or carbide (SiO x , SiO x N y , SiN x , SiC x , SiO x C y ), and / or a polymer, where x and y are real numbers from 0 to 2. The electrical insulation layer has a thickness of 10 nm to 10 μm, preferably 30 nm to 5 μm.

[0030] Finally, the carrier substrate 1 is a substrate made of, for example, silicon (Si), sapphire, alumina (Al2O3), aluminum nitride (AlN), glass, quartz, mullite, molybdenum (Mo), tungsten (W), indium phosphide (InP), gallium arsenide (GaAs) and / or silicon carbide (SiC). The carrier substrate 1 has a thickness of 10 μm to 2 mm, preferably 200 μm to 1 mm.

[0031] Such a piezoelectric-on-insulator type 10 structure is used in the fields of high-frequency components and filters.

[0032] In this particular embodiment, the process according to the invention comprises providing a donor substrate 11 comprising a piezoelectric layer 3 to be transferred, providing a receiver substrate 12 comprising a carrier substrate 1 and an electrical insulation layer 2, and transferring the piezoelectric layer 3 transferred from the donor substrate 11 to the receiver substrate 12, wherein the electrical insulation layer 2 is at the bonding interface (see FIG. 9).

[0033] According to this embodiment, the donor substrate 11 shown in FIG. 2 extends from its back surface to its front surface, a handle substrate 4, a thinned piezoelectric layer 5 defining the piezoelectric layer 3 to be transferred to the receiver substrate 12, optionally, an electrical insulation layer 6, preferably an oxide layer, and is a heterostructure generally called a virtual donor substrate.

[0034] The piezoelectric material of the piezoelectric layer 3 and the material of the carrier substrate 1 have significantly different coefficients of thermal expansion. If a layer made of a piezoelectric material without a handle substrate on the carrier substrate and having an electrical insulation layer at the interface is deposited, for example, when performing thermal annealing to strengthen the bonding interface between the layer made of the piezoelectric material and the carrier substrate, the resulting multilayer structure undergoes significant deformation.

[0035] Therefore, the handle substrate 4 is made of a material having a coefficient of thermal expansion close to that of the carrier substrate 1 intended to transfer the piezoelectric layer 3. The term "close" is understood to mean that the difference in the coefficient of thermal expansion between the material of the handle substrate 4 and the material of the carrier substrate 1 is 5% or less, preferably 0% or less or in the vicinity thereof. Suitable materials are, for example, silicon, sapphire, polycrystalline aluminum nitride, or gallium arsenide. Preferably, the handle substrate 4 is made of the same material as the carrier substrate 1. In the present invention, attention is paid to the coefficient of thermal expansion in a plane parallel to the main surface of the substrate. The handle substrate 4 has a thickness of 100 μm to 2 mm, preferably 200 μm to 1 mm. Preferably, the handle substrate 4 has a thickness close to that of the carrier substrate 1, and as a result, the structure obtained after bonding the donor substrate 11 to the receiver substrate 12 is as symmetric as possible and as balanced as possible with respect to mechanical and thermal behavior. The coefficient of thermal expansion and thickness of the handle substrate 4 that are close to the coefficient of thermal expansion and thickness of the carrier substrate 1, respectively, make it possible to minimize the stress and its deformation on the multilayer structure under the influence of temperature fluctuations.

[0036] The electrical insulating layer 6 is, for example, silicon oxide, nitride and / or carbide (SiO x , SiO x N y , SiN x , SiC x , SiO x C y ), and / or a polymer, where x and y are real numbers from 0 to 2. The electrical insulating layer 6 has a thickness of 10 nm to 10 μm, preferably 30 nm to 5 μm.

[0037] Provision of a donor substrate and optional treatment of the free surface of the donor substrate As shown in FIG. 3, the formation of the donor substrate 11 includes bonding a thick piezoelectric layer 8 to the handle substrate 4.

[0038] The thick piezoelectric layer 8 has a thickness of 100 μm to 2 mm, preferably 200 μm to 1 mm. The thick piezoelectric layer 8 is formed from the piezoelectric material that constitutes the piezoelectric layer 3 in the final piezoelectric on-insulator structure 10. Thus, the thick piezoelectric layer 8 can include LiTaO3, LiNbO3, BaTiO3, and / or PZT.

[0039] The bonding of the thick piezoelectric layer 8 to the handle substrate 4 is carried out, for example, using a photo-polymerizable adhesive layer pre-deposited on the exposed surface of the handle substrate 4 or the thick piezoelectric layer 8. The photo-polymerizable adhesive layer is preferably deposited by spin coating. The bonding by the photo-polymerizable adhesive layer has the advantage of having fewer manufacturing steps than molecular bonding. Furthermore, the polymer, which is initially liquid, smooths out flatness defects and partially compensates for the lower edges resulting from the chamfering of the substrate. Thus, the bonding by the photo-polymerizable adhesive layer enables the substrate to be bonded closer to its periphery than by molecular bonding.

[0040] Alternatively, the bonding of the thick piezoelectric layer 8 to the handle substrate 4 is carried out by molecular bonding, bonding by molecular milling under ultra-high vacuum, or metal / metal bonding by thermocompression bonding.

[0041] After bonding the thick piezoelectric layer 8 to the handle substrate 4, the thick piezoelectric layer 8 is thinned from the side opposite to the handle substrate so that the thinned piezoelectric layer 5 has a thickness of 1 μm to 100 μm, preferably 5 μm to 50 μm, as shown in FIG. 4.

[0042] The thinning of the thick piezoelectric layer 8 is carried out, for example, by rough grinding, which enables the thickness of the donor substrate 11 to be rapidly reduced. Next, finer grinding can be carried out to continue reducing the thickness of the donor substrate 11 while reducing the roughness of the surface of the donor substrate 11.

[0043] Finally, chemical mechanical polishing (CMP) is performed to achieve the desired roughness for bonding the dummy donor substrate 11 to the carrier substrate 12, and thus improve the bonding quality, smoothing the free surface 7 of the thinned piezoelectric layer 5 on the side opposite the handle substrate 4.

[0044] Before the chemical mechanical polishing, the process can further include a step of trimming the piezoelectric layers 8, 5. The trimming step may be performed before, during (e.g., between two grinding operations with different fineness) or after the step of thinning the piezoelectric layers 8, 5. Trimming includes removing peripheral substances at least over the thickness of the piezoelectric layers 8, 5.

[0045] The thick piezoelectric layer 8 has a chamfered edge C on each of its main surfaces (not shown). The purpose of the trimming step is to remove the acute angles that occur when the dummy donor substrate 11 is thinned at the chamfer when the thickness e of the thinned piezoelectric layer 5 is less than the thickness of the chamfered edge C of the thinned piezoelectric layer 5, creating a right angle (or obtuse angle). Specifically, such acute angles can break during handling of the dummy donor substrate 11, causing flaking and contaminating the production line with debris.

[0046] Trimming can be performed using a grinding wheel rotating about the axis Y, for example a diamond grinding wheel, and the dummy donor substrate 11 itself is attached to a support rotating about the axis X, and the axis Y may be parallel or perpendicular to the axis X.

[0047] Regardless of the technique used, trimming can cause defects that chemical mechanical polishing may partially correct.

[0048] Chemical mechanical polishing makes it possible to obtain a free surface 7 of the thinned piezoelectric layer 5 having a roughness compatible with the bonding to the receiver substrate 12. However, at the end of such a step of chemical mechanical polishing, the inventors noticed that the polished surface 7 of the thinned piezoelectric layer 5 has a peripheral relief. FIG. 5 shows an analysis by shape measurement of the surface 7. The shape measurement analysis is carried out using a probe, the vertical movement of which is recorded during the scanning of the surface 7 so as to obtain the topographic shape of the surface along the path taken by the probe. Thus, the shape measurement of the surface 7 makes it possible to reveal the peripheral relief (black squares in FIG. 5) described above.

[0049] The more non - flat the shape is, the greater the impact on bonding. Thus, the method according to the invention includes the removal of substances within the peripheral region of the aforementioned surface.

[0050] The step of removing the substances in the peripheral region of the polished surface 7 of the thinned piezoelectric layer 5 is preferably carried out so as to flatten the peripheral relief formed during the chemical mechanical polishing step. The aim is to prevent the aforementioned relief from capturing condensed water under the influence of the propagation of the bonding wave and hindering the removal of this water during the bonding to the receiver substrate 12.

[0051] The inventors have observed that the peripheral relief may be of the order of a few micrometers in thickness and a few millimeters in width, and that the dimensions of the relief depend on the grinding parameters (such as the rotational speed, the descent speed of the grinder and the grinding plate, and the inclination of the grinder) and the chemical mechanical polishing parameters (the distribution of the pressure applied to the plate, the hydrodynamics of the colloidal slurry used, the relative rotational speed of the polishing head and the platen). In practice, it is very difficult to uncorrelate the influence of each of these parameters on the characteristics of the resulting peripheral relief and thus to identify the values of the parameters that do not lead to the formation of such a relief. The removal of the peripheral substances according to the invention provides a solution independent of the thinning and polishing processes and makes it possible to remove the peripheral relief regardless of the grinding parameters and the chemical mechanical polishing parameters used.

[0052] The removal of the peripheral material can be carried out by pulverizing it using an ion beam focused on the peripheral region of the surface 7 of the thinly polished piezoelectric layer 5, and the ion beam scans the entire periphery. When ion beam milling is used, in order to very precisely control the above-mentioned removal of the peripheral material, several parameters such as the width of the beam, the incident angle, the current (corresponding to the flow of ions constituting the beam), the scanning speed (defining the time when the surface area is located under the beam), and the milling speed (corresponding to the material removal rate) can be set. In fact, it is possible to adjust the milling speed to a very low value (about 10 -3 m 3 / s). The combined control of the milling speed and the scanning speed makes it possible to achieve the accuracy of the surface shape within nanometers.

[0053] Ion beam milling is a technique conventionally used to adjust the thickness of a piezoelectric substrate in order to improve the performance of the piezoelectric substrate. The present invention proposes to use this technique to correct the topology of the surface of the substrate and improve its flatness. Ion beam milling has the advantage of being able to correct the shape of the surface with sufficient accuracy to prevent the removal of excessive material and the formation of recesses. In fact, such recesses also affect the quality of the bonding between the donor substrate and the receiver substrate by increasing the width of the peripheral surface, which is conventionally formed during the bonding of two substrates, especially for the chamfered portions of the two substrates, where the substrates are not properly bonded.

[0054] In practice, the topographic shape is first recorded by shape measurement. Next, the thickness to be removed is determined such that the corrected shape has only one maximum value, and thus a zero deviation point, and this point is the point closest to the center of the substrate (the rightmost point of the shape in FIG. 5).

[0055] Finally, optionally, the formation of the donor substrate 11 shown in FIG. 2 further includes the step of forming an electrically insulating layer 6 on the free surface 7 of the thinned piezoelectric layer 5 on the side opposite to the handle substrate 4. When removing the peripheral portion of the aforementioned surface 7 after chemical mechanical polishing, it is preferable that the electrically insulating layer 6 is formed on the polished and flattened thinned piezoelectric layer 5 after these processes.

[0056] The electrically insulating layer 6 is preferably formed by plasma enhanced chemical vapor deposition (PECVD) or physical vapor deposition (PVD).

[0057] According to an alternative embodiment of the present invention not developed herein, the donor substrate comprises a semiconductor layer, the surface of the donor substrate to be processed (by chemical mechanical polishing and peripheral removal of substances) and bonded is the free surface of the semiconductor layer, and a part of the donor substrate to be transferred is a part of the semiconductor layer. Also in this embodiment, laser beam milling ensures the removal of peripheral substances with very high precision.

[0058] Also according to this embodiment, an oxide layer can be formed on the free surface of the semiconductor layer, and the layer has been pre-treated by chemical mechanical polishing and peripheral removal of substances.

[0059] According to this embodiment, the process enables obtaining a semiconductor-on-insulator type multilayer structure by transferring the semiconductor layer to a receiver substrate such as substrate 12.

[0060] Provision of a receiver substrate and optional treatment of the free surface of the receiver substrate According to the embodiment described in detail here, the receiver substrate 12 shown in FIG. 6 extends from its back surface to its front surface, a carrier substrate forming the carrier substrate 1 in the final structure of the piezoelectric-on-insulator type 10, and an electrically insulating layer forming the electrically insulating layer 2 in the final structure of the piezoelectric-on-insulator type 10.

[0061] Therefore, the carrier substrate 1 is made of materials such as silicon (Si), sapphire, alumina (Al2O3), aluminum nitride (AlN), glass, quartz, mullite, molybdenum (Mo), tungsten (W), indium phosphide (InP), gallium arsenide (GaAs) and / or silicon carbide (SiC). The carrier substrate 1 has a thickness of 10 μm to 2 mm, preferably 200 μm to 1 mm.

[0062] The electrical insulating layer 2 includes, for example, silicon oxide, nitride and / or carbide (SiO x 、SiO x N y 、SiN x 、SiC x 、SiO x C y ), and / or a polymer, where x and y are real numbers from 0 to 2. The electrical insulating layer 2 of the receiver substrate has a thickness of 10 nm to 10 μm, preferably 30 nm to 5 μm.

[0063] Providing the receiver substrate 12 includes forming the electrical insulating layer 2 on the free surface of the carrier substrate 1 so as to obtain the receiver substrate 12. The electrical insulating layer 2 is preferably formed by plasma enhanced chemical vapor deposition (PECVD). Such a deposition is shown in FIG. 7. The PECVD process results in significant non-uniformities and roughness that are not suitable for good quality bonding. Further, even when other deposition processes can provide better results in terms of uniformity and roughness, excessive roughness of the electrical insulating layer can also arise from the free surface of the carrier substrate, for example, when the carrier substrate comprises a layer of polycrystalline silicon that is not planarized on its surface.

[0064] In this way, chemical mechanical polishing of the free surface 9 of the electrical insulating layer 2 on the side opposite to the carrier substrate 1 is performed.

[0065] Also, in this case, the inventors have observed that a peripheral relief is formed on the free surface 9 of the electrical insulation layer 2 at the end of polishing, and the relief has a maximum thickness of several hundred nanometers and a width of several millimeters. The inventors have further observed that these dimensions vary depending on parameters used when implementing chemical mechanical polishing, such as the hydrodynamics of the colloidal slurry used, the distribution of the pressure applied to the plate, and the relative rotational speed of the chemical mechanical polishing head and the platen. Therefore, the method according to the present invention includes the removal of material in the peripheral region in addition to chemical mechanical polishing.

[0066] The removal of material within the peripheral region of the aforementioned surface is preferably carried out to flatten the aforementioned relief regardless of the parameters used when implementing chemical mechanical polishing.

[0067] As described above, the removal of peripheral material is preferably carried out by pulverizing with an ion beam focused on the region around the polished surface 9 of the electrical insulation layer 2, and the ion beam scans the entire periphery. In practice, regarding the flattening of the surface 7 of the thinly polished piezoelectric layer 5, first, the topographical shape of the polished surface 9 of the electrical insulation layer 2 is recorded by shape measurement. Next, the thickness to be removed is determined such that the corrected shape has only one maximum value, and thus a zero deviation point, and this point is the point closest to the center of the substrate.

[0068] Optionally, the removal step is carried out over the entire polished surface 9 of the receiver substrate 12 so as to improve the uniformity of the electrical insulation layer 2. In this case, the amount of material locally removed from the surface 9 of the electrical insulation layer 2 during the step of removing the material on the surface 9 can be determined based on the measured value of the local thickness of the aforementioned electrical insulation layer 2 by ellipsometry and / or reflectance measurement.

[0069] Transfer of a portion of the donor substrate to the receiver substrate Next, a portion 3 of the thinned piezoelectric layer 5 of the donor substrate 11 is transferred to the receiver substrate 12.

[0070] As an example, the transfer can include forming a weakened region in the thinned piezoelectric layer 5 to define the piezoelectric layer 3 to be transferred at the bonding interface, bonding the donor substrate 11 to the receiver substrate 12, and peeling the donor substrate 11 along the weakened region.

[0071] According to the preferred embodiment shown in FIG. 8, the weakened region is formed by implanting atomic species into the thinned piezoelectric layer 5, and the implantation (arrow in FIG. 8) is carried out through the free surface 7 of the layer 5. The atomic species are implanted at a predetermined depth, and this depth determines the thickness of the piezoelectric layer 3 to be transferred. The atomic species to be implanted are preferably hydrogen and / or helium.

[0072] Next, as shown in FIG. 9, the bonding of the donor substrate 11 to the receiver substrate 12 is carried out between the free surface 7 of the implanted and thinned piezoelectric layer 5 and the free surface 9 of the electrical insulating layer 2 of the receiver substrate 12, and at least one of the two bonding surfaces 7, 9 has been previously subjected to the aforementioned surface treatment, which includes chemical mechanical polishing and subsequent removal of peripheral substances.

[0073] The bonding of the donor substrate 11 to the receiver substrate 12 is preferably carried out by molecular adhesion because it is mechanically strong and can obtain a stable bond at a temperature exceeding 400°C. Such bonding characteristics are particularly beneficial when a portion 3 of the thinned piezoelectric layer 5 of the donor substrate 11 is transferred to the receiver substrate 12 according to the Smart Cut (trademark) process (including the formation of a weakened region by implantation of atomic species). Specifically, the Smart Cut (trademark) process generates defects in the substrate that can be repaired by thermal annealing at high temperature. Such bonding characteristics cannot be achieved by bonding with polymers or metal / metal bonding. Most polymers completely decompose above 300°C. Metal / metal bonding develops with temperature (the particle size increases), and in most cases, the diffusion of metal atoms in the layer, needless to say, causes deformation of the substrate, thereby destroying the electrical properties of the starting stack.

[0074] Lack of flatness prevents intimate contact between the two substrates and thus results in bonding defects that cause missing portions on the subsequently transferred surface. Therefore, molecular bonding requires a very flat surface. Thus, the present invention provides certain advantages in this embodiment and in any embodiment where the bonding between the donor substrate and the receiver substrate is preferably carried out by molecular adhesion.

[0075] In this embodiment, during bonding, it has not been observed that minute droplets of water are formed at the ends of the bonding wave at the periphery of the substrate.

[0076] After bonding, the donor substrate 11 is peeled off along the weakening region. The peeling along the weakening region can be caused by mechanical action and / or the supply of thermal energy.

[0077] In this way, the final structure of the piezoelectric-on-insulator type 10 shown in FIG. 1 is obtained, which includes the carrier substrate 1, the electrical insulation layer 2, and the transferred piezoelectric layer 3 from the back surface to the front surface.

[0078] When the oxide layer 6 is formed on the surface of the donor substrate 10, the implantation of atomic species shown in FIG. 10 is carried out through the oxide layer 6, and the bonding shown in FIG. 11 is carried out between the free surface 13 of the oxide layer 6 and the free surface 9 of the electrical insulation layer 2 of the receiver substrate 12, whereby the oxide layer 6 is transferred simultaneously with the piezoelectric layer 3 to be transferred. In this embodiment, the electrical insulation layer of the final structure comprises the oxide layer 6 formed on the donor substrate 11 before bonding.

[0079] Therefore, forming the electrical insulation layer 6 on the surface of the donor substrate 11 advantageously enables oxide-oxide bonding. When bonding by molecular adhesion is carried out, the bonding between the two oxide layers can be easily strengthened simply by bringing the bonding to a temperature above 200°C. Furthermore, in an atmosphere containing a certain amount of moisture, the oxide layers are able to absorb the water naturally present on their surfaces, thus preventing this water from forming bubbles at the bonding interface when the aforementioned bonding is annealed above 200°C to strengthen the bonding.

[0080] As an alternative to the above-described Smart Cut™ process, layer transfer can be achieved by thinning the donor substrate from the side opposite to the side bonded to the handle substrate until the desired thickness is obtained in the first semiconductor layer. However, for transferring a layer with a thickness of less than 1 micrometer, the Smart Cut™ process is preferred.

[0081] Analysis of laser scan-based fault detection reveals that in the final structure of the piezoelectric on-insulator type 10, there are almost no voids between the piezoelectric layer 2 and the electrical insulation layer 3 around the periphery of the structure. In particular, when a molecular bond is performed, all particles at the bonding interface create voids. Since the periphery is sensitive to the presence of particles, the few voids still detected around the periphery after implementation of the method according to the invention are not due to tiny droplets of water at the end of the bonding wave during the bonding of the two layers (these are no longer observed), but rather due to the presence of particles at the bonding interface.

[0082] The inventors believe that the removal of peripheral material on the polished bonding surface enables the removal of the relief generated at the edges during the aforementioned polishing before bonding of the surface, and thus condensed water is not retained around the substrate during propagation of the bonding wave, preventing the formation of tiny droplets. As a result, the number of voids is much smaller in the final structure, improving the bonding quality.

[0083] Therefore, the process according to the invention makes it possible to improve the quality of the bond between two substrates in a process where chemical mechanical polishing of at least one of the two bonding surfaces was required before the aforementioned bonding.

Claims

Claim 1 A process for manufacturing a semiconductor or piezoelectric structure (10), comprising: (a) providing a donor substrate (11) comprising a semiconductor or piezoelectric layer (5); (b) providing a receiver substrate (12); (c) treating a free surface (7) of the donor substrate (11) and / or a free surface (9) of the receiver substrate (12); (d) bonding the donor substrate (11) to the receiver substrate (12), wherein at least one treated surface (7, 9) is at an interface between the donor substrate (11) and the receiver substrate (12); (e) transferring a portion (3) of the semiconductor or piezoelectric layer (5) from the donor substrate (11) to the receiver substrate (12), wherein the treatment of the free surface (7) of the donor substrate (11) and / or the free surface (9) of the receiver substrate (12) comprises: (c1) a chemical mechanical polishing step; (c2) a step of removing substances in a peripheral region of the polished surface (7, 9), the process for manufacturing a semiconductor or piezoelectric structure (10). Claim 2 At the end of the step (c1) of chemical mechanical polishing of the donor substrate (11) and / or the receiver substrate (12), the polished surface (7, 9) has a relief at the periphery of the substrate (11, 12), whereby the step (c2) of removing substances in the peripheral region of the surface (7, 9) is performed to flatten the relief. The process according to claim 1. Claim 3 The process according to any one of claims 1 and 2, wherein the removal of the peripheral substances is performed by pulverizing using an ion beam focused on a peripheral region of the polished semiconductor or piezoelectric layer (5), and the ion beam scans the entire periphery. Claim 4 The process according to any one of claims 1 to 3, wherein the removal of the peripheral substances is performed after recording the topographic shape of the polished surface (7, 9) by shape measurement, and the modified shape after substance removal has only one maximum value, and the maximum value is the point closest to the center of the polished surface (7, 9) of the modified shape. Claim 5 The portion (3) of the semiconductor or piezoelectric layer (5) of the donor substrate (11) transferred to the receiver substrate (12) is defined by forming a weakened region prior to the bonding (d) of the donor substrate (11) to the receiver substrate (12), whereby the transfer of the portion (3) to the receiver substrate (12) involves peeling the donor substrate (11) along the weakened region. The process according to any one of claims 1 to 4.

6. The process according to claim 5, wherein the weakened region in the donor substrate (11) is formed by implanting hydrogen and / or helium.

7. The process according to any one of claims 1 to 6, wherein the donor substrate (11) comprises a piezoelectric layer (5), the surface of the donor substrate to be processed and bonded is the free surface (7) of the piezoelectric layer (5), and the portion of the donor substrate to be transferred is a portion (3) of the piezoelectric layer (5).

8. The provision of the donor substrate (11) The chemical mechanical polishing (c1) is performed on the free surface (7) of the thinned piezoelectric layer (5) opposite to the handle substrate (4) (a1) bonding a thick piezoelectric layer (8) to a handle substrate (4); (a2) thinning the thick piezoelectric layer (8) from the side opposite to the handle substrate (4). The process according to claim 7, which continuously includes these steps.

9. The thick piezoelectric layer (8) has a thickness of 100 μm to 2 mm, preferably 200 μm to 1 mm, and the thinned and polished piezoelectric layer (5) has a thickness of 1 μm to 100 μm, preferably 5 μm to 50 μm. The process according to claim 8, characterized by this.

10. The provision of the donor substrate (11) further includes a step (a3) of removing the peripheral portion of the donor substrate (11) before the chemical mechanical polishing (c1) of the free surface (7) of the thinned piezoelectric layer (5). The process according to any one of claims 8 and 9.

11. The process according to any one of claims 1 to 6, wherein the donor substrate (11) comprises a semiconductor layer, the surface of the donor substrate to be processed and bonded is the free surface of the semiconductor layer, and the portion of the transferred donor substrate is a portion of the semiconductor layer.

12. Further comprising the step of forming an electrically insulating layer (6) on the free surface of the semiconductor or piezoelectric layer (5), whereby the bonding (d) of the donor substrate (11) to the receiver substrate (12) is carried out by the electrically insulating layer (6), the method according to any one of claims 7 to 11.

13. The electrically insulating layer (6) formed on the surface of the polished semiconductor or piezoelectric layer (5) has a thickness of 10 nm to 10 μm, preferably 30 nm to 5 μm, the process according to claim 12.

14. The step (c) includes treating the free surface (7) of the semiconductor or piezoelectric layer (5) of the donor substrate (11), and the formation of the electrically insulating layer (6) on the free surface (7) is carried out after the treatment step (c) and before the bonding (d), the process according to any one of claims 12 and 13.

15. The provision (b) of the receiver substrate (12) includes forming an electrically insulating layer (2), preferably an oxide layer, and the surface of the receiver substrate (12) to be treated and bonded is the free surface (9) of the electrically insulating layer (2), the process according to any one of claims 1 to 14.

16. The electrically insulating layer (2) formed on the surface of the receiver substrate (12) has a thickness of 10 nm to 10 μm, preferably 30 nm to 5 μm, the process according to claim 15.

17. The electrically insulating layer (2) is formed by plasma enhanced chemical vapor deposition (PECVD), the process according to any one of claims 15 and 16.

18. The step (c2) of removing the substance is carried out over the entire polished surface (9) of the receiver substrate (12), the process according to any one of claims 15 to 17.

19. The amount of the substance locally removed from the surface of the electrically insulating layer (2) during the step of removing the substance from the surface (9) of the electrically insulating layer (2) is determined based on the measured value of the thickness of the electrically insulating layer (9) by ellipsometry and / or reflectance measurement, the process according to claim 18.

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