BUCK Circuit and Its Power-On Control Method, Controller, Power-On Control Device
The power-on control method for BUCK circuits sets a current limit based on transistor and inductor capabilities, controlling the switch transistor's on-off times to prevent damage, ensuring circuit safety during power-on.
Patent Information
- Application Number
- JP2025503383
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-07-22
- Filing Date
- 2023-04-27
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2043-04-27
AI Technical Summary
The BUCK circuit faces issues during power-on due to the output-side capacitor being uncharged, leading to a short circuit and potential damage from a sharp charging current, which can break down the switch transistor or saturate the inductor.
A power-on control method that determines a set current based on the switch transistor's current withstand and inductor saturation current, controlling the switch transistor to turn off when the inductor current reaches this set current, and adjusting the on-time and off-time to prevent damage during power-on.
Ensures the safety of the BUCK circuit by preventing inductor current from exceeding the current withstand of the switch transistor and saturation current of the inductor, effectively protecting circuit elements during power-on.
Smart Images

Figure 2025524028000001_ABST
Abstract
Description
Technical Field
[0001] This disclosure claims the priority of Chinese patent applications filed on July 22, 2022, with application number 202210869343.6, invention title "BUCK Circuit and Its Power-On Control Method, Controller, Power-On Control Device", and filed on July 22, 2022, with application number 202210872067.9, invention title "BUCK Circuit and Its Power-On Control Method, Controller, Power-On Control Device, Storage Medium", and all of its contents are incorporated into this disclosure by reference.
[0002] This disclosure relates to the field of power supply technology, and particularly to a BUCK circuit and its power-on control method, controller, and power-on control device.
Background Art
[0003] The BUCK circuit is widely used as a step-down circuit in various scenarios. The currently commonly used BUCK circuit is shown in FIG. 1, but this circuit has the following drawbacks during use. That is, in the initial state, the input-side capacitor C1 is fully charged and the output-side capacitor C2 is uncharged. Therefore, when the BUCK circuit is powered on, if the switch transistor Q1 is directly turned on, the output-side capacitor C2 is equivalent to a short circuit, and the charging current rises sharply. As a result, the switch transistor Q1 may break down or the inductor L1 may become saturated, which may damage the circuit.
Summary of the Invention
Problems to be Solved by the Invention
[0004] This disclosure aims to solve at least to some extent one of the above technical problems.
Means for Solving the Problems
[0005] For this reason, the first object of the present disclosure is to provide a power-on control method for a BUCK circuit, which determines a set current according to the current withstand capacity of the first switch transistor in the BUCK circuit and the saturation current of the inductor, and during power-on, determines the off-set time of the first switch transistor according to the time it takes for the inductor current to rise to the set current, and controls the first switch transistor to turn off, so that the inductor current does not damage each element in the circuit, and effectively ensures the safety of the BUCK circuit during power-on.
[0006] The second object of the present disclosure is to provide a controller for a BUCK circuit.
[0007] The third object of the present disclosure is to provide a computer-readable storage medium.
[0008] The fourth object of the present disclosure is to provide a power-on control device for a BUCK circuit.
[0009] The fifth object of the present disclosure is to provide a BUCK circuit.
[0010] To achieve the above object, the power-on control method for a BUCK circuit provided in an embodiment of the first aspect of the present disclosure includes: identifying the current withstand capacity of the first switch transistor in the BUCK circuit and identifying the saturation current of the inductor in the BUCK circuit; determining a set current and a current rise time according to the smaller value of the current withstand capacity and the saturation current; determining an on-set time of the first switch transistor according to the current rise time; when the BUCK circuit is powered on, switching the state of the first switch transistor according to the inductor current and the set current until the output voltage of the BUCK circuit reaches the target voltage, or switching the state of the first switch transistor according to the on-time of the first switch transistor and the on-set time.
[0011] According to an embodiment of the present disclosure, a power-on control method for a BUCK circuit determines a set current and a current rise time according to the smaller value of the current withstand of the first switch transistor in the BUCK circuit and the saturation current of the inductor, determines the on-set time of the first switch transistor according to the current rise time, and when the BUCK circuit is powered on, until the output voltage of the BUCK circuit reaches the target voltage, switches the state of the first switch transistor according to the inductor current and the set current, or switches the state of the first switch transistor based on the on-time of the first switch transistor and the on-set time, so that during power-on, the inductor current does not damage each element in the circuit, and effectively ensures the safety of the BUCK circuit during power-on.
[0012] According to an embodiment of the present disclosure, the step of switching the state of the first switch transistor according to the inductor current and the set current includes: when the BUCK circuit is powered on, controlling the first switch transistor to be on, acquiring the inductor current, determining the on-time of the first switch transistor when the inductor current reaches the set current, determining the off-set time of the first switch transistor according to the on-time, controlling the first switch transistor to be off, and when the off-time of the first switch transistor reaches the off-set time, controlling the first switch transistor to be on, and sequentially repeating the above steps until the output voltage of the BUCK circuit reaches the target voltage.
[0013] According to an embodiment of the present disclosure, the step of determining the off-set time of the first switch transistor according to the on-time includes: determining the control period of the first switch transistor; when the on-time is greater than or equal to the control period, identifying the time difference between the on-time and the control period, and taking the difference between the control period and the time difference as the off-set time; and when the on-time is less than the control period, taking the difference between the control period and the on-time as the off-set time.
[0014] According to an embodiment of the present disclosure, the step of determining the control period of the first switch transistor includes identifying a first time during which the inductor current rises to the maximum current value when the first switch transistor is first turned on, controlling the first switch transistor to turn off, and identifying a second time during which the inductor current decreases from the maximum current value to zero, and setting the sum of the first time and the second time as the control period.
[0015] According to an embodiment of the present disclosure, the step of determining the control period of the first switch transistor includes identifying a first time during which the inductor current rises to the maximum current value when the first switch transistor is first turned on, controlling the first switch transistor to turn off, and identifying a third time during which the inductor current decreases from the maximum current value to a preset current threshold greater than zero, and setting the sum of the first time and the third time as the control period.
[0016] According to an embodiment of the present disclosure, the step of switching the state of the first switch transistor according to the on-time of the first switch transistor and the on-set time includes controlling the first switch transistor to turn on when the BUCK circuit is powered on, controlling the first switch transistor to turn off when the on-time of the first switch transistor reaches the on-set time, and controlling the first switch transistor to turn on when it is determined that the first switch transistor satisfies a preset off condition, and sequentially repeating the above steps until the output voltage of the BUCK circuit reaches the target voltage.
[0017] According to an embodiment of the present disclosure, the step of determining that the first switch transistor satisfies a preset off condition includes obtaining the current of the inductor during the off period of the first switch transistor, and determining that the first switch transistor satisfies the preset off condition when the current of the inductor decreases to zero.
[0018] According to an embodiment of the present disclosure, the step of determining that the first switch transistor satisfies a preset off condition includes obtaining the current of the inductor during the off period of the first switch transistor, and determining that the first switch transistor satisfies the preset off condition when the current of the inductor drops to a preset current threshold.
[0019] According to an embodiment of the present disclosure, the step of determining that the first switch transistor satisfies a preset off condition includes obtaining the off time of the first switch transistor, and determining that the first switch transistor satisfies the preset off condition when the off time of the first switch transistor reaches a second set time, where the second set time is greater than the on set time.
[0020] According to an embodiment of the present disclosure, the step of determining that the first switch transistor satisfies a preset off condition includes obtaining the maximum current of the inductor during the first on period of the first switch transistor, identifying a first time when the maximum current drops to zero, and determining that the first switch transistor satisfies the preset off condition when the off time of the first switch transistor reaches the first time.
[0021] According to an embodiment of the present disclosure, the step of determining that the first switch transistor satisfies a preset off condition includes obtaining the maximum current of the inductor during the first on period of the first switch transistor, identifying a second time when the maximum current drops to a preset current threshold, and determining that the first switch transistor satisfies the preset off condition when the off time of the first switch transistor reaches the second time.
[0022] According to an embodiment of the present disclosure, when the flyback element in the BUCK circuit is the second switch transistor, the method further includes controlling the second switch transistor to turn off when controlling the first switch transistor to turn on, and controlling the second switch transistor to turn on when controlling the first switch transistor to turn off.
[0023] According to an embodiment of the present disclosure, when the second switch transistor is on, the method further includes controlling the second switch transistor to turn off early when the inductor current drops to zero and the off time of the first switch transistor has not reached the off setting time.
[0024] To achieve the above object, the controller of the BUCK circuit provided in the embodiment of the second aspect of the present disclosure includes a memory, a processor, and a power-on control program of the BUCK circuit stored in the memory and operable on the processor. When the processor executes the power-on control program of the BUCK circuit, the above-mentioned power-on control method is realized.
[0025] By implementing the above-mentioned power-on control method on the BUCK circuit, the controller of the BUCK circuit according to the embodiment of the present disclosure can make the inductor current of the BUCK circuit smaller than the current withstand of the switch transistor and the saturation current of the inductor during power-on, so that the inductor current will not damage each element in the circuit, and effectively ensure the safety of the BUCK circuit during power-on.
[0026] To achieve the above object, the computer-readable storage medium provided in the embodiment of the third aspect of the present disclosure stores a power-on control program of the BUCK circuit. When the power-on control program of the BUCK circuit is executed by a processor, the above-mentioned power-on control method of the BUCK circuit is realized.
[0027] According to an embodiment of the present disclosure, a computer-readable storage medium can, by the foregoing power-on control method, make the inductor current of the BUCK circuit smaller than the withstand current of the switching transistor and the saturation current of the inductor during power-on, so that the inductor current does not damage each element in the circuit, and effectively ensure the safety of the BUCK circuit during power-on.
[0028] To achieve the above object, a power-on control device for a BUCK circuit provided in an embodiment of the fourth aspect of the present disclosure identifies the withstand current of a first switching transistor in the BUCK circuit, identifies the saturation current of an inductor in the BUCK circuit, determines a set current and a current rise time according to the smaller value of the withstand current and the saturation current, and a determination module for determining the on-set time of the first switching transistor according to the current rise time, and a control module for switching the state of the first switching transistor according to the inductor current and the set current until the output voltage of the BUCK circuit reaches a target voltage, or switching the state of the first switching transistor according to the on-time of the first switching transistor and the on-set time.
[0029] According to an embodiment of the present disclosure, a power-on control device identifies the withstand current of a first switching transistor in the BUCK circuit by a determination module, identifies the saturation current of an inductor in the BUCK circuit, determines a set current and a current rise time according to the smaller value of the withstand current and the saturation current, determines the on-set time of the first switching transistor according to the current rise time, and when the BUCK circuit is powered on by a control module, switches the state of the first switching transistor based on the inductor current and the set current until the output voltage of the BUCK circuit reaches a target voltage, or switches the state of the first switching transistor based on the on-time of the first switching transistor and the on-set time, thereby preventing the inductor current from damaging each element in the circuit during power-on and effectively ensuring the safety of the BUCK circuit during power-on.
[0030] To achieve the above object, the BUCK circuit provided in the embodiment of the fifth aspect of the present disclosure includes an input-side capacitor, a first switch transistor having one end connected to one end of the input-side capacitor, a flyback element having one end connected to the other end of the first switch transistor and the other end connected to the other end of the input-side capacitor, an inductor having one end connected to the other end of the first switch transistor, an output-side capacitor having one end connected to the other end of the inductor and the other end connected to the other end of the flyback element, an output voltage detection module for detecting the output voltage of the BUCK circuit, a current detection module for detecting the inductor current, a controller for specifying the current withstand of the first switch transistor, specifying the saturation current of the inductor, determining the set current and the rise time according to the smaller value of the current withstand and the saturation current, and determining the on-set time of the first switch transistor according to the current rise time. The controller is further used to switch the state of the first switch transistor according to the inductor current and the set current or switch the state of the first switch transistor according to the on-time and the on-set time of the first switch transistor until the output voltage of the BUCK circuit reaches the target voltage when the BUCK circuit is powered on.
[0031] According to the BUCK circuit according to the embodiment of the present disclosure, the controller specifies the current withstand of the first switch transistor, specifies the saturation current of the inductor, determines the set current and the rise time according to the smaller value of the current withstand and the saturation current, determines the on-set time of the first switch transistor according to the current rise time, and when the BUCK circuit is powered on, switches the state of the first switch transistor based on the inductor current and the set current or switches the state of the first switch transistor according to the on-time and the on-set time of the first switch transistor until the output voltage of the BUCK circuit reaches the target voltage, preventing the inductor current from damaging each element in the circuit during power-on and effectively ensuring the safety of the BUCK circuit during power-on.
[0032] Additional aspects and advantages of the present disclosure will be given in part in the following description, some will become apparent from the following description, or will be understood through the practice of the present disclosure.
Brief Description of the Drawings
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Embodiments for Carrying Out the Invention
[0034] Hereinafter, embodiments of the present disclosure shown in the drawings will be described in detail. Throughout the drawings, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. The embodiments described with reference to the following drawings are exemplary and are for explaining the present disclosure and should not be construed as a limitation to the present disclosure.
[0035] Note that the power-on control method of the present disclosure can be applied to a BUCK circuit as shown in FIG. 2 or FIG. 3. As shown in FIGS. 2-3, the BUCK circuit includes an input-side capacitor C1, a first switch transistor Q1, a flyback element, an inductor L1, and an output-side capacitor C2. The flyback element may be a diode D as shown in FIG. 2 or a second switch transistor Q2 as shown in FIG. 3. One end of the first switch transistor Q1 is connected to one end of the input-side capacitor C1, one end of the flyback element is connected to the other end of the first switch transistor Q1, the other end of the flyback element is connected to the other end of the input-side capacitor C1, one end of the inductor L1 is connected to the other end of the first switch transistor Q1, one end of the output-side capacitor C2 is connected to the other end of the inductor L1, and the other end of the output-side capacitor C2 is connected to the other end of the flyback element. As shown in FIG. 3, by controlling the on or off of the first switch transistor Q1 and the second switch transistor Q2, the buck function of the BUCK circuit can be realized, the input voltage (i.e., the voltage across both ends of the input-side capacitor C1) can be stepped down to obtain an output voltage (i.e., the voltage across both ends of the output-side capacitor C2), and the input voltage is greater than the output voltage. As shown in FIG. 2, by controlling the on or off of the first switch transistor Q1, the buck function of the BUCK circuit can be realized.
[0036] FIG. 4 is a flowchart of a power-on control method for a BUCK circuit according to an embodiment of the present disclosure. For the sake of simplicity of description, hereinafter, mainly the case where the power-on control method is used for the BUCK circuit as shown in FIG. 2 will be described as an example.
[0037] As shown in FIG. 4, the power-on control method of the BUCK circuit can include the following steps.
[0038] In S102, the current withstand of the first switch transistor in the BUCK circuit is specified, and the saturation current of the inductor in the BUCK circuit is specified.
[0039] Note that the current withstand is the maximum current that the first switch transistor Q1 can withstand. When the current exceeds the current withstand of the first switch transistor Q1, the first switch transistor Q1 breaks down and is damaged. The saturation current is the current corresponding to the saturation of the inductor L. That is, when the current exceeds the saturation current of the inductor L1, a saturation phenomenon occurs in the inductor L1.
[0040] In S104, the set current is determined according to the smaller value between the current withstand and the saturation current.
[0041] Specifically, as shown in FIG. 2, when the BUCK circuit is powered on, when the first switch transistor Q1 is first turned on, due to the influence of the input-side capacitor C1 and the output-side capacitor C2, the BUCK circuit generates a large charging current and charges the output-side capacitor C2. Since the inductor L1 exists in the circuit, the charging current of the BUCK circuit (i.e., the inductor current) continues to rise from zero. When it rises until it exceeds the current withstand of the first switch transistor Q1 or the saturation current of the inductor L1, the first switch transistor Q1 breaks down and is damaged, or a saturation phenomenon occurs in the inductor L1. Therefore, in order to avoid the first switch transistor Q1 breaking down and being damaged or a saturation phenomenon occurring in the inductor L1, the set current can be determined according to the current withstand and the saturation current. For example, the set current is smaller than the smaller value between the current withstand and the saturation current.
[0042] Note that based on the model numbers of the first switch transistor Q1 and the inductor L1, etc., the current withstand of the first switch transistor Q1 and the saturation current of the inductor L1 can be obtained in advance by checking the product parameters. Then, the smaller value of the two is obtained, and a value smaller than the smaller value is selected as the set current.
[0043] In S106, when the BUCK circuit is powered on, the first switch transistor is controlled to turn on to obtain the inductor current. When the inductor current reaches the set current, the on-time of the first switch transistor is determined. According to the on-time, the off-set time of the first switch transistor is determined. The first switch transistor is controlled to turn off. When the off-time of the first switch transistor reaches the off-set time, the first switch transistor is controlled to turn on, and this is sequentially repeated until the output voltage of the BUCK circuit reaches the target voltage.
[0044] Specifically, as shown in FIG. 2, when the BUCK circuit is powered on, first, the first switch transistor Q1 is controlled to turn on. At this time, the input-side capacitor C1 charges the output-side capacitor C2 via the first switch transistor Q1 and the inductor L1. The inductor current continues to rise from zero. When the inductor current rises from zero to the set current, it indicates that the charging current of the BUCK circuit approaches the smaller value of the withstand current of the first switch transistor Q1 or the saturation current of the inductor L1. Therefore, at this time, to avoid breakdown of the first switch transistor Q1 and saturation of the inductor L1 due to the continuous rise of the charging current, the first switch transistor Q1 is controlled to turn off. At the same time, the on-time of the first switch transistor Q1 is obtained, and the off-set time of the first switch transistor Q1 is determined according to the on-time of the first switch transistor Q1. When the first switch transistor Q1 is turned off, the inductor L1 continues to charge the output-side capacitor C2 through the diode D, the voltage across the output-side capacitor C2 continues to rise, and the inductor current of the BUCK circuit decreases. When the off-time of the first switch transistor Q1 reaches the off-set time, the first switch transistor Q1 is controlled to turn on again.
[0045] When the first switch transistor Q1 is turned on again, the inductor current rises again. When the inductor current rises to the set current, the first switch transistor Q1 is controlled to turn off, and the on-time of the first switch transistor Q1 this time is specified. Then, the off-set time of the first switch transistor Q1 is determined according to the current on-time. When the off-time of the first switch transistor Q1 reaches the determined off-set time this time, the first switch transistor Q1 is controlled to turn on again, and this is repeated until the output voltage of the BUCK circuit reaches the target voltage (the target voltage is smaller than the input voltage). At this time, the on / off of the first switch transistor Q1 prevents a large inrush current that affects circuit safety from occurring, and the BUCK circuit can stop executing step S106 and enter the normal control logic.
[0046] In the above embodiment, the set current is determined according to the current-carrying capacity of the first switch transistor and the saturation current of the inductor in the BUCK circuit. During power-on, the off-set time of the first switch transistor is determined according to the time when the inductor current rises to the set current, and the first switch transistor is controlled to turn off, so that the inductor current does not damage each element in the circuit, and the safety of the BUCK circuit during power-on is effectively ensured.
[0047] In some embodiments, the step of determining the off-set time of the first switch transistor according to the on-time includes: determining the control period of the first switch transistor; when the on-time is greater than or equal to the control period, identifying the time difference between the on-time and the control period, and setting the difference between the control period and the time difference as the off-set time; when the on-time is less than the control period, setting the difference between the control period and the on-time as the off-set time.
[0048] Specifically, the control period T of the first switch transistor Q1 may be a fixed value that can be preset according to the actual situation. Usually, one control period T should include two processes of turning on and off the first switch transistor Q1. However, since the on-time t of the first switch transistor Q1 is related to the set current and the charge and discharge speeds of the inductor and capacitor in the BUCK circuit, during power-on, the on-time t may change and become larger than, smaller than, or equal to the control period T. Therefore, the off-set time t' of the first switch transistor Q1 is determined according to the magnitude relationship between the on-time t and the control period T, and the off-control of the first switch transistor Q1 is realized. The corresponding control logic is shown in FIG. 5.
[0049] Furthermore, FIG. 6a is a schematic diagram of the relationship between the operation of the switch transistor and voltage and current. As shown in FIG. 6a, when the BUCK circuit is powered on, first, the first switch transistor Q1 is controlled to turn on and the timing starts. At the same time, the current of the inductor L1 is acquired. As the current of the inductor L1 continues to rise from zero and reaches the set current, the timing stops, the on-time t of the first switch transistor Q1 is acquired, and it is determined whether the on-time t is greater than or equal to the control period T. At this time, since the on-time t is smaller than the control period T, the on-time can be updated to t' = t, that is, the on-time is maintained as it is, the off-set time of the first switch transistor Q1 is set to T - t', and at the same time, the first switch transistor Q1 is controlled to turn off and the timing starts. When the timing time reaches the off-set time T - t', the first control period of the first switch transistor Q1 ends.
[0050] Subsequently, the first switch transistor Q1 is controlled to be turned on again to start timing and obtain the current of inductor L1. When the obtained current of inductor L1 reaches the set current, the timing is stopped, the on-time t of the first switch transistor Q1 is obtained, and it is determined whether the on-time t is greater than or equal to the control period T. At this time, since the on-time t is greater than or equal to the control period T, the on-time can be updated to t` = t - T, the off-set time of the first switch transistor Q1 is calculated as T - t`, and at the same time, the first switch transistor Q1 is controlled to be turned off to start timing. When the timing time reaches the off-set time T - t`, the second control period of the first switch transistor Q1 ends. As can be seen from FIG. 6a, after the second control period ends, since the output voltage of the BUCK circuit reaches the target voltage, the power-on of the BUCK circuit can be quickly completed by reasonably setting the control period T.
[0051] Note that if the control period T is set too large, the situations shown in FIGS. 6b and 6c will occur. That is, when the off-time of the first switch transistor Q1 has not yet reached the off-set time, the inductor current will drop to zero. Therefore, by reasonably setting the control period T, such situations can be reduced, thereby realizing the fast power-on of the BUCK circuit.
[0052] In the above embodiment, by determining the off-set time of the first switch transistor according to the magnitude relationship between the on-time of the first switch transistor and the control period, switch transistor control with a certain control period but different duty ratios can be realized, and this method can ensure that the charging current of the BUCK circuit does not damage each element during power-on and ensure the safety of the BUCK circuit.
[0053] In some embodiments, the step of determining the control period of the first switch transistor includes identifying a first time when the inductor current rises to the maximum current value when the first switch transistor is first turned on, controlling the first switch transistor to turn off, identifying a second time when the inductor current drops from the maximum current value to zero, and using the sum of the first time and the second time as the control period.
[0054] That is, the control period of the first switch transistor may not only be set to a fixed value, but also be determined according to the time corresponding to the first on / off of the first switch transistor. Specifically, as shown in FIG. 6d, when the BUCK circuit is powered on, the first switch transistor Q1 is controlled to turn on, timing is started, and the current of the inductor L1 is acquired. As the current of the inductor L1 continues to rise from zero and the obtained current of the inductor L1 reaches the maximum current value (i.e., the set current value), the timing is stopped, the on-time of the first switch transistor Q1 is acquired, and this is used as the first time. At the same time, the first switch transistor Q1 is controlled to turn off, timing is started, and when the current of the inductor L1 begins to drop from the maximum current value and drops to zero, the timing is stopped, the off-time of the first switch transistor Q1 is acquired, and this is used as the second time. Next, the sum of the first time and the second time is used as the control period T.
[0055] Thereafter, the first switch transistor Q1 is controlled to turn on again, timing is started, and the current of the inductor L1 is acquired. When the current of the inductor L1 reaches the set current, the timing is stopped, the on-time t of the first switch transistor Q1 is acquired, and it is determined whether the on-time t is greater than or equal to the control period T. At this time, since the on-time t is smaller than the control period T, the on-time can be updated to t` = t, that is, without changing the on-time, the off-set time of the first switch transistor Q1 is calculated as T - t`, and at the same time, the first switch transistor Q1 is controlled to turn off and timing is started. When the timing time reaches the off-set time T - t`, the second control period of the first switch transistor Q1 ends. The same applies to subsequent control periods.
[0056] When the first switch transistor Q1 is turned on, since the voltage across the input-side capacitor C2 in the second control period is greater than the voltage across the input-side capacitor C2 in the first control period, as can be seen from the inductor current calculation formula di / dt = (VC1 - VC2) / L (where VC1 is the voltage across the input-side capacitor C1 and L is the inductance value of the inductor), the rising speed of the inductor current in the second control period is smaller than the rising speed of the inductor current in the first control period. Therefore, the on-time of the first switch transistor Q1 in the second control period is greater than the on-time of the first switch transistor Q1 in the first control period. Also, when the first switch transistor Q1 is turned off, as can be seen from the inductor current calculation formula di / dt = (-VC2) / L, the falling speed of the inductor current in the second control period is greater than the falling speed of the inductor current in the first control period, so the off-time of the first switch transistor Q1 in the second control period is smaller than the off-time of the first switch transistor Q1 in the first control period. However, since the sum of the on-time and off-time of the first switch transistor Q1 in the second control period is not particularly different from the sum of the on-time and off-time in the first control period, the sum of the on-time and off-time of the first switch transistor Q1 in the first control period can be set as the control period T, and this control period T can avoid the delay in the power-on speed caused by setting the control period too large, thereby realizing further optimization of the power-on control method.
[0057] Accordingly, by setting the control period according to the time of the first on-off of the first switch transistor and determining the off-set time of the first switch transistor according to the magnitude relationship between the on-time of the first switch transistor and the control period, switch transistor control with a constant control period but different duty ratios can be realized. Moreover, in this method, during power-on, the charging current of the BUCK circuit will not damage each element, ensuring the safety of the BUCK circuit. At the same time, it is possible to avoid the delay in the power-on speed caused by setting the control period too large, thereby realizing further optimization of the power-on control method.
[0058] In some other embodiments, the step of determining the control period of the first switch transistor includes: when the first switch transistor is first turned on, identifying a first time when the inductor current rises to the maximum current value, the step of controlling the first switch transistor to turn off, and identifying a third time when the inductor current drops from the maximum current value to a preset current threshold greater than zero, and taking the sum of the first time and the third time as the control period.
[0059] That is, the control period T can be determined according to the inductor current dropping to zero or a non-zero value.
[0060] Specifically, as shown in FIG. 6e, when the BUCK circuit is powered on, the first switch transistor Q1 is controlled to turn on, timing is started, and the current of the inductor L1 is acquired. As the current of the inductor L1 continues to rise from zero and the obtained current of the inductor L1 reaches the maximum current value (i.e., the set current value), timing is stopped, the on-time of the first switch transistor Q1 is acquired, and taken as the first time. At the same time, the first switch transistor Q1 is controlled to turn off, timing is started, when the current of the inductor L1 begins to drop from the maximum current value and drops to the preset current threshold, timing is stopped, the off-time of the first switch transistor Q1 is acquired, and taken as the third time. Next, the sum of the first time and the third time is taken as the control period T.
[0061] Subsequently, the first switch transistor Q1 is controlled to be turned on again, timing is started, and the current of the inductor L1 is acquired. When the current of the inductor L1 reaches the set current, the timing is stopped, the on-time t of the first switch transistor Q1 is obtained, and it is determined whether the on-time t is greater than or equal to the control period T. At this time, since the on-time t is smaller than the control period T, the on-time can be updated to t` = t. That is, without changing the on-time, the off-set time of the first switch transistor Q1 is calculated as T - t`, and at the same time, the first switch transistor Q1 is controlled to be turned off and the timing is started. When the timing time reaches the off-set time T - t`, the second control period of the first switch transistor Q1 ends. The same applies to subsequent control periods.
[0062] Thereby, the control period is set according to the time at the first on / off of the first switch transistor, and the off-set time of the first switch transistor is determined according to the magnitude relationship between the on-time of the first switch transistor and the control period, so that switch transistor control with a constant control period but different duty ratios can be realized. Moreover, this method can ensure the safety of the BUCK circuit without damaging each element due to the charging current of the BUCK circuit during power-on. At the same time, it is possible to avoid the delay in the power-on speed caused by setting the control period too large or the frequent on / off of the first switch transistor caused by setting it too small, thereby realizing further optimization of the power-on control method.
[0063] In some embodiments, as shown in FIG. 3, when the flyback element in the BUCK circuit is the second switch transistor Q2, the power-on control method further includes controlling the second switch transistor to be turned off when controlling the first switch transistor to be turned on, and controlling the second switch transistor to be turned on when controlling the first switch transistor to be turned off.
[0064] Specifically, as shown in FIGS. 3 and 7a-7e, when the BUCK circuit is powered on, first, the first switch transistor Q1 is controlled to be turned on, and the second switch transistor Q2 is controlled to be turned off. At this time, the input-side capacitor C1 charges the output-side capacitor C2 via the first switch transistor Q1 and the inductor L1. The inductor current continues to rise from zero. When the inductor current rises from zero to the set current, it indicates that the charging current of the BUCK circuit has approached the smaller value of the withstand current of the first switch transistor Q1 or the saturation current of the inductor L1. Therefore, at this time, to avoid breakdown of the first switch transistor Q1 and saturation of the inductor L1 due to the continuous rise of the charging current, the first switch transistor Q1 is controlled to be turned off, and the second switch transistor Q2 is controlled to be turned on. At the same time, the on-time of the first switch transistor Q1 is obtained, and the off-set time of the first switch transistor Q1 is determined according to the on-time of the first switch transistor Q1. When the first switch transistor Q1 is turned off and the second switch transistor Q2 is turned on, the inductor L1 continues to charge the output-side capacitor C2 through the second switch transistor Q2, the voltage across the output-side capacitor C2 continues to rise, the inductor current of the BUCK circuit decreases, and when the off-time of the first switch transistor Q1 reaches the off-set time, the first switch transistor Q1 is controlled to be turned on again, and the second switch transistor Q2 is controlled to be turned off.
[0065] When the first switch transistor Q1 is turned on again and the second switch transistor Q2 is turned off again, the inductor current rises again. When the inductor current rises to the set current, the first switch transistor Q1 is controlled to turn off, and the second switch transistor Q2 is controlled to turn on. At the same time, the on-time of the first switch transistor Q1 this time is specified, and the off-set time of the first switch transistor Q1 is determined according to the on-time this time. When the off-time of the first switch transistor Q1 reaches the determined off-set time this time, the first switch transistor Q1 is controlled to turn on again, and the second switch transistor Q2 is controlled to turn off. This is repeated until the output voltage of the BUCK circuit reaches the target voltage. At this time, the on and off of the first switch transistor Q1 prevent a large inrush current that affects circuit safety from occurring, and the BUCK circuit can stop executing step S106 and enter normal control logic.
[0066] In the above embodiment, the set current is determined according to the current withstand of the first switch transistor and the saturation current of the inductor in the BUCK circuit. During power-on, the off-set time of the first switch transistor is determined according to the time when the inductor current rises to the set current, and the first switch transistor is controlled to turn off, so that the inductor current does not damage each element in the circuit, and effectively ensures the safety of the BUCK circuit during power-on.
[0067] In some embodiments, when the second switch transistor is on, the power-on control method further includes the step of controlling the second switch transistor to turn off early when the inductor current drops to zero and the off-time of the first switch transistor has not reached the off-set time.
[0068] Specifically, first, take the case where the control period T is a preset fixed value as an example. When the control period T is set large, as shown in FIGS. 7b-7c, when the off time of the first switch transistor Q1 has not yet reached the off-set time, the inductor L1 is completely discharged and the inductor current drops to zero. At this time, the second switch transistor Q2 can be controlled to turn off early. Specifically, when implementing, when the first switch transistor Q1 is turned off, the current of the inductor L1 is acquired, and when the current of the inductor L1 drops to zero, the second switch transistor Q2 can be controlled to turn off. When the control period T is set small, as shown in FIG. 7a, when the off time of the first switch transistor Q1 reaches the off-set time and the inductor current has just dropped to zero or has not yet dropped to zero, based on the constraint of the off-set time of the first switch transistor Q1, the second switch transistor Q2 is controlled to turn off.
[0069] Furthermore, take the case where the control period T is set to the control period T corresponding to the case where the inductor current drops to zero when the first switch transistor Q1 is off as an example. As shown in FIG. 7d, there is no situation where the inductor current drops to zero but the off time of the first switch transistor Q1 has not reached the off-set time. At this time, based on the constraint of the off-set time of the first switch transistor Q1, the second switch transistor Q2 is controlled to turn off.
[0070] Furthermore, take the case where the control period T is set to the control period T corresponding to the case where the inductor current drops to a preset current threshold when the first switch transistor Q1 is off as an example. As shown in FIG. 7e, there is no situation where the inductor current drops to zero but the off time of the first switch transistor Q1 has not reached the off-set time. At this time, based on the constraint of the off-set time of the first switch transistor Q1, the second switch transistor Q2 is controlled to turn off.
[0071] FIG. 8 is a flowchart of a power-on control method for a BUCK circuit according to an embodiment of the present invention. For the sake of simplicity of explanation, hereinafter, mainly an example of applying the power-on control method to a BUCK circuit as shown in FIG. 2 will be described.
[0072] As shown in FIG. 8, the power-on control method for the BUCK circuit can include the following steps.
[0073] In S202, the withstand current of the first switch transistor in the BUCK circuit is specified, and the saturation current of the inductor in the BUCK circuit is specified.
[0074] Note that the withstand current is the maximum current that the first switch transistor Q1 can withstand. When the current exceeds the withstand current of the first switch transistor Q1, the first switch transistor Q1 breaks down and is damaged. The saturation current is the current corresponding to the saturation of the inductor, that is, when the current exceeds the saturation current of the inductor L1, a saturation phenomenon occurs in the inductor L1.
[0075] In S204, the current rise time is specified according to the smaller value of the withstand current and the saturation current, and the on-set time of the first switch transistor is determined according to the current rise time.
[0076] Specifically, as shown in FIG. 2, when the BUCK circuit is powered on, when the first switch transistor Q1 is first turned on, affected by the input-side capacitor C1 and the output-side capacitor C2, the BUCK circuit generates a large charging current (i.e., the current of the inductor L1) and charges the output-side capacitor C2. Due to the inductor L1 in the circuit, the charging current of the BUCK circuit continues to rise from zero. Here, the time corresponding to the charging current rising from zero to the smaller value of the withstand current of the first switch transistor Q1 and the saturation current of the inductor L1 is set as the current rise time. The on-set time TS1 of the first switch transistor Q1 is determined according to the current rise time. When the actual on-time of the first switch transistor Q1 reaches the on-set time TS1, the first switch transistor Q1 is controlled to turn off to avoid breakdown of the first switch transistor Q1 or saturation of the inductor L1 due to the continuous rise of the charging current.
[0077] In addition, based on the type numbers of the first switch transistor Q1 and the inductor L1, etc., the withstand current of the first switch transistor Q1 and the saturation current of the inductor L1 can be obtained in advance by checking the product parameters. The smaller value of the two is obtained. Then, based on the calculation formula of the inductor current, the current rise time is obtained by calculating based on the voltage across the input-side capacitor C1 and the voltage across the output-side capacitor C2. Based on this, a certain margin is added to obtain the on-set time TS1 of the first switch transistor. For example, the current rise time is approximately Imin*L / (VC1-VC2), where Imin is the smaller value of the two, L is the inductance value of the inductor, VC1 is the voltage across the input-side capacitor C1, VC2 is the voltage across the output-side capacitor C2, and in the initial state, VC2 is 0. Next, based on this, the current rise time is appropriately shortened to obtain the on-set time TS1.
[0078] In S206, when the BUCK circuit is powered on, the first switch transistor is controlled to turn on. When the on-time of the first switch transistor reaches the on-set time, the first switch transistor is controlled to turn off. When it is determined that the first switch transistor satisfies a preset off condition, the first switch transistor is controlled to turn on, and this is sequentially repeated until the output voltage of the BUCK circuit reaches the target voltage.
[0079] Specifically, as shown in FIG. 2, when the BUCK circuit is powered on, first, the first switch transistor Q1 is controlled to turn on. At this time, the input-side capacitor C1 charges the output-side capacitor C2 via the first switch transistor Q1 and the inductor L1, and the charging current of the BUCK circuit continues to rise from zero. When the on-time of the first switch transistor Q1 reaches the on-set time TS1, the charging current of the BUCK circuit approaches the smaller value of the withstand current of the first switch transistor Q1 or the saturation current of the inductor L1. At this time, the first switch transistor Q1 is controlled to turn off to avoid breakdown of the first switch transistor Q1 and saturation of the inductor L1 due to the continuous increase of the charging current.
[0080] When the first switch transistor Q1 is turned off, the inductor L1 continues to charge the output capacitor C2 through the diode D, the voltage across the output capacitor C2 continues to rise, and the charging current of the BUCK circuit decreases. When the first switch transistor Q1 satisfies the preset off condition, the first on-off cycle of the first switch transistor Q1 ends. Thereafter, the first switch transistor Q1 is controlled to turn on, and when the on-time reaches the on-set time TS1, the first switch transistor Q1 is controlled to turn off. When the first switch transistor Q1 satisfies the preset off condition, the second on-off cycle of the first switch transistor Q1 ends. This is repeated until the output voltage of the BUCK circuit reaches the target voltage (the target voltage is smaller than the input voltage). At this time, the on-off of the first switch transistor Q1 does not generate a large inrush current that affects the circuit safety, the BUCK circuit stops executing step S206, and can enter the normal control logic.
[0081] In the above embodiment, the on-set time is determined according to the current withstand of the switch transistor and the saturation current of the inductor. When the BUCK circuit is powered on, the switch transistor is turned off when its on-time reaches the on-set time, and is turned on again when it satisfies the preset off condition. This is repeated until the output voltage reaches the target voltage. Thereby, during power-on, the inductor current is prevented from damaging each element in the circuit, and the safety of the BUCK circuit during power-on is effectively ensured.
[0082] In some embodiments, the step of determining that the first switch transistor satisfies the preset off condition includes the step of obtaining the current of the inductor during the off period of the first switch transistor, and the step of determining that the first switch transistor satisfies the preset off condition when the current of the inductor drops to zero.
[0083] Specifically, as shown in FIG. 9a, the first switch transistor Q1 is first turned on. When the on-time of the first switch transistor Q1 reaches the on-set time TS1, the first switch transistor Q1 is controlled to turn off, and the current of the inductor L1 is acquired. When the current of the inductor L1 reaches zero, the first switch transistor Q1 is controlled to turn on again, and the first on-off cycle ends. The subsequent on-off cycles are the same.
[0084] Note that in the second on-off cycle, when the first switch transistor Q1 is turned on, the charging current continues to rise from zero. However, as can be seen from the calculation formula of the inductor current, since VC2 is added and the rising rate of the inductor current decreases, even with the same on-set time TS1, the maximum current of the inductor current rise is reduced. Thereby, it is guaranteed that the charging current does not exceed the smaller value of the current withstand of the first switch transistor Q1 and the saturation current of the inductor L1. At the same time, since the rising rate of the inductor current decreases and the stored energy of the inductor L1 decreases, when the first switch transistor Q1 is turned off, the charging current rapidly decreases to zero. As can be seen from the figure, the off-time of the first switch transistor Q1 in the second on-off cycle is significantly shorter than that in the first on-off cycle. The subsequent on-off cycles are the same.
[0085] Thereby, during the first on-period of the first switch transistor, by controlling the first switch transistor to turn off according to the first time when the inductor current decreases from the maximum current to zero, when the BUCK circuit is powered on, the charging current does not exceed the current withstand of the first switch transistor or the saturation current of the inductor, ensuring the safety of the BUCK circuit.
[0086] In some other embodiments, the step of determining that the first switch transistor meets a preset off condition includes: during the off period of the first switch transistor, acquiring the current of the inductor; and when the current of the inductor drops to a preset current threshold, determining that the first switch transistor meets the preset off condition.
[0087] It should be noted that the preset current threshold is a value greater than zero, and it is necessary to ensure that the charging current of the BUCK circuit does not exceed the withstand current of the first switch transistor Q1 or the inductor L1 does not saturate in subsequent on-off cycles. Specifically, it can be obtained in advance through theoretical calculations or tests, etc., and is not limited here.
[0088] Specifically, as shown in FIG. 9b, when the first switch transistor Q1 is first turned on and the on time of the first switch transistor Q1 reaches the on setting time TS1, the first switch transistor Q1 is controlled to turn off, and the current of the inductor L1 is acquired. At the same time, when the current of the inductor L1 reaches the preset current threshold, the first switch transistor Q1 is controlled to turn on, and the first on-off cycle ends. The same applies to subsequent on-off cycles.
[0089] It should be noted that in the second on-off cycle, when the first switch transistor Q1 is turned on, the charging current continues to rise from the preset current threshold. Although the charging current does not start to rise from zero, if the preset current threshold is reasonably set and the rising speed of the inductor current in the second on-off cycle is small, even with the same on setting time TS1, the maximum current of the inductor current rise can be made smaller than the smaller value of the withstand current of the first switch transistor Q1 and the saturation current of the inductor L1, ensuring that the first switch transistor Q1 does not break down and is damaged and the inductor L1 does not saturate.
[0090] In some other embodiments, the step of determining that the first switch transistor satisfies a preset off condition includes obtaining the off time of the first switch transistor and determining that the first switch transistor satisfies the preset off condition when the off time of the first switch transistor reaches a second set time greater than the on set time.
[0091] That is, it can be set that the preset off condition is satisfied when the off time of the first switch transistor Q1 reaches the second set time TS2. The second set time TS2 is a fixed value greater than the on set time TS1. For example, the second set time TS2 can be set to a value larger than the on set time TS1, thereby ensuring that the charging current in each subsequent on-off cycle does not exceed the smaller value of the withstand current of the first switch transistor Q1 and the saturation current of the inductor L1.
[0092] As shown in FIG. 9c, when the second set time TS2 is set large, when the off time of the first switch transistor Q1 has not reached the second set time TS2, the inductor L1 is completely discharged and the charging current drops to 0. When the next on-off cycle comes, the first switch transistor Q1 is turned on and the charging current continues to rise from zero. However, as can be seen from the calculation formula of the inductor current di / dt = (VC1 - VC2) / L, since VC2 is added and the rising speed of the inductor current decreases, even with the same on set time TS1, the maximum current at which the inductor current rises becomes smaller, ensuring that the charging current does not exceed the smaller value of the withstand current of the first switch transistor Q1 and the saturation current of the inductor L1. At the same time, since the rising speed of the inductor current decreases and the stored energy of the inductor L1 decreases, when the first switch transistor Q1 is turned off, the charging current quickly drops to zero. As can be seen from the figure, the time during which the current is zero during the second on-off cycle increases. The same is true for subsequent on-off cycles.
[0093] Thus, by setting a fixed value larger than the on-set time of the first switch transistor as the second set time and controlling the first switch transistor to turn off based on the set time, when the BUCK circuit is powered on, the charging current is prevented from exceeding the current withstand capacity of the first switch transistor or the saturation current of the inductor, thereby ensuring the safety of the BUCK circuit.
[0094] In some other embodiments, the step of determining that the first switch transistor satisfies a preset off condition includes: during the first on period of the first switch transistor, obtaining the maximum current of the inductor; determining the first time when the maximum current drops to zero; and determining that the first switch transistor satisfies the preset off condition when the off time of the first switch transistor reaches the first time.
[0095] Specifically, as shown in FIG. 9d, when the first switch transistor Q1 is first turned on and the on time of the first switch transistor Q1 reaches the on-set time TS1, the current of the inductor L1 is obtained. This current is the maximum current of the inductor L1 when the first switch transistor Q1 is first turned on. Thereafter, the first switch transistor Q1 is controlled to turn off and timing is started. At the same time, the current of the inductor L1 is obtained, and when the current of the inductor L1 reaches zero, the timing is stopped, and the time during which the current of the inductor L1 drops from the maximum current to zero is obtained and taken as the first time T1. Thereafter, the second on-off cycle is entered. During this cycle, first, the first switch transistor Q1 is controlled to turn on. When the on time of the first switch transistor Q1 reaches the on-set time TS1, the first switch transistor Q1 is controlled to turn off. When the off time reaches the first time T1, the second on-off cycle ends. The same applies hereinafter.
[0096] Note that in the second on-off cycle, the first switch transistor Q1 is turned on and the charging current continues to rise from zero. However, as can be seen from the calculation formula of the inductor current, since VC2 is added and the rising speed of the inductor current decreases, even with the same on-set time TS1, the maximum current of the inductor current rise is reduced. Thereby, it is guaranteed that the charging current does not exceed the smaller value of the current withstand of the first switch transistor Q1 and the saturation current of the inductor L1. At the same time, since the rising speed of the inductor current decreases and the stored energy of the inductor L1 decreases, when the first switch transistor Q1 is turned off, the charging current rapidly decreases to zero. As can be seen from the figure, the time when the current is zero increases in the second on-off cycle. The same applies to subsequent on-off cycles.
[0097] Thereby, during the first on-period of the first switch transistor, by controlling the first switch transistor to turn off according to the first time when the inductor current decreases from the maximum current to zero, when the BUCK circuit is powered on, the charging current does not exceed the current withstand of the first switch transistor or the saturation current of the inductor, ensuring the safety of the BUCK circuit. And compared with the method shown in FIG. 5c, the power-on time of the BUCK circuit is shortened and the power-on speed of the BUCK circuit is improved.
[0098] In some other embodiments, the step of determining that the first switch transistor satisfies a preset off condition includes: during the first on-period of the first switch transistor, the step of obtaining the maximum current of the inductor; the step of determining the second time when the maximum current decreases to a preset current threshold; and the step of determining that the first switch transistor satisfies the preset off condition when the off time of the first switch transistor reaches the second time.
[0099] Note that the preset current threshold value is a value greater than zero, and it is necessary to ensure that the charging current of the BUCK circuit does not exceed the withstand current of the first switch transistor Q1 or the inductor L1 does not saturate in subsequent on-off cycles. Specifically, the value can be obtained in advance by theoretical calculation or testing, etc., and is not restricted here.
[0100] Specifically, as shown in FIGS. 5e-9g, the first switch transistor Q1 is first turned on, and when the on-time of the first switch transistor Q1 reaches the on-set time TS1, the current of the inductor L1 is acquired. This current is the maximum current of the inductor L1 when the first switch transistor Q1 is first turned on. Then, the first switch transistor Q1 is controlled to turn off and timing is started, and the current of the inductor L1 is acquired. When the current of the inductor L1 reaches the preset current threshold value, the timing is stopped, and the time during which the current of the inductor L1 drops from the maximum current to the preset current threshold value is acquired, and is designated as the second time T2. Then, it enters the second on-off cycle, and within this cycle, first the first switch transistor Q1 is controlled to turn on. When the on-time of the first switch transistor Q1 reaches the on-set time TS1, the first switch transistor Q1 is controlled to turn off. When the off-time reaches the second time T2, the second on-off cycle ends. The same applies hereinafter.
[0101] Note that in the second on-off cycle, when the first switch transistor Q1 is turned on, the charging current continues to rise from the preset current threshold value. Although the charging current does not start rising from zero, if the preset current threshold value is reasonably set and the rising rate of the inductor current in the second on-off cycle is small, even with the same on-set time TS1, the maximum current of the inductor current rise can be made smaller than the smaller value of the withstand current of the first switch transistor Q1 and the saturation current of the inductor L1, ensuring that the first switch transistor Q1 is not broken down and damaged and the inductor L1 does not saturate.
[0102] Furthermore, depending on the setting of a preset current threshold, there may be multiple cases at the end of the second on-off cycle accordingly. As shown in FIG. 9e, when the charging current just drops to zero at the end of the second on-off cycle, as can be seen from the above analysis, if the current continues to rise from zero, it can be ensured that the charging current is smaller than the smaller value of the current withstand of the first switch transistor Q1 and the saturation current of the inductor L1. As shown in FIG. 9f, when the second on-off cycle ends and the charging current has already dropped to zero, as can be seen from the above analysis, if the current continues to rise from zero, it can be ensured that the charging current is smaller than the smaller value of the current withstand of the first switch transistor Q1 and the saturation current of the inductor L1. As shown in FIG. 9g, when the second on-off cycle ends and the charging current has not dropped to zero but is lower than the preset current threshold, based on the analysis at the start of the second on-off cycle, the charging current in the third on-off cycle will be smaller than the smaller value of the current withstand of the first switch transistor Q1 and the saturation current of the inductor L1. As can be seen from this, in any of the above multiple cases, the charging current can be made smaller than the smaller value of the current withstand of the first switch transistor Q1 and the saturation current of the inductor L1 in each on-off cycle of the first switch transistor Q1.
[0103] Thereby, during the first on-period of the first switch transistor, by controlling the first switch transistor to turn off according to the second time when the inductor current drops from the maximum current to the preset current threshold, when the BUCK circuit is powered on, the charging current can be prevented from exceeding the current withstand of the first switch transistor or the saturation current of the inductor, ensuring the safety of the BUCK circuit. And compared with the method shown in FIGS. 9c-9d, the power-on time of the BUCK circuit can be shortened and the power-on speed of the BUCK circuit can be improved.
[0104] In some embodiments, as shown in FIG. 3, when the flyback element in the BUCK circuit is the second switch transistor Q2, the power-on control method further includes a step of controlling the second switch transistor to be off when controlling the first switch transistor to be on, and a step of controlling the second switch transistor to be on when controlling the first switch transistor to be off.
[0105] Specifically, as shown in FIGS. 3 and 10a - 10g, when the BUCK circuit is powered on, the first switch transistor Q1 is controlled to be on while the second switch transistor Q2 is controlled to be off. At this time, the input-side capacitor C1 charges the output-side capacitor C2 through the first switch transistor Q1 and the inductor L1, and the charging current of the BUCK circuit continues to rise from zero. When the on-time of the first switch transistor Q1 reaches the on-set time TS1, the charging current of the BUCK circuit approaches the smaller value of the current withstand of the first switch transistor Q1 or the saturation current of the inductor L1. At this time, the first switch transistor Q1 is controlled to be off while the second switch transistor Q2 is controlled to be on, and current is passed through the second switch transistor Q2 to avoid breakdown of the first switch transistor Q1 and saturation of the inductor L1 due to the continuous rise of the charging current.
[0106] When the first switch transistor Q1 is turned off and the second switch transistor Q2 is turned on, the inductor L1 continues to charge the output capacitor C2 through the second switch transistor Q2, the voltage across the output capacitor C2 continues to rise, and the charging current of the BUCK circuit decreases. When the first switch transistor Q1 satisfies the preset off condition, the first on-off cycle of the first switch transistor Q1 ends. Then, the first switch transistor Q1 is controlled to be turned on and the second switch transistor Q2 is turned off. When the on-time reaches the on-set time TS1, the first switch transistor Q1 is controlled to be turned off and the second switch transistor Q2 is turned on. When the first switch transistor Q1 satisfies the preset off condition, the second on-off cycle of the first switch transistor Q1 ends. This is repeated until the output voltage of the BUCK circuit reaches the target voltage (the target voltage is smaller than the input voltage). At this time, the on-off of the first switch transistor Q1 and the second switch transistor Q2 does not generate a large inrush current that affects the safety of the circuit, and the BUCK circuit can stop executing step S206 and enter the normal control logic.
[0107] In the above embodiment, the on-set time is determined according to the current withstand of the switch transistor and the saturation current of the inductor. When the BUCK circuit is powered on, the switch transistor is controlled to be turned off when its on-time reaches the on-set time, and is turned on again when it satisfies the preset off condition. This is repeated until the output voltage reaches the target voltage. Thereby, during power-on, the charging current of the BUCK circuit is prevented from damaging each element in the circuit, and the safety of the BUCK circuit during power-on is effectively ensured.
[0108] In some embodiments, when the second switch transistor is on, the power-on control method further includes a step of controlling the second switch transistor to be turned off early when the current of the inductor decreases to zero and the first switch transistor does not satisfy the preset off condition.
[0109] Specifically, first, take the case where the preset off condition is that the off time of the first switch transistor Q1 reaches the second set time TS2. As shown in FIG. 10c, when the second set time TS2 is set large, when the off time of the first switch transistor Q1 has not reached the second set time TS2, the inductor L1 is completely discharged and the charging current drops to zero. At this time, the second switch transistor Q2 can be controlled to turn off early. When specifically realized, when the on time of the first switch transistor Q1 reaches the on set time TS1, the current of the inductor L1 starts to be acquired, and when the current of the inductor L1 drops to zero, the second switch transistor Q2 is controlled to turn off.
[0110] Furthermore, take the case where the preset off condition is that the off time of the first switch transistor Q1 reaches the first time T1. As shown in FIG. 10d, in the first on-off cycle, when the off time of the first switch transistor Q1 reaches the first time T1 and the charging current just drops to zero, correspondingly, the second switch transistor Q2 is controlled to turn off. In the second on-off cycle, when the off time of the first switch transistor Q1 has not reached the first time T1 and the inductor L1 is completely discharged and the charging current has dropped to zero, at this time, the second switch transistor Q2 can be controlled to turn off early. When specifically realized, when the on time of the first switch transistor Q1 reaches the on set time TS1, the current of the inductor L1 starts to be acquired, and when the current of the inductor L1 drops to zero, the second switch transistor Q2 can be controlled to turn off.
[0111] Furthermore, take the case where the preset off condition is that the off time of the first switch transistor Q1 reaches the second time T2. As shown in FIGS. 10e - 10g, in the first on - off cycle, the off time of the first switch transistor Q1 has reached the second time T2, and the charging current has not yet decreased to zero. However, due to the constraint of the second time T2, the second switch transistor Q2 is turned off to prepare for the next on - off cycle. In subsequent on - off cycles, there are multiple cases where the off time of the first switch transistor Q1 reaches the second time T2, but the charging current has not yet decreased to zero, or the charging current has just decreased to zero, or the charging current has already decreased to zero. When it has not decreased to zero, as shown in FIG. 10g, based on the constraint of the second time T2, the second switch transistor Q2 is controlled to turn off. When it has just decreased to zero, as shown in FIG. 10e, based on the constraint of the second time T2, the second switch transistor Q2 is controlled to turn off. When it has already decreased to zero, as shown in FIG. 10f, the second switch transistor Q2 is turned off earlier. Specifically, when the on - time of the first switch transistor Q1 reaches the on - set time TS1, the current of the inductor L1 starts to be acquired, and when the current of the inductor L1 decreases to zero, the second switch transistor Q2 is controlled to turn off.
[0112] In addition, when the fly - back element is the second switch transistor in the BUCK circuit, the difference from the case where the fly - back element is a diode is only in the control of the second switch transistor, and the control of the first switch transistor is the same. Therefore, it has the same effect as the case where the fly - back element is a diode. Specifically, refer to the above and do not repeat here.
[0113] In the above embodiment, instead of the diode, a second switch transistor is used. When the current of the inductor drops to zero and the off time of the first switch transistor has not reached the off set time, by controlling the second switch transistor to turn off earlier, it does not affect subsequent functions and reduces circuit losses, thereby realizing the optimization of the power-on control method.
[0114] As described above, the power-on control method of the BUCK circuit according to the embodiment of the present disclosure determines the set current according to the smaller value of the withstand current of the first switch transistor in the BUCK circuit and the saturation current of the inductor. When the BUCK circuit is powered on, the first switch transistor is controlled to turn on to obtain the inductor current. When the inductor current reaches the set current, the on time of the first switch transistor is specified, and the off set time of the first switch transistor is determined according to the on time, and the first switch transistor is controlled to turn off. When the off time of the first switch transistor reaches the off set time, the first switch transistor is controlled to turn on, and this is repeated until the output voltage of the BUCK circuit reaches the target voltage. Thereby, during power-on, the inductor current does not damage each element in the circuit, and effectively ensures the safety of the BUCK circuit during power-on.
[0115] Corresponding to the above embodiment, the embodiment of the present disclosure further provides a controller for the BUCK circuit.
[0116] FIG. 11 is a structural schematic diagram of a controller of a BUCK circuit according to an embodiment of the present disclosure. As shown in FIG. 11, the controller 130 includes a memory 131, a processor 132, and a power-on control program for the BUCK circuit stored in the memory 131 and operable on the processor 132. When the processor 132 executes the power-on control program for the BUCK circuit, it realizes the above-mentioned power-on control method.
[0117] The controller of the BUCK circuit according to an embodiment of the present disclosure can make the inductor current of the BUCK circuit smaller than the withstand current of the switching transistor and the saturation current of the inductor during power-on by implementing the aforementioned power-on control method on the BUCK circuit, so that the inductor current will not damage each element in the circuit, and effectively ensure the safety of the BUCK circuit during power-on.
[0118] Corresponding to the above embodiment, the embodiment of the present disclosure further provides a computer-readable storage medium, in which a power-on control program for the BUCK circuit is stored. When the power-on control program for the BUCK circuit is executed by a processor, the aforementioned power-on control method for the BUCK circuit is realized.
[0119] The computer-readable storage medium according to an embodiment of the present disclosure can make the inductor current of the BUCK circuit smaller than the withstand current of the switching transistor and the saturation current of the inductor during power-on by the aforementioned power-on control method, so that the inductor current will not damage each element in the circuit, and effectively ensure the safety of the BUCK circuit during power-on.
[0120] Corresponding to the above embodiment, the embodiment of the present disclosure further provides a power-on control device for the BUCK circuit.
[0121] FIG. 12 is a structural schematic diagram of a power-on control device for a BUCK circuit according to an embodiment of the present disclosure. As shown in FIG. 12, the power-on control device 200 includes a determination module 210 and a control module 220.
[0122] The decision module 210 is used to identify the current withstand capacity of the first switch transistor in the BUCK circuit, identify the saturation current of the inductor in the BUCK circuit, and determine the set current according to the smaller value of the current withstand capacity and the saturation current. When the BUCK circuit is powered on, the control module 220 controls the first switch transistor to be turned on to obtain the inductor current. When the inductor current reaches the set current, the control module 220 identifies the on-time of the first switch transistor, determines the off-set time of the first switch transistor according to the on-time, controls the first switch transistor to be turned off, and when the off-time of the first switch transistor reaches the off-set time, controls the first switch transistor to be turned on, and repeats this process until the output voltage of the BUCK circuit reaches the target voltage.
[0123] According to an embodiment of the present disclosure, specifically, the control module 220 is used to determine the control period of the first switch transistor, when the on-time is greater than or equal to the control period, identify the time difference between the on-time and the control period, and use the difference between the control period and the time difference as the off-set time, and when the on-time is less than the control period, use the difference between the control period and the on-time as the off-set time.
[0124] According to an embodiment of the present disclosure, specifically, when the first switch transistor is first turned on, the control module 220 identifies the first time when the inductor current rises to the maximum current value, controls the first switch transistor to be turned off, identifies the second time when the inductor current drops from the maximum current value to zero, and uses the sum of the first time and the second time as the control period.
[0125] According to an embodiment of the present disclosure, specifically, when the first switch transistor is first turned on, the control module 220 identifies the first time during which the inductor current rises to the maximum current value, controls the first switch transistor to turn off, determines the third time during which the inductor current drops from the maximum current value to a preset current threshold greater than zero, and is used to set the sum of the first time and the third time as the control period.
[0126] According to an embodiment of the present disclosure, when the flyback element in the BUCK circuit is the second switch transistor, the control module 220 is further used to control the second switch transistor to turn off when controlling the first switch transistor to turn on, and to control the second switch transistor to turn on when controlling the first switch transistor to turn off.
[0127] According to an embodiment of the present disclosure, when the second switch transistor is on, the control module 220 is further used to control the second switch transistor to turn off prematurely when the inductor current drops to zero and the off time of the first switch transistor has not reached the off-set time.
[0128] It should be noted that for the description of the power-on control device of the BUCK circuit in the present disclosure, reference may be made to the related description of the power-on control method of the BUCK circuit in the present disclosure, and specific details will not be repeated here.
[0129] The power-on control device according to an embodiment of the present disclosure identifies the current withstand of the first switch transistor in the BUCK circuit by a determination module, identifies the saturation current of the inductor in the BUCK circuit, and determines a set current according to the smaller value of the current withstand and the saturation current. When the BUCK circuit is powered on by a control module, the first switch transistor is controlled to be turned on to obtain an inductor current. When the inductor current reaches the set current, the on-time of the first switch transistor is identified, and the off-set time of the first switch transistor is determined according to the on-time. The first switch transistor is controlled to be turned off, and when the off-time of the first switch transistor reaches the off-set time, the first switch transistor is controlled to be turned on, and this is repeated until the output voltage of the BUCK circuit reaches the target voltage. Thereby, during power-on, the inductor current is prevented from damaging each element in the circuit, and the safety of the BUCK circuit during power-on is effectively ensured.
[0130] FIG. 13 is a structural schematic diagram of a power-on control device for a BUCK circuit according to an embodiment of the present invention. As shown in FIG. 13, the power-on control device 300 includes a first determination module 310, a second determination module 320, and a control module 330.
[0131] The first determination module 310 is used to identify the current-carrying capacity of the first switching transistor in the BUCK circuit and to identify the saturation current of the inductor in the BUCK circuit. The second determination module 320 is used to identify the current rise time according to the smaller value of the current-carrying capacity and the saturation current, and to determine the on-set time of the first switching transistor according to the current rise time. When the BUCK circuit is powered on, the control module 330 controls the first switching transistor to turn on, and when the on-time of the first switching transistor reaches the on-set time, controls the first switching transistor to turn off, and when it is determined that the first switching transistor satisfies a preset off condition, controls the first switching transistor to turn on, and repeats this until the output voltage of the BUCK circuit reaches the target voltage.
[0132] According to an embodiment of the present invention, specifically, during the off period of the first switching transistor, the control module 330 is used to obtain the current of the inductor and to determine that the first switching transistor satisfies a preset off condition when the current of the inductor drops to zero.
[0133] According to another embodiment of the present invention, specifically, during the off period of the first switching transistor, the control module 330 is used to obtain the current of the inductor and to determine that the first switching transistor satisfies a preset off condition when the current of the inductor drops to a preset current threshold.
[0134] According to another embodiment of the present invention, specifically, the control module 330 is used to obtain the off-time of the first switching transistor and to determine that the first switching transistor satisfies a preset off condition when the off-time of the first switching transistor reaches a second set time, and the second set time is greater than the on-set time.
[0135] According to another embodiment of the present invention, specifically during the first on-period of the first switch transistor, the control module 330 is used to obtain the maximum current of the inductor, identify the first time when the maximum current drops to zero, and determine that the first switch transistor satisfies a preset off condition when the off-time of the first switch transistor reaches the first time.
[0136] According to another embodiment of the present invention, specifically during the first on-period of the first switch transistor, the control module 330 is used to obtain the maximum current of the inductor, identify the second time when the maximum current drops to a preset current threshold, and determine that the first switch transistor satisfies a preset off condition when the off-time of the first switch transistor reaches the second time.
[0137] According to an embodiment of the present invention, when the flyback element in the BUCK circuit is the second switch transistor, the control module 330 is further used to control the second switch transistor to turn off when controlling the first switch transistor to turn on, and control the second switch transistor to turn on when controlling the first switch transistor to turn off.
[0138] According to an embodiment of the present invention, when the second switch transistor is on, the control module 330 is further used to control the second switch transistor to turn off early when the current of the inductor drops to zero and the first switch transistor does not satisfy a preset off condition.
[0139] It should be noted that for the description of the power-on control device of the BUCK circuit in this application, reference is made to the related description of the power-on control method of the BUCK circuit in this application, and specific details will not be repeated here.
[0140] Corresponding to the above embodiments, the embodiments of the present disclosure further provide a BUCK circuit.
[0141] FIG. 14 is a circuit diagram of a BUCK circuit according to an embodiment of the present disclosure. As shown in FIG. 14, the BUCK circuit 100 includes an input-side capacitor C1, a first switch transistor Q1, a flyback element XL, an inductor L1, an output-side capacitor C2, an output voltage detection module 110, a current detection module 120, and a controller 130.
[0142] One end of the first switch transistor Q1 is connected to one end of the input-side capacitor C1, one end of the flyback element XL is connected to the other end of the first switch transistor Q1, the other end of the flyback element XL is connected to the other end of the input-side capacitor C1, one end of the inductor L1 is connected to the other end of the first switch transistor Q1, one end of the output-side capacitor C2 is connected to the other end of the inductor L1, and the other end of the output-side capacitor C2 is connected to the other end of the flyback element XL.
[0143] The output voltage detection module 110 is used to detect the output voltage of the BUCK circuit. The current detection module 120 is used to detect the inductor current. The controller 130 is used to identify the breakdown current of the first switch transistor Q1 and the saturation current of the inductor L1, and to determine a set current according to the smaller value of the breakdown current and the saturation current. Further, when the BUCK circuit 100 is powered on, the controller 130 controls the first switch transistor Q1 to be turned on to obtain the inductor current IL. When the inductor current IL reaches the set current, the controller 130 identifies the on-time of the first switch transistor Q1, determines the off-set time of the first switch transistor Q1 according to the on-time, controls the first switch transistor Q1 to be turned off, and when the off-time of the first switch transistor reaches the off-set time, controls the first switch transistor Q1 to be turned on, and repeats this process until the output voltage of the BUCK circuit 100 reaches the target voltage.
[0144] According to an embodiment of the present disclosure, the controller 130 is specifically used for determining the control period of the first switch transistor, identifying the time difference between the on-time and the control period when the on-time is greater than or equal to the control period, setting the difference between the control period and the time difference as the off-set time, and setting the difference between the control period and the on-time as the off-set time when the on-time is less than the control period.
[0145] According to an embodiment of the present disclosure, the controller 130 is specifically used for identifying the first time when the inductor current rises to the maximum current value when the first switch transistor is first turned on, controlling the first switch transistor to turn off, identifying the second time when the inductor current drops from the maximum current value to zero, and setting the sum of the first time and the second time as the control period.
[0146] According to an embodiment of the present disclosure, the controller 130 is specifically used for identifying the first time when the inductor current rises to the maximum current value when the first switch transistor is first turned on, controlling the first switch transistor to turn off, identifying the third time when the inductor current drops from the maximum current value to a preset current threshold greater than zero, and setting the sum of the first time and the third time as the control period.
[0147] According to an embodiment of the present disclosure, when the flyback element in the BUCK circuit is the second switch transistor, the controller 130 is further used for controlling the second switch transistor to turn off when controlling the first switch transistor to turn on, and controlling the second switch transistor to turn on when controlling the first switch transistor to turn off.
[0148] According to an embodiment of the present disclosure, when the second switch transistor is on, the controller 130 is further used for controlling the second switch transistor to turn off early when the inductor current drops to zero and the off-time of the first switch transistor has not reached the off-set time.
[0149] As shown in FIG. 14, the BUCK circuit 100 includes an input-side capacitor C1, a first switch transistor Q1, a flyback element XL, an inductor L1, an output-side capacitor C2, an output voltage detection module 110, and a controller 120.
[0150] One end of the first switch transistor Q1 is connected to one end of the input-side capacitor C1, one end of the flyback element XL is connected to the other end of the first switch transistor Q1, the other end of the flyback element XL is connected to the other end of the input-side capacitor C1, one end of the inductor L1 is connected to the other end of the first switch transistor Q1, one end of the output-side capacitor C2 is connected to the other end of the inductor L1, and the other end of the output-side capacitor C2 is connected to the other end of the flyback element XL.
[0151] The output voltage detection module 110 is used to detect the output voltage of the BUCK circuit 100. The controller 120 is used to identify the withstand current of the first switch transistor Q1 in the BUCK circuit 100, identify the saturation current of the inductor L1 in the BUCK circuit 100, determine the current rise time according to the smaller value of the withstand current and the saturation current, and determine the on-set time TS1 of the first switch transistor Q1 according to the current rise time. The controller 120 is further used to control the first switch transistor Q1 to turn on when the BUCK circuit 100 is powered on, control the first switch transistor Q1 to turn off when the on-time of the first switch transistor Q1 reaches the on-set time TS1, and control the first switch transistor Q1 to turn on when it is determined that the first switch transistor Q1 satisfies a preset off condition, and repeat this until the output voltage of the BUCK circuit 100 reaches the target voltage.
[0152] According to an embodiment of the present invention, specifically during the off period of the first switch transistor, the controller 120 is used to obtain the current of the inductor and determine that the first switch transistor satisfies a preset off condition when the current of the inductor drops to zero.
[0153] According to another embodiment of the present invention, specifically during the off period of the first switch transistor, the controller 120 is used to obtain the current of the inductor and determine that the first switch transistor satisfies a preset off condition when the current of the inductor drops to a preset current threshold.
[0154] According to another embodiment of the present invention, specifically, the controller 120 is used to obtain the off time of the first switch transistor Q1 and determine that the first switch transistor Q1 satisfies a preset off condition when the off time of the first switch transistor Q1 reaches a second set time, and the second set time is greater than the on set time.
[0155] According to another embodiment of the present invention, specifically during the first on period of the first switch transistor Q1, the controller 120 is used to obtain the maximum current of the inductor L1 by the current detection module 130, identify the first time when the maximum current drops to zero, and determine that the first switch transistor Q1 satisfies a preset off condition when the off time of the first switch transistor Q1 reaches the first time.
[0156] According to another embodiment of the present invention, specifically during the first on period of the first switch transistor Q1, the controller 120 is used to obtain the maximum current of the inductor by the current detection module 130, identify the second time when the maximum current drops to a preset current threshold, and determine that the first switch transistor Q1 satisfies a preset off condition when the off time of the first switch transistor Q1 reaches the second time.
[0157] According to an embodiment of the present invention, when the flyback element XL in the BUCK circuit is the second switch transistor, the controller 120 is further used to control the second switch transistor to turn off when controlling the first switch transistor Q1 to turn on, and to control the second switch transistor to turn on when controlling the first switch transistor Q1 to turn off.
[0158] According to an embodiment of the present invention, when the second switch transistor is on, the controller 120 is further used to control the second switch transistor to turn off early when the current of the inductor L1 drops to zero and the first switch transistor Q1 does not meet the preset off condition.
[0159] Note that for the description of the BUCK circuit in the present disclosure, reference is made to the related description of the power-on control method of the BUCK circuit in the present disclosure, and specific details will not be repeated here.
[0160] According to the BUCK circuit according to the embodiment of the present disclosure, the controller identifies the current withstand of the first switch transistor, identifies the saturation current of the inductor, and determines the set current according to the smaller value of the current withstand and the saturation current. When the BUCK circuit is powered on, the first switch transistor is controlled to turn on to obtain the inductor current. When the inductor current reaches the set current, the on-time of the first switch transistor is identified, the off-set time of the first switch transistor is determined according to the on-time, and the first switch transistor is controlled to turn off. When the off-time of the first switch transistor reaches the off-set time, the first switch transistor is controlled to turn on, and this is repeated until the output voltage of the BUCK circuit reaches the target voltage. Thereby, during power-on, the inductor current is prevented from damaging each element in the circuit, and the safety of the BUCK circuit during power-on is effectively ensured.
[0161] Note that the logic and / or steps shown in the flowchart or described herein in some other manner can be considered, for example, as an ordered list of executable instructions for implementing a logical function, and can be specifically implemented on any computer-readable medium, and can be used in an instruction execution system, apparatus, or device (e.g., a computer-based system, a system including a processor, or a system that reads instructions from an instruction execution system, apparatus, or device and executes the instructions), or in combination with these instruction execution systems, apparatuses, or devices. For the purposes of this specification, a "computer-readable medium" may be any device that can contain, store, communicate, propagate, or transport a program for use in or in connection with an instruction execution system, apparatus, or device or in combination with these instruction execution systems, apparatuses, or devices. More specific examples (a non-exhaustive list) of computer-readable media include electrical connection parts (electronic devices) having one or more wires, portable computer disk cartridges (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber devices, and portable disk read-only memory (CDROM). Also, a computer-readable medium may, in turn, be paper or other suitable medium on which the program is printed, for example, the paper or other suitable medium is optically scanned and then the program is obtained electronically by editing, interpreting, or otherwise processing it as appropriate, and then stored in a computer memory.
[0162] It should be understood that each part of the present disclosure can be implemented by hardware, software, firmware, or a combination thereof. In the above embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by an appropriate instruction execution system. When implemented by hardware, similar to other embodiments, it can be implemented by any one or a combination of known techniques in the art, such as discrete logic circuits having logic gate circuits for realizing logical functions for data signals, application specific integrated circuits having appropriate combinational logic gate circuits, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), etc.
[0163] In the description of this specification, terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. mean that specific features, structures, materials, or characteristics described in combination with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, exemplary descriptions of the above terms do not necessarily refer to the same embodiment or example. Also, the specific features, structures, materials, or characteristics described can be combined in an appropriate manner in any one or more embodiments or examples.
[0164] Also, the terms "first" and "second" are used only for the purpose of description and should not be understood as indicating or implying relative importance or suggesting the number of technical features shown. Therefore, features defined by "first" and "second" can include at least one of the features explicitly or implicitly. In the description of the present disclosure, "a plurality" means at least two, for example, two, three, etc., unless otherwise specifically limited.
[0165] In the present disclosure, terms such as "attachment", "connection", "coupling", "fixation", etc. should be understood in a broad sense unless specifically defined and limited. For example, they may be fixedly connected, removably connected, integrated, mechanically connected, electrically connected, directly connected, or indirectly connected via an intermediate medium, or may be an internal communication between two elements or an interaction relationship between two elements. Without specific limitations, those skilled in the art can understand the specific meanings of the above terms in the present disclosure according to the situation.
[0166] Examples of the present disclosure have been described and illustrated, but the above examples are exemplary and should not be understood as limiting the present disclosure. Those skilled in the art can understand that various changes, modifications, substitutions, and variations can be made to the above examples within the scope of the present disclosure.
Claims
1. A power-on control method for a BUCK circuit, comprising: identifying the current withstand of a first switching transistor in the BUCK circuit and identifying the saturation current of an inductor in the BUCK circuit; determining a set current and a current rise time according to the smaller value of the current withstand and the saturation current; determining an on-set time of the first switching transistor according to the current rise time; when the BUCK circuit is powered on, switching the state of the first switching transistor according to the inductor current and the set current until the output voltage of the BUCK circuit reaches the target voltage, or switching the state of the first switching transistor according to the on-time of the first switching transistor and the on-set time. A power-on control method for a BUCK circuit, characterized in that.
2. The step of switching the state of the first switching transistor according to the inductor current and the set current comprises: when the BUCK circuit is powered on, controlling the first switching transistor to be on, acquiring the inductor current, when the inductor current reaches the set current, identifying the on-time of the first switching transistor, determining an off-set time of the first switching transistor according to the on-time, controlling the first switching transistor to be off, and when the off-time of the first switching transistor reaches the off-set time, controlling the first switching transistor to be on, and sequentially repeating the above steps until the output voltage of the BUCK circuit reaches the target voltage. A power-on control method for a BUCK circuit according to claim 1, characterized in that.
3. The step of determining the off-set time of the first switching transistor according to the on-time comprises: determining a control period of the first switching transistor; when the on-time is greater than or equal to the control period, identifying the time difference between the on-time and the control period, and taking the difference between the control period and the time difference as the off-set time; when the on-time is less than the control period, taking the difference between the control period and the on-time as the off-set time. A power-on control method for a BUCK circuit according to claim 2, characterized in that.
4. The step of determining the control period of the first switch transistor includes: when the first switch transistor is first turned on, identifying a first time during which the inductor current rises to a maximum current value, controlling the first switch transistor to turn off, and identifying a second time during which the inductor current drops from the maximum current value to zero; including the step of setting the sum of the first time and the second time as the control period. The power-on control method of the BUCK circuit according to claim 3, characterized in that.
5. The step of determining the control period of the first switch transistor includes: when the first switch transistor is first turned on, identifying a first time during which the inductor current rises to a maximum current value, controlling the first switch transistor to turn off, and identifying a third time during which the inductor current drops from the maximum current value to a preset current threshold greater than zero; including the step of setting the sum of the first time and the third time as the control period. The power-on control method of the BUCK circuit according to claim 3, characterized in that.
6. The step of switching the state of the first switch transistor according to the on-time and the on-set time of the first switch transistor includes: when the BUCK circuit is powered on, controlling the first switch transistor to turn on, and when the on-time of the first switch transistor reaches the on-set time, controlling the first switch transistor to turn off, and when it is determined that the first switch transistor satisfies a preset off condition, controlling the first switch transistor to turn on, and sequentially repeating until the output voltage of the BUCK circuit reaches a target voltage. The power-on control method of the BUCK circuit according to claim 1, characterized in that.
7. The step of determining that the first switch transistor satisfies a preset off condition includes: during the off period of the first switch transistor, obtaining the current of the inductor; when the current of the inductor drops to zero, determining that the first switch transistor satisfies a preset off condition. The power-on control method of the BUCK circuit according to claim 6, characterized in that.
8. The step of determining that the first switch transistor satisfies a preset off condition includes: During the off period of the first switch transistor, obtaining the current of the inductor; When the current of the inductor drops to a preset current threshold, determining that the first switch transistor satisfies a preset off condition. The power-on control method of the BUCK circuit according to claim 6, characterized in that.
9. The step of determining that the first switch transistor satisfies a preset off condition includes: Obtaining the off time of the first switch transistor, and when the off time of the first switch transistor reaches a second set time, determining that the first switch transistor satisfies a preset off condition, wherein the second set time is greater than the on set time. The power-on control method of the BUCK circuit according to claim 6, characterized in that.
10. The step of determining that the first switch transistor satisfies a preset off condition includes: During the first on period of the first switch transistor, obtaining the maximum current of the inductor; Identifying a first time when the maximum current drops to zero; When the off time of the first switch transistor reaches the first time, determining that the first switch transistor satisfies a preset off condition. The power-on control method of the BUCK circuit according to claim 6, characterized in that.
11. The step of determining that the first switch transistor satisfies a preset off condition includes: During the first on period of the first switch transistor, obtaining the maximum current of the inductor; Identifying a second time when the maximum current drops to a preset current threshold; When the off time of the first switch transistor reaches the second time, determining that the first switch transistor satisfies a preset off condition. The power-on control method of the BUCK circuit according to claim 6, characterized in that.
12. When the flyback element in the BUCK circuit is a second switch transistor, the power-on control method of the BUCK circuit is: When controlling the first switch transistor to turn on, a step of controlling the second switch transistor to turn off; When controlling the first switch transistor to turn off, a step of controlling the second switch transistor to turn on, and further including The power-on control method of the BUCK circuit according to any one of claims 1 to 11, characterized in that
13. When the second switch transistor is on, the power-on control method of the BUCK circuit is When the inductor current drops to zero and the off time of the first switch transistor has not reached the off setting time, further including a step of controlling the second switch transistor to turn off early The power-on control method of the BUCK circuit according to claim 12, characterized in that
14. Comprising a memory, a processor, and a power-on control program of a BUCK circuit stored in the memory and operable on the processor, when the processor executes the power-on control program of the BUCK circuit, implementing the power-on control method of the BUCK circuit according to any one of claims 1 to 13 The controller of the BUCK circuit, characterized in that
15. A computer-readable storage medium, in which a power-on control program of a BUCK circuit is stored, and when the power-on control program of the BUCK circuit is executed by a processor, the power-on control method of the BUCK circuit according to any one of claims 1 to 13 is realized The computer-readable storage medium, characterized in that
16. A power-on control device for a BUCK circuit, Determining the withstand current of the first switch transistor in the BUCK circuit, and determining the saturation current of the inductor in the BUCK circuit, determining a set current and a current rise time according to the smaller value of the withstand current and the saturation current, and a determination module for determining the on setting time of the first switch transistor according to the current rise time; When the BUCK circuit is powered on, a control module for switching the state of the first switch transistor according to the inductor current and the set current until the output voltage of the BUCK circuit reaches the target voltage, or switching the state of the first switch transistor according to the on time and the on setting time of the first switch transistor A power-on control device for a BUCK circuit, characterized by the above.
17. A BUCK circuit comprising: An input-side capacitor; A first switch transistor having one end connected to one end of the input-side capacitor; A flyback element having one end connected to the other end of the first switch transistor and the other end connected to the other end of the input-side capacitor; An inductor having one end connected to the other end of the first switch transistor; An output-side capacitor having one end connected to the other end of the inductor and the other end connected to the other end of the flyback element; An output voltage detection module for detecting the output voltage of the BUCK circuit; A current detection module for detecting the inductor current; A controller for specifying the current withstand of the first switch transistor, specifying the saturation current of the inductor, determining a set current and a rise time according to the smaller value of the current withstand and the saturation current, and determining the on-set time of the first switch transistor according to the current rise time; The controller is further used to switch the state of the first switch transistor according to the inductor current and the set current, or switch the state of the first switch transistor according to the on-time and the on-set time of the first switch transistor until the output voltage of the BUCK circuit reaches the target voltage when the BUCK circuit is powered on. A BUCK circuit, characterized by the above.
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