Method for manufacturing a substrate for a radio frequency or power electronic device

Abstract

The present invention relates to a method for manufacturing a substrate (15) for an electronic power or radio frequency device, comprising the steps of forming a support substrate (10) comprising depositing at least one layer (100) of polycrystalline silicon carbide by chemical vapor deposition (CVD) in an atmosphere comprising a mixture of argon and a deposition precursor fluidized with hydrogen, the chemical vapor deposition being carried out at an Ar / (Ar+H2) ratio and temperature conditions suitable for forming carbon inclusions (100) in the silicon carbide layer, and assembling the support substrate (10) with a surface layer (20) made of a single-crystal material.

Description

[Technical Field]

[0001] The present invention relates to a substrate for electronic devices, in particular for radio frequency or power electronics applications. The invention also relates to an electronic device comprising such a substrate, and to a method for manufacturing such a substrate. [Background technology]

[0002] Silicon carbide (SiC) is widely used to fabricate radio frequency or power electronic components.

[0003] Substrates for producing such components typically include a support substrate, which may be made of polycrystalline SiC (p-SiC), and a surface layer of monocrystalline SiC (m-SiC) extending over the support substrate. Electronic components are fabricated in or on the monocrystalline SiC layer. The structure is cut into chips, each containing one or more electronic components. Each chip is brazed to a heat dissipation stack comprising a metal layer, a thermally conductive ceramic, and a heat sink.

[0004] Heat is therefore primarily removed by the heat dissipation stack, with significant thermal stresses on the filler material that brazes the electronic component to the upper metal layer of the heat dissipation stack.

[0005] However, the coefficient of thermal expansion (CTE) and Young's modulus of SiC and the thermal stack, especially copper, are very different. Temperature changes therefore cause the various layers above and below the braze to deform non-uniformly. In particular, the Young's modulus of SiC is high compared to the Young's modulus of other materials, so stresses are concentrated in these materials, especially the filler.

[0006] The filler material is therefore subjected to high stresses, leading to cracking, delamination or collapse at the braze interface, resulting in a shortened device life.

[0007] To reduce these mechanical stresses, it is known to thin the layers of the composite structure, especially the polycrystalline SiC base substrate. However, polishing such a base substrate is time-consuming and labor-intensive, resulting in high costs for the electronic components. Furthermore, thinning carries the risk of breakage, rendering the composite structure unusable.

[0008] Another solution is to change the material used to perform the braze, which is difficult to do, especially while maintaining the mechanical robustness and electrical and thermal conductivity of the braze. Summary of the Invention

[0009] The aim of the present invention is to propose a composite structure for the fabrication of electronic devices that exhibits better resistance to temperature cycling and avoids cracking, delamination and disintegration at the brazed interface.

[0010] To this end, the present invention provides a method for fabricating a substrate for a radio frequency or power electronic device, comprising: forming a support substrate comprising depositing at least one layer of polycrystalline silicon carbide by chemical vapor deposition (CVD) in an atmosphere comprising a mixture of argon and deposition precursors fluidized in hydrogen, said chemical vapor deposition being carried out at an Ar / (Ar+H2) ratio and temperature conditions suitable for forming carbon inclusions in said silicon carbide layer; Assembling a support substrate and a surface layer made of a single-crystal material; The present invention proposes a method including:

[0011] CVD processes in gas atmospheres are an alternative to known sintering processes. CVD processes allow for control of the composition and morphology of the deposited layers. In particular, this control may allow for the creation of concentration gradients of inclusions in a single deposition process.

[0012] The elongated silicon carbide particles can produce lower anisotropic electrical and thermal resistance in the direction perpendicular to the surface of the substrate, which improves heat removal and electrical conduction toward the backside of the substrate. The presence of carbon inclusions does not adversely affect the operation of electronic devices fabricated in or on a single-crystal surface layer lacking such inclusions.

[0013] 1. The deposition precursor is advantageously methyltrichlorosilane.

[0014] The surface layer is preferably made of a semiconductor material, preferably of silicon carbide or of gallium nitride or of diamond.

[0015] Advantageously, at least the first stage of the chemical vapor deposition is carried out at a temperature above 1200°C, preferably above 1400°C.

[0016] Advantageously, the first chemical vapor deposition starting temperature is higher than the second chemical vapor deposition ending temperature.

[0017] The Ar / (Ar+H2) ratio is preferably decreased during the chemical vapor deposition step.

[0018] Advantageously, the formation of the support substrate further comprises the step of assembling said at least one silicon carbide layer containing carbon inclusions with a base layer made of porous silicon carbide.

[0019] The present invention provides a substrate for a radio frequency or power electronic device, comprising: a support substrate made of polycrystalline silicon carbide having a front surface and a back surface; a surface layer made of a single crystal material extending across the front surface of the support substrate; A substrate comprising: The present invention also relates to a substrate, wherein at least a portion of the support substrate comprises a plurality of silicon carbide grains having an elongated shape and oriented in a direction perpendicular to the surface of the substrate, and a plurality of carbon inclusions disposed between the plurality of grains.

[0020] The surface layer is preferably made of a semiconductor material, preferably of silicon carbide or of gallium nitride or of diamond.

[0021] Advantageously, the length to width ratio of the silicon carbide grains of the support substrate is greater than or equal to 1:1.2, advantageously greater than 1:10, and even more advantageously greater than 1:20.

[0022] The length-to-width ratio of silicon carbide particles makes them easier to polish. Thus, when polishing tears an elongated silicon carbide particle in a direction perpendicular to the surface of the substrate, a cavity with a reduced horizontal dimension is obtained compared to tearing a particle of an isotropic structure. Also, the particle is more embedded in the matrix formed by other particles, making it more difficult to tear.

[0023] Advantageously, the carbon inclusions are discontinuous.

[0024] Preferably, the width to length ratio of the carbon inclusions is 1:1.2, advantageously greater than 1:20, and even more advantageously greater than 1:30.

[0025] Advantageously, the support substrate exhibits a concentration gradient of carbon inclusions such that the density of carbon inclusions increases from the front surface to the back surface.

[0026] In some embodiments, only a portion of the support substrate comprises the carbon inclusions, and the support substrate further comprises a portion lacking carbon inclusions between the surface layer of single crystal SiC and the portion comprising the carbon inclusions.

[0027] The volume fraction of the carbon-containing material in the support substrate is preferably 1% to 40%, and more preferably 1% to 20%.

[0028] The present invention also relates to an electronic device comprising a substrate as described above, at least one radio frequency or power electronics component formed in or on the surface layer, and a heat removal device, wherein the substrate is brazed to the heat removal device via the filler material such that the filler material is in integral contact with at least a portion of the portion comprising carbon inclusions on the back surface of the support substrate. [Brief explanation of the drawings]

[0029] Other features and advantages of the present invention will become apparent from the following detailed description when taken in conjunction with the accompanying drawings. [Figure 1] FIG. 1 illustrates a device comprising two electronic components and a heat dissipation stack produced from a substrate according to the invention. [Figure 2A] FIG. 2 is a diagram illustrating a substrate according to the first embodiment. [Figure 2B] FIG. 10 is a diagram illustrating a substrate according to a second embodiment. [Figure 2C] FIG. 10 is a diagram illustrating a substrate according to a third embodiment. [Figure 3A] 1A-1C illustrate steps for producing a support substrate according to the present invention. [Figure 3B] 1A-1C illustrate steps for producing a support substrate according to the present invention. [Figure 3C] 1A-1C illustrate steps for producing a support substrate according to the present invention. [Figure 3D] 1A-1C illustrate steps for producing a support substrate according to the present invention. [Figure 4A] 1A-1C illustrate steps for assembling a support substrate with a surface layer. [Figure 4B] 1A-1C illustrate steps for assembling a support substrate with a surface layer. [Figure 4C] 1A-1C illustrate steps for assembling a support substrate with a surface layer. [Figure 5] 1 is a graph of the various silicon carbide phases obtained during a CVD process as a function of deposition chamber temperature and gas composition. DETAILED DESCRIPTION OF THE INVENTION

[0030] 1 illustrates a radio frequency or power electronic device comprising one or more electronic chips 11, 12 produced from a substrate according to the invention. The chips may be connected via interconnects. In the case of a radio frequency device, the electronic chip may include a lateral gallium nitride device.

[0031] The electronic chips 11, 12 are attached to a heat dissipation structure by means of brazing 22, 23. This radiating structure (DBC, short for "Direct Bonded Copper") comprises two copper metallizations 17, 19 and a substrate 18 made of a thermally conductive and electrically insulating ceramic, for example aluminum nitride. Electrical connections 27, 28 are fixed to the copper metallization 17 by means of brazing 25, 26.

[0032] Braze 29 secures the device to the heat sink 34 and base plate 32. A layer of thermal grease 31 ensures thermal contact between the heat sink 34 and the base plate 32. Radio frequency or power electronic devices are encapsulated in a package 39, which is typically made of plastic.

[0033] Each chip is formed from a substrate comprising a support substrate made of silicon carbide and a surface layer made of monocrystalline material in which at least one power or radio frequency electronic component is formed.

[0034] Substrate presentation 2A-2C illustrate substrates 15 for radio frequency or power electronic devices according to various embodiments. Each substrate 15 comprises, from its back surface to its front surface, a support substrate 10 and a surface layer 20. The back surfaces 105, 106 of the support substrate 10 are intended to be secured to the thermal stacks 17, 18, 19 of FIG. 1 by brazing 22. One or more electronic components 11, 12 may be formed in or on the surface layer 20.

[0035] The support substrate 10 is made of polycrystalline silicon carbide. At least a portion of the support substrate 10 contains carbon inclusions 1. The silicon carbide is in the form of a plurality of elongated grains 2. The grains 2 have a width-to-length ratio of 1:1.2 or greater, preferably greater than 1:10. In a preferred embodiment, the grain width-to-length ratio is greater than 1:20. The grains 2 are oriented in the Z direction perpendicular to the surface 220 of the substrate and are joined together. Measurement and variation of the grain size can be assessed by counting the number of intersections between lines parallel to the base of the substrate and grain boundaries. Such measurements are performed, for example, by technical electron microscopy, such as backscattered electron (BSE) microscopy.

[0036] The carbon inclusions 1 are discontinuously distributed among the silicon carbide particles 2. The width-to-length ratio of the carbon inclusions 1 is 1:1.2 or greater, and preferably greater than 1:10. In a preferred embodiment, the width-to-length ratio of the carbon inclusions 1 is greater than 1:30.

[0037] The elongated shape of the silicon carbide particles 2 and of the carbon inclusions 1 provides improved electrical and / or thermal conductivity in the Z direction perpendicular to the surface 220 of the substrate compared to the conductivity perpendicular to Z, since there are only a limited number of grain boundaries passing between the two faces. Such thermal conductivity promotes good removal of heat, especially towards a thermal stack that is brazed to the backside 105 of the substrate.

[0038] Referring to Figure 2A, carbon inclusions 1 may be distributed throughout the support substrate 10. The distribution of inclusions may be uniform. Alternatively, the support substrate may exhibit a concentration gradient of carbon inclusions, where the density of carbon inclusions decreases from the back surface to the surface. This gradient may be implemented sequentially or in succession over several layers with decreasing carbon levels from the back surface to the surface.

[0039] In some cases, referring to FIG. 2B, a portion 10A extending from the front surface is devoid of carbon inclusions, and a second portion 10B contains inclusions, which may be distributed uniformly or in a gradient.

[0040] Such a configuration has a front surface of uniform composition, which facilitates preparation of the support substrate for bonding the single-crystal SiC layer. In particular, grinding and / or polishing steps are easier to perform on a uniform surface, since carbon inclusions are more brittle than SiC particles. These inclusions are therefore more easily broken or spalled during polishing, which can lead to increased surface roughness.

[0041] For example, the portion 10B containing the inclusions may be a "thin" layer having a thickness of 100 nm to 3 μm, in which case the layer containing the inclusions has little effect on thermal and electrical conductivity.

[0042] Alternatively, the portion 10B containing the inclusions is a "thick" layer, for example, having a thickness of about 350 μm. Such a layer allows the substrate to be thinned through its back surface after electronic components have been fabricated on its front surface. For example, the layer may be thinned to a final thickness of 100 to 180 μm. This thinning allows a reduction in the total resistance to the passage of electrical current flowing in the direction of axis Z, perpendicular to the base of the substrate.

[0043] For all thicknesses of the inclusion-containing portion, and even for intermediate thicknesses between 3 and 100 μm, it is possible to prepare a starting portion 10B having a thickness greater than that envisaged for the final application and to carry out thinning in a subsequent step.

[0044] In other embodiments, the substrate may include additional layers. Referring to Figure 2C, the substrate may include a porous silicon carbide layer 60 extending from its back surface 106. The substrate may include other layers having a different porosity than layer 60, or one or more layers that include inclusions obtained by a different method, such as sintering, or that are made of a different material.

[0045] The high carbon content makes it possible to reduce the Young's modulus of silicon carbide and thus bring the Young's modulus of the support substrate closer to that of the thermal stack to which the electronic component will be brazed. This reduction in Young's modulus makes it possible to avoid mechanical and thermal stresses on the substrate, in particular on the back side of the support substrate, and on the brazing. The reduction in stress makes it possible to extend the life of the component.

[0046] The volume fraction of the carbon-containing material in the support substrate is 1% to 40%.

[0047] The thickness of the inclusion-containing layer after deposition by CVD is typically 500 μm to 4 mm, and the thickness variation (TTV, short for "total thickness variation") is typically 50 μm to 1.5 mm.

[0048] After thinning, the final thickness of the CVD-formed silicon carbide layer may vary depending on the intended application, e.g., for a 150 mm substrate diameter, the thickness of the inclusion-containing layer is typically 350 μm±25 μm, and for a 200 mm substrate diameter, the thickness of the inclusion-containing layer is about 500 μm±25 μm.

[0049] The surface layer 20 is made of a single-crystal material, for example a semiconductor such as silicon carbide or gallium nitride, or another semiconductor from the III-V group. In some cases, the surface layer is made of diamond. In a preferred embodiment, the surface layer is made of single-crystal silicon carbide. In a variant, the surface layer 20 may be a discontinuous layer, for example a layer composed of a set of tiles, each made of a single-crystal material. This variant can be used for materials that are not available in dimensions corresponding to the diameter of the support substrate. For example, the surface layer may be composed of a plurality of juxtaposed tiles made of diamond.

[0050] The function of the support substrate is to provide mechanical support for the fabricated part and to efficiently dissipate heat towards the thermal stack. Additionally, due to the anisotropy of the grains and carbon content, electrical conductivity in the direction normal to the substrate surface is maximized as the number of grain boundaries through which to pass is reduced.

[0051] Manufacturing method The steps of a method for fabricating such a substrate 15 will now be described. The method begins with preparing a support 80 for fabrication of the support substrate 10. Typically, a support 80 made of graphite is used, which is easy to remove or burn off after the support substrate is fabricated. The support 80 is introduced into a chemical vapor deposition (CVD) chamber, and the chamber is heated to a first temperature T1. The first temperature T1 is greater than 1200°C, preferably greater than 1400°C. The high temperature T1 promotes the formation of carbon inclusions in the support substrate being formed.

[0052] Simultaneously, a gas mixture is introduced into the deposition chamber. The gas mixture includes a carrier gas, usually argon, and a deposition precursor fluidized by another gas, usually hydrogen. The precursor is, for example, methyltrichlorosilane (CH3SiCl3).

[0053] Referring to FIG. 3A, a layer 100 of silicon carbide containing carbon inclusions is thus deposited on the substrate 80 .

[0054] If an upper layer lacking inclusions or a gradient of inclusions is desired (FIG. 2B), the chamber temperature is gradually decreased during the vapor deposition process until a deposition end temperature T2, which is lower than T1, is reached, and / or the Ar / (Ar+H2) gas ratio is decreased.

[0055] If the layer is deposited with a uniform distribution of inclusions (FIG. 2A), these parameters are kept constant.

[0056] The deposition of the silicon carbide layer is then continued to obtain a thickness greater than that of the support substrate to be fabricated, typically a thickness of 500 μm to 2 mm being targeted.

[0057] At the beginning of the growth of silicon carbide layer 100, the grains are often variable in size and then become more uniform. By promoting the growth of a thick layer, the areas with large grain sizes can later be removed, and the areas with uniform grain size and good crystalline quality can be used. During and after deposition, the surface 110 of layer 100 has a high roughness due to the perpendicular orientation of the grains.

[0058] Substrates bearing silicon carbide in the form of a plurality of elongated grains are illustrated, for example, in Figures 3a to 3c of French Patent No. 3134234. The method according to the invention yields silicon carbide grains with a similar structure. However, to form carbon inclusions between the silicon carbide grains, the method according to the invention is carried out under defined conditions of temperature and argon content of the mixture of carrier gas and fluidizing gas introduced together with the precursor. The temperature is adjusted according to the argon content and is preferably higher than that used in the method described in French Patent No. 31342234, which also promotes the growth of silicon carbide in the form of elongated grains.

[0059] Such deposition conditions also result in the growth of carbon inclusions in the form of elongated particles, the length to width ratio of the silicon carbide particles of the support substrate being advantageously greater than 1:1.2, advantageously greater than 1:10, and even more advantageously greater than 1:20.

[0060] Referring to FIG. 3B, once the envisioned thickness of silicon carbide layer 100 is reached, carbon support 80 is removed mechanically or by burning.

[0061] 3C, the lower portion 13 of the silicon carbide layer, which has non-uniform grain size and is of poorer crystalline quality than the upper portion produced at the end of the CVD deposition, is then removed. Surface portions 14 with high roughness or high local thickness variations on a scale larger than the roughness are also removed.

[0062] Removal of these excess portions 13, 14 is typically performed by grinding, followed by chemical-mechanical polishing, to achieve a flat surface 120 that is smooth enough for bonding of surface layers. Such polishing uses a slurry containing abrasive particles in a chemically active mixture. After the removal step, the silicon carbide support substrate 10 typically has a thickness of 150-500 μm, which may vary depending on the intended application. After a subsequent thinning step, the thickness is typically 100-180 μm.

[0063] Referring to FIG. 3D, the support substrate 10 thus prepared is assembled with a surface layer 20 made of a monocrystalline material, typically via a Smart Cut™ type process.

[0064] 4A, a single crystal donor substrate 200 is prepared for producing the surface layer 20. Cleaning and / or surface treatments may be applied to the surface of the donor substrate 200.

[0065] Weakened areas 21 are then formed in the donor substrate 200 so as to delimit the monocrystalline layer 20. The weakened areas 21 are formed in the donor substrate 200 at a predetermined depth that substantially corresponds to the thickness of the monocrystalline layer that is intended to form the surface layer of the support substrate for the radio frequency or power electronic device to be formed. The weakened areas 21 are preferably created by implanting hydrogen and / or helium atoms into the donor substrate.

[0066] Referring to FIG. 4B, the donor substrate 200 is then bonded to the silicon carbide layer 10 .

[0067] Referring to FIG. 4C, separation of the donor substrate 200 is effected along the weakened areas 21 so that the monocrystalline layer 20 is transferred to a layer of silicon carbide containing carbon inclusions.

[0068] Before or after assembly with the single crystal silicon carbide layer 20, the support substrate 10 can be assembled with other layers, for example, a porous silicon carbide layer 60 as illustrated in FIG. 2C.

[0069] From the completed substrate, radio frequency or power electronic components can be formed in or on the single crystal surface layer. The substrate is brazed to a heat removal device. Brazing is performed by providing a material, such as silver, silver-containing epoxy, gold-silicon, gold-tin, lead-tin, or a liquid-phase sintered material, that integrally contacts the underside of the substrate. The filler material is thus in thermal contact with the carbon-containing material disposed on the backside of the support substrate, allowing for efficient heat removal from the substrate to the heat removal device.

[0070] Particle formation during CVD processes The use of a CVD process promotes the formation of silicon carbide grains and the formation of carbon inclusions. Also, in contrast to layers produced by sintering, CVD deposition generally results in anisotropic growth of the grains, such that the grains' axes of greatest elongation extend parallel to the Z-axis perpendicular to the base of the substrate. High anisotropy is desirable to promote thermal and / or electrical conductivity along the Z-axis.

[0071] Figure 5 shows a representation of the various chemical compositions deposited depending on the temperature and gas composition of the deposition chamber. At relatively low temperatures and Ar / (Ar+H2) gas ratios, the deposition of silicon carbide and pure silicon is obtained. For intermediate values ​​of these two parameters, only silicon carbide is deposited. At high temperatures and high Ar / (Ar+H2) gas ratios, silicon carbide and carbon are deposited. The operating conditions of the present invention therefore correspond to the upper part of the phase diagram. In the temperature range shown, the amount of carbon is less than the amount of silicon carbide deposited, and the carbon is present in the form of inclusions in the silicon carbide layer. The ideal content for the formation of silicon carbide particles and carbon inclusions therefore depends on the temperature and atmosphere of the deposition chamber, particularly on the flow rate ratio of the carrier gas to the fluidizing gas. The shape and size of the inclusions also depend on these parameters.

[0072] The CVD process for obtaining two-phase deposition of silicon carbide containing carbon inclusions is described in detail in R. Liu et al.

[0073] The process of R. Liu et al. uses methyltrichlorosilane (CH3SiCl3) as a precursor. After the precursor is mixed with argon and hydrogen gas, the gas mixture is introduced into a CVD deposition chamber. Deposition is carried out at various temperatures and various argon concentrations. The appearance and shape of the carbon inclusions are evaluated according to these parameters.

[0074] The appearance of carbon inclusions depends on the Ar / (Ar+H2) ratio and deposition temperature. For example, for an Ar / (Ar+H2) volume fraction of 25%, carbon inclusions appear at temperatures above 1560°C. For a 50% volume fraction, carbon inclusions form at temperatures above 1500°C. In a hydrogen-free argon environment, carbon inclusions can form at deposition temperatures between 1200°C and 1300°C.

[0075] High concentrations of inclusions are obtained by using a ratio with a high argon content and a high temperature. The volume fraction of carbon in the substrate is therefore dependent on the argon content and the temperature.

[0076] At a given temperature, it is also possible to reduce particle size by increasing the argon content of the deposition chamber. To decrease the size of the carbon particles for a constant carbon concentration, the temperature is decreased and the argon content is simultaneously increased.

[0077] The width to length ratio of the carbon inclusions also depends on the temperature and the Ar / (Ar+H2) ratio.

[0078] In addition to obtaining anisotropic structures, deposition by CVD has other advantages over forming two-phase structures by sintering: it avoids the use of binders, which can introduce contamination, especially in clean rooms, and gas flow and mixing control is easy to master.

[0079] By decreasing the temperature during CVD deposition in conjunction with adjusting the Ar / (Ar+H) gas ratio, a concentration gradient of the inclusions is achieved in a single deposition process. The temperature reduction may be performed in successive ramps to generate a continuous concentration gradient of the inclusions.

[0080] Alternatively, the temperature may be stepped down to create layers in the substrate with gradually decreasing inclusion content.

[0081] In an illustrative, non-limiting manner, it is possible to create a concentration gradient of carbon content across a thickness of 10 μm to 50 μm of a polycrystalline silicon carbide layer.

[0082] Typically, the initial concentration of carbon inclusions is reduced from 1% to 40% so that the concentration of inclusions is maximum at the beginning of deposition and reaches a value of zero at the end of deposition.

[0083] Such a reduction may be obtained by continuously decreasing the setpoint temperature during the growth of the SiC layer. The thermodynamics of known CVD apparatuses make it possible to deposit SiC layers with such a gradient by performing continuous deposition with temperature setpoint changes without interrupting the deposition for a possible cooling step.

[0084] To obtain such a concentration gradient, it is also possible to reduce the argon content during deposition, or to combine a decrease in temperature with a reduction in the argon content.

[0085] Alternatively, a first portion of the substrate may be produced by CVD deposition at a temperature and argon content that results in carbon inclusions. The argon content is then significantly reduced and / or the deposition chamber is allowed to cool before performing a second deposition step in which the deposited layer consists of SiC without carbon inclusions. Thus, it is possible to produce a support substrate in which the first portion contains carbon inclusions and the second portion lacks carbon inclusions. The single-crystal SiC surface layer is then transferred to the second portion lacking carbon inclusions.

[0086] (References) R. Liu et al.: Experimental phase diagram of SiC in CH3SiCl3-Ar-H2system, Journal of Materials Research August 2016-1(17):1-11. FR3134234

Claims

1. A method for fabricating a substrate (15) for a radio frequency or power electronic device, comprising: forming a support substrate (10) comprising depositing at least one layer (100) of polycrystalline silicon carbide by chemical vapor deposition (CVD) in an atmosphere comprising a mixture of argon and hydrogen-fluidized deposition precursors, said chemical vapor deposition being suitable for forming carbon inclusions (100) in said silicon carbide layer; ２ ) ratio and temperature conditions; Assembling said support substrate (10) and a surface layer (20) made of a monocrystalline material; A method comprising:

2. The deposition precursor is methyltrichlorosilane (CH ３ SiCl ３ 2. The method of claim 1 , wherein

3. 3. A method according to claim 1 or 2, wherein the surface layer (20) is made of a semiconductor material, preferably of silicon carbide or of gallium nitride or of diamond.

4. A method according to any one of claims 1 to 3, wherein at least the first stage of the chemical vapor deposition is carried out at a temperature above 1200°C, preferably above 1400°C.

5. The method according to any one of claims 1 to 4, wherein the first chemical vapor deposition start temperature (T1) is higher than the second chemical vapor deposition end temperature (T2).

6. Said Ar / (Ar+H ２ 6. The method of claim 1, wherein the ratio of 1 to 5 is decreased during the chemical vapor deposition step.

7. 7. The method according to any one of claims 1 to 6, wherein the forming of the support substrate further comprises assembling the at least one silicon carbide layer containing the carbon inclusions (1) with a base layer made from porous silicon carbide.

8. 1. A substrate for a radio frequency or power electronic device, comprising: a support substrate (10) made of polycrystalline silicon carbide having a front surface (410) and a back surface; a surface layer (20) made of a single-crystal material extending over the front surface (410) of the support substrate (10); A substrate comprising:

1. A substrate, characterized in that at least a portion of the support substrate (10) has an elongated shape and comprises a plurality of silicon carbide grains oriented in a direction perpendicular to the surface of the substrate, and a plurality of carbon inclusions disposed between the plurality of grains.

9. 9. The substrate according to claim 8, wherein the surface layer (20) is made of a semiconductor material, preferably of silicon carbide or of gallium nitride or of diamond.

10. 10. The substrate according to claim 8 or 9, wherein the ratio of length to width of the silicon carbide particles (1) of the support substrate (10) is 1:1.2 or more, preferably greater than 1:10, and even more preferably greater than 1:

20.

11. The substrate according to any one of claims 8 to 10, wherein the carbon inclusions (1) are discontinuous.

12. 12. The substrate according to any one of claims 8 to 11, wherein the carbon inclusions (1) have a width to length ratio of 1:1.2, advantageously greater than 1:20, and even more advantageously greater than 1:

30.

13. 13. The substrate of any one of claims 8 to 12, wherein the support substrate exhibits a concentration gradient of the carbon inclusions (1) such that the density of the carbon inclusions (1) increases from the front surface to the back surface.

14. The substrate according to any one of claims 8 to 13, wherein only a portion of the support substrate includes the carbon inclusion (1), and the support substrate (30) further includes a portion that is devoid of the carbon inclusion (1) between the surface layer (20) of single crystal SiC and the portion that includes the carbon inclusion (1).

15. The substrate according to any one of claims 8 to 14, wherein the volume fraction of the carbon content (1) in the support substrate is between 1% and 40%, preferably between 1% and 20%.

16. 16. An electronic device comprising: a substrate according to any one of claims 8 to 15; at least one radio frequency or power electronics component formed in or on the surface layer (20); and a heat removal device, wherein the substrate is brazed to the heat removal device via the filler material such that the filler material is in integral contact with at least a portion of the portion comprising carbon inclusions (1) on the back surface of the support substrate (10).

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