Silicon carbide epitaxial wafer, method of making same and use thereof

The silicon carbide epitaxial wafer addresses defects by filling surface defects with intrinsic silicon carbide, achieving low leakage current and voltage stability.

JP2025541548APending Publication Date: 2025-12-19BYD CO LTD +1
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
JP2025528298
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-11-14
Filing Date
2023-06-21
Publication Date
2025-12-19

AI Technical Summary

Technical Problem

Silicon carbide epitaxial wafers suffer from high leakage current, high turn-on voltage, and easy breakdown due to defects such as carrot defects and TSDs, which affect device performance.

Method used

A silicon carbide epitaxial wafer structure with upper and lower doped silicon carbide layers, where surface defects in the lower layer are filled with intrinsic silicon carbide, reducing charge carrier transport and trapping.

Benefits of technology

The structure results in devices with low leakage current, low turn-on voltage, and reduced susceptibility to breakdown by utilizing the low electrical conductivity of intrinsic silicon carbide at defect locations.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025541548000001_ABST
    Figure 2025541548000001_ABST
Patent Text Reader

Abstract

The present disclosure relates to the field of semiconductor materials. A silicon carbide epitaxial wafer, its fabrication method, and its use are disclosed. The silicon carbide epitaxial wafer provided by the present disclosure has a structure of upper and lower doped silicon carbide epitaxial layers, and at least a portion of the surface defects in the lower doped silicon carbide epitaxial layer are filled with intrinsic silicon carbide. Devices using the silicon carbide epitaxial wafer of the present disclosure have low leakage current, low turn-on voltage, and are less susceptible to breakdown.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to Patent Application No. 202211422470.8, filed with the State Intellectual Property Office of China on November 14, 2022, the entire contents of which are incorporated herein by reference.

[0002] Technical Field The present disclosure relates to the field of semiconductor materials, and in particular to silicon carbide epitaxial wafers and methods for preparing and using same. [Background technology]

[0003] As a third-generation semiconductor material, silicon carbide boasts the advantages of a wide bandgap, high thermal conductivity, high critical breakdown field strength, and high carrier saturation velocity. It can be widely used to manufacture high-temperature, high-frequency, and high-voltage high-power devices. This offers incomparable advantages over conventional silicon materials in the new energy vehicle and military industries. It is at the heart of new energy vehicles, new-generation radar, and satellite communications, with significant application value and broad development prospects, making it a hot topic in the current semiconductor industry. In particular, as the development of silicon electronic components has reached its limits, research into third-generation wide-bandgap semiconductor materials has become more important and urgent, leading to a third revolution in the semiconductor industry.

[0004] Silicon carbide has very stable thermal properties and a very high thermal decomposition temperature. Typically, physical vapor transport (PVT) is used to slowly deposit silicon carbide ingots onto silicon carbide seed chips. The substrate is then fabricated through crystal orientation, rounding, cutting, grinding, polishing, and other processes. High-temperature chemical vapor deposition (CVD) is then used to grow n-type or p-type silicon carbide on the substrate to create epitaxial wafers. Finally, silicon carbide devices are fabricated through processes such as photolithography, development, activation, and electrode deposition.

[0005] Silicon carbide devices require very high parameters, such as the surface morphology and defect density of the epitaxial layer, and the crystalline quality of the silicon carbide epitaxial layer is highly dependent on the substrate. Substrate defects continue to propagate upward during the epitaxial process. Therefore, epitaxial processing requires a high defect density in the substrate, and several defects can occur during the epitaxial growth process due to parameters such as temperature, pressure, gas flow rate, and interface effects. Defects often become electron traps or generate leakage currents when the device is powered on, significantly affecting device performance. Existing silicon carbide epitaxial structures and their fabrication processes typically first grow a silicon carbide buffer layer on the substrate, followed by the growth of the silicon carbide epitaxial layer. While the buffer layer has a certain suppression effect on defects, it is limited to the conversion of BPD defects. Numerous defects, such as carrot defects, triangular defects, and TSDs, still exist in the epitaxial layer, which result in high device leakage current, high turn-on voltage, and easy breakdown. Summary of the Invention [Problem to be solved by the invention]

[0006] The purpose of the present disclosure is to overcome the problems of high leakage current, high turn-on voltage, and easy breakdown in devices using silicon carbide epitaxial wafers in the prior art, and to provide a new silicon carbide epitaxial wafer and its preparation and use. Devices using the silicon carbide epitaxial wafer of the present disclosure have low leakage current, low turn-on voltage, and are less likely to break down. [Means for solving the problem]

[0007] To achieve the above object, a first aspect of the present disclosure provides a silicon carbide epitaxial wafer, the epitaxial wafer having a structure of upper and lower doped silicon carbide epitaxial layers, and at least a portion of surface defects in the lower doped silicon carbide epitaxial layer being filled with intrinsic silicon carbide.

[0008] A second aspect of the present disclosure provides a silicon carbide epitaxial wafer, the epitaxial wafer including a silicon carbide substrate, a first doped silicon carbide epitaxial layer formed on the silicon carbide substrate, and a second doped silicon carbide epitaxial layer formed on the first doped silicon carbide epitaxial layer, wherein at least a portion of surface defects in the first doped silicon carbide epitaxial layer are filled with intrinsic silicon carbide.

[0009] Preferably, the silicon carbide epitaxial wafer further comprises a doped silicon carbide buffer layer formed between the silicon carbide substrate and the first doped silicon carbide epitaxial layer.

[0010] The thickness of the silicon carbide substrate is preferably 300 to 1000 μm.

[0011] Preferably, the doped silicon carbide buffer layer has a thickness of 0.5 to 3.0 μm and a doping concentration of 5E17 to 5E18 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the doped silicon carbide buffer layer is 1.0-2.0 μm and the doping concentration is 1E18-3E18 / cm 2 and the doping element is nitrogen.

[0012] Preferably, the silicon carbide epitaxial wafer further includes a third doped silicon carbide epitaxial layer formed between the doped silicon carbide buffer layer and the first doped silicon carbide epitaxial layer, and a graphene layer formed on the third doped silicon carbide epitaxial layer.

[0013] Preferably, the third doped silicon carbide epitaxial layer has a thickness of 1.0 to 20.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the third doped silicon carbide epitaxial layer is 2.0 to 10.0 μm and the doping concentration is 2E15 to 1E16 / cm2 and the doping element is nitrogen. More preferably, the thickness of the third doped silicon carbide epitaxial layer is 5.0 to 10.0 μm and the doping concentration is 2E15 to 6E15 / cm 2 and the doping element is nitrogen.

[0014] Preferably, the graphene layer is a graphene layer having 2 to 10 atomic layers.

[0015] Preferably, the first doped silicon carbide epitaxial layer has a thickness of 3.0 to 30.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3 to 25.0 μm and the doping concentration is 2E15 to 2E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3.0 to 15.0 μm and the doping concentration is 6E15 to 2E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3.0 to 8.0 μm and the doping concentration is 8E15 to 2E16 / cm 2 and the doping element is nitrogen.

[0016] Preferably, the second doped silicon carbide epitaxial layer has a thickness of 2.0 to 25.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the second doped silicon carbide epitaxial layer is 2.0 to 15.0 μm and the doping concentration is 4E15 to 1E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the second doped silicon carbide epitaxial layer is 2.0 to 10.0 μm and the doping concentration is 8E15 to 1E16 / cm 2 and the doping element is nitrogen.

[0017] According to a third aspect of the present disclosure, there is provided a method of making a silicon carbide epitaxial wafer, the method comprising: 1) depositing doped silicon carbide on a silicon carbide substrate by vapor deposition to form a first doped silicon carbide epitaxial layer; 2) in-situ etching the surface of the first doped silicon carbide epitaxial layer in a hydrogen atmosphere to form pits in surface defects; 3) depositing intrinsic silicon carbide by evaporation on the surface of the etched first doped silicon carbide epitaxial layer; 4) removing the intrinsic silicon carbide outside the pits; 5) depositing doped silicon carbide by evaporation to form a second doped silicon carbide epitaxial layer.

[0018] Preferably, the method further comprises, before forming the first doped silicon carbide epitaxial layer, depositing doped silicon carbide on the silicon carbide substrate by vapor deposition to form a doped silicon carbide buffer layer.

[0019] Preferably, the method further includes the steps of depositing original doped silicon carbide on the silicon carbide substrate by vapor deposition after forming the doped silicon carbide buffer layer; performing pyrolysis on a surface of the original doped silicon carbide remote from the original doped silicon carbide buffer layer at a temperature of 1400-1600°C to form a graphene layer; and forming a third doped silicon carbide epitaxial layer on the original doped silicon carbide that has not been subjected to high-temperature pyrolysis.

[0020] Preferably, the doped silicon carbide buffer layer has a thickness of 0.5 to 3.0 μm and a doping concentration of 5E17 to 5E18 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the doped silicon carbide buffer layer is 1.0-2.0 μm and the doping concentration is 1E18-3E18 / cm 2 and the doping element is nitrogen.

[0021] Preferably, the third doped silicon carbide epitaxial layer has a thickness of 1.0 to 20.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the third doped silicon carbide epitaxial layer is 2.0 to 10.0 μm and the doping concentration is 2E15 to 1E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the third doped silicon carbide epitaxial layer is 5.0 to 10.0 μm and the doping concentration is 2E15 to 6E15 / cm 2 and the doping element is nitrogen.

[0022] Preferably, the graphene layer is a graphene layer having 2 to 10 atomic layers.

[0023] Preferably, the first doped silicon carbide epitaxial layer has a thickness of 3.0 to 30.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3 to 25.0 μm and the doping concentration is 2E15 to 2E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3.0 to 15.0 μm and the doping concentration is 6E15 to 2E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3.0 to 8.0 μm and the doping concentration is 8E15 to 2E16 / cm 2 and the doping element is nitrogen.

[0024] Preferably, the second doped silicon carbide epitaxial layer has a thickness of 2.0 to 25.0 μm and a doping concentration of 1E15 to 1E17 / cm 2and the doping element is nitrogen. More preferably, the thickness of the second doped silicon carbide epitaxial layer is 2.0 to 15.0 μm and the doping concentration is 4E15 to 1E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the second doped silicon carbide epitaxial layer is 2.0 to 10.0 μm and the doping concentration is 8E15 to 1E16 / cm 2 and the doping element is nitrogen.

[0025] Preferably, in step 2), the etching time is 5 to 20 minutes.

[0026] Preferably, in step 4), in situ hydrogen etching or chemical polishing is used to remove the intrinsic silicon carbide outside the pits.

[0027] Preferably, the conditions for deposition include a temperature of 1500-1700° C. and a pressure of 50-200 mbar.

[0028] According to a fourth aspect of the present disclosure, there is provided a use of a silicon carbide epitaxial wafer as described in the first and second aspects of the present disclosure in fabricating a silicon carbide power device.

[0029] According to the above technical solution, the disclosed silicon carbide epitaxial wafer introduces intrinsic silicon carbide at defect locations during the epitaxial growth process. By utilizing the low electrical conductivity of intrinsic silicon carbide, charge carrier transport at defect locations is reduced, and charge carrier capture by defects is avoided. As a result, devices using the disclosed silicon carbide epitaxial wafer have low leakage current, low turn-on voltage, and are less susceptible to failure. [Brief explanation of the drawings]

[0030] [Figure 1] FIG. 1 is a schematic structural diagram of a silicon carbide epitaxial wafer according to an embodiment of the present disclosure. [Figure 2]FIG. 2 is a schematic structural diagram of a silicon carbide epitaxial wafer according to another embodiment of the present disclosure. [Explanation of symbols]

[0031] 1: silicon carbide substrate, 2: doped silicon carbide buffer layer, 3: first doped silicon carbide epitaxial layer, 4: second doped silicon carbide epitaxial layer, 5: intrinsic silicon carbide, 6: third doped silicon carbide epitaxial layer, 7: graphene layer. DETAILED DESCRIPTION OF THE INVENTION

[0032] The endpoints and any values ​​disclosed herein are not limited to the exact ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. In the case of numerical ranges, the endpoints of each range, the endpoints of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered to be specifically disclosed herein.

[0033] According to a first aspect of the present disclosure, a silicon carbide epitaxial wafer is provided, the epitaxial wafer having a structure of upper and lower doped silicon carbide epitaxial layers, wherein at least a portion of the surface defects in the lower doped silicon carbide epitaxial layer are filled with intrinsic silicon carbide.

[0034] The disclosed silicon carbide epitaxial wafers utilize the low electrical conductivity of intrinsic silicon carbide to reduce charge carrier transport at defect sites, thereby avoiding charge carrier trapping by the defects and introducing intrinsic silicon carbide at the defect sites during epitaxial growth. As a result, devices using the disclosed silicon carbide epitaxial wafers have low leakage currents, low turn-on voltages, and are less susceptible to breakdown.

[0035] Preferably, all surface defects in the underdoped silicon carbide epitaxial layer are filled with intrinsic silicon carbide.

[0036] According to a second aspect of the present disclosure, a silicon carbide epitaxial wafer is provided, and as shown in Figure 1, the epitaxial wafer includes a silicon carbide substrate 1, a first doped silicon carbide epitaxial layer 3 formed on the silicon carbide substrate 1, and a second doped silicon carbide epitaxial layer 4 formed on the first doped silicon carbide epitaxial layer 3, wherein at least a portion of surface defects in the first doped silicon carbide epitaxial layer 3 are filled with intrinsic silicon carbide 5. Intrinsic silicon carbide refers to undoped silicon carbide.

[0037] According to the present disclosure, there are no particular limitations on the silicon carbide substrates that can be made using common methods in the field, such as using physical vapor transport (PVT) to slowly deposit a silicon carbide ingot onto a silicon carbide seed chip, and then manufacturing the substrate through crystal orientation, rolling, cutting, grinding, polishing, and other processes.

[0038] The thickness of the silicon carbide substrate is 300 to 1000 μm, preferably 400 to 500 μm.

[0039] In the present disclosure, it is preferable to form a doped silicon carbide buffer layer 2 on the silicon carbide substrate to reduce surface defects in the doped silicon carbide epitaxial layer, as shown in Figure 1. Preferably, the thickness of the doped silicon carbide buffer layer 2 is 0.5 to 3.0 µm, and the doping concentration is 5E17 to 5E18 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the doped silicon carbide buffer layer 2 is 1.0 to 2.0 μm and the doping concentration is 1E18 to 3E18 / cm 2 and the doping element is nitrogen.

[0040] In another preferred embodiment of the present disclosure, as shown in FIG. 2 , the silicon carbide epitaxial wafer preferably further includes a third doped silicon carbide epitaxial layer 6 formed between the doped silicon carbide buffer layer 2 and the first doped silicon carbide epitaxial layer 3, and a graphene layer 7 formed on the third doped silicon carbide epitaxial layer 6.

[0041] Preferably, the third doped silicon carbide epitaxial layer has a thickness of 1.0 to 20.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the third doped silicon carbide epitaxial layer is 2.0 to 10.0 μm and the doping concentration is 2E15 to 1E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the third doped silicon carbide epitaxial layer is 5.0 to 10.0 μm and the doping concentration is 2E15 to 6E15 / cm 2 and the doping element is nitrogen.

[0042] Specific examples of thicknesses of the third doped silicon carbide epitaxial layer include, for example, 1.0 μm, 2.0 μm, 3.0 μm, 4.0 μm, 5.0 μm, 6.0 μm, 7.0 μm, 8.0 μm, 9.0 μm, 10.0 μm, 11.0 μm, 12.0 μm, 13.0 μm, 14.0 μm, 15.0 μm, 16.0 μm, 17.0 μm, 18.0 μm, 19.0 μm, 20.0 μm, etc., and ranges formed by any two of the above values.

[0043] A specific example of the doping concentration of the third doped silicon carbide epitaxial layer is 1E15 / cm 2 , 2E15 / cm 2 , 3E15 / cm 2 , 4E15 / cm 2 , 5E15 / cm 2 , 6E15 / cm 2 , 7E15 / cm 2 , 8E15 / cm 2 , 9E15 / cm 2 , 1E16 / cm2 , 2E16 / cm 2 , 3E16 / cm 2 , 4E16 / cm 2 , 5E16 / cm 2 , 6E16 / cm 2 , 7E16 / cm 2 , 8E16 / cm 2 , 9E16 / cm 2 , 1E17 / cm 2 etc., and ranges formed by any two of the above values.

[0044] In the present disclosure, a graphene layer is formed on the third doped silicon carbide epitaxial layer. Preferably, the graphene layer has 2 to 10 atomic layers.

[0045] According to the present disclosure, the uniformity of current can be improved by forming a graphene layer and utilizing the high lateral electron mobility of graphene.

[0046] Those skilled in the art should understand that when a doped silicon carbide buffer layer, a third doped silicon carbide epitaxial layer, and a graphene layer are not formed, a first doped silicon carbide epitaxial layer is formed on a silicon carbide substrate, when a doped silicon carbide buffer layer is formed and a third doped silicon carbide epitaxial layer and a graphene layer are not formed, a first doped silicon carbide epitaxial layer is formed on a doped silicon carbide buffer layer, and when a doped silicon carbide buffer layer, a third doped silicon carbide epitaxial layer, and a graphene layer are formed, a first doped silicon carbide epitaxial layer is formed on a graphene layer.

[0047] In the present disclosure, the first doped silicon carbide epitaxial layer has a thickness of 3.0 to 30.0 μm and a doping concentration of 1E15 to 1E17 / cm 2and the doping element is preferably nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3 to 25.0 μm and the doping concentration is 2E15 to 2E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3.0 to 15.0 μm and the doping concentration is 6E15 to 2E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3.0 to 8.0 μm and the doping concentration is 8E15 to 2E16 / cm 2 and the doping element is nitrogen.

[0048] Specific examples of thicknesses of the first doped silicon carbide epitaxial layer include, for example, 3.0 μm, 4.0 μm, 5.0 μm, 6.0 μm, 7.0 μm, 8.0 μm, 9.0 μm, 10.0 μm, 11.0 μm, 12.0 μm, 13.0 μm, 14.0 μm, 15.0 μm, 16.0 μm, 17.0 μm, 18.0 μm, 19.0 μm, 20.0 μm, 21.0 μm, 22.0 μm, 23.0 μm, 24.0 μm, 25.0 μm, 26.0 μm, 27.0 μm, 28.0 μm, 29.0 μm, 30.0 μm, and the like, as well as ranges formed by any two of the above values.

[0049] A specific example of the doping concentration of the first doped silicon carbide epitaxial layer is 1E15 / cm 2 , 2E15 / cm 2 , 3E15 / cm 2 , 4E15 / cm 2 , 5E15 / cm 2 , 6E15 / cm 2 , 7E15 / cm 2 , 8E15 / cm 2 , 9E15 / cm 2 , 1E16 / cm 2 , 2E16 / cm 2 , 3E16 / cm 2 , 4E16 / cm 2 , 5E16 / cm 2 , 6E16 / cm 2, 7E16 / cm 2 , 8E16 / cm 2 , 9E16 / cm 2 , 1E17 / cm 2 etc., and ranges formed by any two of the above values.

[0050] In the present disclosure, a second doped silicon carbide epitaxial layer is formed on the first doped silicon carbide epitaxial layer. Preferably, the second doped silicon carbide epitaxial layer has a thickness of 2.0 to 25.0 μm and a doping concentration of 1E15 to 1E17 / cm. 2 and the doping element is nitrogen. More preferably, the thickness of the second doped silicon carbide epitaxial layer is 2.0 to 15.0 μm and the doping concentration is 4E15 to 1E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the second doped silicon carbide epitaxial layer is 2.0 to 10.0 μm and the doping concentration is 8E15 to 1E16 / cm 2 and the doping element is nitrogen.

[0051] Specific examples of thicknesses of the second doped silicon carbide epitaxial layer include, for example, 2.0 μm, 3.0 μm, 4.0 μm, 5.0 μm, 6.0 μm, 7.0 μm, 8.0 μm, 9.0 μm, 10.0 μm, 11.0 μm, 12.0 μm, 13.0 μm, 14.0 μm, 15.0 μm, 16.0 μm, 17.0 μm, 18.0 μm, 19.0 μm, 20.0 μm, 21.0 μm, 22.0 μm, 23.0 μm, 24.0 μm, 25.0 μm, etc., and ranges formed by any two of the above values.

[0052] A specific example of the doping concentration of the second doped silicon carbide epitaxial layer is 1E15 / cm 2 , 2E15 / cm 2 , 3E15 / cm 2 , 4E15 / cm 2 , 5E15 / cm 2 , 6E15 / cm 2 , 7E15 / cm 2 , 8E15 / cm2 , 9E15 / cm 2 , 1E16 / cm 2 , 2E16 / cm 2 , 3E16 / cm 2 , 4E16 / cm 2 , 5E16 / cm 2 , 6E16 / cm 2 , 7E16 / cm 2 , 8E16 / cm 2 , 9E16 / cm 2 , 1E17 / cm 2 etc., and ranges formed by any two of the above values.

[0053] In the present disclosure, preferably, all surface defects in the first doped silicon carbide epitaxial layer are filled with intrinsic silicon carbide.

[0054] According to a third aspect of the present disclosure, there is provided a method of making a silicon carbide epitaxial wafer, the method comprising: 1) depositing doped silicon carbide on a silicon carbide substrate by vapor deposition to form a first doped silicon carbide epitaxial layer; 2) in-situ etching the surface of the first doped silicon carbide epitaxial layer in a hydrogen atmosphere to form pits in surface defects; 3) depositing intrinsic silicon carbide by evaporation on the surface of the etched first doped silicon carbide epitaxial layer; 4) removing the intrinsic silicon carbide outside the pits; 5) depositing doped silicon carbide by evaporation to form a second doped silicon carbide epitaxial layer; Includes.

[0055] According to the present disclosure, the silicon carbide substrate is as described above. In order to reduce defects on the surface of the doped silicon carbide epitaxial layer, a preferred method of the present disclosure further includes depositing doped silicon carbide on the silicon carbide substrate by vapor deposition to form a doped silicon carbide buffer layer before forming the first doped silicon carbide epitaxial layer.

[0056] Preferably, the doped silicon carbide buffer layer has a thickness of 0.5-3 μm and a doping concentration of 5E17-5E18 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the doped silicon carbide buffer layer is 1.0-2.0 μm and the doping concentration is 1E18-3E18 / cm 2 and the doping element is nitrogen.

[0057] According to the present disclosure, the method preferably further includes, after forming the doped silicon carbide buffer layer, depositing original doped silicon carbide on the silicon carbide substrate by vapor deposition, and pyrolyzing the surface of the original doped silicon carbide remote from the doped silicon carbide buffer layer at a temperature of 1400 to 1600°C, thereby forming a graphene layer on the surface of the original doped silicon carbide remote from the doped silicon carbide buffer layer. The original doped silicon carbide that is not decomposed at the above-mentioned high temperature forms a third doped silicon carbide epitaxial layer.

[0058] Specific temperatures include, for example, 1400°C, 1450°C, 1500°C, 1550°C, 1600°C, and the like, as well as a range formed by any two of the above values.

[0059] Preferably, the third doped silicon carbide epitaxial layer has a thickness of 1.0 to 20.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the third doped silicon carbide epitaxial layer is 2.0 to 10.0 μm and the doping concentration is 2E15 to 1E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the third doped silicon carbide epitaxial layer is 5.0 to 10.0 μm and the doping concentration is 2E15 to 6E15 / cm 2 and the doping element is nitrogen.

[0060] Specific examples of thicknesses of the third doped silicon carbide epitaxial layer include, for example, 1.0 μm, 2.0 μm, 3.0 μm, 4.0 μm, 5.0 μm, 6.0 μm, 7.0 μm, 8.0 μm, 9.0 μm, 10.0 μm, 11.0 μm, 12.0 μm, 13.0 μm, 14.0 μm, 15.0 μm, 16.0 μm, 17.0 μm, 18.0 μm, 19.0 μm, 20.0 μm, etc., and ranges formed by any two of the above values.

[0061] A specific example of the doping concentration of the third doped silicon carbide epitaxial layer is 1E15 / cm 2 , 2E15 / cm 2 , 3E15 / cm 2 , 4E15 / cm 2 , 5E15 / cm 2 , 6E15 / cm 2 , 7E15 / cm 2 , 8E15 / cm 2 , 9E15 / cm 2 , 1E16 / cm 2 , 2E16 / cm 2 , 3E16 / cm 2 , 4E16 / cm 2 , 5E16 / cm 2 , 6E16 / cm 2 , 7E16 / cm 2 , 8E16 / cm 2 , 9E16 / cm 2 , 1E17 / cm 2 etc., and ranges formed by any two of the above values.

[0062] In the present disclosure, the graphene layer is formed by pyrolyzing the surface of the third doped silicon carbide epitaxial layer at a temperature of 1400-1600°C.

[0063] The pyrolysis time can be, for example, 2 to 10 minutes, preferably 3 to 5 minutes, and the specific time can be, for example, 2 minutes, 3 minutes, 4 minutes, 5 minutes, 6 minutes, 7 minutes, 8 minutes, 9 minutes, 10 minutes, etc., and can include a range formed by any two of the above values.

[0064] According to the present disclosure, the surface of the third doped silicon carbide epitaxial layer is pyrolyzed at a temperature of 1400-1600°C, which separates the Si element and leaves the C element in place, thereby forming a graphene layer. Preferably, the graphene layer is 2-10 atomic layers thick.

[0065] Those skilled in the art should understand that if a doped silicon carbide buffer layer, a third doped silicon carbide epitaxial layer, and a graphene layer are not formed, the first doped silicon carbide epitaxial layer is formed by vapor deposition on the silicon carbide substrate, if a doped silicon carbide buffer layer is formed and a third doped silicon carbide epitaxial layer and a graphene layer are not formed, the first doped silicon carbide epitaxial layer is formed by vapor deposition on the doped silicon carbide buffer layer, and if a doped silicon carbide buffer layer, a third doped silicon carbide epitaxial layer, and a graphene layer are formed, the first doped silicon carbide epitaxial layer is formed by vapor deposition on the graphene layer.

[0066] In the present disclosure, the first doped silicon carbide epitaxial layer has a thickness of 3.0 to 30.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 and the doping element is preferably nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3 to 25.0 μm and the doping concentration is 2E15 to 2E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3.0 to 15.0 μm and the doping concentration is 6E15 to 2E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the first doped silicon carbide epitaxial layer is 3.0 to 8.0 μm and the doping concentration is 8E15 to 2E16 / cm 2 and the doping element is nitrogen.

[0067] Specific examples of thicknesses of the first doped silicon carbide epitaxial layer include, for example, 3.0 μm, 4.0 μm, 5.0 μm, 6.0 μm, 7.0 μm, 8.0 μm, 9.0 μm, 10.0 μm, 11.0 μm, 12.0 μm, 13.0 μm, 14.0 μm, 15.0 μm, 16.0 μm, 17.0 μm, 18.0 μm, 19.0 μm, 20.0 μm, 21.0 μm, 22.0 μm, 23.0 μm, 24.0 μm, 25.0 μm, 26.0 μm, 27.0 μm, 28.0 μm, 29.0 μm, 30.0 μm, and the like, as well as ranges formed by any two of the above values.

[0068] A specific example of the doping concentration of the first doped silicon carbide epitaxial layer is 1E15 / cm 2 , 2E15 / cm 2 , 3E15 / cm 2 , 4E15 / cm 2 , 5E15 / cm 2 , 6E15 / cm 2 , 7E15 / cm 2 , 8E15 / cm 2 , 9E15 / cm 2 , 1E16 / cm 2 , 2E16 / cm 2 , 3E16 / cm 2 , 4E16 / cm 2 , 5E16 / cm 2 , 6E16 / cm 2 , 7E16 / cm 2 , 8E16 / cm 2 , 9E16 / cm 2 , 1E17 / cm 2 etc., and ranges formed by any two of the above values.

[0069] In the present disclosure, pits are formed at surface defects by in-situ etching of the surface of the first doped silicon carbide epitaxial layer in a hydrogen atmosphere, specifically, because the etching rate at the defect sites is high, pits are easily formed at the defect sites.

[0070] Preferably, the etching conditions include a temperature of 1500 to 1700° C. and a time of 5 to 20 minutes, and more preferably, the etching conditions include a temperature of 1550 to 1650° C. and a time of 10 to 15 minutes.

[0071] The shape of the pits may be one or more of a V-shaped pit, a cylindrical pit, and a strip-shaped pit.

[0072] In the present disclosure, intrinsic silicon carbide is deposited by vapor deposition on the surface of the first doped silicon carbide epitaxial layer after etching, which can fill the pits and provide a flat silicon carbide surface.

[0073] The thickness of the intrinsic silicon carbide deposited as described above may be any thickness sufficient to fill the pits. For ease of operation, it is preferable that intrinsic silicon carbide is also deposited on the portions outside the pits. In this case, the intrinsic silicon carbide outside the pits can be removed, resulting in a first doped silicon carbide epitaxial layer with a flat surface and surface pits filled with intrinsic silicon carbide.

[0074] The specific thickness of the precipitated intrinsic silicon carbide may be, for example, 0.2 to 2 μm, preferably 0.3 to 1 μm, and more preferably 0.3 to 0.5 μm.

[0075] The method for removing intrinsic silicon carbide other than the pits is not particularly limited, and can be carried out by in-situ hydrogen etching or chemical polishing, which are commonly used in the technical field.

[0076] In the present disclosure, doped silicon carbide is further deposited by evaporation to form a second doped silicon carbide epitaxial layer. Preferably, the second doped silicon carbide epitaxial layer has a thickness of 2.0 to 25.0 μm and a doping concentration of 1E15 to 1E17 / cm 2and the doping element is nitrogen. More preferably, the thickness of the second doped silicon carbide epitaxial layer is 2.0 to 15.0 μm and the doping concentration is 4E15 to 1E16 / cm 2 and the doping element is nitrogen. More preferably, the thickness of the second doped silicon carbide epitaxial layer is 2.0 to 10.0 μm and the doping concentration is 8E15 to 1E16 / cm 2 and the doping element is nitrogen.

[0077] Specific examples of thicknesses of the second doped silicon carbide epitaxial layer include, for example, 2.0 μm, 3.0 μm, 4.0 μm, 5.0 μm, 6.0 μm, 7.0 μm, 8.0 μm, 9.0 μm, 10.0 μm, 11.0 μm, 12.0 μm, 13.0 μm, 14.0 μm, 15.0 μm, 16.0 μm, 17.0 μm, 18.0 μm, 19.0 μm, 20.0 μm, 21.0 μm, 22.0 μm, 23.0 μm, 24.0 μm, 25.0 μm, etc., and ranges formed by any two of the above values.

[0078] A specific example of the doping concentration of the second doped silicon carbide epitaxial layer is 1E15 / cm 2 , 2E15 / cm 2 , 3E15 / cm 2 , 4E15 / cm 2 , 5E15 / cm 2 , 6E15 / cm 2 , 7E15 / cm 2 , 8E15 / cm 2 , 9E15 / cm 2 , 1E16 / cm 2 , 2E16 / cm 2 , 3E16 / cm 2 , 4E16 / cm 2 , 5E16 / cm 2 , 6E16 / cm 2 , 7E16 / cm 2 , 8E16 / cm 2 , 9E16 / cm 2 , 1E17 / cm 2 etc., and ranges formed by any two of the above values.

[0079] Also, the deposition conditions in the above steps may include a temperature of 1500-1700° C., a pressure of 50-200 mbar, and a deposition time based on achieving a target thickness.

[0080] According to a fourth aspect of the present disclosure, there is provided a use of a silicon carbide epitaxial wafer as described in the first and second aspects of the present disclosure in fabricating a silicon carbide power device.

[0081] The present disclosure will be described in detail below using examples, but the present disclosure is not limited to the following examples.

[0082] In the following examples, silicon carbide substrates were purchased from CREE, USA, with a thickness of 430 μm.

[0083] Example 1 1) Doped silicon carbide (thickness 1.0 μm, doping concentration 1E18 / cm 2 , nitrogen as a doping element) is deposited on the silicon carbide substrate by evaporation to form a doped silicon carbide buffer layer. 2) Deposit doped silicon carbide (thickness 6.0 μm, doping concentration 1E16 / cm) on the doped silicon carbide buffer layer by evaporation. 2 , nitrogen as a doping element) to form a first doped silicon carbide epitaxial layer. 3) Etching the surface of the first doped silicon carbide epitaxial layer in situ in a hydrogen atmosphere at a temperature of 1600° C. for 15 minutes to form pits in the surface defects. 4) Intrinsic silicon carbide (0.5 μm thick) is deposited by evaporation on the surface of the etched first doped silicon carbide epitaxial layer to obtain a flat silicon carbide surface. 5) In-situ hydrogen etching is used to remove the intrinsic silicon carbide outside the pits, with the etching temperature being 1600°C and the etching time being 10 minutes. 6) Doped silicon carbide (thickness 5.0 μm, doping concentration 1E16 / cm 2, nitrogen as a doping element) is deposited by evaporation to form a second doped silicon carbide epitaxial layer, thereby obtaining a silicon carbide epitaxial wafer A1.

[0084] Example 2 1) Doped silicon carbide (thickness 1.0 μm, doping concentration 2E18 / cm 2 , nitrogen as a doping element) is deposited on the silicon carbide substrate by evaporation to form a doped silicon carbide buffer layer. 2) Deposit doped silicon carbide (thickness 3.0 μm, doping concentration 2E16 / cm) on the doped silicon carbide buffer layer by evaporation. 2 , nitrogen as a doping element) to form a first doped silicon carbide epitaxial layer. 3) Etching the surface of the first doped silicon carbide epitaxial layer in situ in a hydrogen atmosphere at a temperature of 1600° C. for 15 minutes to form pits in the surface defects. 4) Intrinsic silicon carbide (0.5 μm thick) is deposited by evaporation on the surface of the etched first doped silicon carbide epitaxial layer to obtain a flat silicon carbide surface. 5) In-situ hydrogen etching is used to remove the intrinsic silicon carbide outside the pits, with the etching temperature being 1600°C and the etching time being 10 minutes. 6) Doped silicon carbide (thickness 2.0 μm, doping concentration 5E15 / cm 2 , nitrogen as a doping element) is deposited by evaporation to form a second doped silicon carbide epitaxial layer, thereby obtaining a silicon carbide epitaxial wafer A2.

[0085] Example 3 1) Doped silicon carbide (thickness 1.0 μm, doping concentration 3E18 / cm 2 , nitrogen as a doping element) is deposited on the silicon carbide substrate by evaporation to form a doped silicon carbide buffer layer. 2) Deposit doped silicon carbide (thickness 8 μm, doping concentration 8E15 / cm) on the doped silicon carbide buffer layer by evaporation. 2, nitrogen as a doping element) to form a first doped silicon carbide epitaxial layer. 3) Etching the surface of the first doped silicon carbide epitaxial layer in situ in a hydrogen atmosphere at a temperature of 1600° C. for 15 minutes to form pits in the surface defects. 4) Intrinsic silicon carbide (0.5 μm thick) is deposited by evaporation on the surface of the etched first doped silicon carbide epitaxial layer to obtain a flat silicon carbide surface. 5) In-situ hydrogen etching is used to remove the intrinsic silicon carbide outside the pits, with the etching temperature being 1600°C and the etching time being 10 minutes. 6) Doped silicon carbide (thickness 10 μm, doping concentration 8E15 / cm 2 , nitrogen as a doping element) is deposited by evaporation to form a second doped silicon carbide epitaxial layer, thereby obtaining a silicon carbide epitaxial wafer A3.

[0086] Example 4 1) Doped silicon carbide (thickness 1.0 μm, doping concentration 1E18 / cm 2 , nitrogen as a doping element) is deposited on the silicon carbide substrate by evaporation to form a doped silicon carbide buffer layer. 2) Doped silicon carbide (thickness 3.0 μm, doping concentration 1E16 / cm 2 , nitrogen as the doping element) is deposited on the doped silicon carbide buffer layer by evaporation. 3) The surface of the doped silicon carbide formed in step 2) is thermally decomposed from the doped silicon carbide buffer layer at a temperature of 1400 °C (thermal decomposition time is 6 minutes). When observed with a transmission electron microscope, it is found that a graphene layer of 4 to 6 atomic layers has been formed. The doped silicon carbide that is not decomposed at high temperatures forms a third doped silicon carbide epitaxial layer. 4) Doped silicon carbide (5.0 μm thick, doping concentration 1E16 / cm) was deposited on the graphene layer by evaporation. 2 , nitrogen as a doping element) to form a first doped silicon carbide epitaxial layer. 5) Etching the surface of the first doped silicon carbide epitaxial layer in situ in a hydrogen atmosphere at an etching temperature of 1600° C. for 15 minutes to form pits in the surface defects. 6) On the surface of the etched first doped silicon carbide epitaxial layer, intrinsic silicon carbide (0.5 μm thick) is deposited by evaporation to obtain a flat silicon carbide surface. 7) Remove the intrinsic silicon carbide outside the pits using in-situ hydrogen etching, with an etching temperature of 1600°C and an etching time of 10 minutes. 8) Doped silicon carbide (thickness 3.0 μm, doping concentration 1E16 / cm 2 , a doping element of nitrogen) is deposited by evaporation to form a second doped silicon carbide epitaxial layer, thereby obtaining a silicon carbide epitaxial wafer A4.

[0087] Example 5 1) Doped silicon carbide (thickness 2.0 μm, doping concentration 1E18 / cm 2 , nitrogen as a doping element) is deposited on the silicon carbide substrate by evaporation to form a doped silicon carbide buffer layer. 2) Doped silicon carbide (thickness 5.0 μm, doping concentration 4E15 / cm 2 , nitrogen as the doping element) is deposited on the doped silicon carbide buffer layer by evaporation. 3) The surface of the doped silicon carbide formed in step 2) is thermally decomposed from the doped silicon carbide buffer layer at a temperature of 1400°C (thermal decomposition time is 5 minutes), and when observed with a transmission electron microscope, it is found that graphene layers of 4 to 10 atomic layers have been formed. The doped silicon carbide that is not decomposed at high temperature forms a third doped silicon carbide epitaxial layer. 4) Doped silicon carbide (thickness 18 μm, doping concentration 4E15 / cm) was deposited on the graphene layer by evaporation. 2 , nitrogen as a doping element) to form a first doped silicon carbide epitaxial layer. 5) Etching the surface of the first doped silicon carbide epitaxial layer in situ in a hydrogen atmosphere at an etching temperature of 1600° C. for 15 minutes to form pits in the surface defects. 6) On the surface of the etched first doped silicon carbide epitaxial layer, intrinsic silicon carbide (0.5 μm thick) is deposited by evaporation to obtain a flat silicon carbide surface. 7) Remove the intrinsic silicon carbide outside the pits using in-situ hydrogen etching, with an etching temperature of 1600°C and an etching time of 10 minutes. 8) Doped silicon carbide (thickness 12.0 μm, doping concentration 4E15 / cm 2 , nitrogen as a doping element) is deposited by evaporation to form a second doped silicon carbide epitaxial layer, thereby obtaining a silicon carbide epitaxial wafer A5.

[0088] Example 6 1) Doped silicon carbide (thickness 2.0 μm, doping concentration 1E18 / cm 2 , nitrogen as a doping element) is deposited on the silicon carbide substrate by evaporation to form a doped silicon carbide buffer layer. 2) Doped silicon carbide (thickness 10.0 μm, doping concentration 2E15 / cm 2 , nitrogen as the doping element) is deposited on the doped silicon carbide buffer layer by evaporation. 3) The surface of the doped silicon carbide formed in step 2) is thermally decomposed from the doped silicon carbide buffer layer at a temperature of 1600°C (thermal decomposition time: 15 minutes). When observed with a transmission electron microscope, it is found that graphene layers of 4 to 10 atomic layers have been formed. The doped silicon carbide that is not decomposed at high temperatures forms a third doped silicon carbide epitaxial layer. 4) Doped silicon carbide (thickness 25.0 μm, doping concentration 2E15 / cm) was deposited on the graphene layer by evaporation. 2 , nitrogen as a doping element) to form a first doped silicon carbide epitaxial layer. 5) Etching the surface of the first doped silicon carbide epitaxial layer in situ in a hydrogen atmosphere at an etching temperature of 1600° C. for 15 minutes to form pits in the surface defects. 6) On the surface of the etched first doped silicon carbide epitaxial layer, intrinsic silicon carbide (0.5 μm thick) is deposited by evaporation to obtain a flat silicon carbide surface. 7) Remove the intrinsic silicon carbide outside the pits using in-situ hydrogen etching, with an etching temperature of 1600°C and an etching time of 10 minutes. 8) Doped silicon carbide (thickness 25.0 μm, doping concentration 2E15 / cm 2 , nitrogen as a doping element) is deposited by evaporation to form a second doped silicon carbide epitaxial layer, thereby obtaining a silicon carbide epitaxial wafer A6.

[0089] Comparison 1 The method of Example 1 is followed, except that steps 3) to 5) are not performed, and a second doped silicon carbide epitaxial layer is formed directly on the first doped silicon carbide epitaxial layer with a growth thickness of 10 μm and a doping concentration of 1E16, thereby obtaining silicon carbide epitaxial wafer D1.

[0090] Test Example 1 Using silicon carbide epitaxial wafers A1-A6 and D1 obtained in Examples 1-6 and Comparative Example 1, respectively, three electrodes (gate, source, and drain) were fabricated on the epitaxial wafers by photolithography, coating, and other processes to fabricate silicon carbide MOS tubes. A semiconductor discrete device static tester was used to test the leakage current between the gate and source by fixing the voltage between the gate and source, the turn-on voltage between the gate and source by fixing the voltage between the drain and source, and the breakdown voltage between the drain and source by fixing the voltage between the gate and source to 0. The results are shown in Table 1. [Table 1]

[0091] Examples A1, A4, and D1 have the same epitaxial layer thickness and carrier concentration, while Example D1 has a conventional epitaxial layer structure. Example A1 includes a first epitaxial layer and a second epitaxial layer structure, and Example A4 includes a first epitaxial layer, a second epitaxial layer, and a third epitaxial layer structure. The test data in Table 1 show that, compared with Example D1, Examples A1 and A4 have smaller leakage currents, smaller turn-on voltages, and larger breakdown voltages. This indicates that, compared with existing conventional epitaxial layer structures, the structure disclosed in the present invention can significantly reduce leakage currents and turn-on voltages and significantly increase breakdown voltages.

[0092] Furthermore, comparing A1 and A4, it can be seen that A4, which includes a first epitaxial layer, a second epitaxial layer, and a third epitaxial layer structure, can further reduce leakage current and turn-on voltage and increase breakdown voltage.

[0093] Although the preferred embodiments of the present disclosure have been described in detail above, the present disclosure is not limited thereto. Within the scope of the technical concept of the present disclosure, the technical solutions of the present disclosure may undergo various simple modifications, including combining various technical features in any other suitable manner, and these simple modifications and combinations shall also be deemed to be the contents disclosed by the present disclosure and fall within the protection scope of the present disclosure.

Claims

1. 1. A silicon carbide epitaxial wafer comprising: a silicon carbide substrate; a first doped silicon carbide epitaxial layer formed on the silicon carbide substrate; and a second doped silicon carbide epitaxial layer formed on the first doped silicon carbide epitaxial layer, wherein at least a portion of surface defects in the first doped silicon carbide epitaxial layer are filled with intrinsic silicon carbide.

2. 10. The silicon carbide epitaxial wafer of claim 1, further comprising a doped silicon carbide buffer layer formed between said silicon carbide substrate and said first doped silicon carbide epitaxial layer.

3. 3. The silicon carbide epitaxial wafer according to claim 1, wherein the silicon carbide substrate has a thickness of 300 to 1000 μm.

4. The doped silicon carbide buffer layer has a thickness of 0.5 to 3.0 μm and a doping concentration of 5E17 to 5E18 / cm 2 4. The silicon carbide epitaxial wafer of claim 2, wherein the doping element is nitrogen.

5. 5. The silicon carbide epitaxial wafer of claim 2, further comprising a third doped silicon carbide epitaxial layer formed between the doped silicon carbide buffer layer and the first doped silicon carbide epitaxial layer, and a graphene layer forming the third doped silicon carbide epitaxial layer remote from a surface of the doped silicon carbide buffer layer.

6. The third doped silicon carbide epitaxial layer has a thickness of 1.0 to 20.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 6. The silicon carbide epitaxial wafer of claim 5, wherein the doping element is nitrogen.

7. 6. The silicon carbide epitaxial wafer according to claim 5, wherein the graphene layer is a graphene layer of 2 to 10 atomic layers.

8. The first doped silicon carbide epitaxial layer has a thickness of 3.0 to 30.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 8. The silicon carbide epitaxial wafer of claim 1, wherein the doping element is nitrogen.

9. The second doped silicon carbide epitaxial layer has a thickness of 2.0 to 25.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 9. The silicon carbide epitaxial wafer of claim 1, wherein the doping element is nitrogen.

10. 1. A method for making a silicon carbide epitaxial wafer, comprising: 1) depositing doped silicon carbide on a silicon carbide substrate by vapor deposition to form a first doped silicon carbide epitaxial layer; 2) in-situ etching the surface of the first doped silicon carbide epitaxial layer in a hydrogen atmosphere to form pits in surface defects; 3) depositing intrinsic silicon carbide by evaporation on the surface of the etched first doped silicon carbide epitaxial layer; 4) removing the intrinsic silicon carbide outside the pits; 5) depositing doped silicon carbide by evaporation to form a second doped silicon carbide epitaxial layer; A method comprising:

11. 11. The method of claim 10, further comprising, prior to forming the first doped silicon carbide epitaxial layer, depositing doped silicon carbide on the silicon carbide substrate by vapor deposition to form a doped silicon carbide buffer layer.

12. 12. The method of claim 11, further comprising the steps of: depositing original doped silicon carbide on the silicon carbide substrate by vapor deposition after forming the doped silicon carbide buffer layer; performing pyrolysis on a surface of the original doped silicon carbide remote from the original doped silicon carbide buffer layer at a temperature of 1400-1600°C to form a graphene layer; and forming a third doped silicon carbide epitaxial layer on the original doped silicon carbide that has not been subjected to high temperature pyrolysis.

13. The doped silicon carbide buffer layer has a thickness of 0.5 to 3.0 μm and a doping concentration of 5E17 to 5E18 / cm 2 and the doping element is nitrogen.

14. The third doped silicon carbide epitaxial layer has a thickness of 1.0 to 20.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 and the doping element is nitrogen.

15. The method according to any one of claims 12 to 14, wherein the graphene layer is a graphene layer having 2 to 10 atomic layers.

16. The first doped silicon carbide epitaxial layer has a thickness of 3.0 to 30.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 16. The method according to any one of claims 10 to 15, wherein the doping element is nitrogen.

17. The second doped silicon carbide epitaxial layer has a thickness of 2.0 to 25.0 μm and a doping concentration of 1E15 to 1E17 / cm 2 17. The method according to any one of claims 10 to 16, wherein the doping element is nitrogen.

18. 18. The method according to any one of claims 10 to 17, wherein in step 2) the etching time is between 5 and 20 minutes.

19. 19. The method of claim 10, wherein in step 4), in-situ hydrogen etching or chemical polishing is used to remove the intrinsic silicon carbide outside the pits.

20. 20. The method of any one of claims 10 to 19, wherein the conditions for the deposition comprise a temperature of 1500 to 1700°C and a pressure of 50 to 200 mbar.

21. 11. Use of the silicon carbide epitaxial wafer of any one of claims 1 to 10 in the fabrication of silicon carbide power devices.

Citation Information

Patent Citations

  • Silicon carbide semiconductor device and method for manufacturing the same

    JP2003332562A

  • Method for producing single crystal

    JP2008024554A