Process for manufacturing a structure comprising at least two tiles on a substrate - Patent Application 20070122997

Abstract

The present disclosure relates to a process for manufacturing a composite structure, the process comprising: (a) forming a temporary substrate (20) comprising an intermediate substrate (2) and a plurality of tiles (P1, P2, P3) made from a first material; (b) assembling, via said tiles, the temporary substrate to a receiver substrate (3) made of a second material different from the first material; (c) removing the intermediate substrate (2) to transfer at least one portion of the tile (P'1, P'2, P'3) onto a receiver substrate; The receiver substrate has a main surface from which cavities (C1, C2, C3) extend, and the receiver substrate is assembled to the temporary substrate on the side of said main surface such that each tile is received in a respective cavity, and after the intermediate substrate is removed, the free surfaces of the tile portions are substantially aligned with the main surface of the receiver substrate.

Description

[Technical Field]

[0001] The present disclosure relates to a process for manufacturing a structure comprising at least two tiles on a carrier substrate.

[0002] In the fields of microelectronics, optics or optoelectronics, the design of multilayer structures sometimes requires the transfer of tiles in the form of parts of layers of a donor substrate onto a carrier or receiver substrate.

[0003] This type of process is commonly referred to as a tiling process and involves partially transferring a layer obtained from a donor substrate to form one or more tiles arranged in a pattern or predetermined position on a carrier substrate.

[0004] Such tiling may be necessary due to size differences between the donor substrate and the carrier substrate, specifically, because of which the entire layer of the donor substrate cannot be transferred to the carrier substrate.

[0005] One well-known layer transfer process is the Smart Cut™ process, in which a donor substrate is implanted with atomic species to form weakened zones that define the layer to be transferred, the donor substrate is bonded to a carrier substrate, and the donor substrate is detached along the weakened zones to transfer the layer from the donor substrate to the carrier substrate. However, this process assumes that the donor substrate and the carrier substrate are the same size.

[0006] While silicon substrates are available in relatively large sizes, typically with diameters of 300 mm, other materials of interest currently exist only in the form of bulk substrates in smaller sizes, e.g., 10 cm or 15 cm diameters. Furthermore, these materials of interest are sometimes particularly expensive, making it desirable to minimize potential waste materials formed during transfer. This is especially true for III-V semiconductor materials, including nitrides (e.g., for binary compounds, indium nitride (InN), gallium nitride (GaN), and aluminum nitride (AlN)), arsenides (e.g., for binary compounds, indium arsenide (InAs), gallium arsenide (GaAs), and aluminum arsenide (AlAs)), and phosphides (e.g., for binary compounds, indium phosphide (InP), gallium phosphide (GaP), and aluminum phosphide (AlP)).

[0007] Instead of transferring the entire layer of the donor substrate, a solution based on the Smart Cut process consists of taking one or more tiles from at least one donor substrate and transferring said tiles to a first substrate to form what is known as a pseudo-donor substrate, creating a weakened zone in each tile by implanting atomic species, bonding the pseudo-donor substrate to a second substrate via the tiles, and detaching each tile along the weakened zone so as to transfer a portion of each tile to the second substrate, where the first and second substrates are of the same size.

[0008] 1 shows a top view and a cross-sectional view of a carrier substrate S on which a number of tiles P1 to P9 from at least one donor substrate are arranged, in this example there are nine tiles distributed in three rows and three columns.

[0009] However, substrates carrying such tiles are difficult to use in conventional microelectronics manufacturing lines used to manufacture electronic components. Such manufacturing lines include, among other things, photolithography and / or metrology equipment, the operation of which is hindered by the height difference between the major surfaces of the substrate and the free surfaces of the tiles.

[0010] One objective of this application is to design a process for manufacturing a composite structure comprising at least two tiles on a carrier substrate that is compatible with conventional microelectronic manufacturing lines.

[0011] To this end, the present application proposes a process for manufacturing a composite structure comprising at least two tiles on a substrate, the process comprising: (a) forming a temporary substrate comprising an intermediate substrate and a plurality of tiles disposed on the intermediate substrate and fabricated from a first material; (b) assembling, via said tiles, the temporary substrate to a receiver substrate made of a second material different from the first material; (c) removing the intermediate substrate to transfer at least a portion of the tile onto a receiver substrate to form a composite structure; The process is characterized in that the receiver substrate has a main surface, cavities extend from the main surface, the receiver substrate is assembled to a temporary substrate on the side of the main surface so that each tile is received in a respective cavity, and after the intermediate substrate is removed, the free surfaces of the tile portions are substantially aligned with the main surface of the receiver substrate.

[0012] By "substantially aligned" is meant that the planar surfaces of the tiles and the major surfaces of the receiver substrate are coplanar or parallel and separated by a distance (measured perpendicular to said surfaces) of 1% to 10% of the thickness of the transferred portion. In the case of a non-zero distance, the surface of the tile portion may be elevated relative to the major surface of the receiver substrate, or vice versa. It is generally ensured that said distance is less than about 50 nm.

[0013] In some embodiments, step (a) of forming the temporary substrate comprises forming a weakened zone in each tile that defines a respective tile portion to be transferred, and step (c) of removing the intermediate substrate comprises detaching each tile portion along said weakened zone.

[0014] Advantageously, forming said weakened zones comprises implanting each tile with an atomic species.

[0015] In some embodiments, the step of forming the temporary substrate includes removing each tile from at least one donor substrate fabricated from a first material and placing each tile on an intermediate substrate, each donor substrate having a smaller diameter than the intermediate substrate.

[0016] In some embodiments, the second material is advantageously a semiconductor material such as silicon or silicon carbide, a piezoelectric material, or glass.

[0017] In some embodiments, the receiver substrate is a semiconductor-on-insulator substrate comprising, in order, a base substrate, an electrically insulating layer, and a layer of a second material defining a major surface of the receiver substrate, and the cavity is formed in the layer of second material up to the electrically insulating layer.

[0018] Alternatively, the cavity is formed in a surface region of a receiver substrate composed of a second material.

[0019] Advantageously, at least a portion of the wall of at least one of said cavities may be covered with an electrically insulating film so as to electrically insulate the respective tile portion from the receiver substrate.

[0020] In another embodiment, the receiver substrate comprises at least one surface layer of a second material covered with an electrically insulating layer, the cavity being formed in said electrically insulating layer.

[0021] Preferably, the temporary substrate can be assembled to the receiver substrate by molecular adhesion.

[0022] It is particularly advantageous for each tile to have a thickness of 20 μm to 1000 μm, preferably 100 μm to 700 μm, the transferred part of each tile having a thickness of 30 nm to 1.5 μm.

[0023] Then, each cavity can have a depth of 30 nm to 1.5 μm.

[0024] In some embodiments, following step (c) of removing the intermediate substrate, the free surfaces of the tile portions are elevated relative to a major surface of the receiver substrate, and the process further comprises polishing said surface.

[0025] According to an advantageous embodiment, the first material is III-V materials, in particular indium nitride (InN), gallium nitride (GaN), aluminum nitride (AlN), indium arsenide (InAs), gallium arsenide (GaAs), aluminum arsenide (AlAs), indium phosphide (InP), gallium phosphide (GaP) or aluminum phosphide (AlP), or semiconductor materials such as group IV or IV-IV materials, in particular germanium or silicon carbide (SiC), Lithium tantalate (LiTaO3), lithium niobate (LiNbO3), potassium sodium niobate (K x Na 1-x Piezoelectric materials such as NbO3 or KNN), barium titanate (BaTiO3), quartz, lead zirconate titanate (PZT), lead magnesium niobate-lead titanate (PMN-PT), zinc oxide (ZnO), aluminum nitride (AlN), or aluminum scandium nitride (AlScN), and / or It is selected from electrically insulating materials such as diamond, strontium titanate, yttria stabilized zirconia, or sapphire.

[0026] In some embodiments, the process includes forming at least one additional layer of a third material by epitaxy on each tile prior to step (b) of assembling the temporary substrate and the receiver substrate.

[0027] The cavities can be formed by chemical etching through a mask having openings at the locations of the cavities.

[0028] Preferably, each cavity is sized to receive a single tile, and each cavity is the same shape as said tile.

[0029] Another object of the present application relates to a composite structure, the composite structure comprising: at least two tiles made from a first material; a substrate, called a receiver substrate, fabricated from a second material different from the first material and having a major surface; The composite structure is characterized in that the tiles are arranged in respective cavities extending from a major surface into a receiver substrate, so that a free surface of the tile is substantially aligned with a major surface of the receiver substrate.

[0030] In some embodiments, the second material is a bulk semiconductor material such as silicon or silicon carbide, a piezoelectric material, or glass, or a stack of multiple layers of different semiconductor materials.

[0031] In other embodiments, the receiver substrate is a semiconductor-on-insulator substrate comprising, in order, a base substrate, an electrically insulating layer, and a layer of a second material defining a major surface of the receiver substrate, and the cavity extends within the layer of second material to the electrically insulating layer.

[0032] In other embodiments, the cavity extends into a surface region of a receiver substrate composed of a second material.

[0033] In some embodiments, at least a portion of a wall of at least one of the cavities is covered with an electrically insulating film.

[0034] In another embodiment, the receiver substrate comprises at least one surface layer of a second material covered with an electrically insulating layer, the cavity being formed in said electrically insulating layer.

[0035] The first material is III-V materials, in particular indium nitride (InN), gallium nitride (GaN), aluminum nitride (AlN), indium arsenide (InAs), gallium arsenide (GaAs), aluminum arsenide (AlAs), indium phosphide (InP), gallium phosphide (GaP) or aluminum phosphide (AlP), or semiconductor materials such as group IV or IV-IV materials, in particular germanium or silicon carbide (SiC), Lithium tantalate (LiTaO3), lithium niobate (LiNbO3), potassium sodium niobate (K x Na 1-x Piezoelectric materials such as NbO3 or KNN), barium titanate (BaTiO3), quartz, lead zirconate titanate (PZT), lead magnesium niobate-lead titanate (PMN-PT), zinc oxide (ZnO), aluminum nitride (AlN), or aluminum scandium nitride (AlScN), and / or It is particularly advantageous to select from electrically insulating materials such as diamond, strontium titanate, yttria stabilized zirconia, or sapphire.

[0036] Other features and advantages will become apparent from the following detailed description, taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0037] [Figure 1] 1 is a schematic cross-sectional view of a composite structure according to one embodiment. [Figure 2A] Or [Figure 2D] 1A to 1C illustrate steps for forming a temporary substrate. [Figure 3A] Or [Figure 3H]5A-5C illustrate various steps for preparing a receiver substrate and transferring tiles from a temporary substrate onto the receiver substrate according to a first embodiment. [Figure 4A] Or [Figure 4F] 5A-5C illustrate various steps for preparing a receiver substrate and transferring tiles from a temporary substrate onto the receiver substrate according to a second embodiment. [Figure 5A] Or [Figure 5F] 10A-10C illustrate various steps for preparing a receiver substrate and transferring tiles from a temporary substrate onto the receiver substrate according to a third embodiment. Detailed Description of the Embodiments

[0038] For ease of identification, the drawings are not necessarily drawn to scale. Furthermore, the number of tiles shown schematically in the drawings is given merely as an example.

[0039] The present application proposes a process for manufacturing a composite structure comprising at least two tiles on a substrate, which process makes it possible to place the tiles in a cavity of said substrate so that the surfaces of the tiles are substantially flush with the main surface of the substrate.

[0040] The tiles are formed from a first material, the first material comprising: III-V materials, in particular indium nitride (InN), gallium nitride (GaN), aluminum nitride (AlN), indium arsenide (InAs), gallium arsenide (GaAs), aluminum arsenide (AlAs), indium phosphide (InP), gallium phosphide (GaP) or aluminum phosphide (AlP), or semiconductor materials such as group IV or IV-IV materials, in particular germanium or silicon carbide (SiC), Lithium tantalate (LiTaO3), lithium niobate (LiNbO3), potassium sodium niobate (K x Na 1-xPiezoelectric materials such as NbO3 or KNN), barium titanate (BaTiO3), quartz, lead zirconate titanate (PZT), lead magnesium niobate-lead titanate (PMN-PT), zinc oxide (ZnO), aluminum nitride (AlN), or aluminum scandium nitride (AlScN), and / or It is preferably selected from electrically insulating materials such as diamond, strontium titanate, yttria stabilized zirconia, or sapphire.

[0041] Some of these materials are only available in the form of substrates with small dimensions, for example, substrates with diameters of less than 150-200 mm. However, the general requirement is for composite structures to be as large as possible, for example, on the order of 300 mm.

[0042] This size difference between the substrate made from the first material and the composite structure is compensated for by forming a temporary structure comprising an intermediate substrate and a plurality of tiles made from the first material that are disposed on the intermediate substrate, rather than directly transferring a layer of the first material onto the substrate of the composite structure.

[0043] To form the temporary substrate, tiles are removed from at least one donor substrate made from a first material and each tile is placed on an intermediate substrate. Each donor substrate generally has a smaller diameter than the intermediate substrate, but the intermediate substrate has the same diameter as the composite structure. Depending on the tiling density of the surface of the substrate, multiple donor substrates may need to be used.

[0044] Depending on the composition of the first material, each donor substrate can have a thickness of 20 μm to 1000 μm, preferably 100 μm to 700 μm. In principle, especially for the weakest materials, tiles extending across the entire thickness of the donor substrate are cut from each donor substrate. As a result, the thickness of the tiles is generally equal to the thickness of the donor substrate(s) and is therefore generally 20 μm to 1000 μm, preferably 100 μm to 700 μm.

[0045] The tiles can be placed on the intermediate substrate by a robot in a process known as "pick and place."

[0046] Because the intermediate substrate essentially acts as a temporary mechanical carrier for the tiles before they are transferred to another substrate to form the composite structure, the intermediate structure can be fabricated from any material that is rigid enough to withstand the process steps. For example, and without limitation, the intermediate substrate can be fabricated from silicon.

[0047] In some embodiments, at least one additional layer can be grown on the tile after it is placed on the intermediate substrate. The additional layer can be formed, for example, by epitaxy of a third material on a first material. The third material can be the same as the first material, in which case the additional layer allows the tile to be thicker. In other applications, the third material can be different from the first material. To maintain the crystalline quality of the additional layer, the third material is preferably selected so that its lattice parameter and thermal expansion coefficient are sufficiently close to those of the first material. For example, if the first material is InP, the third material can be InGaAs, InAlAs, GaAs, etc. Hereinafter, the stack consisting of the tile initially placed on the intermediate substrate and the subsequently formed additional layer(s) will be referred to as a "tile."

[0048] In some embodiments, a weakened zone is formed in each tile so as to define the respective tile portion intended to be subsequently transferred to the substrate of the composite structure, the thickness of said tile portion to be transferred advantageously being between 30 nm and 1.5 μm.

[0049] In a manner known per se, such a weakened zone can be created by implanting atomic species into each tile, said species generally comprising hydrogen and / or helium.

[0050] The temporary substrate is then assembled to the receiver substrate via the tiles.

[0051] The receiver substrate includes a second material that is different from the first material.

[0052] It is particularly advantageous for the second material to be selected from a semiconductor material such as silicon or silicon carbide, a piezoelectric material, or glass. The second material may optionally comprise a stack of several different semiconductor materials, for example Si / SiGe, Si / SiGe / Si, etc.

[0053] The receiver substrate is not necessarily composed of a single material. In some embodiments, the receiver substrate can therefore be a semiconductor-on-insulator substrate. Such a substrate comprises, in order, a base substrate, an electrically insulating layer, and a layer of a second material. In other embodiments, the receiver substrate can comprise an electrically insulating layer, e.g., silicon oxide, overlying the second material.

[0054] The receiver substrate does not have a planar major surface, but rather has a cavity extending from the major surface through the thickness of the receiver substrate.

[0055] The cavities are slightly larger in size than the tiles in the plane of the main surface of the receiver substrate (cavities and tiles preferably have the same shape) and are distributed in a pattern similar to the tiles, each cavity intended to receive a respective tile. Alternatively, the cavities can be intended to receive several adjacent tiles, in which case the size of said cavities is suitable to receive all of the respective tiles.

[0056] The cavities also have a depth less than the thickness of the tiles, such that when the temporary substrate is assembled to the receiver substrate, each tile is received over at least a portion of its thickness in a respective cavity and adheres to the bottom of said cavity.

[0057] For example, if the tile does not have a weakened zone, the depth of the cavity may be between 20 μm and 1000 μm, preferably between 100 μm and 700 μm.

[0058] If the tile has a weakened zone, the depth of the cavity can be approximately equal to the thickness of the layer to be transferred that is bounded by the weakened zone, for example, the depth of the cavity can be 30 nm to 1.5 μm.

[0059] In some embodiments, the cavity is formed by etching a second material on the surface of the receiver substrate. To this end, a mask can be pre-formed on the surface of the receiver substrate to cover the zones to be protected. The mask can generally be made of silicon nitride or silicon oxide. The mask has openings that define the surface to be etched to form the cavity. Etching is then performed to remove the second material, for example, wet etching (the etching agent can be HF, TMAH, KOH) or dry etching (e.g., reactive ion etching or RIE). The etching time is selected depending on the desired thickness of the cavity.

[0060] If the receiver substrate is a semiconductor-on-insulator substrate, the electrically insulating layer advantageously acts as an etch stop layer, so that the cavity extends through the entire thickness of the layer of second material to the electrically insulating layer.

[0061] In another embodiment, if the second material is covered with an electrically insulating layer, the cavity is formed by etching the material of said electrically insulating layer, which in this case advantageously acts as an etch stop layer, so that the cavity extends through the entire thickness of the electrically insulating layer into the second material, with the remaining zone of the electrically insulating layer making it possible to electrically insulate adjacent tiles.

[0062] In some embodiments, after the cavity is etched, an electrically insulating layer is formed on the walls and bottom of the cavity. Such an electrically insulating layer can be formed, for example, by oxidizing the second material during annealing in an oxidizing atmosphere. Alternatively, the electrically insulating layer can be formed by a deposition process, for example, chemical vapor deposition (CVD). The layer thus formed electrically insulates the tile from the receiver substrate and electrically insulates adjacent tiles. The oxide layer can optionally function as a bonding layer for the tile.

[0063] If the cavity is formed in an electrically insulating layer covering the second material, an additional electrically insulating layer may be deposited only at the bottom of the cavity to electrically insulate the tile from the receiver substrate.

[0064] Finally, the intermediate substrate is removed to transfer at least a portion of the tile to a receiver substrate to form a composite structure.

[0065] In some embodiments, the intermediate substrate can be removed by removing material, for example, by grinding the intermediate substrate from the opposite side of the receiver substrate.

[0066] In other embodiments, if the tile comprises a weakened zone, the tile is detached along the weakened zone, which detachment can be initiated by mechanical, thermal, and / or chemical stress. The intermediate substrate and the remainder of the tile can then be detached from the receiver substrate, and the portion of the tile that defines the weakened zone can be transferred to the receiver substrate.

[0067] Preferably, the free surface of the tile portion is slightly elevated relative to the free surface of the receiver substrate. For example, the free surface of the tile portion protrudes from the free surface of the receiver substrate by a height of 1% to 10% of the total thickness of the transferred portion. The surface of the tile can then be polished to remove zones potentially damaged during implantation and to give the tile a uniform thickness. The polishing can be chemical-mechanical polishing (CMP). After polishing, the free surface of the tile is substantially flush with the free surface of the receiver substrate.

[0068] When the tile or tile portion is received in the cavity, the composite structure formed by the receiver substrate and the tile or tile portion has a flat surface, thus avoiding overlay defects or measurement errors during subsequent steps performed on said composite structure, in particular photolithography or metrology steps.

[0069] 1 is a schematic cross-sectional view of a composite structure according to one embodiment, said structure comprising tiles P1, P2, P3 made from a first material and a substrate 3 made from a second material, each tile being arranged in a respective cavity of substrate 3 formed in a main surface of said substrate 3 such that the free surface of the tile is substantially aligned (coplanar) with the surface of substrate 3.

[0070] As can be seen more clearly in the inset showing a close-up of tile P3 within the cavity, the free surface of each tile is located at a height h relative to the surface of substrate 3. Height h can be zero (the free surface of the tile and the main surface of the substrate are flush), positive (when the tile is slightly elevated relative to the main surface of the substrate) or negative (when the tile is slightly recessed relative to the main surface of the substrate). As an absolute value, height h is typically 1-10% of the total thickness of the transferred portion of the tile.

[0071] 2A to 2D are diagrams showing steps for forming a temporary substrate.

[0072] 2A, tiles P1, P2, P3 are cut from a donor substrate 1 made from a first material. Typically, the tiles are cut through the entire thickness of the donor substrate in order not to weaken the tiles.

[0073] 2B, each tile P1, P2, P3 is placed on an intermediate substrate 2. As mentioned above, the intermediate substrate acts as a mechanical carrier for the tiles before they are transferred onto the final substrate to form the composite structure. The tiles can be placed individually (tile by tile) by a robot.

[0074] 2C, a weakened zone 10 may be formed in each tile P1, P2, P3 arranged on the intermediate substrate 2 so as to define a surface portion P'1, P'2, P'3. The weakened zone may in particular be formed by implanting atomic species (schematically indicated by arrows) into the tile.

[0075] In some embodiments, referring to Figure 2D, an additional layer 11 may be formed on the tiles P1, P2, P3 arranged on the intermediate substrate 2. Advantageously, said additional layer may be formed by epitaxy on each tile.

[0076] Optionally, the substrate 20 shown in Figures 2B, 2C, and 2D is used as a temporary substrate in the remainder of the process for forming the composite structure. The embodiments of Figures 2C and 2D may optionally be combined. In this case, the additional layer is advantageously generated before the implantation of the atomic species to prevent the thermal history of the growth of the additional layer from causing premature fracture of the tile along the weakened zone.

[0077] The temporary substrate is intended to be assembled to a receiver substrate in order to transfer tiles or tile portions to the receiver substrate.

[0078] 3A-3H illustrate various steps for preparing the receiver substrate and transferring tiles from the temporary substrate to the receiver substrate, when the receiver substrate is a semiconductor-on-insulator substrate.

[0079] With reference to FIG. 3A, the receiver substrate 3 comprises, in order, a base substrate 30, an electrically insulating layer 31, for example silicon oxide (also called buried oxide layer), and a layer 32 of a second material.

[0080] Referring to FIG. 3B, a mask 4 is formed on layer 32, the mask having openings at the locations of the cavities to be formed.

[0081] 3C, the second material exposed by the openings in mask 4 is preferably etched through the entire thickness of layer 32 to form cavities C1, C2, C3. Electrically insulating layer 31 effectively forms an etch stop layer.

[0082] 3D, the mask 4 is removed to release the surface of the remaining layer 32. The substrate thus obtained can be used as a receiver substrate for receiving tiles.

[0083] In one optional embodiment, before the receiver substrate and the temporary substrate are assembled, an electrically insulating layer 33 may be formed on the walls of the cavities. In this way, the walls and bottom of the cavities are covered with an electrically insulating material, which allows the tiles transferred into the cavities to be electrically insulated from the parts of layer 32 extending between the cavities and from the base substrate 30.

[0084] Referring to Figure 3F, the receiver substrate 3 and temporary substrate 20 are assembled by placing the tiles P1, P2, P3 and corresponding cavities C1, C2, C3 opposite each other (in this figure the substrate from Figure 3D is shown, but the substrate from Figure 3E may be used instead).

[0085] As shown in FIG. 3G, the bonding between substrate 3 and substrate 20 is via the tile and the bottom of the cavity.

[0086] Referring to Figure 3H, the intermediate substrate is removed. In the embodiment shown, the tile has a weakened zone 11. As a result, the intermediate substrate and the remaining part of the tile are removed by peeling along the weakened zone 11. In this way, only tile parts P'1, P'2, P'3 are transferred onto the receiver substrate.

[0087] In another embodiment (not shown), the intermediate substrate can be removed by grinding the substrate from the opposite side of the receiver substrate until the major surface of substrate 3 is reached.

[0088] 4A-4F show various steps for preparing the receiver substrate and transferring tiles from the temporary substrate to the receiver substrate, when the receiver substrate is a bulk substrate.

[0089] Referring to FIG. 4A, the receiver substrate 3 is a bulk substrate made from a second material.

[0090] Referring to FIG. 4B, a mask 4 is formed on the substrate 3, the mask having openings at the locations of the cavities to be formed.

[0091] 4C, the second material exposed by the openings in mask 4 is etched to form cavities C1, C2, C3, with the etching time being adjusted depending on the desired depth of the cavities.

[0092] The mask 4 is then removed to release the surface of the substrate 3. The substrate thus obtained can be used as a receiver substrate for receiving tiles.

[0093] 4D, before the receiver substrate and the temporary substrate are assembled, an electrically insulating layer 33 may be formed on the surface of the substrate 3 so as to cover the walls and the bottom of the cavity. Said layer 33 makes it possible to electrically insulate the tiles to be transferred into the cavity from the rest of the substrate 3.

[0094] Referring to Figure 4E, the receiver substrate 3 and temporary substrate 20 are assembled with the tiles P1, P2, P3 and corresponding cavities C1, C2, C3 positioned opposite each other (this figure shows the substrate from Figure 4D, but the electrically insulating layer 33 may optionally be omitted).

[0095] The bonding between the substrate 3 and the substrate 20 is via the tile and the bottom of the cavity.

[0096] Referring to Figure 4F, the intermediate substrate is removed. In the embodiment shown, the tiles have weakened zones 11. As a result, the intermediate substrate and the remaining parts of the tiles are removed by peeling along the weakened zones 11. In this way, only tile parts P'1, P'2, P'3 are transferred onto the receiver substrate.

[0097] In another embodiment (not shown), the intermediate substrate can be removed by grinding the substrate from the opposite side of the receiver substrate until the major surface of substrate 3 is reached.

[0098] 5A-5F illustrate various steps for preparing a receiver substrate and transferring tiles from a temporary substrate to the receiver substrate, where the receiver substrate comprises a substrate made from a second material covered with an electrically insulating layer.

[0099] Referring to FIG. 5A, the receiver substrate 3 comprises a bulk substrate 30 made from a second material covered with an electrically insulating layer 34 .

[0100] Referring to FIG. 5B, a mask 4 is formed on layer 34, the mask having openings at the locations of the cavities to be formed.

[0101] 5C, the electrically insulating material exposed by the openings in mask 4 is preferably etched through the entire thickness of layer 34 to form cavities C1, C2, C3. Substrate 30 effectively forms an etch stop layer.

[0102] 5D, mask 4 is removed to release the surface of layer 34. The substrate thus obtained can be used as a receiver substrate for receiving tiles.

[0103] Referring to FIG. 5E, the receiver substrate 3 and temporary substrate 20 are assembled with the tiles P1, P2, P3 and corresponding cavities C1, C2, C3 positioned opposite each other.

[0104] The bonding between the substrate 3 and the substrate 20 is via the tile and the bottom of the cavity.

[0105] Referring to Figure 5F, the intermediate substrate is removed. In the illustrated embodiment, the tiles have weakened zones 11. As a result, the intermediate substrate and the remaining parts of the tiles are removed by peeling along the weakened zones 11. In this way, only tile parts P'1, P'2, P'3 are transferred to the receiver substrate.

[0106] In another embodiment (not shown), the intermediate substrate can be removed by grinding the substrate from the opposite side of the receiver substrate until the major surface of substrate 3 is reached.

Claims

1. 1. A process for manufacturing a composite structure comprising at least two tiles on a substrate, the process comprising: (a) forming a temporary substrate (20) comprising an intermediate substrate (2) and a plurality of tiles (P1, P2, P3) arranged on said intermediate substrate (2) and made of a first material; (b) assembling said temporary substrate (20) via said tiles (P1, P2, P3) to a receiver substrate (3) made of a second material different from said first material; (c) removing said intermediate substrate (2) so as to transfer at least one portion (P'1, P'2, P'3) of said tile onto said receiver substrate (3) to form said composite structure; Including, the process is characterized in that the receiver substrate (3) has a main surface from which cavities (C1, C2, C3) extend, the receiver substrate (3) is assembled on the temporary substrate (20) on the side of the main surface such that each tile (P1, P2, P3) is received in a respective cavity (C1, C2, C3), and that after the intermediate substrate (2) is removed, the free surfaces of the tile portions (P'1, P'2, P'3) are substantially aligned with the main surface of the receiver substrate (3).

2. 2. The process of claim 1, wherein the step (a) of forming the temporary substrate (20) comprises forming a weakened zone (10) in each tile (P1, P2, P3) that defines a respective tile portion (P'1, P'2, P'3) to be transferred, and wherein the step (c) of removing the intermediate substrate (2) comprises detaching each tile portion (P'1, P'2, P'3) along the weakened zone (10).

3. The process of claim 2, wherein said forming said weakened zone (10) comprises implanting atomic species into each tile (P1, P2, P3).

4. 4. The process according to claim 1, wherein the step of forming the temporary substrate (20) comprises: extracting each tile (P1, P2, P3) from at least one donor substrate (1) made from the first material; and arranging each tile (P1, P2, P3) on the intermediate substrate (2), wherein each donor substrate (1) has a smaller diameter than the intermediate substrate (2).

5. The process of any one of claims 1 to 4, wherein the second material is a semiconductor material such as silicon or silicon carbide, a piezoelectric material, or glass.

6. 6. The process of claim 5, wherein the receiver substrate (3) is a semiconductor-on-insulator substrate comprising, in order, a base substrate (30), an electrically insulating layer (31), and the layer (32) of second material defining the main surface of the receiver substrate, and the cavity (C1, C2, C3) is formed in the layer (32) of second material until the electrically insulating layer (31) is reached.

7. 6. The process according to claim 5, wherein the cavities (C1, C2, C3) are formed in a surface area of ​​the receiver substrate (3) made of the second material.

8. 8. The process according to claim 6 or 7, wherein at least a part of the wall of at least one of the cavities (C1, C2, C3) is covered with an electrically insulating film (33) so as to electrically insulate the respective tile portion (P'1, P'2, P'3) from the receiver substrate (3).

9. 6. The process according to claim 5, wherein the receiver substrate (3) comprises at least one surface layer of the second material covered with an electrically insulating layer (34), and the cavities (C1, C2, C3) are formed in the electrically insulating layer (34).

10. The process according to any one of the preceding claims, wherein the temporary substrate (20) is assembled to the receiver substrate (3) by molecular adhesion.

11. 11. The process according to any one of claims 1 to 10, wherein each tile (P1, P2, P3) has a thickness of 20 μm to 1000 μm, preferably 100 μm to 700 μm, and wherein the transferred portion of each tile (P'1, P'2, P'3) has a thickness of 30 nm to 1.5 μm.

12. The process according to claim 11, wherein each cavity (C1, C2, C3) has a depth of between 30 nm and 1.5 μm.

13. 13. The process according to any one of claims 1 to 12, wherein following step (c) of removing the intermediate substrate (2), the free surfaces of the tile portions (P'1, P'2, P'3) are elevated relative to the main surface of the receiver substrate (3), and the process further comprises the step of polishing said surfaces.

14. The first material is III-V materials, in particular indium nitride (InN), gallium nitride (GaN), aluminum nitride (AlN), indium arsenide (InAs), gallium arsenide (GaAs), aluminum arsenide (AlAs), indium phosphide (InP), gallium phosphide (GaP) or aluminum phosphide (AlP), or semiconductor materials such as group IV or IV-IV materials, in particular germanium or silicon carbide (SiC), Lithium tantalate (LiTaO ３ ), lithium niobate (LiNbO ３ ), potassium sodium niobate (K ｘ Na １－ｘ NbO ３ or KNN), barium titanate (BaTiO ３ ), quartz, lead zirconate titanate (PZT), lead magnesium niobate-lead titanate (PMN-PT), zinc oxide (ZnO), aluminum nitride (AlN), or aluminum scandium nitride (AlScN), and / or Electrically insulating materials such as diamond, strontium titanate, yttria-stabilized zirconia, or sapphire The process according to any one of claims 1 to 13, wherein the process is selected from

15. The process according to any one of claims 1 to 14, comprising, before step (b) of assembling the temporary substrate (20) and the receiver substrate (3), forming by epitaxy at least one additional layer (11) of a third material on each tile.

16. The process according to any one of the preceding claims, wherein the cavities (C1, C2, C3) are formed by chemical etching through a mask (4) having openings at the locations of the cavities.

17. A process according to any one of the preceding claims, wherein each cavity (C1, C2, C3) is sized to receive a single tile, said cavity being the same shape as said tile.

18. at least two tiles (P'1, P'2, P'3) made from a first material; a substrate (3), called a receiver substrate, made of a second material different from the first material and having a major surface; A composite structure comprising: said composite structure is characterized in that said tiles (P'1, P'2, P'3) are arranged in respective cavities (C1, C2, C3) extending from said main surface into said receiver substrate (3), so that the free surfaces of said tiles (P'1, P'2, P'3) are substantially aligned with said main surface of said receiver substrate (3); Composite structure.

19. 20. The composite structure of claim 18, wherein the second material is a bulk semiconductor material such as silicon or silicon carbide, a piezoelectric material, or glass, or a stack of multiple layers of different semiconductor materials.

20. 20. The composite structure of claim 19, wherein the receiver substrate (3) is a semiconductor-on-insulator substrate comprising, in order, a base substrate (30), an electrically insulating layer (31), and the layer of second material (32) defining the main surface of the receiver substrate, and wherein the cavity (C1, C2, C3) extends into the layer of second material up to the electrically insulating layer.

21. 20. A composite structure according to claim 19, wherein the cavities (C1, C2, C3) extend into a surface area of ​​the receiver substrate (3) made of the second material.

22. 22. A composite structure according to claim 20 or 21, wherein at least a part of the wall of at least one of the cavities (C1, C2, C3) is covered with an electrically insulating film (33).

23. 20. The composite structure of claim 19, wherein the receiver substrate (3) comprises at least one surface layer of the second material covered with an electrically insulating layer (34), and the cavities (C1, C2, C3) are formed in the electrically insulating layer (34).

24. The first material is III-V materials, in particular indium nitride (InN), gallium nitride (GaN), aluminum nitride (AlN), indium arsenide (InAs), gallium arsenide (GaAs), aluminum arsenide (AlAs), indium phosphide (InP), gallium phosphide (GaP) or aluminum phosphide (AlP), or semiconductor materials such as group IV or IV-IV materials, in particular germanium or silicon carbide (SiC), Lithium tantalate (LiTaO ３ ), lithium niobate (LiNbO ３ ), potassium sodium niobate (K ｘ Na １－ｘ NbO ３ or KNN), barium titanate (BaTiO ３ ), quartz, lead zirconate titanate (PZT), lead magnesium niobate-lead titanate (PMN-PT), zinc oxide (ZnO), aluminum nitride (AlN), or aluminum scandium nitride (AlScN), and / or Electrically insulating materials such as diamond, strontium titanate, yttria-stabilized zirconia, or sapphire 24. The composite structure of any one of claims 18 to 23, selected from:

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