Method for transmitting and receiving a binary signal by on / off switching of a signal superimposed on a microwave base carrier

Abstract

To provide a transmission method and a reception method of a binary signal for achieving high-speed transmission of radio communication.SOLUTION: A method of transmitting a binary signal using a microwave, comprising the steps of: branching a carrier oscillator output signal from a transmission side into two signals; and transmitting from an antenna a binary modulation signal in which one of the two signals is a signal obtained by passing bit 1 of transmission data by cutting only one wavelength or two or three wavelengths of a superimposed carrier by a transfer gate and is a carrier bit 1 signal of a signal added to the other carrier signal with a phase of the carrier matched.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a method for transmitting and receiving a binary signal by switching on / off a carrier signal superimposed on a microwave base carrier.

[0002] Conventional LTE handovers (Non-Patent Document 1) were similar to IEEE802.11b handovers in that they used beacons to select a wireless channel before transmitting data packets. Because beacons from mobile nodes were transmitted using CSMA / CD, collisions caused delays. This limited the number of mobile terminals that could be switching LTE stations. After switching, communication took place in a time slot assigned to the channel, eliminating collisions like those in CSMA / CD, and limiting the number of channels only by speed.

[0003] Conventional wireless microwave binary signals are microwave ON / OFF keying, as described in Non-Patent Document 2. The receiving side obtains transmitted modulated data after passing through a low-pass filter. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] M. Vijayalakshmi, et al. “A Cross Layer Scheduling Algorithm in IEEE 802.16e WiMAX Standard to Support RTPS Traffic Class”, 2014 fourth International Conference on Communication Systems and Network Technologies, 07-09 April 2014 [Non-patent document 2] Seymour Stein and J. Jey Jones, "Current Theory of Communication Lines," Morikita Publishing Co., Ltd., October 1970 Summary of the Invention [Problem to be solved by the invention]

[0005] Non-Patent Document 1 has the drawback of using CSMA / CD for detection in the three phases (detection, search, execution) of L2 handover when a mobile terminal accesses a new base station, resulting in a large delay time in handover.

[0006] As shown in Non-Patent Document 2, conventional ON / OFF keying uses a low-pass filter to regenerate signals, which has the drawback of not being able to transmit and receive high-speed data. Also, when sending bit 0, the carrier wave is turned off, which causes the signal to not pass smoothly through the carrier resonant circuit on the receiving side.

[0007] The purpose of the present invention is to show a method of communication using radio microwaves, which can send binary signals by amplitude modulation and which can pass through a resonator. [Means for solving the problem]

[0008] The present invention has been made in view of the above-mentioned problems of the prior art, and the means of the present invention are the following first to sixth aspects of the present invention. A first aspect of the present invention is a method for transmitting a binary signal using microwaves, characterized in that a carrier oscillator output signal is split into two on the transmitting side, one of which is a signal in which bit 1 of the transmission data is obtained by cutting out and passing only one or two or three wavelengths of a superimposed carrier wave using a transfer gate, and the other is a carrier bit 1 signal obtained by adding the carrier wave signal to the other carrier wave signal with the phase of the carrier wave adjusted, and the section in which the superimposed carrier wave is not added is a carrier bit 0, and the binary modulated signal is transmitted from an antenna.

[0009] A second aspect of the present invention is a method for receiving a microwave signal transmitted by the method for transmitting a binary signal using microwaves according to the first aspect of the present invention, characterized in that the microwave signal received by one receiving antenna is amplified by a small amount through a resonator for each carrier frequency, and when the voltage of the output signal exceeds a threshold, clock synchronization is performed using a digital PLL method to recover bits 1 and 0 of the transmitted data, thereby identifying an Ethernet frame.

[0010] A third aspect of the present invention is a handover preparation method using the method according to either the first or second aspect of the present invention, characterized in that a transmitting station having a carrier frequency with the best quality of recovered data from the signals branched for each resonator is designated as a destination base station candidate, a frame is identified from the recovered data of that carrier frequency, a base station whose MAC address is equal to that included in the frame header is designated as a destination base station candidate, and the mobile terminal notifies the mobile terminal's source base station of the base station MAC address.

[0011] A fourth aspect of the present invention is a handover method using the method according to either the first or second aspect of the present invention, characterized in that: carrier frequencies with the best quality of recovered data from the signals branched for each of the resonators are designated as candidate destination base stations, and frames are identified from the recovered data of the carrier frequencies; base stations equal to a base station MAC address included in the frame header are designated as candidate destination base stations; the mobile terminal notifies a source base station of the mobile terminal of the base station MAC address; the source base station determines a destination base station for the mobile terminal from the base station MAC address of the candidate destination base station sent from the mobile terminal; and transmits a handover command packet for the mobile terminal to the destination base station via a ring network or a tree network; the destination base station for the mobile terminal changes a frame transfer path to the mobile terminal, determines a radio channel to the mobile terminal, and notifies the mobile terminal of the radio channel number; and the mobile terminal starts transmitting frames to the destination base station on an uplink channel with the radio channel number.

[0012] A fifth aspect of the present invention is a digital PLL method used in the method according to the second aspect of the present invention, the digital method comprising the steps of: setting a set-reset flip-flop with a signal exceeding the threshold; turning on an input clock to counter 1, which counts up with a clock at or near the PSK carrier frequency; resetting the set-reset flip-flop with a differential signal of a rising edge of an output from counter 2, which counts up with a clock at or near the PSK carrier frequency and has an upper limit counter value of 7, when the counter value of counter 2 is 4; latching the count value of counter 1; immediately thereafter, setting all bits of flip-flops in each stage of counter 1 to 0; and stopping input of the input clock to counter 1; if the latched value exceeds a specified value 1, inputting a stuff clock to counter 2; and destuffing (excluding one clock) the input clock to counter 2 when the latched value is 2 or more and equal to or less than specified value 2 (<specified value 1-2).

[0013] A sixth aspect of the present invention is a DPLL circuit or FPGA incorporating a digital PLL method for use in the method according to the second aspect of the present invention, wherein a set / reset flip-flop is set by a signal exceeding the threshold, and an input clock to counter 1 that counts up at a PSK carrier frequency or a clock near the PSK carrier frequency is turned on, and the set / reset flip-flop is set by a differential signal of a rising edge of an output of counter 2 when the counter value of counter 2, which counts up at a PSK carrier frequency or a clock near the PSK carrier frequency and has an upper limit counter value of 7, is 4. A DPLL circuit or an FPGA incorporating a digital PLL method that performs a digital PLL method, characterized in that a flip-flop is reset and the count value of the counter 1 is latched, and immediately thereafter, the flip-flops of each stage of the counter 1 are set to all bits 0 and the input clock to the counter 1 is stopped, and if the latched value exceeds a specified value 1, a stuff clock is input to the counter 2, and if the latched value is 2 or more and less than the specified value 2 (<specified value 1, or default value 1-1), the input clock to the counter 2 is destuffed (one clock is removed). [Effects of the Invention]

[0014] As explained above, the present invention is a method for transmitting and receiving binary signals by switching a carrier superposition signal on and off on a microwave base carrier wave, in which the transmitter transmits bit 1 of the transmission data from the transmitting antenna as a signal obtained by aligning the phase of the carrier wave and superposing two of them to form an analog signal, and the mobile terminal, which is the receiving device, separates the carrier wave using a resonator, and clocks signals whose output signal exceeds a threshold using a DPLL to reproduce the data.This method does not use a low-pass filter that removes the carrier wave as in the conventional carrier ON / OFF modulation, and has the advantage of enabling high-speed data communication. [Brief explanation of the drawings]

[0015] [Figure 1]FIG. 2 is a diagram showing the relationship between base stations, cells, and mobile terminals when a handover of a mobile terminal is performed between LTE (WIMAX) stations according to the first embodiment of the present invention. [Figure 2] FIG. 10 is a diagram for explaining an example of bit 1 transmission of transmission data at a microwave frequency that differs for each base station sent from an LTE station for base station selection when performing handover of a mobile terminal between LTE (WIMAX) stations in the first embodiment of the present invention. [Figure 3] FIG. 2 is a diagram for explaining the operation of a transmission data sending circuit carried on microwaves in an LTE (WIMAX) station according to the first embodiment of the present invention. [Figure 4] FIG. 10 is a diagram for explaining an example of the operation of a digital PLL that receives a signal that has passed through a different resonator for each microwave frequency received by the antenna in the first embodiment of the present invention and exceeds a threshold, and regenerates a received data clock. DETAILED DESCRIPTION OF THE INVENTION

[0016] A first embodiment of the present invention will be described with reference to Figures 1, 2, 3, and 4. Figure 1 shows the relationship between base stations, cells, and mobile terminals when a handover of a mobile terminal is performed between LTE (WIMAX) stations, and in Figure 1, 1 is a source base station A, 2 is a destination base station B, 3 is another base station C, 4 is the mobile terminal, 5 is the cell of base station A, 6 is the cell of base station B, and 7 is the cell of base station C.

[0017] The operation of Fig. 1 will be explained below. Fig. 1 is a diagram showing the relationship between base stations, cells and mobile terminals when a handover of a mobile terminal between LTE (WIMAX) stations is performed. When a handover in the radio domain between LTE stations is performed, a mobile terminal (4) connected to a source LTE station A (1) approaches a destination base station B (2). The mobile terminal uses multiple resonators to select microwaves received by the antenna, recovers clock from one of the selected signals using the DPLL shown in Fig. 4 to recover transmission data, identifies the frame, and if the base station MAC address in the frame header is equal to the MAC address of the destination base station advertised by the source base station in communication, determines that the base station of the carrier frequency passing through that resonator is a candidate for the destination base station, and sends the base station A (1) the base station MAC address. The source base station A (1) determines the NIC MAC address of the destination base station B (2) from the base station MAC address sent from the mobile terminal (4), and sends a handover command packet addressed to the destination base station B (2) via a MAC ring network, MAC tree network, or IP network with the NIC MAC address as the destination MAC address. When the packet arrives at the destination base station B (2), the destination base station B (2) determines the channel to the mobile terminal and notifies the mobile terminal (4) of the channel number. When a response is received from the mobile terminal (4), the destination base station B (2) sends a frame addressed to the mobile terminal (4) on the channel.

[0018] Next, we will explain the operation of Figure 2. Figure 2 illustrates the method of transmitting bit 1 of the transmission data on a carrier wave with a carrier frequency that differs for each base station sent from an LTE station for base station selection when performing a handover of a mobile terminal between LTE (WIMAX) stations. The wave below 10 in (a) of the figure is one of the two branches of the signal sent from the carrier wave transmitter, and the cut-down two-wavelength wave above is the waveform extracted by a transfer gate from the other of the two branches, and bit 1 of the transmission data is represented by the sum of the following six wavelengths and the non-carrier section. 11 in (b) of the figure is a diagram in which the two waves of 10 in Figure are superimposed, and the two-wavelength section has twice the voltage, but the signal is not shown as added in the figure. 11 in the figure is bit 1 of the transmission data sent from the LTE station.

[0019] Next, we will explain the microwave modulation circuit of the LTE station in Figure 3. In Figure 3, 120 is a carrier wave transmitter, 121 and 122 are emitter-follower bipolar transistors, 124, 12, and 127 are source-follower NMOS transistors, 140 is a high-output emitter-follower bipolar transistor, 141 is a coaxial cable leading to the antenna, 132 is a two-valued binary counter that counts up with a differential signal of the rising edge of the output signal of 120, 133 is a circuit that outputs clocks of two differential signals, the rising and falling edges of the output signal of counter 132, 134 is an H cut down signal generation circuit that is high during the period in which the superimposed carrier wave of bit 1 of the transmitted data is high, 135 is a signal that is high only during H cut down and is L otherwise, 136 is a signal that is high during periods other than H cut down, that is, a period in which there is no superimposed carrier wave and is L otherwise, and 128 and 129 are transfer gates.

[0020] Next, the operation of Figure 3 will be explained. The output of oscillator 120 is supplied to the bases of bipolar transistors 121 and 122 and is also sent to circuit 132. The emitter output of bipolar transistor 122 passes through transfer gate 128, which is gate-controlled by control signals 13 and 136, only during the two carrier wave periods of bit 1 of the transmitted data (the upper wave of 10 in Figure 2), and is input to the gate of NMOS 124. When transfer gate 128 is OFF, transfer gate 129 is ON, and the gate of NMOS 124 is connected to ground. Meanwhile, the emitter output of bipolar transistor 121 is input directly to the gate of NMOS 125. The source outputs of NMOS 124 and NMOS 125 are added together by resistor R at the gate of NMOS 127 and input to the gate. The source output of the NMOS 127 is input to the base of a high-power bipolar transistor 140 and is supplied as an emitter output to a transmitting antenna via a coaxial cable 141.

[0021] Next, we will explain Figure 4. Figure 4 is an example of a digital PLL (DPLL) built into a mobile terminal, and the system clock is 2.4G, which is about the PSK carrier frequency. In Figure 4, 102 is an input signal in which microwaves received by the antenna of the mobile terminal are sorted by multiple resonators, and one of the sorted signals exceeds a threshold, 31 is a differentiation circuit for the rising part of the input signal 102, 80 is the system clock (PSK carrier frequency clock), 82 is a set signal of a set-reset flip-flop (FF) 99, 95 is a latch signal of a circuit 98 that latches the reset signal of the set-reset flip-flop (FF) 99 and the count value of a binary counter 83, and The signals are: signal 95 is a delayed clear signal for binary counter 83; 86 is a set / reset FF (flip-flop) that is set by output 88 of differentiation circuit 31 and reset by the rising differential signal of 87; 84 is an AND circuit with a NOT circuit that inverts destuff signal 101; 92 is an OR circuit of stuff clock 100 and system clock 80; 85 is an asynchronous counter that generates a synchronous clock with output 87 (in the figure, an 8-value counter with counter values ​​from 0 to 7); 90 is a D-type FF; 96 is count value magnitude comparison circuit 1 (in the figure, if the counter value is greater than reference value 1, 3, it generates stuff clock 100); 97 is count value magnitude comparison circuit 2 (in the figure, if the counter value is less than reference value 2, 3, it generates destuff clock 101); and 93 is an AND circuit for ON / OFF control of the system clock input to binary counter 83.

[0022] 4 will be described next. When the output of the differentiation circuit 31 becomes 1 (H), the set / reset FF 86 is set, and a set signal is input to the set / reset FF 99, causing the output signal 94 to become 1 (H), turning the AND circuit 93 ON and causing the binary counter 83 to count up with the system clock 80. When the destuff clock 101 input to the AND circuit 84 is 0 (L), the system clock 80 is input to the synchronous clock generation asynchronous counter 85, and when the count value of the synchronous clock generation asynchronous counter 85 is 4, the output 87 becomes H, and the differentiated signal of this rising signal resets the set / reset FF 86, and a reset signal is input to the set / reset flip-flop 99 as 95, latching the count value of the binary counter 83 in the latch circuit 98, and the delayed signal of 95 sets all bits of the flip-flops in each stage of the binary counter 83 to 0. The count value of the bit string latched in counter value latch circuit 98 is compared with reference value 1 in count value magnitude comparison circuit 1 96, and if the counter value is greater than 3 in the figure, a stuff clock 100 is generated, while it is compared with reference value 2 in count value magnitude comparison circuit 2 97, and if the counter value is less than 3 in the figure, a destuff clock 101 is generated. When stuff clock 100 is generated, it is ORed with the PSK carrier clock or system clock 80 in OR circuit 92 and input as the input clock to synchronous clock generating asynchronous counter 85. Therefore, the point in time when the count value of synchronous clock generating asynchronous counter 85 reaches 7 is one clock period earlier than when no stuff clock is input by one PSK carrier clock or one system clock, and the time position of the next count value 4 is shifted earlier than when counter 85 is free-running, so the value latched in counter value latch circuit 98 by the differentiated signal of signal 87 is smaller than the previous value. As a result, if the destuff clock 101 is sent, the PSK carrier clock or system clock is destuffed (one clock is removed) by the AND circuit 84, so that the point at which the count value of the synchronous clock generation counter 85 reaches 7 will be later than when one PSK carrier clock or one system clock is not removed, and the time position of the next value of 4 of the count 85 will be shifted later.In this way, the output signal of the synchronous clock generating asynchronous counter 85 is synchronized with the clock component of the input signal. This DPLL is stable when the counter value of counter 83 is 3. Since the delayed signal of the Q output of the set / reset FF 86 is input as signal 87 to the D-type FF 90, recovered data appears at output 91 of the D-type FF 90. If there is not a certain degree of difference between reference values ​​1 and 2, the output of the synchronous clock generating asynchronous counter 85 will oscillate and become unstable. The accuracy of the system clock of a mobile terminal using a crystal oscillator is approximately 10-6, which is 1000 times different from the PSK carrier frequency of 2.4 GHz, resulting in a deviation of 1000 clocks per second. In other words, one clock is stuffed or destuffed per 1 msec, so the amount of the stuffing or destuffing time shift must not exceed the other reference value. When pulling in, the stuffing is repeated approximately four times in succession if 4n=8. [Explanation of symbols]

[0023] 1. Source base station A 2 Destination base station B 3. Other base station C 4 Mobile terminals 5 Base station A's cell 6 Base station B cell 7 Base station C cell 121, 122, 140 Bipolar transistor 124,125,127 NMOS 128, 129 Transfer Gate 141 coaxial

Claims

1. A method for transmitting a binary signal using microwaves, characterized in that a carrier oscillator output signal is split into two from the transmitting side, one of which is a signal in which bit 1 of the transmission data is cut out by a transfer gate and only one or two or three wavelengths of the superimposed carrier wave are passed through, and the other is a carrier bit 1 signal obtained by adding the carrier wave signal to the other carrier wave signal with the carrier wave phase adjusted, and the section in which the superimposed carrier wave is not added is a carrier bit 0, and the binary modulated signal is transmitted from an antenna.

2. A method for receiving a microwave signal transmitted by the method for transmitting a binary signal using microwaves according to claim 1, characterized in that the microwave signal received by one receiving antenna is amplified by a small amount through a resonator for each carrier frequency, and when the voltage of the output signal exceeds a threshold, a clock is synchronized using a digital PLL method to reproduce bits 1 and 0 of the transmitted data and identify the Ethernet frame.

3. 3. A handover preparation method using the method according to claim 1 or 2, characterized in that a transmitting station having a carrier frequency with the best quality of recovered data from the signals branched off for each resonator is designated as a destination base station candidate, a frame is identified from the recovered data of that carrier frequency, a base station having a base station MAC address equal to that included in the frame header is designated as a destination base station candidate, and the mobile terminal notifies the mobile terminal's source base station of the base station MAC address.

4. a mobile terminal notifying a source base station of the mobile terminal of the base station MAC address; a source base station determining a destination base station for the mobile terminal from the base station MAC address of the destination base station candidate transmitted from the mobile terminal; a handover command packet for the mobile terminal transmitted to the destination base station via a ring network or a tree network; a destination base station for the mobile terminal changing a frame transfer path to the mobile terminal, determining a radio channel to the mobile terminal, and notifying the mobile terminal of the radio channel number; and a mobile terminal starting to transmit frames to the destination base station on an uplink channel of the radio channel number.

5. 3. A digital PLL method used in the method of claim 2, wherein a set-reset flip-flop is set by a signal exceeding the threshold, an input clock to counter 1 that counts up with a clock at or near the PSK carrier frequency is turned on, the set-reset flip-flop is reset by a differential signal of a rising edge of an output of counter 2 when the counter value of counter 2, which counts up with a clock at or near the PSK carrier frequency and has an upper limit counter value of 7, is 4, and the count value of counter 1 is latched, and immediately thereafter, flip-flops in each stage of counter 1 are set to all bits 0, and input of the input clock to counter 1 is stopped, and if the latched value exceeds a specified value 1, a stuff clock is input to counter 2, and if the latched value is 2 or more and equal to or less than the specified value 2 (<specified value 1 - 2), the input clock to counter 2 is destuffed (one clock is removed).

6. 3. A DPLL circuit or FPGA incorporating a digital PLL method used in the method of claim 2, wherein a set-reset flip-flop is set by a signal exceeding the threshold, and an input clock to a counter 1 that counts up with a clock at or near the PSK carrier frequency is turned on, and a counter 2 that counts up with a clock at or near the PSK carrier frequency and has an upper limit counter value of 7 is turned on, and a differential signal of a rising edge of an output from the counter 2 when the counter value is 4 is turned on. a DPLL circuit or an FPGA incorporating a digital PLL method that performs a digital PLL method, characterized in that: a flip-flop of the counter 1 is reset, and the count value of the counter 1 is latched; immediately thereafter, all bits of the flip-flops of each stage of the counter 1 are set to 0; and the input of the input clock to the counter 1 is stopped; if the latched value exceeds a specified value 1, a stuff clock is input to the counter 2; and if the latched value is 2 or more and less than the specified value 2 (<specified value 1, or predetermined value 1-1), the input clock to the counter 2 is destuffed (one clock is removed).

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