Photoelectric conversion apparatus, imaging apparatus, and device

Abstract

To provide a photoelectric conversion device capable of performing both generation of an image having desired characteristics and focus detection at high speed.SOLUTION: The solid-state imaging device further includes a switching unit that switches to which of the A / D conversion circuits included in the A / D conversion unit the analog signal transmitted from the pixel through the output line is input, and the switching unit can switch whether the analog signal transmitted through the third output line is input to the first A / D conversion circuit together with the analog signal transmitted through the first output line, or is input to the third A / D conversion circuit. In a period in which the switching unit inputs the analog signal transmitted through the third output line to the first A / D conversion circuit together with the analog signal transmitted through the first output line, power consumption of the third A / D conversion circuit is smaller than both power consumption of the first A / D conversion circuit and power consumption of the second A / D conversion circuit.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a photoelectric conversion device equipped with focus detection pixels for phase-difference AF, and the like. [Background technology]

[0002] 2. Description of the Related Art In the field of imaging devices equipped with an imaging element such as a CMOS image sensor, a method of performing autofocus by detecting a phase difference on the imaging surface of the imaging element is known.

[0003] Patent Document 1 describes an imaging device that includes a plurality of microlenses arranged in a matrix for phase-difference AF detection, pairs of photodiodes arranged corresponding to each microlens, and a pixel signal generation unit. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2020-98968 Summary of the Invention [Problem to be solved by the invention]

[0005] The imaging device described in Patent Document 1 generates an image using signals from two frames, one odd and one even. While this method allows focus detection for each odd and even frame, the frame rate of the generated images is half that of the odd and even frames, which raises concerns that the image quality of the generated moving images may not be sufficiently high. Patent Document 1 does not specifically consider a configuration suitable for adding pixel signals from three or more pixels arranged in the direction in which the phase difference is detected, a method for switching the number of pixels to be added, a method for reducing power consumption, etc. Therefore, there has been a demand for a photoelectric conversion device that can perform both image generation with desired characteristics and focus detection at high speed. [Means for solving the problem]

[0006] A first aspect of the present invention is a pixel array including a pixel arranged along a row and a column, the pixel having a first photoelectric conversion unit, a second photoelectric conversion unit, a first transfer transistor, a second transfer transistor, a floating diffusion, and one microlens shared by the first photoelectric conversion unit and the second photoelectric conversion unit, an output line group including a plurality of output lines for transmitting analog signals output from the pixels arranged along the column, an A / D conversion unit having a first A / D conversion circuit, a second A / D conversion circuit, and a third A / D conversion circuit, and a signal transmitted by the output lines. a switching unit that switches which of the A / D conversion circuits of the A / D conversion unit an analog signal output from the pixel unit is input to, and in each pixel of the pixel unit, the second photoelectric conversion unit is arranged in the same direction as the first photoelectric conversion unit, the first transfer transistor is included in a transfer path of signal charge from the first photoelectric conversion unit to the floating diffusion, and the second transfer transistor is included in a transfer path of signal charge from the second photoelectric conversion unit to the floating diffusion, and one row of the pixel unit includes a second pixel and a third pixel, a first control line is connected to the gate of the first transfer transistor of the first pixel, the gate of the second transfer transistor of the second pixel, and the gate of the first transfer transistor of the third pixel, a second control line is connected to the gate of the second transfer transistor of the first pixel, the gate of the first transfer transistor of the second pixel, and the gate of the second transfer transistor of the third pixel, a first output line included in the output line group is connected to the first pixel, and a second control line is connected to the second pixel. is connected to a second output line included in the output line group, and the third pixel is connected to a third output line included in the output line group, and the switching unit is capable of switching between inputting an analog signal transmitted by the first output line to the first A / D conversion circuit, inputting an analog signal transmitted by the second output line to the second A / D conversion circuit, and inputting an analog signal transmitted by the third output line together with the analog signal transmitted by the first output line to the first A / D conversion circuit or to the third A / D conversion circuit, and the switching unit isThe photoelectric conversion device is characterized in that, during a period in which the analog signal transmitted through the third output line is input to the first A / D conversion circuit together with the analog signal transmitted through the first output line, the power consumption of the third A / D conversion circuit is smaller than the power consumption of both the first A / D conversion circuit and the second A / D conversion circuit. [Effects of the Invention]

[0007] According to one embodiment of the present invention, a photoelectric conversion device capable of generating an image having desired characteristics and performing focus detection at high speed can be provided. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a diagram for explaining the overall configuration of an imaging apparatus according to an embodiment; [Figure 2] 1A is a circuit diagram showing the circuit configuration of a pixel unit, and FIG. 1B is a schematic plan view of the pixel unit. [Figure 3] FIG. 2 is a partial circuit diagram of a part of the photoelectric conversion device according to the first embodiment. [Figure 4] A partial circuit diagram enlarged from part of Figure 3. [Figure 5] 5 is a timing chart for explaining a signal output procedure in the imaging method according to the first embodiment. [Figure 6] FIG. 2 is a schematic block diagram showing an example of the configuration of a signal processing unit. [Figure 7] FIG. 10 is a partial circuit diagram of a part of a photoelectric conversion device according to a second embodiment. [Figure 8] 10 is a timing chart for explaining a signal output procedure in an imaging method according to the second embodiment. [Figure 9] 10 is a timing chart for explaining a signal output procedure in an imaging method according to a third embodiment. [Figure 10] 1A is a schematic diagram illustrating an apparatus including an imaging device (semiconductor device) according to an embodiment, FIG. 1B is a diagram illustrating an example of a photoelectric conversion system for an in-vehicle camera, and FIG. 1C is a diagram illustrating a photoelectric conversion system for capturing an image ahead of a vehicle. DETAILED DESCRIPTION OF THE INVENTION

[0009] The following description of the preferred embodiments of the present invention will be given with reference to the accompanying drawings. The preferred embodiments are merely illustrative, and those skilled in the art can appropriately modify and implement the present invention without departing from the spirit and scope of the present invention.

[0010] In the drawings referred to in the following description of the embodiments, elements denoted by the same reference numerals have the same functions unless otherwise specified. When a plurality of identical elements are arranged in a drawing, the reference numerals and their descriptions may be omitted.

[0011] Furthermore, because the drawings may be represented schematically for the convenience of illustration and explanation, the shapes, sizes, and arrangements of elements depicted in the drawings may not strictly correspond to the actual objects. In the following explanation, a direct or see-through view of the photoelectric conversion device from a direction perpendicular to the main surface of the semiconductor layer may be referred to as a planar view. When describing the arrangement of pixels with reference to the drawings, a "row" refers to a horizontal arrangement, and a "column" refers to a vertical arrangement.

[0012] The conductivity types of the transistors described in the following embodiments are merely examples and are not limited to the conductivity types described in the embodiments. The conductivity types described in the embodiments can be changed as appropriate, and the potentials of the gate, source, and drain of the transistor can be changed as appropriate in accordance with this change. For example, in the case of a transistor that operates as a switch, the low and high levels of the control signal supplied to the gate can be reversed in accordance with the change in conductivity type compared to the description in the embodiments.

[0013] [Embodiment 1] An imaging device, a photoelectric conversion device, and the like according to embodiment 1 will be described with reference to the drawings. The imaging device includes a photoelectric conversion device and a signal processing unit. First, a schematic configuration of the imaging device will be described, followed by a description of the configuration and driving method of each unit.

[0014] (Configuration of imaging device) The overall configuration of an imaging device according to an embodiment will be described with reference to Fig. 1. The imaging device includes a photoelectric conversion device 1000 and a signal processing unit 2000. The photoelectric conversion device 1000 and the signal processing unit 2000 may be configured on separate semiconductor substrates, or may be configured on the same semiconductor substrate.

[0015] First, we will explain the photoelectric conversion device 1000. The photoelectric conversion device 1000 has a pixel unit 1, a vertical scanning unit 2, a timing generation unit 3, column A / D conversion units 4A and 4B, a signal output unit 5, and column connection switching units 9A and 9B.

[0016] The timing generation unit 3 controls the start and end of operation of the imaging device in response to external input, and generates various timing signals that control the operation timing of each unit of the photoelectric conversion device 1000. For example, it outputs various timing signals to the vertical scanning unit 2, column A / D conversion units 4A and 4B, signal output unit 5, column connection switching units 9A and 9B.

[0017] The pixel section 1 includes a pixel group in which a plurality of pixel units 100, each having a photoelectric conversion function, are arranged two-dimensionally along rows and columns. Each pixel unit 100 is equipped with a red, green, or blue color filter. In the illustrated example, red and green color filters are alternately arranged from the left end in odd-numbered rows of the pixel section 1, and green and blue color filters are alternately arranged in even-numbered rows, forming a Bayer array. However, the color types and arrangement method of the color filters can be changed as appropriate depending on the application of the imaging device. For ease of illustration, red will be abbreviated as R, green as G, and blue as B in the drawings.

[0018] The vertical scanning section 2 supplies the pixel section 1 with a drive signal for sequentially scanning the pixel units 100 arranged along rows and columns in the vertical direction while driving them row by row.

[0019] The pixel units 100 arranged along the same column are connected to the same vertical output line (not shown in FIG. 1). The vertical output lines connecting the pixel units 100 in odd-numbered columns are taken out to the bottom of FIG. 1 and connected to a column connection switching unit 9A. The vertical output lines connecting the pixel units 100 in even-numbered columns are taken out to the top of FIG. 1 and connected to a column connection switching unit 9B. Note that an individual vertical output line is referred to as an output line, multiple vertical output lines are collectively referred to as an output line group, and the column connection switching unit 9A and the column connection switching unit 9B can also be referred to as switching units. The output line group can also be said to include multiple output lines that transmit analog signals output from the pixel units arranged along the column.

[0020] The column connection switching unit 9A is connected to the column A / D conversion unit 4A, and the column connection switching unit 9B is connected to the column A / D conversion unit 4B. The column A / D conversion unit 4A has A / D conversion circuits in the same number as the odd-numbered columns, and the column A / D conversion unit 4B has A / D conversion circuits in the same number as the even-numbered columns.

[0021] Analog signals output from the pixel units 100 in odd-numbered columns are input to the column connection switching unit 9A via vertical signal lines. The column connection switching unit 9A inputs the analog signals output from the pixel units 100 in odd-numbered columns to appropriate A / D conversion circuits in the column A / D conversion unit 4A. The column connection switching unit 9A has a function of switching the connection relationship between the vertical output lines and the A / D conversion circuits, which will be described in detail later.

[0022] Similarly, analog signals output from the pixel units 100 in the even-numbered columns are input to the column connection switching unit 9B via vertical signal lines. The column connection switching unit 9B inputs the output signals from the pixel units 100 in the even-numbered columns to appropriate A / D conversion circuits included in the column A / D conversion unit 4B.

[0023] Analog signals output from pixel units 100 in odd-numbered columns are converted into digital signals by column A / D conversion unit 4A, and analog signals output from pixel units 100 in even-numbered columns are converted into digital signals by column A / D conversion unit 4B. The digital signals for one row converted by the column A / D conversion unit are temporarily stored in memory, and these stored digital signals are read out by horizontal scanning and output sequentially to signal output unit 5. Signal output unit 5 transfers the digital signals to signal processing unit 2000 using a transmission method that complies with the protocol within the system.

[0024] The signal processing unit 2000 has a focus detection unit 6 that performs focus detection by phase difference detection using the digital signal transferred from the signal output unit 5, and an image generation unit 7 that generates an image using the same digital signal. Details will be described later with reference to FIG.

[0025] (Pixel unit configuration) Next, a description will be given of the pixel unit 100 included in the pixel section 1. Fig. 2(a) is a circuit diagram showing the circuit configuration of the pixel unit 100.

[0026] The pixel unit 100 includes a photoelectric conversion unit 101, a photoelectric conversion unit 102, a transfer transistor 103, a transfer transistor 104, a reset transistor 105, a floating diffusion FD, an amplification transistor 106, and a selection transistor 107. A transfer control signal tx1, a transfer control signal tx2, a reset control signal res, and a selection control signal sel are input to the pixel unit 100 from the vertical scanning unit 2 (FIG. 1).

[0027] Each transistor is a MOS transistor, and a transistor of an appropriate conductivity type can be used depending on the polarity of the signal to be handled. The photoelectric conversion units 101 and 102 are photoelectric conversion elements (e.g., photodiodes) that perform photoelectric conversion and generate charges according to the amount of incident light.

[0028] The signal charge photoelectrically converted in the photoelectric conversion unit 101 is transferred to the floating diffusion FD via the transfer transistor 103 driven by a transfer control signal tx1. The signal charge photoelectrically converted in the photoelectric conversion unit 102 is transferred to the floating diffusion FD via the transfer transistor 104 driven by a transfer control signal tx2. In other words, the first transfer transistor (transfer transistor 103) is included in the transfer path of the signal charge from the first photoelectric conversion unit (photoelectric conversion unit 101) to the floating diffusion. Also, the second transfer transistor (transfer transistor 104) is included in the transfer path of the signal charge from the second photoelectric conversion unit (photoelectric conversion unit 102) to the floating diffusion.

[0029] The floating diffusion FD is a capacitance that holds the signal charge transferred from the photoelectric conversion unit, and the potential of the floating diffusion FD is amplified by the amplification transistor 106. That is, the amplification transistor 106 outputs a signal voltage according to the signal charge.

[0030] The output signal of the amplification transistor 106 is output to a vertical output line 108 via a selection transistor 107 driven by a selection control signal sel. The signal charge held in the floating diffusion FD (or the potential of the floating diffusion FD) is reset via a reset transistor 105 driven by a reset control signal res.

[0031] The pixel unit 100 according to this embodiment is provided with a floating diffusion FD that is shared by the photoelectric conversion unit 101 and the photoelectric conversion unit 102. Therefore, by simultaneously turning on the transfer transistor 103 and the transfer transistor 104, the signal charges generated in both the photoelectric conversion unit 101 and the photoelectric conversion unit 102 can be transferred to the floating diffusion FD. In this case, the amplification transistor 106 outputs a signal voltage in which the outputs of the photoelectric conversion unit 101 and the photoelectric conversion unit 102 are added (or averaged).

[0032] On the other hand, by turning on only one of the transfer transistors 103 and 104, the signal charge generated in the photoelectric conversion unit 101 or 102 can be transferred to the floating diffusion FD. In this case, the amplification transistor 106 outputs a signal voltage that can be used to generate a phase difference signal for focus detection, for example.

[0033] Next, the layout of the photoelectric conversion units in the pixel unit 100 will be described. Fig. 2(b) is a schematic plan view of the pixel unit 100. The photoelectric conversion unit PDL and the photoelectric conversion unit PDR share a microlens 120, with the photoelectric conversion unit PDL being disposed to the left of the optical center of the microlens 120 and the photoelectric conversion unit PDR being disposed to the right of the optical center of the microlens 120. In other words, the photoelectric conversion unit PDL and the photoelectric conversion unit PDR are disposed so as to receive light passing through different regions of the pupil of the optical system. This enables phase difference detection by obtaining different parallax signals for the left and right using two photoelectric conversion units.

[0034] Although the configuration in which two photoelectric conversion units are arranged on the left and right sides of the microlens has been exemplified here, the arrangement is not limited to this and they may be arranged, for example, above and below. Furthermore, for example, four photoelectric conversion units may be arranged in one pixel unit, sharing one microlens.

[0035] 2(a), the photodiode connected to the transfer transistor 103 driven by the transfer control signal tx1 is the photoelectric conversion unit 101, and the photodiode connected to the transfer transistor 104 driven by the transfer control signal tx2 is the photoelectric conversion unit 102. As will be described later with reference to FIGS. 3 and 4, depending on which column the pixel unit is arranged in, the photoelectric conversion unit PDL may correspond to the photoelectric conversion unit 101 or the photoelectric conversion unit 102 on the circuit diagram. Similarly, depending on which column the pixel unit is arranged in, the photoelectric conversion unit PDR may correspond to the photoelectric conversion unit 102 or the photoelectric conversion unit 101 on the circuit diagram.

[0036] Next, we will explain the column connection switching unit and column A / D conversion unit of the photoelectric conversion device 1000. Fig. 3 is a partial circuit diagram extracting a portion of the pixel unit 1, column connection switching unit 9A that handles signals from odd-numbered columns, and column A / D conversion unit 4A that the photoelectric conversion device 1000 has. Note that in the right-hand portions (not shown) of the column connection switching unit 9A and column A / D conversion unit 4A, a circuit configuration similar to that shown in Fig. 3 is repeatedly arranged.

[0037] In addition, the signals output from the pixel units 100 in the even columns of the pixel section 1 are handled by the column connection switching section 9B and the column A / D conversion section 4B shown in the upper part of Figure 1, but are assumed to be handled in the same way as the signals output from the pixel units 100 in the odd columns described below.

[0038] Fig. 3 shows an extracted portion of the pixel section 1 where pixel units 100 are arranged in two pixels in the vertical direction (column direction) and 16 pixels in the horizontal direction (row direction). Also, Fig. 4, which is an enlarged view of Fig. 3, shows an extracted portion of the pixel section 1 where pixel units 100 are arranged in two pixels in the vertical direction (column direction) and seven pixels in the horizontal direction (row direction). In Fig. 4, each pixel unit is labeled with a reference symbol indicating the color of the color filter (row number, column number). For example, the pixel unit in the upper left of the figure is labeled R(1,1), which indicates that the pixel unit 100 arranged in the first row and first column is a Red pixel unit.

[0039] As shown in FIG. 1, the vertical output lines connecting pixel units 100 in odd-numbered columns are connected to column connection switching unit 9A, and the vertical output lines connecting pixel units 100 in even-numbered columns are connected to column connection switching unit 9B.

[0040] 3 and 4 show vertical output lines 108 extending downward, and for example, the vertical output line connecting pixel units in the first column is denoted as vertical output line 108(1). Similarly, the vertical output lines connecting pixel units in the third, fifth, and seventh columns are denoted as vertical output line 108(2), vertical output line 108(3), and vertical output line 108(4), respectively.

[0041] 3 and 4, the transfer control signals tx1 and tx2 supplied to the pixel units 100 in the first row are shown as transfer control signals tx1[0] and transfer control signals tx2[0]. The transfer control signals tx1 and tx2 supplied to the pixel units 100 in the second row are shown as transfer control signals tx1[1] and transfer control signals tx2[1]. Note that the wiring for transmitting the transfer control signal tx1 to the gate of the transfer transistor 103 of each pixel unit in each row may be referred to as a first control line, and the wiring for transmitting the transfer control signal tx2 to the gate of the transfer transistor 104 of each pixel unit in each row may be referred to as a second control line.

[0042] As will be described later, analog signals are simultaneously read from all pixel units arranged in one row in the pixel section 1 (FIG. 1) and handled by the column connection switching unit 9A and the column connection switching unit 9B. The column connection switching unit 9A, which handles analog signals from odd-numbered vertical output lines, handles analog signals output from pixel units of the same color arranged in the row currently being read. As can be seen from FIG. 4, for example, the pixel units in odd-numbered columns in the first row are all red, and the pixel units in odd-numbered columns in the second row are all green. Therefore, the analog signals handled by the column connection switching unit 9A and the column A / D conversion unit 4A for the pixel units in the first row are all red signals, and the analog signals handled by the pixel units in the second row are all green signals. Similarly, the column connection switching unit 9B, which handles analog signals from even-numbered vertical output lines, handles analog signals output from pixel units of the same color arranged in the row currently being read. For example, the pixel units in even-numbered columns in the first row are all green, and the pixel units in even-numbered columns in the second row are all blue. Therefore, the analog signals handled by the column connection switching unit 9B and the column A / D conversion unit 4B for the pixel units in the first row are signals of the same color, Green, and the analog signals handled by the pixel units in the second row are signals of the same color, Blue.

[0043] Next, the relationship between the photoelectric conversion units PDL and PDR arranged in each pixel unit 100 and the transfer control signals supplied to the transfer transistors connected to the photoelectric conversion units will be described. In Fig. 4, the intersections of the photoelectric conversion units PDL and PDR of each pixel unit with the transfer control signals tx1[0] to tx2[1] are schematically indicated by black circles or black triangles. That is, in the pixel units in the first, second, fifth, and sixth columns, the intersections of the photoelectric conversion units and the transfer control signals are indicated by black circles, and in the pixel units in the third, fourth, and seventh columns, the intersections of the photoelectric conversion units and the transfer control signals are indicated by black triangles. That is, black circles and black triangles are alternately arranged every two columns.

[0044] The pixel unit with the intersection indicated by a black circle indicates that the signal charge is transferred from the photoelectric conversion unit PDL arranged on the left side within the microlens to the floating diffusion by the transfer transistor 103 driven by the transfer control signal tx1. Also, the pixel unit with the intersection indicated by a black circle indicates that the signal charge is transferred from the photoelectric conversion unit PDR arranged on the right side within the microlens to the floating diffusion by the transfer transistor 104 driven by the transfer control signal tx2.

[0045] On the other hand, the pixel unit whose intersection is indicated by a black triangle indicates that signal charge is transferred from the photoelectric conversion unit PDR arranged on the right side within the microlens to the floating diffusion by the transfer transistor 103 driven by the transfer control signal tx1. Also, the pixel unit whose intersection is indicated by a black triangle indicates that signal charge is transferred from the photoelectric conversion unit PDL arranged on the left side within the microlens to the floating diffusion by the transfer transistor 104 driven by the transfer control signal tx2.

[0046] (Column connection switching unit) Returning to FIG. 3, the column connection switching unit 9A will be described. The column connection switching unit 9A has a function of switching the connection relationship between the vertical output lines 108 connected to the pixel units in odd-numbered columns and the A / D conversion circuits included in the column A / D conversion unit 4A. The column A / D conversion unit 4A has column A / D(0) to column A / D(7) as A / D conversion circuits 41 corresponding to each column. In other words, the column connection switching unit 9A (switching unit) can switch to which of the A / D conversion circuits included in the column A / D conversion unit 4A (A / D conversion unit) an analog signal transmitted by the vertical output line 108 (output line) is input.

[0047] The column connection switching unit 9A includes switches 901 to 904 for switching the output destination of an analog signal transmitted by the vertical output line 108, and capacitors 907 to 908 capable of holding a signal read from the vertical output line 108. The column connection switching unit 9A includes parallel-connected capacitors 907 and 908 corresponding to each column of pixel units, which are connected to the input terminals of columns A / D(0) to A / D(7).

[0048] A connection control signal vswitch is input to the column connection switching unit 9A from the timing generation unit 3 (FIG. 1), and the opening and closing of switches 901 to 904 is controlled by the connection control signal vswitch. FIG. 3 shows a case where the connection control signal vswitch is on (High), in which case only switch 902 is on, and switches 901, 903, and 904 are off. When the connection control signal vswitch is off (Low), the opening and closing of each switch is reversed. Such a switch configuration can be realized, for example, by using an N-type MOS transistor for switch 902 and P-type MOS transistors for switches 901, 903, and 904. Furthermore, when the polarities of switches 901 to 904 are all the same, an inverter that outputs an inverted signal of the connection control signal vswitch can be provided at each input node of switch 901, switch 903, and switch 904.

[0049] In each column of the column connection switching unit 9A, a capacitor 907 and a capacitor 908 are arranged in parallel. For example, in the leftmost column, the capacitor 907 is connected to the vertical output line 108(1), and a switch 901 is arranged between the capacitor 908 and the vertical output line 108(1). In addition, a switch 902 is arranged between the capacitor 908 in the leftmost column and the vertical output line 108(3). The switches 901 and 902 perform exclusive opening and closing operations in response to the connection control signal vswitch. Therefore, when the connection control signal vswitch is turned on, the capacitor 908 in the leftmost column is connected to the vertical output line 108(3), and when the connection control signal vswitch is turned off, the vertical output line 108(1) is connected. That is, in the leftmost column, when the connection control signal vswitch is turned on, the capacitor 907 is connected to the vertical output line 108(1), and the capacitor 908 is connected to the vertical output line 108(3). When the connection control signal vswitch is turned off, both the capacitor 907 and the capacitor 908 are connected to the vertical output line 108(1).

[0050] In the second column from the left of the column connection switching unit 9A, the capacitor 907 is connected to the vertical output line 108(2), and a switch 901 is disposed between the capacitor 908 and the vertical output line 108(2). In addition, a switch 902 is disposed between the capacitor 908 in the second column and the vertical output line 108(4). The switches 901 and 902 perform exclusive opening and closing operations in response to the connection control signal vswitch. Therefore, when the connection control signal vswitch is turned on, the capacitor 908 in the second column is connected to the vertical output line 108(4), and when the connection control signal vswitch is turned off, the capacitor 908 is connected to the vertical output line 108(2). In other words, when the connection control signal vswitch is turned on, in the second column, the capacitor 907 is connected to the vertical output line 108(2), and the capacitor 908 is connected to the vertical output line 108(4). When the connection control signal vswitch is turned off, the capacitors 907 and 908 are both connected to the vertical output line 108(2).

[0051] In addition, in the third column from the left of the column connection switching unit 9A, a switch 903 is arranged between the capacitor 907 and the vertical output line 108(3), and a switch 904 is arranged between the capacitor 908 and the vertical output line 108(3). When the connection control signal vswitch is turned on, the switches 903 and 904 are turned off as shown in Figure 3, so that no signal is input to the capacitor 907 and the capacitor 908 from the vertical output line (3). When the connection control signal vswitch is turned off, the switches 903 and 904 are turned on, so that an analog voltage signal is input to the capacitor 907 and the capacitor 908 from the vertical output line (3).

[0052] Similarly, in the fourth column from the left of the column connection switching unit 9A, a switch 903 is arranged between the capacitor 907 and the vertical output line 108(4), and a switch 904 is arranged between the capacitor 908 and the vertical output line 108(4). When the connection control signal vswitch is turned on, the switches 903 and 904 are turned off as shown in Figure 3, so that no signal is input to the capacitor 907 and the capacitor 908 from the vertical output line (4). When the connection control signal vswitch is turned off, the switches 903 and 904 are turned on, so that a signal is input to the capacitor 907 and the capacitor 908 from the vertical output line (4).

[0053] For example, consider a case where, in the pixel unit group on the first row, a signal transferred from the photoelectric conversion unit 101 (FIG. 2(a)) to the floating diffusion FD by the transfer control signal tx1[0] is read out from the vertical output line 108. As in the example shown in FIG. 3, it is assumed that the connection control signal vswitch is on.

[0054] In the pixel unit R(1,1) connected to the vertical output line 108(1) and the pixel unit R(1,5) connected to the vertical output line 108(3), the signal transferred from the left photoelectric conversion unit PDL (FIG. 4) is read out in response to the transfer control signal tx1[0]. Therefore, the capacitor 907 in the leftmost column holds the output signal based on the left photoelectric conversion unit PDL of the pixel unit R(1,1), and the capacitor 908 holds the output signal based on the left photoelectric conversion unit PDL of the pixel unit R(1,5).

[0055] In this way, in the leftmost column of the column connection switching unit 9A, analog signal voltages reflecting the signals from the left photoelectric conversion units PDL of two pixel units of the same color are added together by capacitive coupling and input to A / D(0) of the column A / D conversion unit 4A. Note that the voltage output by the parallel-connected capacitive coupling is not, to be precise, the sum of the output signals of the two pixels but is an average value. For convenience, in the following explanation, output from the parallel-connected capacitive coupling will be referred to as addition rather than averaging.

[0056] At this time, in the pixel unit R(1,3) connected to the vertical output line 108(2) and the pixel unit R(1,7) connected to the vertical output line 108(4), an analog signal based on the signal charge transferred from the right-side photoelectric conversion unit PDR (FIG. 4) is read out in response to the transfer control signal tx1[0]. Therefore, the capacitor 907 in the second column from the left of the column connection switching unit 9A holds an output signal based on the right-side photoelectric conversion unit PDR of the pixel unit R(1,3), and the capacitor 908 holds an output signal based on the right-side photoelectric conversion unit PDR of the pixel unit R(1,7).

[0057] In this way, in the second column from the left of the column connection switching unit 9A, the analog signal voltages reflecting the signals of the photoelectric conversion units PDR on the right side of two pixels of the same color are added by capacitive coupling and input to A / D(1) of the column A / D conversion unit 4A.

[0058] At this time, in the third and fourth columns from the left of the column connection switching unit 9A, when the connection control signal vswitch is turned on, the switches 903 and 904 are turned off, and therefore no signal is input from the vertical output line to the capacitors 907 and 908. Therefore, the analog signals read out from the pixel units are not input to A / D(2) and A / D(3) of the column A / D conversion unit 4A.

[0059] In this way, when the connection control signal vswitch is on, in the first and second columns from the left of the column connection switching unit 9A, vertical output lines that have color filters of the same color and transmit analog signals based on photoelectric conversion units that are arranged on the same side within the pixel units are connected to each other via the switch 902. In other words, the analog signal voltages of pixel units that have color filters of the same color and that read out signal charges transferred from their photoelectric conversion units using the same transfer control signal tx are added (averaged) by capacitive coupling and input to the A / D conversion circuit.

[0060] Furthermore, when the connection control signal vswitch is on, in the third and fourth columns from the left of the column connection switching unit 9A, no signal is input from the vertical output line to the capacitors 907 and 908, and no analog signal read out from the pixel unit is input to the corresponding A / D conversion circuit.

[0061] On the other hand, when the connection control signal vswitch is off, for all columns of the column connection switching unit 9A, an analog signal is transmitted from the vertical output line corresponding to that column to the capacitors 907 and 908 of that column. In other words, analog signals output from pixel units of different columns are not added together, and the analog signal voltage is input for each column of pixel units to the A / D conversion circuit arranged corresponding to that column.

[0062] (A / D conversion section) Next, the A / D conversion unit 4A will be described. The A / D conversion unit 4A has A / D(0), A / D(1), A / D(2), etc., which correspond to each column of the column connection switching unit 9A and serve as A / D conversion circuits that convert analog signals into digital signals. The type of A / D conversion circuit is not particularly limited, but for example, it has a comparator (not shown) and compares the analog signal output from the column connection switching unit 9A with an external ramp waveform (reference signal). A time measurement counter (not shown) is used to measure the timing at which the comparator output inverts, and the counter value at the inversion timing is held. This allows A / D conversion to be performed, and the counter value is held and output as a digital signal.

[0063] A sleep control unit 46 is provided in an A / D conversion circuit (e.g., A / D(2), A / D(3)) connected to a column in which the switches 903 and 904 are arranged in the column connection switching unit 9A. The sleep control unit 46 can stop the operation of the A / D conversion circuit to reduce power consumption. The sleep control unit 46 operates based on the stop control signal Sleep input from the timing generation unit 3 (FIG. 1), and the stop control signal Sleep is turned on in synchronization with the connection control signal vswitch input to the column connection switching unit 9A. When the connection control signal vswitch is on (i.e., the stop control signal Sleep is on), the operation of an A / D conversion circuit (e.g., A / D(2), A / D(3)) to which an output signal of a pixel unit is not input is stopped to reduce power consumption. If an amplifier (column amplifier) ​​for amplifying an analog signal is arranged in the preceding stage of the A / D conversion circuit, power supply to the column amplifier may be stopped when the stop control signal Sleep is on to reduce power consumption. Note that when the stop control signal Sleep is on, it is not necessary to completely stop the power supply to the A / D conversion circuit to which the output signal of the pixel unit is not input. For example, when the stop control signal Sleep is on, the power supply to the A / D conversion circuit to which the output signal of the pixel unit is not input may be set to be in the range of 0.1% to 30% of the power supply during normal operation of the A / D conversion circuit. Similarly, if an amplifier (column amplifier) ​​for amplifying the analog signal is arranged in the preceding stage of the A / D conversion circuit, it is not necessary to completely stop the power supply to this amplifier, and it may be set to be in the range of 0.1% to 30% of the power supply during normal operation.

[0064] On the other hand, when the connection control signal vswitch is off (i.e., the stop control signal Sleep is off), the output signals of the pixel units of each column are input to the A / D conversion circuits of the corresponding column, causing all A / D conversion circuits to operate.

[0065] A / D(0), A / D(1), A / D(2), etc., which serve as A / D conversion circuits, are connected to ado(0), ado(1), ado(2), etc., which serve as digital signal lines that transmit digital signals.

[0066] The A / D conversion unit 4A has horizontal transfer lines 43 and 44 for sequentially transferring the digital signals output by the A / D conversion circuits, and these are connected to the signal output unit 5 (FIG. 1). The A / D conversion circuits arranged in odd-numbered columns in the A / D conversion unit 4A, i.e., A / D(0), A / D(2), A / D(4), ..., are connected to the horizontal transfer line 43 via switches 42. The A / D conversion circuits arranged in even-numbered columns, i.e., A / D(1), A / D(3), A / D(5), ..., are connected to the horizontal transfer line 44 via switches 42. A horizontal transfer control signal hadr is input to the switches 42 in each column from the timing generation unit 3 (FIG. 1).

[0067] When the connection control signal vswitch is on, the horizontal transfer control signal hadr is input so that horizontal scanning is performed by skipping the switches 42 connected to the A / D conversion circuits that are stopped by the sleep control unit 46. That is, digital signals are output from the A / D conversion circuits to the horizontal transfer line 43 in the order of A / D(0), A / D(4), etc., and digital signals are output from the A / D conversion circuits to the horizontal transfer line 44 in the order of A / D(1), A / D(5), etc.

[0068] When the connection control signal vswitch is off, the horizontal transfer control signal hadr is input so as to horizontally scan the switches 42 in each column in sequence. That is, digital signals are output from the A / D conversion circuits to the horizontal transfer line 43 in the order of A / D(0), A / D(2), A / D(4), and so on, and digital signals are output from the A / D conversion circuits to the horizontal transfer line 44 in the order of A / D(1), A / D(3), A / D(5).

[0069] (Signal output procedure) Fig. 5 is a timing chart for explaining the signal output procedure in the imaging method according to embodiment 1. As with Fig. 3, Fig. 5 illustrates the procedure when the connection control signal vswitch is turned on (High), analog signals read out from photoelectric conversion units of the same color are added by the column connection switching unit 9A, and digitized and read out by the column A / D conversion unit 4A. Note that in Figs. 3 and 4, among the photoelectric conversion units possessed by each pixel unit, photoelectric conversion units that are not read out in the operation of the timing chart shown in Fig. 5 are indicated by hatching.

[0070] First, at time t1, the vertical synchronization signal VD goes low, and acquisition of one frame image begins. At time t2, the horizontal synchronization signal HD is input, and a readout operation for one horizontal scanning period (in this case, the readout operation for the first row) begins. The reset transistor 105 of the pixel unit in the first row is turned off because the reset control signal res[0] is low, and the selection transistor 107 of the pixel unit in the first row is turned on because the selection control signal sel[0] is high.

[0071] Next, during the period from time t3 to time t4, tx1[0] goes High, but tx2[0] remains Low. As described in the explanation of Figure 3, [0] represents the row address of the first row, and the same transfer control signal is supplied to all pixel units in the first row.

[0072] As explained for the column connection switching unit 9A, when the connection control signal vswitch is on, the sum of the analog signals from pixel units R(1,1) and R(1,5) to which signal charges have been transferred from the photoelectric conversion unit PDL arranged on the left side is input to A / D(0). Also, the sum of the analog signals from pixel units R(1,3) and R(1,7) to which signal charges have been transferred from the photoelectric conversion unit PDR arranged on the right side is input to the adjacent A / D(1).

[0073] Furthermore, when the connection control signal vswitch is on, the stop control signal sleep is also on, so the operation of A / D(2) and A / D(3) is stopped by the sleep control unit 46, reducing power consumption.

[0074] Next, at time t5, the A / D conversion result is finalized in the operating A / D conversion circuit, the digital signal is held, and the digital signal is output to the digital signal line. That is, a digital signal d00 is output from A / D(0) to ado(0), and a digital signal d01 is output from A / D(1) to ado(1). Meanwhile, A / D(2) and A / D(3), which are not operating, do not output digital signals to ado(2) and ado(3).

[0075] Next, at time t6, the switches 42 of each column are appropriately driven by the horizontal transfer control signal hadr, and horizontal transfer is performed. First, during the first transfer period, hadr(0) and hadr(1) are simultaneously turned on. During the next transfer period, hadr(2) and hadr(3) are skipped, and hadr(4) and hadr(5) are simultaneously turned on. Thereafter, horizontal transfer is performed sequentially for the first row. As a result, digital signals obtained by adding the outputs of the left photoelectric conversion units of two pixels of the same color are sequentially read out onto the horizontal transfer line 43, and digital signals obtained by adding the outputs of the right photoelectric conversion units of two pixels of the same color are sequentially read out onto the horizontal transfer line 44. In other words, only the sum signal from the PDL arranged on the left side of the pixel unit 100 is output from the horizontal transfer line 43 to chA (channel A), and only the sum signal from the PDR arranged on the right side of the pixel unit 100 is output to chB (channel B).

[0076] Next, at time t7, the next horizontal synchronization signal HD is input, and the readout operation for the next horizontal scanning period (second row) begins. In the pixel units in the first row where readout has been completed, the selection control signal sel[0] goes low, turning the selection transistor 107 off. In addition, in the pixel units in the first row, the reset control signal res[0] goes high, turning the reset transistor 105 on, connecting the floating diffusion FD to the power supply and resetting the potential. At the same time, the reset transistor 105 in the pixel units in the second row is turned off because the reset control signal res[0] goes low, and the selection transistor 107 in the pixel units in the second row is turned on because the selection control signal sel[0] goes high. Thereafter, the same readout operation from time t2 for the first row is performed for the second row.

[0077] At time t7, the readout of the first row from time t6 to the horizontal transfer lines 43 and 44 does not have to be completed. Because the A / D conversion circuit of each column holds the A / D conversion result of the previous row, while analog signals are being read out from the pixel units of the next row, the A / D conversion result (digital signal) of the previous row can be horizontally transferred in parallel.

[0078] At time t8, the readout of the digital signals for the first row, which began at time t6, to the horizontal transfer lines 43 and 44 is completed. During the period from time t8, when the horizontal transfer of the digital signals for the first row is completed, to time t12, when the horizontal transfer of the digital signals for the second row starts, the horizontal transfer control signal hadr and the switch 42 may be inactive. Note that the order of time t7, when the readout of the analog signals from the pixel units for the second row starts, and time t8, when the readout of the digital signals for the first row is completed, may be reversed from the example shown in FIG.

[0079] Next, during the period from time t9 to time t10, tx1[1] goes High, but tx2[1] remains Low. As explained in the explanation of Figure 3, [1] represents the row address indicating the second row, and the same transfer control signal is supplied to all pixel units in the second row. In other words, this indicates that the vertical scanning unit 2 (Figure 1) has advanced the scanning of the vertical rows by one row.

[0080] At time t11, just like time t5 in the readout of the first row, the A / D conversion result is finalized in the operating A / D conversion circuit, the digital signal is held, and the digital signal is output to the digital signal line. That is, a digital signal d10 is output from A / D(0) to ado(0), and a digital signal d11 is output from A / D(1) to ado(1). Meanwhile, A / D(2) and A / D(3), which are not operating, do not output digital signals to ado(2) and ado(3). At time t12, similarly to time t6 in the readout of the first row, the switches 42 of each column are appropriately driven by the horizontal transfer control signal hadr, and horizontal transfer is performed.

[0081] In this way, row-by-row reading is repeated while scanning rows in the vertical direction each time a horizontal synchronization signal HD is input, until the readout operation for all pixels (one frame) is completed.

[0082] In this way, the digital signals read out from the photoelectric conversion device 1000 shown in Fig. 1 are input to and processed by the signal processing unit 2000. In the photoelectric conversion device 1000 (Fig. 1), digital signals corresponding to the pixel units 100 in odd-numbered columns are output sequentially from the column A / D conversion unit 4A, and digital signals corresponding to the pixel units 100 in even-numbered columns are output sequentially from the column A / D conversion unit 4B. The order of these digital signals is adjusted by the signal output unit 5 (Fig. 1), and they are input sequentially to the signal processing unit 2000 as digital image data for one screen.

[0083] (Signal processing unit) 6 is a schematic block diagram showing an example of the configuration of signal processing unit 2000. Each functional element shown in the figure is a conceptual functional element and does not necessarily have to be physically configured as shown in the figure. For example, the specific form of distribution and integration of each functional block is not limited to the example shown in the figure, and all or part of them can be functionally or physically distributed and integrated in any unit depending on the usage situation, etc.

[0084] As described above, chA inputs a digital signal based on the signal charge of the photoelectric conversion unit PDL arranged on the left side of the pixel unit 100, and chB inputs a digital signal based on the signal charge of the photoelectric conversion unit PDR arranged on the right side of the pixel unit 100. These digital signals are input to both the focus detection unit 6 and the image generation unit 7.

[0085] The focus detection unit 6 includes a peak detection unit 61 and a phase difference detection unit 62. The peak detection unit 61 detects the peak position of one screen's worth of digital signals input sequentially from each of chA (channel A) and chB (channel B). The phase difference detection unit 62 compares the peak position detected from the digital signal input from chA with the peak position detected from the digital signal input from chB, and detects whether the image is in focus, front focus, or back focus. The detection result is sent to a control unit (not shown) of the imaging device, and the control unit can drive a focus mechanism based on the detection result to perform a focusing operation.

[0086] The image generation unit 7 includes an adder 71 and an image processing unit 72. The adder 71 adds digital signals input from chA and chB. As shown in FIG. 5, at the first readout timing of the first row, for example, a digital signal d00 corresponding to the analog sum of the two photoelectric conversion units PDL arranged on the left side of the pixel units 100 in the first and fifth columns from the left is input from chA. Furthermore, a digital signal d01 corresponding to the analog sum of the two photoelectric conversion units PDR arranged on the right side of the pixel units 100 in the third and seventh columns from the left is input from chB. As is clear from the pixel array (Bayer array) in FIG. 4, the digital signals d00 and d01 are all based on signals read from pixel units of the same color. Therefore, the adder 71 adds digital signals from four adjacent pixels of the same color among pixel units arranged in the same row. In other words, the adder 71 performs horizontal addition of four pixels of the same color.

[0087] The digital signal added by the adder 71 is subjected to appropriate image processing by an image processor 72, and is output as a digital image signal constituting one frame to a recording unit (not shown) or a display unit (not shown) of the imaging device. The image processor 72 can perform, for example, noise removal processing, filtering processing, RGB processing, etc., but may also perform other correction processing, etc.

[0088] As described above, according to this embodiment, it is possible to perform both image data generation by adding four pixels of the same color and focus detection using one frame of output signals read out from the photoelectric conversion device, thereby improving the image quality of moving images when capturing moving images while measuring distances.

[0089] Furthermore, according to this embodiment, when analog signals are added, power consumption can be reduced by stopping the driving of the A / D conversion circuits or column amplifiers of unused columns. Furthermore, since the number of digital signal data items output from one row is reduced compared to when analog signals are not added, the time required for data processing per row in the signal output unit 5 and the signal processing unit 2000 is reduced. This allows the period during which operation can be stopped (the period from time t8 to time t12 in FIG. 5 ) to be extended within one horizontal period, further reducing power consumption.

[0090] Furthermore, according to this embodiment, by turning off the connection control signal vswitch input to the column connection switching unit 9A in FIG. 3, analog output signals from all pixel units can be input to the A / D conversion circuit 41 of each column without analog summation. In this case, the A / D conversion circuits 41 of all columns can be driven without operating the sleep control unit 46, and data from all columns can be sequentially selected and read out using the horizontal transfer control signal hadr. The signal processing unit 2000 can perform focus detection using the focus detection unit 6 and horizontal summation of two pixels of the same color using the summation unit 71 at the same time. In other words, by switching the connection control signal vswitch from High to Low, the number of pixels ultimately horizontally summed in the digital signal can be switched from four to two. In other words, turning off the connection control signal vswitch can acquire a higher-resolution image. As described above, according to this embodiment, it is possible to provide a photoelectric conversion device that is capable of both generating an image with desired characteristics and performing focus detection at high speed.

[0091] [Embodiment 2] In the image pickup device according to the first embodiment, it is possible to select whether or not to add analog output signals from two pixel units of the same color arranged in the horizontal direction in the photoelectric conversion device, and the signal processing unit 2000 performs horizontal addition using digital output signals. Therefore, in image generation performed simultaneously with focus detection, it is possible to switch between horizontal addition of four pixels of the same color and horizontal addition of two pixels of the same color. The embodiments of the present invention are not limited to this example, and may be configured to switch between horizontal addition of three pixels of the same color and horizontal addition of two pixels of the same color, as in the second embodiment described below, for example.

[0092] Regarding embodiment 2, the description of matters common to embodiment 1 will be simplified or omitted. The overall configuration of the imaging device and the configuration of the pixel unit are the same as those of embodiment 1 described with reference to Figures 1, 2(a), and 2(b).

[0093] 7 is a partial circuit diagram illustrating a portion of the pixel unit 1, the column connection switching unit 9A, and the column A / D conversion unit 4A included in the photoelectric conversion device 1000 according to embodiment 2. Note that in the right-hand portions (not shown) of the column connection switching unit 9A and the column A / D conversion unit 4A, the same circuit configuration as that shown in FIG.

[0094] The analog signals output from the pixel units 100 in the even-numbered columns of the pixel section 1 are handled by the column connection switching section 9B and the column A / D conversion section 4B shown in the upper part of Figure 1, and are assumed to be handled in the same manner as the column connection switching section 9A and the column A / D conversion section 4A described below.

[0095] Fig. 7 shows an extracted portion of the pixel section 1 in which pixel units 100 are arranged in two pixels in the vertical direction (column direction) and 16 pixels in the horizontal direction (row direction). Moreover, when a portion of the pixel section in Fig. 7 is enlarged, it becomes similar to Fig. 4 referred to in the description of embodiment 1. Fig. 4 shows an extracted portion of the pixel section 1 in which pixel units 100 are arranged in two pixels in the vertical direction (column direction) and 7 pixels in the horizontal direction (row direction).

[0096] As shown in Fig. 1, the vertical output lines connecting pixel units 100 in odd-numbered columns are connected to column connection switching unit 9A, and the vertical output lines connecting pixel units 100 in even-numbered columns are connected to column connection switching unit 9B. In Figs. 7 and 4, the vertical output lines 108 are shown extending downward, and the vertical output line connecting pixel units in the first column, for example, is denoted as vertical output line 108(1). Similarly, the vertical output lines connecting pixel units in the third, fifth, and seventh columns are denoted as vertical output line 108(2), vertical output line 108(3), and vertical output line 108(4), respectively.

[0097] 7 and 4, the transfer control signals tx1 and tx2 supplied to the pixel units 100 in the first row are shown as transfer control signals tx1[0] and transfer control signals tx2[0]. The transfer control signals tx1 and tx2 supplied to the pixel units 100 in the second row are shown as transfer control signals tx1[1] and transfer control signals tx2[1].

[0098] The relationship between the photoelectric conversion units PDL and PDR arranged in each pixel unit 100 and the transfer control signals supplied to the transfer transistors connected to the photoelectric conversion units is as described with reference to Figure 4 in embodiment 1.

[0099] (Column connection switching unit) 7 has a function of switching the connection relationship between the vertical output lines 108 connected to pixel units in odd-numbered columns and the A / D conversion circuits of the column A / D conversion unit 4A. The column A / D conversion unit 4A has column A / D(0) to column A / D(7) as A / D conversion circuits 41 corresponding to each column.

[0100] 7, the column connection switching unit 9A includes switches 901 to 904 for switching the connection of the output destination of the vertical output line 108, and capacitors 907 to 908 for holding signals read out from the vertical output line 108. The column connection switching unit 9A includes capacitors 907 and 908 connected in parallel for each column of pixel units, which are connected to the input terminals of columns A / D(0) to A / D(7). In this embodiment, the connection relationship between the switches 901 to 904 and the capacitors 907 to 908 differs from that of the column connection switching unit of embodiment 1 shown in FIG.

[0101] A connection control signal vswitch is input to the column connection switching unit 9A shown in FIG. 7 from the timing generation unit 3 (FIG. 1), and the opening and closing of switches 901 to 904 is controlled by the connection control signal vswitch. FIG. 7 shows a case where the connection control signal vswitch is on (High), in which case only switch 902 is on, and switches 901, 903, and 904 are off. When the connection control signal vswitch is off (Low), the opening and closing of each switch is reversed. Such a switch configuration can be realized, for example, by using an N-type MOS transistor for switch 902 and P-type MOS transistors for switches 901, 903, and 904. Furthermore, if the polarities of switches 901 to 904 are all the same, an inverter that outputs an inverted signal of the connection control signal vswitch can be provided at the input nodes of each of switches 901, 903, and 904.

[0102] In each column of the column connection switching unit 9A, a capacitor 907 and a capacitor 908 are arranged in parallel. For example, in the leftmost column, the capacitor 907 is connected to the vertical output line 108(1), and a switch 901 is arranged between the capacitor 908 and the vertical output line 108(1). In addition, a switch 902 is arranged between the capacitor 908 in the leftmost column and the vertical output line 108(3). The switches 901 and 902 perform exclusive opening and closing operations in response to the connection control signal vswitch. Therefore, when the connection control signal vswitch is turned on, the capacitor 908 in the leftmost column is connected to the vertical output line 108(3), and when the connection control signal vswitch is turned off, the vertical output line 108(1) is connected. That is, in the leftmost column, when the connection control signal vswitch is turned on, the capacitor 907 is connected to the vertical output line 108(1), and the capacitor 908 is connected to the vertical output line 108(3). When the connection control signal vswitch is turned off, both the capacitor 907 and the capacitor 908 are connected to the vertical output line 108(1).

[0103] In addition, in the second column from the left of the column connection switching unit 9A, the capacitors 907 and 908 are directly connected to the vertical output line 108(2). Therefore, regardless of whether the connection control signal vswitch is on or off, an analog voltage signal is input from the vertical output line 108(2) to A / D(1) of the column A / D conversion unit 4A.

[0104] In addition, in the third column from the left of the column connection switching unit 9A, a switch 903 is arranged between the capacitor 907 and the vertical output line 108(3), and a switch 904 is arranged between the capacitor 908 and the vertical output line 108(3). When the connection control signal vswitch is turned on, the switches 903 and 904 are turned off as shown in FIG. 7, so that an analog voltage signal is not input to the capacitors 907 and 908 from the vertical output line (3). When the connection control signal vswitch is turned off, the switch 902 is turned off and the switches 903 and 904 are turned on, so that an analog voltage signal is input to the capacitors 907 and 908 from the vertical output line (3). Note that the above-described triplet of columns is repeatedly arranged to the right of the fourth column from the left of the column connection switching unit 9A.

[0105] For example, consider a case where, in the pixel unit group on the first row, a signal transferred from the photoelectric conversion unit 101 (FIG. 2(a)) to the floating diffusion FD by the transfer control signal tx1[0] is read out from the vertical output line 108. As in the example shown in FIG. 7, it is assumed that the connection control signal vswitch is on.

[0106] In the pixel unit R(1,1) connected to the vertical output line 108(1) and the pixel unit R(1,5) connected to the vertical output line 108(3), the signal transferred from the left photoelectric conversion unit PDL is read out in response to the transfer control signal tx1[0] ( FIG. 4 ). Therefore, the capacitor 907 in the leftmost column holds the output signal based on the left photoelectric conversion unit PDL of the pixel unit R(1,1), and the capacitor 908 holds the output signal based on the left photoelectric conversion unit PDL of the pixel unit R(1,5).

[0107] In this way, in the leftmost column of the column connection switching unit 9A, analog signal voltages reflecting the signals from the left photoelectric conversion units PDL of two pixel units of the same color are added together by capacitive coupling and input to A / D(0) of the column A / D conversion unit 4A. Note that the voltage output by the parallel-connected capacitive coupling is, to be precise, not the sum of the output signals of the two pixel units but the average value.

[0108] At this time, in the pixel unit R(1,3) connected to the vertical output line 108(2), an analog signal based on the signal charge transferred from the right-side photoelectric conversion unit PDR is read out in response to the transfer control signal tx1[0] ( FIG. 4 ). Therefore, the output signal based on the right-side photoelectric conversion unit PDR of the pixel unit R(1,3) is held in the capacitors 907 and 908 in the second column from the left of the column connection switching unit 9A.

[0109] In this way, in the second column from the left of the column connection switching unit 9A, an analog signal voltage reflecting the signal of the photoelectric conversion unit PDR on the right side of one pixel unit is input to A / D(1) of the column A / D conversion unit 4A. Note that this one pixel unit has the same color as the two pixel units handled in the first column from the left.

[0110] At this time, in the third column from the left of the column connection switching unit 9A, when the connection control signal vswitch is turned on, the switches 903 and 904 are turned off, and therefore the capacitors 907 and 908 are not connected to any vertical output line. Therefore, the analog signal read out from the pixel unit is not input to A / D(2) of the column A / D conversion unit 4A.

[0111] In this way, when the connection control signal vswitch is on, in the first column from the left of the column connection switching unit 9A, the vertical output lines of pixel units that have color filters of the same color and that read out signals transferred from photoelectric conversion units arranged on the same side within the pixel unit are connected together via the switch 902. In other words, the analog signal voltages output from pixel units that have color filters of the same color and that read out signals transferred from photoelectric conversion units using the same transfer control signal tx are added together by capacitive coupling and input to the A / D conversion circuit.

[0112] Furthermore, when the connection control signal vswitch is on, in the third column from the left of the column connection switching unit 9A, the capacitors 907 and 908 are not connected to the vertical output line, and the analog signal read out from the pixel unit is not input to the A / D conversion circuit of that column.

[0113] On the other hand, when the connection control signal vswitch is off, for all columns of the column connection switching unit 9A, output signals are transmitted from the vertical output lines corresponding to the columns to the capacitors 907 and 908 of the columns. In other words, output signals of pixel units in different columns are not added together, and the analog signal voltage is input for each column of pixel units to the A / D conversion circuit arranged corresponding to the column.

[0114] (A / D conversion section) As in the first embodiment, in this embodiment too, the A / D conversion unit 4A is provided with A / D(0), A / D(1), A / D(2), etc. as A / D conversion circuits that convert analog signals into digital signals, corresponding to each column of the column connection switching unit 9A.

[0115] In the first embodiment, the A / D conversion circuits to which the output signal of the pixel unit is not input when the connection control signal vswitch is on are, for example, A / D(2) and A / D(3). However, in the present embodiment, this corresponds to A / D(2). Therefore, in the present embodiment, a sleep control unit 46 is provided in A / D(2), which is the A / D conversion circuit in the third column from the left. Note that, due to the repetitive structure, a sleep control unit 46 is also provided in the A / D conversion circuits in columns that are multiples of three. When the connection control signal vswitch is on (i.e., the stop control signal Sleep is on), the operation of the A / D conversion circuits (e.g., A / D(2) and A / D(5)) to which the output signal of the pixel unit is not input is stopped to reduce power consumption. If an amplifier (column amplifier) ​​for amplifying an analog signal is provided in the preceding stage of the A / D conversion circuit, power supply to the column amplifier may be stopped when the stop control signal Sleep is on to reduce power consumption.

[0116] On the other hand, when the connection control signal vswitch is off (i.e., the stop control signal Sleep is off), the output signals of the pixel units of each column are input to the A / D conversion circuits of the corresponding column, causing all A / D conversion circuits to operate.

[0117] As in the first embodiment, the A / D conversion unit 4A includes a horizontal transfer line 43, a horizontal transfer line 44, and a switch 42 for sequentially transferring the digital signals output by the A / D conversion circuit.

[0118] (Signal output procedure) Fig. 8 is a timing chart for explaining the signal output procedure in the imaging method according to embodiment 2. As with Fig. 7, Fig. 8 illustrates the procedure when the connection control signal vswitch is turned on, analog signals read out from photoelectric conversion units of the same color are added by the column connection switching unit 9A, and digitized and read out by the column A / D conversion unit 4A. Note that in Fig. 7, among the photoelectric conversion units possessed by each pixel unit, photoelectric conversion units that are not read out in the operation of the timing chart shown in Fig. 8 are indicated by hatching.

[0119] First, at time t1, the vertical synchronization signal VD goes low, and acquisition of one frame image begins. At time t2, the horizontal synchronization signal HD is input, and a readout operation for one horizontal scanning period (in this case, the readout operation for the first row) begins. The reset transistor 105 of the pixel unit in the first row is turned off because the reset control signal res[0] is low, and the selection transistor 107 of the pixel unit in the first row is turned on because the selection control signal sel[0] is high.

[0120] Next, during the period from time t3 to time t4, tx1[0] goes High, but tx2[0] remains Low. [0] represents the row address of the first row, and the same transfer control signal is supplied to all pixel units in the first row.

[0121] As explained for the column connection switching unit 9A, when the connection control signal vswitch is on, the sum of the analog signals from pixel units R(1,1) and R(1,5) to which signal charges have been transferred from the photoelectric conversion unit PDL arranged on the left side is input to A / D(0). Also, the sum of the analog signals from pixel unit R(1,3) to which signal charges have been transferred from the photoelectric conversion unit PDR arranged on the right side is input to the adjacent A / D(1).

[0122] Furthermore, when the connection control signal vswitch is on, the stop control signal sleep is also on, so that the operation of the A / D(2) is stopped by the sleep control unit 46, thereby reducing power consumption.

[0123] Next, at time t5, the A / D conversion result is finalized in the operating A / D conversion circuit, the digital signal is held, and the digital signal is output to the digital signal line. That is, a digital signal d00 is output from A / D(0) to ado(0), and a digital signal d01 is output from A / D(1) to ado(1). Meanwhile, no digital signal is output from A / D(2), which is stopped, to ado(2).

[0124] Next, at time t6, the switches 42 of each column are appropriately driven by the horizontal transfer control signal hadr, and horizontal transfer is performed. First, in the first transfer period, hadr(0) and hadr(1) are turned on simultaneously, and in the next transfer period, hadr(2) is skipped and hadr(3) and hadr(4) are turned on simultaneously. Thereafter, horizontal transfer is performed sequentially for the first row.

[0125] 7, in this embodiment, the A / D conversion circuits that output a digital signal obtained by adding together two pixel units when the connection control signal vswitch is on are arranged every three columns, such as A / D(0), A / D(3), and A / D(6). Therefore, the digital signal obtained by adding together two pixel units is output from A / D(0) to horizontal transfer line 43, from A / D(3) to horizontal transfer line 44, and from A / D(6) to horizontal transfer line 43.

[0126] In this way, horizontal transfer line 43 and horizontal transfer line 44 read out a digital signal obtained by adding together the outputs based on the photoelectric conversion units on the left sides of two pixels of the same color, or a digital signal corresponding to the output based on the photoelectric conversion units on the right sides of pixels of the same color.

[0127] Next, at time t7, the next horizontal synchronization signal HD is input, and the readout operation for the next horizontal scanning period (second row) begins. In the pixel units in the first row where readout has been completed, the selection control signal sel[0] goes low, turning off the selection transistor 107. Also, the reset control signal res[0] goes high, turning on the reset transistor 105, connecting the floating diffusion FD to the power supply and resetting the potential. At the same time, the reset transistor 105 in the pixel units in the second row is turned off because the reset control signal res[0] goes low, and the selection transistor 107 in the pixel units in the second row is turned on because the selection control signal sel[0] goes high. Thereafter, the same readout operation from time t2 for the first row is performed for the second row.

[0128] At time t7, it is not necessary that the readout of the first row from time t6 to the horizontal transfer lines 43 and 44 is completed. Because the A / D conversion circuit corresponding to each column holds the A / D conversion result of the previous row, while analog signals are being read out from the pixel units of the next row, the A / D conversion result (digital signal) of the previous row can be horizontally transferred in parallel.

[0129] At time t8, the readout of the digital signals for the first row, which began at time t6, to the horizontal transfer lines 43 and 44 is completed. During the period from time t8, when the horizontal transfer of the digital signals for the first row is completed, to time t12, when the horizontal transfer of the digital signals for the second row starts, the horizontal transfer control signal hadr and the switch 42 may be inactive. Note that the order of time t7, when the readout of the analog signals from the pixel units for the second row starts, and time t8, when the readout of the digital signals for the first row is completed, may be reversed from the example shown in FIG.

[0130] Next, from time t9 to time t10, tx1[1] goes high, but tx2[1] remains low. [1] represents the row address of the second row, and the same signal is supplied to all pixel units in the second row. In other words, this indicates that the vertical scanning unit 2 (Figure 1) has advanced one row in vertical scanning.

[0131] At time t11, just like time t5 in the readout of the first row, the A / D conversion result is finalized in the operating A / D conversion circuit, the digital signal is held, and the digital signal is output to the digital signal line. That is, a digital signal d10 is output from A / D(0) to ado(0), and a digital signal d11 is output from A / D(1) to ado(1). Meanwhile, no digital signal is output from A / D(2), which is stopped, to ado(2). At time t12, similarly to time t6 in the readout of the first row, the switches 42 of each column are appropriately driven by the horizontal transfer control signal hadr, and horizontal transfer is performed.

[0132] In this way, row-by-row reading is repeated while scanning rows in the vertical direction each time a horizontal synchronization signal HD is input, until the readout operation for all pixels (one frame) is completed.

[0133] 1 are input to and processed by the signal processing unit 2000. In the photoelectric conversion device 1000, digital signals corresponding to the pixel units 100 in odd-numbered columns are sequentially output from the column A / D conversion unit 4A, and digital signals corresponding to the pixel units 100 in even-numbered columns are sequentially output from the column A / D conversion unit 4B. The order of these digital signals is adjusted by the signal output unit 5, and they are sequentially input to the signal processing unit 2000 as digital image data for one screen.

[0134] (Signal processing unit) This embodiment can also use a signal processing unit 2000 having a configuration similar to that shown in FIG. 6 referred to in the description of embodiment 1. Digital signals input from chA and chB via the signal output unit 5 are input to both the focus detection unit 6 and the image generation unit 7. In embodiment 2, the adder 71 of the image generation unit 7 performs horizontal addition of three pixels of the same color when the connection control signal vswitch input to the column connection switching unit 9A is on, and performs horizontal addition of two pixels of the same color when the connection control signal vswitch is off.

[0135] The adder 71 adds the digital signals input from chA and chB. As shown in FIG. 8, for example, at the first readout timing of the first row, chA inputs a digital signal d00 corresponding to the analog sum value of the two photoelectric conversion units PDL arranged on the left side of the pixel units 100 in the first and fifth columns from the left. Also, chB inputs a digital signal d01 corresponding to the analog signal value of the photoelectric conversion unit PDR arranged on the right side of the pixel unit 100 in the third column from the left. As is clear from the pixel array (Bayer array) in FIG. 4, the digital signals d00 and d01 are all based on signals read from pixel units of the same color. Therefore, the adder 71 adds the digital signals of three adjacent pixels of the same color arranged in the same row. In other words, the adder 71 performs horizontal addition of three pixels of the same color.

[0136] The digital signal added by the adder 71 is subjected to appropriate image processing by an image processor 72, and is output as a digital image signal of one frame to a recording unit (not shown) or a display unit (not shown) of the imaging device. The image processor 72 can perform, for example, noise removal processing, filtering processing, RGB processing, etc., but may also perform other correction processing, etc.

[0137] As described above, according to this embodiment, it is possible to perform both image data generation by adding three pixels of the same color and focus detection using one frame of output signals read out from the photoelectric conversion device, thereby improving the image quality of moving images when shooting moving images while measuring the distance.

[0138] Furthermore, according to this embodiment, when analog signals are added, the driving of the A / D conversion circuits or column amplifiers of unused columns is stopped, thereby reducing power consumption. Furthermore, since the number of digital data items output from one row is reduced compared to when analog signals are not added, the time required for data processing per row in the signal output unit 5 and the signal processing unit 2000 is reduced. This allows the period during which operation can be stopped (the period from time t8 to time t12 in FIG. 8 ) to be extended within one horizontal period, further reducing power consumption.

[0139] Furthermore, according to this embodiment, by turning off the connection control signal vswitch input to the column connection switching unit 9A in FIG. 7, analog output signals from all pixel units can be output to the A / D conversion circuit 41 of each column without analog summation. In this case, the A / D conversion circuits 41 of all columns can be driven without operating the sleep control unit 46, and data from all columns can be sequentially selected and read out using the horizontal transfer control signal hadr. The signal processing unit 2000 can perform focus detection using the focus detection unit 6 and horizontal summation of two pixels of the same color using the summation unit 71 at the same time. In other words, by switching the connection control signal vswitch from High to Low, the number of pixels ultimately horizontally summed in the digital signal can be switched from three to two. In other words, turning off the connection control signal vswitch can acquire a higher-resolution image. As described above, according to this embodiment, it is possible to provide a photoelectric conversion device that is capable of both generating an image with desired characteristics and performing focus detection at high speed.

[0140] [Embodiment 3] In the first embodiment, in order to generate an image, a digital signal based on the signal charges transferred from the photoelectric conversion unit PDL of the pixel unit and a digital signal based on the signal charges transferred from the photoelectric conversion unit PDR are digitally added in the image generation unit 7 of the signal processing unit 2000.

[0141] In the third embodiment described below, both the signal charges of the photoelectric conversion unit PDL and the signal charges of the photoelectric conversion unit PDR in the pixel unit can be transferred to the floating diffusion FD, and analog addition can be performed in the floating diffusion FD. In the description of the third embodiment, the description of matters common to the first embodiment will be simplified or omitted. The overall configuration of the imaging device and the configuration of the pixel unit are the same as those of the first embodiment described with reference to FIGS. 1, 2(a), and 2(b). The configuration of the photoelectric conversion device 1000 is also the same as that of the first embodiment described with reference to FIGS. 3 and 4. In the first embodiment, the signal output procedure described with reference to FIG. 5 was used, but the third embodiment executes a signal output procedure different from that of the first embodiment.

[0142] Fig. 9 is a timing chart for explaining a signal output procedure in an imaging method according to embodiment 3. The operation up to time t4 in Fig. 9 is the same as that in Fig. 5 referred to in the explanation of embodiment 1, and therefore will not be explained again.

[0143] In the operation from time t3 to time t4, only one of tx1 (the transfer control signal on the first control line) and tx2 (the transfer control signal on the second control line) is turned on, which can be conveniently called the first mode. On the other hand, in the operation from time t40 to time t41, which will be described later, tx1 (the transfer control signal on the first control line) and tx2 (the transfer control signal on the second control line) are turned on simultaneously, which can be conveniently called the second mode.

[0144] For example, analog signals based on signal charges transferred from the photoelectric conversion units PDL of pixel units R(1,1) and R(1,5) in response to the transfer control signal tx1[0] are A / D converted by the A / D conversion circuit 41 at time t5. The digital signals output to ado(0) and ado(4) as digital signal lines are designated Da00 and Da04. Furthermore, analog signals based on signal charges transferred from the photoelectric conversion units PDR of pixel units R(1,3) and R(1,7) in response to the transfer control signal tx1[0] are A / D converted by the A / D conversion circuit 41 at time t5. The digital signals output to ado(1) and ado(5) as digital signal lines are designated Db01 and Db05.

[0145] Next, at time t6, horizontal scanning is performed by the horizontal transfer control signal hadr, and Da00, Da04, ... are output sequentially to the horizontal transfer line 43 (chA), and Db01, Db05, ... are output sequentially to the horizontal transfer line 44 (chB).

[0146] At time t7, when the next horizontal synchronization signal HD is input, in the first embodiment (FIG. 5), the process moves to the next row and starts read control of the second row, but in this embodiment, the process does not move to the second row, and readout is performed from the first row using a different readout method.

[0147] At time t8, the reading of the first A / D conversion result, which began at time t6, onto horizontal transfer line 43 and horizontal transfer line 44 is completed, and the read digital data is held in signal processing unit 2000 via chA and chB.

[0148] Next, during the period from time t40 to time t41, tx1[0] and tx2[0] go High simultaneously. As a result, in each pixel unit on the first row, the transfer transistors 103 and 104 shown in FIG. 2 are simultaneously turned on, and the signal charges of the photoelectric conversion units 101 and 102 are transferred to the floating diffusion FD and added. The result of this addition is output to the vertical signal line as an analog signal, and at the next time t42, is A / D converted by the A / D conversion circuit 41. The digital signals output to the digital signal lines ado(0) to ado(5) are designated Dab00 to Dab05.

[0149] Next, from time t43, horizontal scanning is performed by the horizontal transfer control signal hadr, and Dab00, Dab02, . . . are output in sequence to chA, and Dab01, Dab03, . . . are output in sequence to chB.

[0150] As described above, the signal processing unit 2000 holds the digital data read out via chA and chB during the previous horizontal scanning period, and performs the following arithmetic processing on the digital data read out from time t43. That is, the digital signal starting with Da00 read out on chA during the previous horizontal scanning period is subtracted from the digital signal starting with Dab00 read out on chA sequentially from time t43. Also, the digital signal starting with Db01 read out on chB during the previous horizontal scanning period is subtracted from the digital signal starting with Dab01 read out on chB sequentially from time t43.

[0151] That is, in the signal processing unit 2000, arithmetic processing of Dab00-Da00, Dab02-Da04, ... is performed sequentially in response to the digital signal that has passed through chA. Similarly, arithmetic processing of Dab01-Db01, Dab03-Db05, ... is performed sequentially in response to the digital signal that has passed through chB.

[0152] For example, Dab00 is a value obtained by analog-adding the signal charges of the photoelectric conversion units PDL and PDR in the floating diffusion FD of the pixel unit, and then analog-adding and A / D-converting the two pixel units in the column connection switching unit 9A. Also, Da00 is a value obtained by analog-adding and A / D-converting analog signals corresponding to the photoelectric conversion units PDL of two pixel units in the column connection switching unit 9A. Therefore, by performing a calculation process of Dab00-Da00, a digital signal corresponding to the sum of the output signals of the photoelectric conversion units PDR of two pixel units can be obtained.

[0153] Furthermore, Dab01 is a value obtained by analog-adding the signal charges of the photoelectric conversion units PDL and PDR in the floating diffusion FD of the pixel unit, and then analog-adding and A / D-converting the two pixel units in the column connection switching unit 9A. Furthermore, Db01 is a value obtained by analog-adding and A / D-converting the analog signals corresponding to the photoelectric conversion units PDR of two pixel units in the column connection switching unit 9A. Therefore, by performing arithmetic processing on Dab01-Db01, a digital signal corresponding to the sum of the output signals of the photoelectric conversion units PDL of two pixel units can be obtained.

[0154] Therefore, the signal processing unit 2000 can acquire digital signals corresponding to the sum of the photoelectric conversion units PDL, the sum of the photoelectric conversion units PDR, and the sum of both the photoelectric conversion unit PDL and the photoelectric conversion unit PDR for two horizontal pixels of the same color.

[0155] In this way, by performing arithmetic processing using the digital signals of chA and chB input sequentially during two periods of the horizontal synchronization signal HD, a digital signal obtained by adding two pixels of the same color in the horizontal direction (row direction) is acquired for each of the photoelectric conversion units PDL and PDR. Using these, the focus detection unit 6 in the signal processing unit 2000 can detect the peak of each parallax image obtained by adding two pixels horizontally, thereby enabling phase difference detection.

[0156] Furthermore, from time t43, a digital signal corresponding to the signal that was analog-added in the floating diffusion FD is input to the adder 71 of the image generator 7 via chA and chB, and digitally added. That is, first, the calculation of Dab00+Dab01 is performed, and then the calculation of Dab02+Dab03 is performed.

[0157] Dab00 is a digital signal obtained by analog-adding the signal charges of the PDL and PDR in the pixel units in the first and third columns of four adjacent pixel units of the same color arranged in the same row in the floating diffusion FD, reading them out on the vertical output line, and then analog-adding them by capacitive coupling in the column connection switching unit 9A and converting them into a digital signal.

[0158] Dab01 is a digital signal obtained by analog-adding the PDL and PDR signal charges in the pixel units in the second and fourth columns of four adjacent pixel units of the same color arranged in the same row in the floating diffusion FD, reading them out on the vertical output line, and then analog-adding them by capacitive coupling in the column connection switching unit 9A and A / D converting them. Therefore, the digital addition of Dab00+Dab01 obtains the addition result of four horizontal pixels of the same color.

[0159] At the next time t44, the same operation as from time t2 is repeated, but this time the vertical row scanning advances by one row. That is, the reset control signal res[0] for the first row is High and the selection control signal sel[0] is Low, and the reset control signal res[1] for the second row is Low and the selection control signal sel[1] is High. From then on, the same procedure as for the first row is repeated, so the explanation from time t45 onwards is omitted.

[0160] Note that the stop control signal sleep is set to High, and unused A / D conversion circuits 41 are stopped, thereby reducing power consumption. If a column amplifier that amplifies an analog signal is arranged in the preceding stage of the A / D conversion circuit, when the stop control signal Sleep is on, power supply to the column amplifier can be stopped to reduce power consumption.

[0161] In this embodiment, the connection state of the column connection switching unit 9A is the same in the first and second readout operations of the horizontal synchronization signal HD. Therefore, when performing correlated double sampling, it is sufficient to read out the reset level of the floating diffusion FD only in the first readout operation of the horizontal synchronization signal HD.

[0162] As described above, according to this embodiment, it is possible to perform both image data generation by adding four pixels of the same color and focus detection using the same frame output signal read out from the photoelectric conversion device, thereby improving the image quality of moving images when capturing moving images while measuring the distance.

[0163] Furthermore, according to this embodiment, when analog signals are added using both the floating diffusion FD and the column connection switching unit 9A, power consumption can be reduced by stopping the driving of the A / D conversion circuit or column amplifier of an unused column. Furthermore, since the number of digital data items output from one row is reduced compared to when analog signals are not added, the time required for data processing per row in the signal output unit 5 and the signal processing unit 2000 is reduced. This allows the period during which operation can be stopped (the period from time t8 to time t42 in FIG. 9 ) to be extended within one horizontal period, further reducing power consumption.

[0164] Furthermore, according to this embodiment, by turning off the connection control signal vswitch input to the column connection switching unit 9A in FIG. 3, analog output signals from all pixel units can be output to the A / D conversion circuit 41 of each column without analog summation by the column connection switching unit 9A. In this case, the A / D conversion circuits 41 of all columns can be driven without operating the sleep control unit 46, and data from all columns can be sequentially selected and read out using the horizontal transfer control signal hadr. The signal processing unit 2000 can perform horizontal summation of two pixels of the same color in the summation unit 71 while performing focus detection using the focus detection unit 6. In other words, by switching the connection control signal vswitch from High to Low, the number of pixels ultimately horizontally summed in the digital signal can be switched from four to two. In other words, turning off the connection control signal vswitch can acquire a higher-resolution image. As described above, this embodiment provides a photoelectric conversion device capable of both generating an image with desired characteristics and performing focus detection at high speed.

[0165] [Embodiment 4] As a fourth embodiment, a device including an imaging device (semiconductor device) according to any of the above-described embodiments will be described. Fig. 10(a) is a schematic diagram for explaining a device 9191 including an imaging device 930 (semiconductor device) according to the above-described embodiment. The device 9191 including the imaging device 930 will be described in detail.

[0166] The imaging device 930 includes a semiconductor device 910 that integrates a first chip as the photoelectric conversion device 1000 and a second chip as a signal processing unit 2000 that includes at least one of a memory circuit or a logic circuit. The imaging device 930 can also include a package 920 that houses the semiconductor device 910, in addition to the semiconductor device 910. The package 920 can include a base to which the semiconductor device 910 is fixed, and a lid such as glass that faces the semiconductor device 910. The package 920 can further include bonding members such as bonding wires or bumps that connect terminals provided on the base to terminals provided on the semiconductor device 910.

[0167] The device 9191 can include at least one of an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. The optical device 940 is, for example, a lens, a shutter, or a mirror provided in correspondence with the imaging device 930. The control device 950 controls the imaging device 930. The control device 950 is, for example, a semiconductor device such as an ASIC.

[0168] The processing device 960 processes the signal output from the imaging device 930. The processing device 960 is a semiconductor device such as a CPU or ASIC for configuring a DFE (digital front end). The display device 970 is an EL display device or a liquid crystal display device that displays information (images) obtained by the imaging device 930. The storage device 980 is a magnetic device or a semiconductor device that stores information (images) obtained by the imaging device 930. The storage device 980 is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive.

[0169] The mechanical device 990 has a moving part or a propulsion part such as a motor or an engine. In the device 9191, the signal output from the imaging device 930 is displayed on the display device 970, or transmitted to the outside by a communication device (not shown) provided in the device 9191. For this purpose, the device 9191 preferably further includes a storage device 980 and a processing device 960 in addition to the memory circuit and arithmetic circuit provided in the imaging device 930. The mechanical device 990 may be controlled based on the signal output from the imaging device 930.

[0170] The device 9191 is also suitable for electronic devices such as information terminals with a photographing function (for example, smartphones and wearable devices) and cameras (for example, interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). The mechanical device 990 in the camera can drive components of the optical device 940 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 990 in the camera can move the imaging device 930 for vibration isolation operations.

[0171] The device 9191 may also be transportation equipment such as a vehicle, a ship, or an aircraft. The mechanical device 990 in the transportation equipment may be used as a moving device. The device 9191 as transportation equipment is suitable for transporting the imaging device 930 or for assisting and / or automating driving (piloting) using an imaging function. The processing device 960 for assisting and / or automating driving (piloting) can perform processing for operating the mechanical device 990 as a moving device based on information obtained by the imaging device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring device such as a distance measuring sensor, an analytical device such as an electron microscope, an office machine such as a copier, or an industrial device such as a robot. According to the above-described embodiment, heat is efficiently dissipated from the image sensor chip, making it possible to stably acquire images with good characteristics.

[0172] Therefore, using the imaging device 930 according to this embodiment in the equipment 9191 can also improve the value of the equipment. For example, by installing the imaging device 930 in transportation equipment, excellent performance can be obtained when photographing the exterior of the transportation equipment and measuring the external environment. Therefore, when manufacturing and selling transportation equipment, deciding to install the semiconductor device according to this embodiment in the transportation equipment is advantageous in improving the performance of the transportation equipment itself. In particular, the imaging device 930 is suitable for transportation equipment that performs driving assistance and / or automatic driving using information obtained by the semiconductor device. Note that the application to vehicles, ships, aircraft, etc. is not limited to equipment used for transportation purposes, and can also be suitable for drones and the like that perform aerial photography for various purposes, including inspecting buildings and agricultural facilities and monitoring natural phenomena.

[0173] The photoelectric conversion system and moving object of this embodiment will be described with reference to FIGS. 10(b) and 10(c). FIG. 10(b) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 8 includes a photoelectric conversion device 80. The photoelectric conversion device 80 is the photoelectric conversion device 1000, which serves as an electronic component included in the imaging device described in the above embodiment. The photoelectric conversion system 8 includes an image processing unit 801 (image generating unit 7) that performs image processing on multiple pieces of image data acquired by the photoelectric conversion device 1000, and a parallax acquisition unit 802 (phase difference detection unit 62) that calculates parallax (phase difference between parallax images) from the multiple pieces of image data acquired by the photoelectric conversion system 8. The photoelectric conversion system 8 also includes a distance acquisition unit 803 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 804 that determines whether or not there is a possibility of a collision based on the calculated distance. Here, the parallax acquisition unit 802 and the distance acquisition unit 803 are examples of distance information acquisition means for acquiring distance information to an object. That is, the distance information is information related to the parallax, the defocus amount, the distance to the object, etc. The collision determination unit 804 may determine the possibility of a collision using any of this distance information. The distance information acquisition means may be realized by dedicated hardware or a software module. It may also be realized by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), etc.

[0174] The photoelectric conversion system 8 is connected to a vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 8 is also connected to a control ECU 820, which is a control device that outputs a control signal to generate a braking force for the vehicle based on the determination result of the collision determination unit 804. The photoelectric conversion system 8 is also connected to an alarm device 830 that issues an alarm to the driver based on the determination result of the collision determination unit 804. For example, if the determination result of the collision determination unit 804 indicates a high possibility of a collision, the control ECU 820 performs vehicle control to avoid the collision and mitigate damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 830 warns the user by sounding an alarm, displaying alarm information on a screen of a car navigation system, etc., or vibrating the seat belt or steering wheel.

[0175] In this embodiment, the photoelectric conversion system 8 captures an image of the surroundings of the vehicle, for example, the front or rear. Fig. 10(c) shows the photoelectric conversion system when capturing an image of the area in front of the vehicle (imaging range 850). A vehicle information acquisition device 810 sends instructions to the photoelectric conversion system 8 or the photoelectric conversion device 80. This configuration can further improve the accuracy of distance measurement.

[0176] Although the above describes an example of control to prevent collision with other vehicles, the present invention can also be applied to control of automatic driving by following other vehicles, and control of automatic driving to prevent deviation from a lane. Furthermore, the photoelectric conversion system is not limited to vehicles such as the subject vehicle, but can be applied to moving bodies (moving devices) such as ships, aircraft, and industrial robots. In addition, the present invention can be applied not only to moving bodies but also to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).

[0177] According to the photoelectric conversion device of the above-described embodiment, when capturing a moving image by performing horizontal pixel addition, it is possible to perform both image data generation by adding four pixels of the same color and focus detection using the output signal of the same frame read from the photoelectric conversion device, which can improve the responsiveness of control for autonomous driving of a moving object, for example, and contribute to improved safety.

[0178] The device according to the present embodiment may include at least one of an optical device corresponding to the imaging device according to any of the above-described embodiments, a control device for controlling the imaging device, a processing device for processing information obtained from the imaging device, or a display device for displaying information obtained from the imaging device, a storage device for storing information obtained from the imaging device, or a mechanical device that operates based on information obtained from the imaging device.

[0179] [Other embodiments] The present invention is not limited to the above-described embodiments and examples, and many modifications are possible within the technical spirit of the present invention. For example, the above-described different embodiments may be combined in whole or in part.

[0180] In the above-described embodiment, an example has been shown in which vertical scanning is performed while selecting one row at a time, but it is also possible to simultaneously select four rows, for example, the first, third, fifth, and seventh rows, and perform vertical scanning. In this case, the pixel units in the first, third, fifth, and seventh rows are connected to one vertical output line, and analog signals can be added pseudo-over the vertical output line. In this way, four-pixel addition in the vertical and horizontal directions can be achieved.

[0181] Furthermore, the addition in the floating diffusion FD exemplified in the third embodiment can also be applied to the configuration of the second embodiment, which is capable of adding three horizontal pixels.

[0182] The imaging devices described in the embodiments are not limited to being used exclusively for imaging, but may also be used as distance measuring devices (devices for measuring distance using focus detection or TOF (Time Of Flight)), photometry devices (devices for measuring the amount of incident light, etc.), etc.

[0183] The photoelectric conversion device to which the present invention can be applied is not limited to a specific form, and may be, for example, a front-illuminated sensor or a back-illuminated sensor. It may also be a stacked photoelectric conversion device in which a semiconductor chip having a light receiving unit and a semiconductor chip having an electric circuit such as a logic circuit are stacked.

[0184] The present invention can also be realized by supplying a program that realizes one or more functions of the embodiments to a system or device via a network or a storage medium, and having one or more processors in the computer of the system or device read and execute the program.The present invention can also be realized by a circuit (e.g., ASIC) that realizes one or more functions.

[0185] This specification discloses at least the following: [Matter 1] a pixel section in which a plurality of pixels are arranged along rows and columns, each pixel having a first photoelectric conversion unit, a second photoelectric conversion unit, a first transfer transistor, a second transfer transistor, a floating diffusion, and one microlens shared by the first photoelectric conversion unit and the second photoelectric conversion unit; an output line group including a plurality of output lines transmitting analog signals output from pixels arranged along the column; an A / D conversion unit having a first A / D conversion circuit, a second A / D conversion circuit, and a third A / D conversion circuit; a switching unit that switches to which of the A / D conversion circuits the analog signal transmitted by the output line is input, In each pixel of the pixel unit, the second photoelectric conversion unit is arranged in the same direction as the first photoelectric conversion unit, the first transfer transistor is included in a transfer path of signal charges from the first photoelectric conversion unit to the floating diffusion, and the second transfer transistor is included in a transfer path of signal charges from the second photoelectric conversion unit to the floating diffusion, one row of the pixel unit includes a first pixel, a second pixel, and a third pixel; a first control line is connected to a gate of the first transfer transistor of the first pixel, a gate of the second transfer transistor of the second pixel, and a gate of the first transfer transistor of the third pixel; a second control line is connected to a gate of the second transfer transistor of the first pixel, a gate of the first transfer transistor of the second pixel, and a gate of the second transfer transistor of the third pixel; a first output line included in the output line group is connected to the first pixel; a second output line included in the output line group is connected to the second pixel; a third output line included in the output line group is connected to the third pixel; The switching unit is inputting the analog signal transmitted through the first output line to the first A / D conversion circuit; inputting the analog signal transmitted through the second output line to the second A / D conversion circuit; It is possible to switch whether the analog signal transmitted through the third output line is input to the first A / D conversion circuit or the third A / D conversion circuit together with the analog signal transmitted through the first output line, during a period in which the switching unit inputs the analog signal transmitted through the third output line together with the analog signal transmitted through the first output line to the first A / D conversion circuit, power consumption of the third A / D conversion circuit is smaller than power consumption of the first A / D conversion circuit and power consumption of the second A / D conversion circuit; A photoelectric conversion device characterized by: [Matter 2] the third A / D conversion circuit stops operating during a period in which the switching unit inputs the analog signal transmitted through the third output line together with the analog signal transmitted through the first output line to the first A / D conversion circuit; 2. The photoelectric conversion device according to item 1, [Matter 3] each of the first A / D conversion circuit, the second A / D conversion circuit, and the third A / D conversion circuit includes an amplifier that amplifies an analog signal transmitted by the output line; the switching unit stops supplying power to the amplifier included in the third A / D conversion circuit during a period in which the analog signal transmitted through the third output line is input to the first A / D conversion circuit together with the analog signal transmitted through the first output line. 3. The photoelectric conversion device according to item 1 or 2. [Matter 4] the first pixel, the second pixel, and the third pixel have color filters of the same color; 4. The photoelectric conversion device according to any one of items 1 to 3, characterized in that: [Matter 5] the one row of the pixel unit further includes a fourth pixel; the A / D conversion unit further includes a fourth A / D conversion circuit, the output line group includes a fourth output line that transmits an analog signal output from the fourth pixel, the first control line is connected to the second transfer transistor of the fourth pixel; the second control line is connected to the first transfer transistor of the fourth pixel; The switching unit is It is possible to switch whether the analog signal transmitted through the fourth output line is input to the second A / D conversion circuit or the fourth A / D conversion circuit together with the analog signal transmitted through the second output line, during a period in which the switching unit inputs the analog signal transmitted through the second output line and the analog signal transmitted through the fourth output line to the second A / D conversion circuit, power consumption of the fourth A / D conversion circuit is smaller than power consumption of both the first A / D conversion circuit and the second A / D conversion circuit; 5. The photoelectric conversion device according to any one of items 1 to 4. [Matter 6] stopping the operation of the fourth A / D conversion circuit during a period in which the switching unit inputs the analog signal transmitted through the second output line and the analog signal transmitted through the fourth output line to the second A / D conversion circuit; 6. The photoelectric conversion device according to item 5, [Matter 7] The switching unit is inputting an analog signal transmitted through the fourth output line together with an analog signal transmitted through the second output line to the second A / D conversion circuit during a period in which an analog signal transmitted through the third output line together with an analog signal transmitted through the first output line is being input to the first A / D conversion circuit; 6. The photoelectric conversion device according to item 5, [Matter 8] When the switching unit inputs the analog signal transmitted through the first output line and the analog signal transmitted through the third output line to the first A / D conversion circuit, the first A / D conversion circuit A / D converts a signal obtained by averaging the analog signal of the first output line and the analog signal of the third output line, and outputs a first digital signal; the second A / D conversion circuit A / D converts an averaged signal of the analog signal of the second output line and the analog signal of the fourth output line, and outputs a second digital signal; the third A / D conversion circuit does not output a digital signal; 8. The photoelectric conversion device according to any one of items 5 to 7, wherein: [Matter 9] the one row of the pixel unit further includes a fourth pixel; the A / D conversion unit further includes a fourth A / D conversion circuit, the output line group includes a fourth output line that transmits an analog signal output from the fourth pixel, the first control line is connected to the second transfer transistor of the fourth pixel; the second control line is connected to the first transfer transistor of the fourth pixel; The switching unit is inputting the analog signal transmitted through the fourth output line to the fourth A / D conversion circuit; during a period in which the switching unit inputs the analog signal transmitted through the first output line and the analog signal transmitted through the third output line to the first A / D conversion circuit, the power consumption of the third A / D conversion circuit is smaller than the power consumption of the fourth A / D conversion circuit; 5. The photoelectric conversion device according to any one of items 1 to 4. [Matter 10] the first pixel, the second pixel, the third pixel, and the fourth pixel have color filters of the same color; 10. The photoelectric conversion device according to any one of items 5 to 9, [Matter 11] When the switching unit inputs the analog signal transmitted through the first output line and the analog signal transmitted through the third output line to the first A / D conversion circuit, the first A / D conversion circuit A / D converts a signal obtained by averaging the analog signal of the first output line and the analog signal of the third output line, and outputs a first digital signal; the second A / D conversion circuit A / D converts the analog signal on the second output line to output a second digital signal; the third A / D conversion circuit does not output a digital signal; 5. The photoelectric conversion device according to any one of items 1 to 4. [Matter 12] When the switching unit connects the analog signal transmitted through the third output line to the third A / D conversion circuit, the first A / D conversion circuit A / D converts the analog signal on the first output line to output a first digital signal; the second A / D conversion circuit A / D converts the analog signal on the second output line to output a second digital signal; the third A / D conversion circuit A / D converts the analog signal on the third output line and outputs a third digital signal. 5. The photoelectric conversion device according to any one of items 1 to 4. [Matter 13] a first mode in which only one of the transfer control signal on the first control line and the transfer control signal on the second control line is turned on, and a second mode in which the transfer control signal on the first control line and the transfer control signal on the second control line are turned on simultaneously; 13. The photoelectric conversion device according to any one of items 1 to 12, [Matter 14] the switching unit sequentially performs the first mode and the second mode in a state where the analog signal transmitted through the third output line is input to the first A / D conversion circuit together with the analog signal transmitted through the first output line; Item 14. The photoelectric conversion device according to item 13. [Matter 15] the switching unit sequentially switches between the first mode and the second mode while inputting the analog signal transmitted through the third output line to the third A / D conversion circuit. Item 14. The photoelectric conversion device according to item 13. [Matter 16] In a state in which the switching unit inputs the analog signal transmitted through the first output line and the analog signal transmitted through the third output line to the first A / D conversion circuit, In each pixel of the pixel unit, the floating diffusion is connected to a power supply to reset the pixel; further transferring signal charges from at least one of the first photoelectric conversion unit and the second photoelectric conversion unit to the floating diffusion; 16. The photoelectric conversion device according to any one of items 1 to 15, [Matter 17] When the switching unit inputs the analog signal transmitted through the third output line to the third A / D conversion circuit, In each pixel of the pixel unit, the floating diffusion is connected to a power supply to reset the pixel; further transferring signal charges from at least one of the first photoelectric conversion unit and the second photoelectric conversion unit to the floating diffusion; 16. The photoelectric conversion device according to any one of items 1 to 15, [Matter 18] the digital signal output from the first A / D conversion circuit and the digital signal output from the third A / D conversion circuit are output from channel A; the digital signal output from the second A / D conversion circuit and the digital signal output from the fourth A / D conversion circuit are output from channel B. 11. The photoelectric conversion device according to any one of items 5 to 10, [Matter 19] Item 19. The photoelectric conversion device according to Item 18, a signal processing unit that performs signal processing using the digital signal output from the channel A and the digital signal output from the channel B, An imaging device characterized by: [Matter 20] The signal processing unit a focus detection unit that detects peaks from the digital signal output from the channel A and the digital signal output from the channel B, and detects a phase difference based on the positions of the peaks; an image generation unit that generates an image by adding the digital signal output from the channel A and the digital signal output from the channel B, 20. The imaging device according to item 19, [Matter 21] The switching unit switches between connecting the analog signal output from the third output line together with the analog signal output from the first output line to the first A / D conversion circuit or connecting the analog signal output from the first output line to the third A / D conversion circuit, the image generation unit generates an image by adding the digital signals read from different numbers of the pixels; 21. The imaging device according to item 20. [Matter 22] The photoelectric conversion device according to any one of items 1 to 18, an optical device corresponding to the photoelectric conversion device; a control device that controls the photoelectric conversion device; a processing device that processes information obtained from the photoelectric conversion device; a display device that displays information obtained from the photoelectric conversion device; a storage device that stores information obtained from the photoelectric conversion device; and a mechanical device that operates based on information obtained from the photoelectric conversion device; and at least one of the six: The device characterized by: [Explanation of symbols]

[0186] 1 Pixel section / 2 Vertical scanning section / 3 Timing generation section / 4A, 4B Column A / D conversion section / 5 Signal output section / 6 Focus detection section / 7 Image generation section / 9A, 9B Column connection switching section / 46 Sleep control section / 61 Peak detection section / 62 Phase difference detection section / 71 Adder section / 72 Image processing section / 100 Pixel unit / 101 Photoelectric conversion section / 102 Photoelectric conversion section / 103 Transfer transistor / 104 Transfer transistor / 105 Reset transistor register / 106···amplification transistor / 107···selection transistor / 108···vertical output line / 120···microlens / 1000···photoelectric conversion device / 2000···signal processing unit / FD···floating diffusion / hadr···horizontal transfer control signal / PDL···photoelectric conversion unit / PDR···photoelectric conversion unit / tx1···transfer control signal / tx2···transfer control signal / res···reset control signal / sel···selection control signal / sleep···stop control signal / vswitch···connection control signal

Claims

1. a pixel section in which a plurality of pixels are arranged along rows and columns, each pixel having a first photoelectric conversion unit, a second photoelectric conversion unit, a first transfer transistor, a second transfer transistor, a floating diffusion, and one microlens shared by the first photoelectric conversion unit and the second photoelectric conversion unit; an output line group including a plurality of output lines transmitting analog signals output from pixels arranged along the column; an A / D conversion unit having a first A / D conversion circuit, a second A / D conversion circuit, and a third A / D conversion circuit; a switching unit that switches to which of the A / D conversion circuits the analog signal transmitted through the output line is input, In each pixel of the pixel unit, the second photoelectric conversion unit is arranged in the same direction as the first photoelectric conversion unit, the first transfer transistor is included in a transfer path of signal charges from the first photoelectric conversion unit to the floating diffusion, and the second transfer transistor is included in a transfer path of signal charges from the second photoelectric conversion unit to the floating diffusion, one row of the pixel unit includes a first pixel, a second pixel, and a third pixel; a first control line is connected to a gate of the first transfer transistor of the first pixel, a gate of the second transfer transistor of the second pixel, and a gate of the first transfer transistor of the third pixel; a second control line is connected to a gate of the second transfer transistor of the first pixel, a gate of the first transfer transistor of the second pixel, and a gate of the second transfer transistor of the third pixel; a first output line included in the output line group is connected to the first pixel; a second output line included in the output line group is connected to the second pixel; a third output line included in the output line group is connected to the third pixel; The switching unit is inputting the analog signal transmitted through the first output line to the first A / D conversion circuit; inputting the analog signal transmitted through the second output line to the second A / D conversion circuit; It is possible to switch whether the analog signal transmitted through the third output line is input to the first A / D conversion circuit or the third A / D conversion circuit together with the analog signal transmitted through the first output line, during a period in which the switching unit inputs the analog signal transmitted through the third output line together with the analog signal transmitted through the first output line to the first A / D conversion circuit, power consumption of the third A / D conversion circuit is smaller than power consumption of both the first A / D conversion circuit and the second A / D conversion circuit; A photoelectric conversion device characterized by:

2. the third A / D conversion circuit stops operating during a period in which the switching unit inputs the analog signal transmitted through the third output line to the first A / D conversion circuit together with the analog signal transmitted through the first output line; 2. The photoelectric conversion device according to claim 1.

3. each of the first A / D conversion circuit, the second A / D conversion circuit, and the third A / D conversion circuit includes an amplifier that amplifies an analog signal transmitted by the output line; the switching unit stops supplying power to the amplifier included in the third A / D conversion circuit during a period in which the analog signal transmitted through the third output line is input to the first A / D conversion circuit together with the analog signal transmitted through the first output line; 2. The photoelectric conversion device according to claim 1.

4. the first pixel, the second pixel, and the third pixel have color filters of the same color; 2. The photoelectric conversion device according to claim 1.

5. the one row of the pixel unit further includes a fourth pixel; the A / D conversion unit further includes a fourth A / D conversion circuit; the output line group includes a fourth output line that transmits an analog signal output from the fourth pixel, the first control line is connected to the second transfer transistor of the fourth pixel; the second control line is connected to the first transfer transistor of the fourth pixel; The switching unit is It is possible to switch whether the analog signal transmitted through the fourth output line is input to the second A / D conversion circuit or the fourth A / D conversion circuit together with the analog signal transmitted through the second output line, during a period in which the switching unit inputs the analog signal transmitted through the second output line and the analog signal transmitted through the fourth output line to the second A / D conversion circuit, the power consumption of the fourth A / D conversion circuit is smaller than both the power consumption of the first A / D conversion circuit and the power consumption of the second A / D conversion circuit; 5. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

6. stopping the operation of the fourth A / D conversion circuit during a period in which the switching unit inputs the analog signal transmitted through the second output line and the analog signal transmitted through the fourth output line to the second A / D conversion circuit; 6. The photoelectric conversion device according to claim 5.

7. The switching unit is inputting an analog signal transmitted through the fourth output line together with an analog signal transmitted through the second output line to the second A / D conversion circuit during a period in which an analog signal transmitted through the third output line together with an analog signal transmitted through the first output line is being input to the first A / D conversion circuit; 6. The photoelectric conversion device according to claim 5.

8. When the switching unit inputs the analog signal transmitted through the first output line and the analog signal transmitted through the third output line to the first A / D conversion circuit, the first A / D conversion circuit A / D converts an averaged signal of the analog signal of the first output line and the analog signal of the third output line, and outputs a first digital signal; the second A / D conversion circuit A / D converts an averaged signal of the analog signal of the second output line and the analog signal of the fourth output line, and outputs a second digital signal; the third A / D conversion circuit does not output a digital signal; 6. The photoelectric conversion device according to claim 5.

9. the one row of the pixel unit further includes a fourth pixel; the A / D conversion unit further includes a fourth A / D conversion circuit; the output line group includes a fourth output line that transmits an analog signal output from the fourth pixel, the first control line is connected to the second transfer transistor of the fourth pixel; the second control line is connected to the first transfer transistor of the fourth pixel; The switching unit is inputting the analog signal transmitted through the fourth output line to the fourth A / D conversion circuit; during a period in which the switching unit inputs the analog signal transmitted through the first output line and the analog signal transmitted through the third output line to the first A / D conversion circuit, power consumption of the third A / D conversion circuit is smaller than power consumption of the fourth A / D conversion circuit; 5. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

10. the first pixel, the second pixel, the third pixel, and the fourth pixel have color filters of the same color; 6. The photoelectric conversion device according to claim 5.

11. When the switching unit inputs the analog signal transmitted through the first output line and the analog signal transmitted through the third output line to the first A / D conversion circuit, the first A / D conversion circuit A / D converts an averaged signal of the analog signal of the first output line and the analog signal of the third output line, and outputs a first digital signal; the second A / D conversion circuit A / D converts the analog signal on the second output line to output a second digital signal; the third A / D conversion circuit does not output a digital signal; 5. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

12. When the switching unit connects the analog signal transmitted through the third output line to the third A / D conversion circuit, the first A / D conversion circuit A / D converts the analog signal on the first output line to output a first digital signal; the second A / D conversion circuit A / D converts the analog signal on the second output line to output a second digital signal; the third A / D conversion circuit A / D converts the analog signal on the third output line and outputs a third digital signal; 5. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

13. a first mode in which only one of the transfer control signal on the first control line and the transfer control signal on the second control line is turned on, and a second mode in which the transfer control signal on the first control line and the transfer control signal on the second control line are turned on simultaneously; 5. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

14. the switching unit sequentially performs the first mode and the second mode in a state in which the analog signal transmitted through the third output line is input to the first A / D conversion circuit together with the analog signal transmitted through the first output line; 14. The photoelectric conversion device according to claim 13.

15. the switching unit sequentially switches between the first mode and the second mode while inputting the analog signal transmitted through the third output line to the third A / D conversion circuit; 14. The photoelectric conversion device according to claim 13.

16. In a state in which the switching unit inputs the analog signal transmitted through the first output line and the analog signal transmitted through the third output line to the first A / D conversion circuit, In each pixel of the pixel unit, the floating diffusion is connected to a power supply to reset the pixel; further transferring signal charges from at least one of the first photoelectric conversion unit and the second photoelectric conversion unit to the floating diffusion; 5. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

17. In a state in which the switching unit inputs the analog signal transmitted through the third output line to the third A / D conversion circuit, In each pixel of the pixel unit, the floating diffusion is connected to a power supply to reset the pixel; further transferring signal charges from at least one of the first photoelectric conversion unit and the second photoelectric conversion unit to the floating diffusion; 5. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

18. the digital signal output from the first A / D conversion circuit and the digital signal output from the third A / D conversion circuit are output from channel A; the digital signal output from the second A / D conversion circuit and the digital signal output from the fourth A / D conversion circuit are output from a channel B.

6. The photoelectric conversion device according to claim 5.

19. The photoelectric conversion device according to claim 18 ; a signal processing unit that performs signal processing using the digital signal output from the channel A and the digital signal output from the channel B, An imaging device characterized by:

20. The signal processing unit a focus detection unit that detects peaks from the digital signal output from the channel A and the digital signal output from the channel B, and detects a phase difference based on the positions of the peaks; an image generating unit that generates an image by adding the digital signal output from the channel A and the digital signal output from the channel B, 20. The imaging device according to claim 19.

21. The switching unit switches between connecting the analog signal output from the third output line together with the analog signal output from the first output line to the first A / D conversion circuit or connecting the analog signal output from the first output line to the third A / D conversion circuit, the image generation unit generates an image by adding the digital signals read from different numbers of the pixels; 21. The imaging device according to claim 20.

22. The photoelectric conversion device according to any one of claims 1 to 4, an optical device corresponding to the photoelectric conversion device; a control device that controls the photoelectric conversion device; a processing device that processes information obtained from the photoelectric conversion device; a display device that displays information obtained from the photoelectric conversion device; a storage device that stores information obtained from the photoelectric conversion device; and a mechanical device that operates based on information obtained from the photoelectric conversion device; and at least one of the following six: The device characterized by:

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