Step-up DC / DC converter and semiconductor device

Abstract

To prevent breakdown and heat generation due to overcurrent when the output of a step-up DC / DC converter is grounded.SOLUTION: The boost DC / DC converter (1A) includes an input line (LN1) to which an input power source voltage is applied, an output line (LN2) to which an output voltage is applied, a coil (3) configured to be connected between the input line and the output line, a load switch (4) configured to be connected between the input line and the output line, and a semiconductor device (2A). The semiconductor device includes a voltage monitoring circuit (21) that outputs an abnormal voltage notification signal when a potential difference between both ends of a coil exceeds a threshold value, a control circuit (22) that controls a load switch based on the abnormal voltage notification signal, and a current control circuit (23) that controls a current flowing through the coil so that an output voltage matches a target value.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a step-up DC / DC converter and a semiconductor device. [Background technology]

[0002] Boost converters are used to operate devices that require a voltage higher than the power supply voltage. Due to the configuration of a boost DC / DC converter, if the power supply voltage is turned on while the output is grounded, an overcurrent will flow from the power supply to GND via the parasitic diodes in the coil and high-side switch, and if this overcurrent continues to flow, it could destroy the coil and high-side switch.

[0003] A load switch is provided to prevent an overcurrent from continuing to flow when the output of a step-up DC / DC converter is grounded (see, for example, Patent Document 1). By turning off this load switch in the event of a ground fault, it is possible to prevent an overcurrent from continuing to flow in the output line and also to prevent damage to the coil and high-side switch. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2022-187421

[0005] [overview] However, the step-up DC / DC converter proposed in Patent Document 1 has a configuration in which the load switch is built into the control circuit (semiconductor device), making it difficult to increase the size of the load switch.If the load switch cannot be increased in size, the resistance loss of the load switch increases, which could result in a decrease in the efficiency and heat generation of the step-up DC / DC converter.

[0006] The step-up DC / DC converter disclosed in this specification has an input line configured to receive an input power supply voltage, an output line configured to receive an output voltage, a coil configured to be connected between the input line and the output line, a load switch configured to be connected between the input line and the output line, and a semiconductor device, wherein the semiconductor device comprises: a voltage monitoring circuit configured to output an abnormal voltage notification signal when a potential difference between both ends of the coil exceeds a threshold; a control circuit configured to control the load switch based on the abnormal voltage notification signal; and a current control circuit configured to control a current flowing through the coil so as to match the output voltage with a target value. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram showing a step-up DC / DC converter according to a first embodiment. [Figure 2] FIG. 2 is a detailed diagram of the voltage monitoring and control circuitry of FIG. [Figure 3] FIG. 3 is a diagram showing a step-up DC / DC converter according to the second embodiment. [Figure 4] FIG. 4 is a diagram showing a step-up DC / DC converter according to the third embodiment.

[0008] [Detailed explanation] (First embodiment) As shown in FIG. 1, a step-up DC / DC converter 1A according to the first embodiment includes a semiconductor device 2A, an input line LN1, an output line LN2, a coil 3, a load switch 4, and capacitors C1 to C3.

[0009] The semiconductor device 2A has a terminal VIN, a terminal PVIN, a terminal SW, a terminal GC, a terminal VOUT1, a terminal VOUT2, and a terminal PGND.

[0010] An input power supply voltage Vin is applied to the input line LN1. A terminal VIN and a first end of a capacitor C1 are connected to the input line LN1. A second end of the capacitor C1 is grounded.

[0011] An output voltage Vout is applied to the output line LN2. The output line LN2 is connected to a terminal VOUT1, a terminal VOUT2, a first end of a capacitor C3, and a first end of a load LD. The second end of the capacitor C3 and the second end of the load LD are grounded.

[0012] A coil 3 and a load switch 4 are provided between an input line LN1 and an output line LN2. In this embodiment, the load switch 4 is an NMOS (negative-channel metal oxide semiconductor) transistor. The drain of the load switch 4 is connected to the input line LN1. The gate of the load switch 4 is connected to a terminal GC. The source of the load switch 4 is connected to a terminal PVIN, a first end of the coil 3, and a first end of a capacitor C2. A second end of the capacitor C2 is grounded. A second end of the coil 3 is connected to a terminal SW. Unlike this embodiment, the load switch 4 may be a switch other than an NMOS transistor.

[0013] The terminal VOUT2 is an external terminal for feeding back the output voltage Vout to the semiconductor device 2. The terminal PGND is grounded.

[0014] Next, the internal configuration of the semiconductor device 2 A will be described. The semiconductor device 2 A includes a voltage monitoring circuit 21, a control circuit 22, a current control circuit 23, a high-side switch 24, and a low-side switch 25.

[0015] The voltage monitoring circuit 21 detects the potential difference across the coil 3 from the voltage applied to the terminal PVIN and the voltage applied to the terminal SW, and outputs an abnormal voltage notification signal when the potential difference across the coil 3 exceeds a threshold value.

[0016] The control circuit 22 controls the load switch 4 by outputting a control signal to the terminal GC based on the abnormal voltage notification signal.

[0017] The current control circuit 23 controls the duty of the switch voltage Vsw generated at the terminal SW by driving and controlling the high-side switch 24 and the low-side switch 25 based on the output voltage Vout fed back from the terminal VOUT2. Therefore, the current control circuit 23 controls the current flowing through the coil 3 so that the output voltage Vout output from the terminal VOUT1 matches a target value.

[0018] The high-side switch 24 is a PMOS (positive-channel metal oxide semiconductor) transistor, with its gate connected to the current control circuit 23, its drain connected to the terminal SW and the drain of the low-side switch 25, and its source connected to the terminal VOUT1.

[0019] The low-side switch 25 is an NMOS transistor, and has a gate connected to the current control circuit 23, a source connected to the terminal PGND, and a drain connected to the drain of the high-side switch 24.

[0020] Unlike this embodiment, the high-side switch 24 may be a switch other than a PMOS transistor, and the low-side switch 25 may be a switch other than an NMOS transistor.

[0021] The voltage monitoring circuit 21 and the control circuit 22 use the input power supply Vin applied to the terminal VIN as a power supply voltage.

[0022] The current control circuit 23 uses the voltage applied to the terminal PVIN as the power supply voltage.

[0023] In the step-up DC / DC converter 1A according to the first embodiment shown in FIG. 1, when the input power supply Vin is turned on while the output is grounded, if an overcurrent flows through the coil 3, the voltage monitoring circuit 21 detects that the potential difference across the coil 3 increases, and if the potential difference across the coil 3 exceeds a threshold, the voltage monitoring circuit 21 outputs an abnormal voltage notification signal, and the control circuit 22 controls the load switch 4 to turn OFF.

[0024] This makes it possible to prevent an overcurrent from continuing to flow when the output of the step-up DC / DC converter 1A according to the first embodiment shown in FIG. 1 is grounded, and by providing the load switch 4 outside the semiconductor device 2A, it is possible to reduce resistance loss and prevent deterioration in efficiency and heat generation.

[0025] FIG. 2 is a diagram showing a specific example of the configuration of the voltage monitoring circuit 21 and the control circuit 22 in the first embodiment.

[0026] The voltage monitoring circuit 21 includes a resistor R21, a constant current source A21, and a comparator CMP21.

[0027] The non-inverting input terminal of the comparator CMP1 is connected to the first terminal of the resistor R21 and the first terminal of the constant current source A21. The inverting input terminal of the comparator CMP1 is connected to the terminal SW. The second terminal of the resistor R21 is connected to the terminal PVIN. The second terminal of the constant current source A21 is grounded.

[0028] Resistor R21 and constant current source A21 are an example of a voltage drop circuit that drops the voltage applied to terminal PVIN by a threshold value. Comparator CMP21 compares voltage Vref, which is obtained by dropping voltage Vpvin applied from terminal PVIN by the threshold value using resistor R21 and constant current source A21, with voltage Vsw from the SW terminal. If voltage Vref exceeds voltage Vsw, it outputs an abnormal voltage notification signal.

[0029] The voltage Vref is expressed by the following equation: where r21 is the resistance value of resistor R21, and a21 is the current value of the constant current output from constant current source A21. Vref = Vpvin - (r21 × a21). Here, the abnormal voltage notification signal corresponds to when the output of the comparator CMP21 is at a high level.

[0030] The control circuit 22 includes a logic circuit 221 and a switch drive circuit 222 .

[0031] The input terminal of the logic circuit 221 is connected to the output terminal of the comparator CMP21.

[0032] The output terminal of the logic circuit 221 is connected to the input terminal of the switch driving circuit 222, and the output terminal of the switch driving circuit 222 is connected to the terminal GC.

[0033] When the logic circuit 221 receives the abnormal voltage notification signal output from the comparator CMP21, it sends a switch control signal to the switch drive circuit 222 to turn the load switch 4 OFF.

[0034] Upon receiving the switch control signal output from the logic circuit 221, the switch drive circuit 222 sends a control signal to the terminal GC to turn the load switch 4 OFF.

[0035] Once the load switch 4 is turned OFF, the control circuit 22 keeps the load switch 4 OFF. Specifically, once the comparator CMP21 goes high and outputs an abnormal voltage notification signal, the control circuit 22 does not switch the load switch 4 from OFF to ON even if the voltage Vref falls below the voltage Vsw and the comparator CMP21 outputs a low level.

[0036] The control circuit 22 includes an error detection circuit 223. The control circuit 22 not only detects an overcurrent by checking the potential difference between both ends of the coil 3 and turns off the load switch 4, but also turns off the load switch 4 when the error detection circuit 223 detects an abnormality other than an overcurrent. Examples of abnormalities other than an overcurrent include temperature abnormalities and power supply voltage abnormalities. Unlike this embodiment, the control circuit 22 may be configured without including the error detection circuit 223.

[0037] (Second embodiment) 3 is a diagram showing a step-up DC / DC converter 1B according to the second embodiment. The step-up DC / DC converter 1B differs from the step-up DC / DC converter 1A according to the first embodiment in that it includes a semiconductor device 2B instead of the semiconductor device 2A, but is otherwise basically similar to the step-up DC / DC converter 1A according to the first embodiment. The semiconductor device 2B differs from the semiconductor device 2A in that it includes a non-volatile memory 224 inside a logic circuit 221 and in that it has a terminal DATA, but is otherwise basically similar to the semiconductor device 2A.

[0038] The terminal DATA is connected to a logic circuit 221 provided inside the semiconductor device 2B.

[0039] The logic circuit 221 includes an internal nonvolatile memory 224. The nonvolatile memory 224 stores the setting value of the constant current source A21.

[0040] According to the step-up DC / DC converter 1B of the second embodiment shown in FIG. 3, the set value of the constant current source A21 stored in the nonvolatile memory 224 can be rewritten by a control signal from the terminal DATA.

[0041] This makes it possible for the step-up DC / DC converter 1B according to the second embodiment shown in FIG. 3 to adjust the threshold value of the voltage monitoring circuit 21 according to the type, inductance value, etc. of the external coil 3.

[0042] (Third embodiment) 4 is a diagram showing a step-up DC / DC converter 1C according to the third embodiment. The step-up DC / DC converter 1C differs from the step-up DC / DC converter 1A according to the first embodiment in that it includes a semiconductor device 2C instead of the semiconductor device 2A, but is otherwise basically similar to the step-up DC / DC converter 1A according to the first embodiment. The semiconductor device 2C differs from the semiconductor device 2A in that the non-inverting input terminal of the comparator CMP21 is connected to the connection node between the high-side switch 24 and the terminal VOUT1 via a resistor R21, but is otherwise basically similar to the semiconductor device 2A.

[0043] When a current flows through the coil 3 while both the high-side switch 24 and the low-side switch 25 are OFF, a current of the same value as the current flowing through the coil 3 flows through the parasitic diode of the high-side switch 24. Therefore, when a current flows through the coil 3 while both the high-side switch 24 and the low-side switch 25 are OFF, the potential difference across the high-side switch 24 and the potential difference across the coil 3 are proportional to each other.

[0044] In the step-up DC / DC converter 1C according to the third embodiment shown in FIG. 4, the potential difference across the high-side switch 24 is detected, thereby making it possible to indirectly detect the potential difference across the coil 3.

[0045] By setting the resistance value of resistor R21 and the current value of the constant current output from constant current source A21 to values ​​that take into consideration the threshold value and the proportional relationship described above, the step-up DC / DC converter 1C according to the third embodiment also becomes able to have the voltage monitoring circuit 21 output an abnormal voltage notification signal when the potential difference across coil 3 exceeds the threshold value.

[0046] <Additional Notes> A supplementary note will be provided for the present disclosure, the specific configuration examples of which have been shown in the above-described embodiments.

[0047] (Appendix 1) The power supply device includes an input line (LN1) configured to receive an input power supply voltage (Vin), an output line (LN2) configured to receive an output voltage (Vout), a coil (3) configured to be connected between the input line (LN1) and the output line (LN2), a load switch (4) configured to be connected between the input line (LN1) and the output line (LN2), and a semiconductor device (2A), The semiconductor device (2A) is a voltage monitoring circuit (21) configured to output an abnormal voltage notification signal when a potential difference between both ends of the coil (3) exceeds a threshold; a control circuit (22) configured to control a load switch (4) based on the abnormal voltage notification signal; a current control circuit (23) configured to control the current flowing through the coil (3) so that the output voltage (Vout) matches a target value; A step-up DC / DC converter with

[0048] (Appendix 2) The voltage monitoring circuit (21) a voltage drop circuit configured to generate a second voltage that is lower than the first voltage applied to the first end of the coil (3) by the threshold value; a comparator (CMP21) configured to compare the second voltage with a third voltage applied to a second end of the coil (3); Equipped with The first end of the coil (3) is connected to the input line (LN1) without passing through the second end of the coil (3), The second end of the coil (3) is connected to the first end of the coil (3) and the input line (LN1). 2. The step-up DC / DC converter according to claim 1.

[0049] (Appendix 3) 3. The step-up DC / DC converter according to claim 1 or 2, wherein the control circuit (22) comprises: a logic circuit (221) configured to generate a switch drive signal based on the abnormal voltage notification signal; and a switch drive circuit (222) configured to control the load switch (4) based on the switch drive signal.

[0050] (Appendix 4) 4. The step-up DC / DC converter according to claim 3, wherein the logic circuit (221) and the switch drive circuit (222) are configured to use the input power supply voltage (Vin) as a power supply voltage.

[0051] (Appendix 5) 5. The step-up DC / DC converter according to claim 1, wherein the control circuit (22) controls the load switch (4) to be OFF in response to the abnormal voltage notification signal, and then maintains the OFF state of the load switch (4).

[0052] (Appendix 6) The voltage monitoring circuit (21) a non-volatile memory (224); 6. The step-up DC / DC converter according to any one of Supplementary Note 1 to Supplementary Note 5, wherein the threshold value is adjustable by a setting value stored in the non-volatile memory (224).

[0053] (Appendix 7) 7. The step-up DC / DC converter according to claim 1, wherein the load switch (4) is provided between the input line (LN1) and the coil (3).

[0054] (Appendix 8) 8. The step-up DC / DC converter according to claim 1, wherein the current control circuit (23) is configured to use a voltage applied to a connection node between the load switch (4) and the coil (3) as a power supply voltage.

[0055] (Appendix 9) A semiconductor device which is a component of a step-up DC / DC converter, the semiconductor device having an input line (LN1) configured to receive an input power supply voltage (Vin), an output line (LN2) configured to receive an output voltage (Vout), a coil (3) connected between the input line (LN1) and the output line (LN2), and a load switch (4) connected between the input line (LN1) and the coil (3), a voltage monitoring circuit (21) configured to output an abnormal voltage notification signal when a potential difference between both ends of the coil (3) exceeds a threshold; a control circuit (22) configured to control the load switch (4) based on the abnormal voltage notification signal; a current control circuit (23) configured to control the current flowing through the coil (3) so that the output voltage (Vout) matches a target value; A semiconductor device comprising:

[0056] (Appendix 10) a first terminal (PVIN) configured to be connected to a first end of the coil (3); a second terminal (SW) configured to be connected to a second end of the coil (3); a third terminal (GC) configured to be connected to the control end of the load switch (4); a voltage monitoring circuit (21) configured to receive a voltage applied to the first terminal and a voltage applied to the second terminal, and to output an abnormal voltage notification signal when a potential difference across the coil (3) exceeds a threshold; a control circuit (22) configured to output a control signal for controlling the load switch (4) to the third terminal based on the abnormal voltage notification signal; a current control circuit (23) configured to control the current flowing through the coil (3); A semiconductor device comprising: [Explanation of symbols]

[0057] 1A, 1B, 1C DC / DC converter 2A,2B,2C Semiconductor device 3 coils 4 Load Switch C1, C2, C3 capacitors LN1 input line LN2 output line 21 Voltage monitoring circuit 22 Control circuit 23 Current control circuit 24 High-side switch 25 Low-side switch LD load VIN Input power supply terminal PVIN Input power supply terminal VOUT1 output terminal VOUT2 output feedback pin GC control terminal SW Switch terminal PGND Ground terminal Vin Input power supply voltage Vout Output voltage CMP21 Comparator R21 resistor A21 constant current source 221 Logic Circuits 222 Switch driver circuit 223 Error Detection Circuit 224 Non-volatile memory DATA Data terminal

Claims

1. an input line configured to receive an input power supply voltage, an output line configured to receive an output voltage, a coil configured to be connected between the input line and the output line, a load switch configured to be connected between the input line and the output line, and a semiconductor device; The semiconductor device includes: a voltage monitoring circuit configured to output an abnormal voltage notification signal when a potential difference between both ends of the coil exceeds a threshold; a control circuit configured to control a load switch based on the abnormal voltage notification signal; a current control circuit configured to control a current flowing through the coil so as to match the output voltage with a target value; A step-up DC / DC converter comprising:

2. The voltage monitoring circuit a voltage drop circuit configured to generate a second voltage that is lower than the first voltage applied to the first end of the coil by the threshold; a comparator configured to compare the second voltage with a third voltage applied to a second end of the coil; Equipped with a first end of the coil is connected to the input line without passing through a second end of the coil; The second end of the coil is connected to the first end of the coil and to the input line.

2. The step-up DC / DC converter according to claim 1.

3. 2. The step-up DC / DC converter according to claim 1, wherein the control circuit comprises: a logic circuit configured to generate a switch drive signal based on the abnormal voltage notification signal; and a switch drive circuit configured to control the load switch based on the switch drive signal.

4. 4. The step-up DC / DC converter according to claim 3, wherein the logic circuit and the switch drive circuit are configured to use the input power supply voltage as a power supply voltage.

5. 2. The step-up DC / DC converter according to claim 1, wherein the control circuit controls the load switch to be turned off in response to the abnormal voltage notification signal, and then maintains the load switch in the off state.

6. The voltage monitoring circuit It has a non-volatile memory, 3. The step-up DC / DC converter according to claim 1, wherein the threshold value is adjustable by a setting value stored in the nonvolatile memory.

7. 2. The step-up DC / DC converter according to claim 1, wherein the load switch is provided between the input line and the coil.

8. 2. The step-up DC / DC converter according to claim 1, wherein the current control circuit is configured to use a voltage applied to a connection node between the load switch and the coil as a power supply voltage.

9. A semiconductor device which is a component of a step-up DC / DC converter, the semiconductor device having an input line configured to receive an input power supply voltage, an output line configured to receive an output voltage, a coil connected between the input line and the output line, and a load switch connected between the input line and the coil, a voltage monitoring circuit configured to output an abnormal voltage notification signal when a potential difference between both ends of the coil exceeds a threshold; a control circuit configured to control the load switch based on the abnormal voltage notification signal; a current control circuit configured to control a current flowing through the coil so as to match the output voltage with a target value; A semiconductor device comprising:

10. a first terminal configured to be connected to a first end of the coil; a second terminal configured to be connected to a second end of the coil; a third terminal configured to be connected to the control end of the load switch; a voltage monitoring circuit configured to receive a voltage applied to the first terminal and a voltage applied to the second terminal, and to output an abnormal voltage notification signal when a potential difference between both ends of the coil exceeds a threshold; a control circuit configured to output a control signal for controlling the load switch to the third terminal based on the abnormal voltage notification signal; a current control circuit configured to control a current through the coil; A semiconductor device comprising:

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