Printed wiring board and method for manufacturing printed wiring board

Abstract

To provide a printed wiring board capable of suppressing the occurrence of signal reflection between a wiring part and a pad part constituting a signal wiring pattern due to impedance mismatching.SOLUTION: A printed circuit board comprising: an insulating layer; and a conductive layer formed on the insulating layer, wherein the conductive layer includes a signal line pattern and a ground layer formed along the signal line pattern, the signal line pattern includes a pad portion and a line portion, and a first distance D1 formed between the pad portion and the ground layer and a second distance D2 formed between the line portion and the ground layer satisfy the following formula (1): SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a printed wiring board and a method for manufacturing the same, and more particularly to a printed wiring board having a signal wiring pattern and a ground layer formed along the signal wiring pattern, which can suppress reflection loss of signals between wiring portions and pad portions constituting the signal wiring pattern, and a method for manufacturing the same. [Background technology]

[0002] A wiring structure board capable of reducing unwanted radiation from a printed circuit board on which electronic components are mounted has been proposed (Patent Document 1). This wiring structure board has a conductor layer formed on the same surface on which the first and second signal wiring patterns are formed. This conductor layer acts like a shield. In other words, this wiring structure board can suppress the distribution of the electromagnetic field from the signal wiring patterns by using this conductor layer.

[0003] Fig. 4 is a structural diagram (perspective view) showing one example of an embodiment of such a wiring structure substrate. As shown in Fig. 4, wiring structure substrate 10 is a multilayer substrate, and electronic circuit components (not shown) are mounted on its first main surface 12, which is its surface. Wiring structure substrate 10 includes a first insulating layer 16 having first main surface 12, and a first signal pattern 20 is formed in an area of ​​first insulating layer 16 other than the area where the electronic circuit components are mounted on first main surface 12. Wiring structure substrate 10 also includes a third conductor layer 32 formed in an area of ​​first main surface 12 other than the area where the electronic circuit components are mounted and the area where first signal wiring pattern 20 is formed.

[0004] The third conductor layer 32 is provided so as not to be electrically connected to the electronic circuit components and the first signal wiring pattern 20. The third conductor layer 32 does not contact the first signal wiring pattern 20, but is formed in a region close to and along the first signal wiring pattern 20. Because the current flowing through the first signal wiring pattern 20 is a high-frequency current, the third conductor layer 32 functions as a ground layer in the same manner as an earth layer. An electromagnetic field around the first signal wiring pattern 20 is formed between the first signal wiring pattern 20 and the third conductor layer 32. Therefore, such a wiring structure board can prevent the electromagnetic field around the first signal wiring pattern 20 from leaking to the outside. In this way, the third conductor layer 32 is provided along the direction in which the current of the first signal wiring pattern 20 flows, and the distance between the third conductor layer 32 and the first signal wiring pattern 20 is preferably as short as possible from the viewpoint of suppressing the distribution of the electromagnetic field. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-344149 Summary of the Invention [Problem to be solved by the invention]

[0006] However, in the technology disclosed in Patent Document 1, the width of the wiring portion constituting the first signal wiring pattern 20 forming the wiring structure substrate 10 differs from the width of the pad portion, causing an impedance mismatch between the wiring portion and the pad portion. As a result, in such a wiring structure substrate, signal reflection occurs between the wiring portion constituting the signal wiring pattern and the pad portion due to the impedance mismatch that occurs between the wiring portion and the pad portion that constitutes the signal wiring pattern. [Means for solving the problem]

[0007] The printed wiring board of the present invention is a printed wiring board comprising an insulating layer and a conductor layer formed on the insulating layer, wherein the conductor layer is composed of a signal wiring pattern and a ground layer formed along the signal wiring pattern, the signal wiring pattern has a pad portion and a wiring portion, and a first distance D1 formed between the pad portion and the ground layer and a second distance D2 formed between the wiring portion and the ground layer satisfy the following relational expression (1).

number

[0008] [Figure 1] 1 is a perspective view illustrating an embodiment of a printed wiring board according to the present invention; [Figure 2] 1 is a top view (enlarged view) for explaining an embodiment of a printed wiring board according to the present invention. [Figure 3A] 1A to 1C are cross-sectional views illustrating an embodiment of a method for manufacturing a wiring board according to the present invention. [Figure 3B] 1A to 1C are cross-sectional views illustrating an embodiment of a method for manufacturing a wiring board according to the present invention. [Figure 3C] 1A to 1C are cross-sectional views illustrating an embodiment of a method for manufacturing a wiring board according to the present invention. [Figure 3D] 1A to 1C are cross-sectional views illustrating an embodiment of a method for manufacturing a wiring board according to the present invention. [Figure 3E] 1A to 1C are cross-sectional views illustrating an embodiment of a method for manufacturing a wiring board according to the present invention. [Figure 4] FIG. 1 is a configuration diagram (perspective view) of a conventional wiring structure substrate. DETAILED DESCRIPTION OF THE INVENTION

[0009] <Printed wiring board according to the present invention> An embodiment of a printed wiring board according to the present invention will be described with reference to the drawings. In the example shown in Figures 1 and 2, the dimensions of each component, particularly the height dimension, are shown as dimensions different from the actual dimensions in order to better understand the features of the present invention.

[0010] Fig. 1 is a perspective view illustrating one embodiment of a printed wiring board according to the present invention. As shown in Fig. 1, printed wiring board 100 may be a core-equipped printed wiring board formed by alternately laminating conductor layers 101 and insulating layers 102 on one or both sides of a core substrate (not shown). When conductor layers 101 are formed on both sides of the core substrate, conductor layers 101 that face each other across the core substrate may be connected via through-hole conductors (not shown). In addition, printed wiring board 100 may be a coreless printed wiring board formed by alternately stacking conductor layers 101 and insulating layers 102 on a support plate (not shown) instead of a core substrate, and then removing the support plate.

[0011] In any case, the printed wiring board 100 includes an insulating layer 102 that is the outermost of the insulating layers 102, and a conductor layer 101 on the insulating layer 102. In this manner, the printed wiring board 100 may have a plurality of other conductor layers 101 and insulating layers 102 alternately provided below the insulating layer 102. The insulating layer 102 on which the conductor layer 101 is formed may be composed of, for example, a resin composition containing an inorganic filler such as silica or alumina and an epoxy resin. The conductor layer 101 formed on the insulating layer 102 may be composed of, for example, an electrolytic copper plating film formed by a well-known semi-additive method or the like.

[0012] The printed wiring board 100 shown in FIG. 1 includes, from the top layer to the bottom layer, a conductor layer 101A, an insulating layer 102A, a conductor layer 101B, an insulating layer 102X, a conductor layer 101C, an insulating layer 102D, and a conductor layer 101D. The insulating layer 102X is an interlayer insulating layer formed between the conductor layer 101C and the conductor layer 101B. The conductor layer 101 includes a signal wiring pattern 111 and a ground layer 112. The ground layer 112 is formed in an area other than the mounting area for electronic circuit components (not shown) and the signal wiring pattern 111. The ground layer 112 is formed along the signal wiring pattern 111. The ground layer 112 is formed so as not to be electrically connected to the signal wiring pattern 111. As a result, a certain distance is formed between the signal wiring pattern 111 and the ground layer 112, as will be described later.

[0013] The printed wiring board 100 has a signal via conductor V formed to penetrate the board. The signal via conductor V electrically connects the signal wiring pattern 111 of the conductor layer 101A to the signal wiring pattern 111 of the conductor layer 101D. The printed wiring board 100 also has a via conductor V1 that penetrates the insulating layer 102A. The via conductor V1 electrically connects the ground layer 112 of the conductor layer 101A to the ground layer 112 of the conductor layer 101C. Furthermore, printed wiring board 100 includes via conductor V2 that penetrates insulating layer 102D. Via conductor V2 electrically connects ground layer 112 of conductor layer 101D and ground layer 112 of conductor layer 101B.

[0014] In addition, a solder resist layer (not shown) can also be provided on the surface of insulating layer 102A, which is the outermost of the at least one insulating layer 102 provided in wiring board 100, and on the surface of conductor layer 101A, which is a mixture of signal wiring pattern 111 and ground layer 112 formed on the insulating layer of insulating layer 102A.

[0015] 2 is a top view (enlarged view) for explaining one embodiment of a printed wiring board according to the present invention. As shown in FIG. 2, printed wiring board 100 includes one conductor layer 101 formed on insulating layer 102. Conductor layer 101 includes signal wiring pattern 111 for signals and ground layer 112. Furthermore, signal wiring pattern 111 includes pad portion 111P and wiring portion 111W.

[0016] The signal wiring pattern 111 functions as a conductor for transmitting an electric signal. When viewed from the top surface of the printed wiring board 100, the signal wiring pattern 111 has a band-shaped wiring portion 111W and a substantially circular pad portion 111P. The signal wiring pattern 111 is formed by connecting the linearly extending wiring portion 111W to the substantially circular pad portion 111P at its end.

[0017] The signal wiring pattern 111 has a constant thickness. It is preferable that the thickness of the signal wiring pattern 111 is uniform and has little variation. The thickness of the signal wiring pattern 111 may be 5 to 50 μm. The width of the wiring portion 111W constituting the signal wiring pattern 111 can be set appropriately. The width of the wiring portion 111W constituting the signal wiring pattern 111 may be, for example, 1 to 10 μm. The length of the wiring portion 111W constituting the signal wiring pattern 111 can be set appropriately. The length of the wiring portion 111W is, for example, preferably 50 μm or more, and particularly preferably 75 μm or more. The radius of the approximately circular pad portion 111P constituting the signal wiring pattern 111 can be set appropriately and may be, for example, 50 to 100 μm.

[0018] The ground layer 112 is used to supply potential or power, and functions as a plurality of ground or power conductors. The ground layer 112 may have a wide rectangular shape when viewed from the top surface of the printed wiring board 100. The width of the ground layer 112 can be set appropriately depending on the application of the ground layer 112. The width of the ground layer 112 may be, for example, 100 to 500 μm. The ground layer 112 has a constant thickness. It is preferable that the thickness of the ground layer 112 is uniform and has very little variation. The thickness of the ground layer 112 may be 5 to 50 μm, and preferably 10 to 30 μm.

[0019] The ground layer 112 is formed along the signal wiring pattern 111 without being electrically connected to the signal wiring pattern 111. Therefore, a groove 113 is formed as a boundary region between the signal wiring pattern 111 and the ground layer 112. Since the ground layer 112 is formed along the signal wiring pattern 111 without contacting the signal wiring pattern 111, the overall shape of the upper surface (plane) of the groove 113 formed as the boundary region between the signal wiring pattern 111 and the ground layer 112 is formed large and similar to the shape of the signal wiring pattern 111.

[0020] The groove 113 formed between the signal wiring pattern 111 and the ground layer 112 has a concave cross-sectional shape. The groove 113 formed between the signal wiring pattern 111 and the ground layer 112 is formed by the side surface of the signal wiring pattern 111, the side surface of the ground layer 112, and the insulating layer surface 121 of the insulating layer 102. That is, the insulating layer surface 121 of the insulating layer 102 formed on the lower surface of the conductor layer 101 is exposed at the bottom of the groove 113 formed between the signal wiring pattern 111 having the wiring portion 111W and the ground layer 112, and the ground layer 112.

[0021] The printed wiring board 100 is characterized in that the first distance D1 formed between the pad portion 111P constituting the signal wiring pattern 111 and the ground layer 112, and the second distance D2 formed between the wiring portion 111W and the ground layer 112, satisfy the above relational expression (1). In other words, the printed wiring board 100 according to the present invention is characterized in that the first distance D1 formed between the pad portion 111P constituting the signal wiring pattern 111 and the ground layer 112 is longer than the second distance D2 formed between the wiring portion 111W and the ground layer 112.

[0022] The first distance D1 is defined as the distance formed between the pad portion 111P constituting the signal wiring pattern 111 and the ground layer 112. The first distance D1 is formed along the circular pad portion 111P constituting the signal wiring pattern 111, while maintaining a constant distance between the pad portion 111P and the ground layer 112. The second distance D2 is defined as the distance formed between the wiring portion 111W constituting the signal wiring pattern 111 and the ground layer 112. The second distance D2 is formed along the linear wiring portion 111W constituting the signal wiring pattern 111, while maintaining a constant distance between the signal wiring pattern 111 and the ground layer 112. The printed wiring board 100 is formed such that the width of the insulating layer 102 exposed from the groove 113 surrounding the circular pad portion 111P, which corresponds to the first distance D1, is larger than the width of the insulating layer 102 exposed from the groove 113 surrounding the linear wiring portion 111W, which corresponds to the second distance D2. The first distance D1 corresponds to the width of the groove 113 formed between the pad portion 111P constituting the signal wiring pattern 111 and the ground layer 112. The second distance D2 corresponds to the width of the groove 113 formed between the wiring portion 111W constituting the signal wiring pattern 111 and the ground layer 112.

[0023] Here, the impedance mismatch occurring between the pad portion 111P and the wiring portion 111W that constitute the signal wiring pattern 111 occurs because the width of the pad portion 111P is different from the width of the wiring portion 111W. This impedance mismatch causes signal reflection between the wiring portion 111W and the pad portion 111P that constitute the signal wiring pattern 111.

[0024] From this technical viewpoint, the printed wiring board 100 according to the present invention is configured such that the first distance D1 and the second distance D2 satisfy the above-mentioned relational expression (1), thereby suppressing the occurrence of signal reflection between the wiring portion 111W and the pad portion 111P that constitute the signal wiring pattern 111 due to impedance mismatch. On the other hand, if the first distance D1 and the second distance D2 do not satisfy the above-mentioned relational expression (1), the influence of the impedance mismatch between the wiring portion 111W and the pad portion 111P cannot be eliminated, and therefore, signal reflection between the wiring portion 111W and the pad portion 111P cannot be suppressed.

[0025] Furthermore, by setting the ratio R of the first distance D1 to the second distance D2 to satisfy the relational expression (2) of 1.5≦R≦3.0, the printed wiring board 100 can better suppress the occurrence of signal reflection between the wiring portion 111W and the pad portion 111P constituting the signal wiring pattern 111 due to impedance mismatch. Also, the length of the wiring portion 111W of the signal wiring pattern 111 can be set to 75 mm or more. In this case, the pad portion 111P can be formed with a diameter corresponding to the wiring portion 111W.

[0026] In this way, the printed wiring board 100 of the present invention focuses on the first distance D1 formed between the pad portion 111P constituting the signal wiring pattern 111 and the ground layer 112, and the second distance D2 formed between the wiring portion 111W and the ground layer 112, and by forming the first distance D1 longer than the second distance D2, the influence of impedance mismatch of the signal wiring pattern 111 can be suppressed.

[0027] <One embodiment of the method for manufacturing a wiring board according to the present invention> 3A to 3E are cross-sectional views illustrating an embodiment of a method for manufacturing a wiring board according to the present invention. Hereinafter, an embodiment of a method for manufacturing a wiring board according to the present invention will be described with reference to FIGS. 3A to 3E.

[0028] First, as shown in FIG. 3A, an insulating layer 102 having a seed layer 103 formed thereon is prepared. That is, the seed layer 103 is formed on an insulating layer surface 121, which is the surface of the insulating layer 102. As described above, the insulating layer 102 is a resin composition containing an inorganic filler such as silica or alumina and an epoxy resin. Specifically, the insulating layer 102 may be an electrically insulating material obtained by impregnating a glass cloth with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. The seed layer 103 may be formed from an electroless copper plating film after the surface of the insulating layer 102 is roughened with a permanganate solution.

[0029] Next, as shown in FIG. 3B , a plurality of plating resists 104 are formed on the surface of the seed layer 103 of the insulating layer 102. The plating resists 104 may be composed of, for example, plating resists 104A, 104B, 104C, and 104D. The seed layer surface 131 of the seed layer 103, the plating resists 104A, and the plating resists 104B form a conductor layer-forming recess 105A for forming a portion of the ground layer 112. The seed layer surface 131 of the seed layer 103, the plating resists 104B, and the plating resists 104C form a conductor layer-forming recess 105B for forming a wiring portion 111W, which is a portion of the signal wiring pattern 111. Furthermore, the seed layer surface 131 of the seed layer 103, the plating resists 104C, and the plating resists 104D form a conductor layer-forming recess 105C for forming a portion of the ground layer 112.

[0030] Conductor layer-forming recess 105A, for forming part of ground layer 112, has a bottom surface that is the seed layer surface 131 of seed layer 103, and is formed from the right sidewall surface of adjacent plating resist 104A and the left sidewall surface of plating resist 104B facing the right sidewall surface of plating resist 104A. On the other hand, conductor layer-forming recess 105B, for forming wiring portion 111W, which is part of signal wiring pattern 111, has a bottom surface that is the seed layer surface 131 of seed layer 103, and is formed from the right sidewall surface of adjacent plating resist 104B and the left sidewall surface of plating resist 104C facing the right sidewall surface of plating resist 104B. Furthermore, the conductor layer forming recess 105C for forming a part of the ground layer 112 has the seed layer surface 131 of the seed layer 103 as its bottom surface, and is formed from the right side wall surface of the adjacent plating resist 104C and the left side wall surface of the plating resist 104D that faces the right side wall surface of the plating resist 104C.

[0031] The gap formed between the right side wall surface of plating resist 104A and the left side wall surface of plating resist 104B facing the right side wall surface of plating resist 104A corresponds to the width of ground layer 112, which is the length in the width direction of ground layer 112. The gap formed between the right side wall surface of plating resist 104A and the left side wall surface of plating resist 104B can be set appropriately depending on the shape of ground layer 112. The gap formed between the wall surface of plating resist 104A and the wall surface of plating resist 104B can be set to 100 to 500 μm depending on the width of ground layer 112.

[0032] The gap formed between the right side wall surface of plating resist 104B and the left side wall surface of plating resist 104C, which faces the right side wall surface of plating resist 104B, corresponds to the width of signal wiring pattern 111, which is the length of signal wiring pattern 111 in the width direction. The gap formed between the wall surface of plating resist 104B and the wall surface of plating resist 104C can be set appropriately depending on the width of wiring portion 111W of signal wiring pattern 111. The gap formed between the wall surface of plating resist 104B and the wall surface of plating resist 104C can be set to 1 to 10 μm depending on the width of wiring portion 111W of signal wiring pattern 111.

[0033] 3C, a portion of the ground layer 112 is formed in the conductor layer-forming recess 105A, a signal wiring pattern 111 is formed in the conductor layer-forming recess 105B, and another portion of the ground layer 112 is formed in the conductor layer-forming recess 105C. That is, the ground layer 112 made of an electrolytic copper-plated film is formed inside the conductor layer-forming recess 105A and the conductor layer-forming recess 105C. In addition, the signal wiring pattern 111 made of an electrolytic copper-plated film is formed inside the conductor layer-forming recess 105B.

[0034] Here, the signal wiring pattern 111 is formed of a pad portion 111P and a wiring portion 111W. Therefore, the conductor layer forming recess 105B is formed corresponding to the shape of the pad portion 111P and the shape of the wiring portion 111W. Furthermore, the signal wiring pattern 111 is formed so that a first distance D1 formed between the pad portion 111P and the ground layer 112 is longer than a second distance D2 formed between the wiring portion 111W and the ground layer 112. Therefore, the recesses 105A, 105B, and 105C for forming a conductor layer are formed so as to maintain a distance between the recesses for forming a conductor layer that corresponds to the relationship between the first distance D1 and the second distance D2.

[0035] The thickness of the ground layer 112 formed inside the conductor layer-forming recess 105A and the conductor layer-forming recess 105C may be 5 to 50 μm, preferably 20 to 25 μm. The thickness of the signal wiring pattern 111 formed inside the conductor layer-forming recess 105B may be 5 to 50 μm, preferably 7 to 10 μm. The thickness of the ground layer 112 may be the same as or different from the thickness of the signal wiring pattern 111, but it is preferable that they are the same.

[0036] Here, a direct current is used to deposit the electrolytic copper plating film that constitutes the signal wiring pattern 111 and the ground layer 112. The current density of the direct current applied to form the electrolytic copper plating film that constitutes the signal wiring pattern 111 and the ground layer 112 is 1.0 to 10.0 A / dm 2 The duration of application of the direct current used to deposit the electrolytic copper plating film that forms signal wiring pattern 111 and ground layer 112 may be set as appropriate depending on the configuration of signal wiring pattern 111 and ground layer 112, as long as the predetermined thickness of signal wiring pattern 111 and the predetermined thickness of ground layer 112 can be formed.

[0037] 2D, plating resists 104A-104D formed on the surface of seed layer 103 of insulating layer 102 are removed from seed layer 103. By removing plating resists 104A-104D from seed layer 103, seed layer surfaces 131 located underneath plating resists 104A-104D are exposed. In addition, the left and right side surfaces of wiring portion 111W constituting signal wiring pattern 111 and the left and right side surfaces of ground layer 112 are exposed. Between the left side surface of the wiring portion 111W constituting the signal wiring pattern 111 and the right side surface of the ground layer 112, a groove 113 is formed, at the bottom of which the seed layer 103 exists. Between the right side surface of the wiring portion 111W constituting the signal wiring pattern 111 and the left side surface of the ground layer 112, a groove 113 is formed, at the bottom of which the seed layer 103 exists.

[0038] Finally, as shown in FIG. 2E, the seed layer 103 formed on the insulating layer 102 is removed. The seed layer 103 is removed by etching. As a result, the insulating layer surface 121 of the insulating layer 102 is exposed. A signal wiring pattern 111 composed of a wiring portion 111W and a pad portion 111P and a ground layer 112 are formed on the insulating layer surface 121 of the insulating layer 102. Then, a groove 113 is formed between the signal wiring pattern 111 composed of the wiring portion 111W and the pad portion 111P and the ground layer 112, with the seed layer 103 at the bottom being removed. In this way, the method for manufacturing a printed wiring board can make the first distance D1 formed between the pad portion 111P that constitutes the signal wiring pattern 111 that constitutes the printed wiring board 100 and the ground layer 112 longer than the second distance D2 formed between the wiring portion 111W and the ground layer 112. As a result, printed wiring board 100 manufactured by the method for manufacturing a printed wiring board can suppress the occurrence of signal reflection between wiring portion 111W and pad portion 111P that constitute signal wiring pattern 111 due to impedance mismatch. [Explanation of symbols]

[0039] 100 Printed wiring board 101 Conductor layer 102 Insulating layer 121 Insulation layer surface 111 Signal wiring pattern 111W wiring section 111P Pad section 112 Ground Layer V signal via conductor V1 First via conductor V2 Second via conductor 113 Groove 103 seed layer 131 Seed layer surface 104A~D Plating resist 105A to D: Recess for forming conductive layer

Claims

1. A printed wiring board comprising an insulating layer and a conductor layer formed on the insulating layer, the conductor layer is composed of a signal wiring pattern and a ground layer formed along the signal wiring pattern, the signal wiring pattern having a pad portion and a wiring portion; A first distance D formed between the pad portion and the ground layer １ and a second distance D formed between the wiring portion and the ground layer. ２ and satisfy the following relational expression (1). [Equation 1]

2. The first distance D １ The second distance D ２ 2. The printed wiring board according to claim 1, wherein a ratio R to satisfies the following relational expression (2): [Equation 2]

3. 2. The printed wiring board according to claim 1, wherein the length of the wiring portion is 75 mm or more.

4. 2. The method for manufacturing a printed wiring board according to claim 1, providing an insulating layer having a seed layer formed thereon; forming a plurality of plating resists on the surface of the seed layer to form a recess for forming a conductor layer, the recess being for forming a conductor layer including a signal wiring pattern and a ground layer formed along the signal wiring pattern; forming the signal wiring pattern and the ground layer constituting the conductor layer in the conductor layer forming recess; removing the plating resist from the seed layer to expose the signal wiring pattern having a pad portion and a wiring portion and the ground layer; removing the seed layer from the insulating layer; A first distance D formed between the pad portion and the ground layer １ and a second distance D formed between the wiring portion and the ground layer. ２ and satisfy the following relational expression (1): [Equation 3]

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