Wiring boards and mounting structures

The wiring board's via hole conductor with amorphous portions at material interfaces addresses stress concentration issues, improving electrical reliability by minimizing cracks and peeling.

JP2026045968APending Publication Date: 2026-03-13KYOCERA CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-08-30
Publication Date
2026-03-13

AI Technical Summary

Technical Problem

Via holes in wiring boards are prone to stress concentration, leading to cracks and peeling of the via hole conductor, which decreases electrical reliability.

Method used

The wiring board design includes a via hole conductor with a first conductor layer having amorphous portions at the interfaces with the insulating layer and second conductor layer, dispersing stress and reducing crack occurrence and delamination.

Benefits of technology

The design effectively reduces cracks and peeling in via hole conductors, enhancing the electrical reliability of the wiring board.

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Abstract

This invention provides a wiring board with excellent electrical reliability by reducing the occurrence of cracks in via hole conductors and delamination of via hole conductors. [Solution] The wiring board includes a first insulating layer 21 having a first surface 2a, a land conductor 3a located on the first surface 2a, a second insulating layer 22 covering the first surface 2a and the land conductor 3a and having a second surface 2b on the side opposite to the first insulating layer 21, via holes penetrating from the second surface 2b of the second insulating layer 22 to the land conductor 3a, and via hole conductors 3b located in the via holes and in contact with the land conductor 3a. The via hole conductors 3b include a first conductor layer 31 in contact with the second insulating layer 22 and the land conductor 3a, and a second conductor layer 32 located on the first conductor layer 31. The first conductor layer 31 has at least one of a first amorphous portion 311 located at the interface between the first conductor layer 31 and the second insulating layer 32, and a second amorphous portion 312 located at the interface between the side surface of the first conductor layer 31 and the second conductor layer 32.
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Description

Technical Field

[0001] The present invention relates to a wiring board and a mounting structure using the same.

Background Art

[0002] In order to improve the adhesion to the insulating layer, a wiring pattern (conductor layer) formed on a wiring board may be formed, for example, as described in Patent Document 1, after forming a seed layer (underlying conductor layer) on the surface of the insulating layer, and then forming a desired wiring pattern. The seed layer is formed of a metal such as nichrome, for example.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Disclosure of the Invention

Problems to be Solved by the Invention

[0004] The seed layer is also formed in via holes located in the insulating layer. Via holes are prone to stress concentration. Therefore, when a seed layer containing a metal such as nickel having a relatively high Young's modulus is located in a via hole, cracks may occur in the via hole conductor, or the via hole conductor may peel off from the inner wall surface of the via. When cracks occur in the via hole conductor or the via hole conductor peels off, the electrical reliability of the wiring board decreases.

[0005] An object of the present disclosure is to provide a wiring board that reduces the occurrence of cracks in the via hole conductor and the peeling of the via hole conductor and has excellent electrical reliability.

Means for Solving the Problems

[0006] The wiring board according to this disclosure includes a first insulating layer having a first surface, a land conductor located on the first surface, a second insulating layer covering the first surface and the land conductor and having a second surface on the opposite side of the first insulating layer, via holes penetrating from the second surface of the second insulating layer to the land conductor, and via hole conductors located in the via holes and in contact with the land conductor. The via hole conductor includes a first conductor layer in contact with the second insulating layer and the land conductor, and a second conductor layer located on the first conductor layer. The first conductor layer has at least one of a first amorphous portion located at the interface between the first conductor layer and the second insulating layer, and a second amorphous portion located at the interface between the side surface of the first conductor layer and the second conductor layer.

[0007] The implementation structure relating to this disclosure includes the above-mentioned wiring board and electronic components mounted on the wiring board. [Effects of the Invention]

[0008] The wiring board relating to this disclosure has the configuration described in the section on means for solving the problem, thereby reducing the occurrence of cracks in via hole conductors and delamination of via hole conductors, and having excellent electrical reliability. [Brief explanation of the drawing]

[0009] [Figure 1] This is an explanatory diagram illustrating a wiring board according to one embodiment of the present disclosure. [Figure 2] This is an enlarged diagram illustrating one embodiment of region X shown in Figure 1. [Figure 3] Figure 1 is an enlarged diagram illustrating another embodiment of region X shown in Figure 1. [Modes for carrying out the invention]

[0010] A wiring board according to one embodiment of the present disclosure will be described with reference to Figures 1 and 2. Figure 1 is an explanatory diagram for illustrating a wiring board 10 according to one embodiment of the present disclosure. Figure 2 is an enlarged explanatory diagram for illustrating one embodiment of region X shown in Figure 1. As shown in Figure 1, the wiring board 10 according to one embodiment includes a core insulating layer 1, a build-up insulating layer 2 (a first insulating layer 21 and a second insulating layer 22), a conductor layer 3 (a core conductor layer and a build-up conductor layer), and a solder resist 4.

[0011] The core insulating layer 1 is located approximately in the center of the wiring board 10 in the thickness direction. The core insulating layer 1 is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin, and glass. One of these insulating materials may be used, or two or more may be used in combination.

[0012] The thickness of the core insulating layer 1 is not particularly limited, for example, it can be between 20 μm and 20 mm (2 cm). The core insulating layer 1 is not an essential component, and for example, it is not used in coreless substrates, 2.3D substrates, or substrates referred to as RDL interposers. For example, in motherboards, the thickness of the core insulating layer 1 may exceed 10 mm.

[0013] The core insulating layer 1 may contain a reinforcing material. Examples of reinforcing materials include insulating fabrics such as glass fibers, glass nonwoven fabrics, aramid nonwoven fabrics, aramid fibers, and polyester fibers. Only one type of reinforcing material may be used, or two or more types may be used in combination. Furthermore, the core insulating layer 1 may contain dispersed inorganic insulating fillers such as silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. Only one type of inorganic insulating filler may be used, or two or more types may be used in combination.

[0014] Core conductor layers are located on both sides of the core insulating layer 1. The core conductor layers are conductor layers 3 located on both sides of the core insulating layer 1. The core conductor layers are not particularly limited as long as they are made of a conductive material. Examples of conductive materials include metals such as copper and nichrome. The thickness of the core conductor layers is not limited, for example, 1 μm or more and 30 μm or less. In Figure 1, although the core conductor layers are located on both sides of the core insulating layer 1, it is sufficient for them to be located on at least one side of the core insulating layer 1.

[0015] As shown in Figure 1, the core insulating layer 1 has a through-hole conductor 1a positioned to electrically connect the upper and lower surfaces of the core insulating layer 1. The through-hole conductor 1a is located within a through-hole that penetrates from the upper surface to the lower surface of the core insulating layer 1. The through-hole conductor 1a is made of a metal such as copper and nichrome. The through-hole conductor 1a is connected to the core conductor layer formed on both sides of the core insulating layer 1. The through-hole conductor 1a may be formed integrally with the core conductor layer. The through-hole conductor 1a may be located only on the inner wall surface of the through-hole, or it may be filled inside the through-hole.

[0016] As shown in Figure 1, build-up layers are located on both sides of the core layer, which includes the core insulating layer 1 and the core conductor layer. The build-up layer has a structure in which build-up insulating layers 2 and build-up conductor layers are alternately laminated. The build-up insulating layer 2 includes a first insulating layer 21 and a second insulating layer 22. The build-up conductor layer is a conductor layer 3 located on the surfaces of the first insulating layer 21 and the second insulating layer 22.

[0017] In Figure 1, the build-up layer has two build-up insulating layers 2. However, the build-up layer may have more than two build-up insulating layers 2. In this specification, when considering two adjacent layers of the build-up insulating layers 2, the layer closer to the core insulating layer 1 is defined as the "first insulating layer 21," and the layer further from the core insulating layer 1 is defined as the "second insulating layer 22."

[0018] The first insulating layer 21 has a first surface 2a. Among the surfaces of the first insulating layer 21, the first surface 2a is the surface farther from the core insulating layer 1. The second insulating layer 22 has a second surface 2b. Among the surfaces of the second insulating layer 22, the second surface 2b is the surface located on the opposite side of the first insulating layer 21. In the case of two adjacent layers of the core insulating layer 1 and the build-up insulating layer 2, the core insulating layer 1 may be regarded as the "first insulating layer 21".

[0019] The build-up insulating layer 2 is not particularly limited as long as it is a material having insulation properties. Examples of the material having insulation properties include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. These resins may be used alone or in combination of two or more. In FIG. 1, although the build-up layers are located on both sides of the core layer, they may be located on at least one surface of the core layer.

[0020] The build-up insulating layers 2 may be made of the same resin or different resins. The build-up insulating layer 2 and the core insulating layer 1 may be made of the same resin or different resins. The thickness of the build-up insulating layer 2 is not particularly limited, and for example, it is 1 μm or more and 100 μm or less. The build-up insulating layers 2 may have the same thickness or different thicknesses.

[0021] The build-up insulating layer 2 may contain a reinforcing material. Examples of the reinforcing material include insulating fabric materials such as glass fiber, glass non-woven fabric, aramid non-woven fabric, aramid fiber, and polyester fiber. The reinforcing material may be used alone or in combination of two or more. Further, inorganic insulating fillers such as silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide may be dispersed in the build-up insulating layer 2. The inorganic insulating fillers may be used alone or in combination of two or more.

[0022] On the surface of the build-up insulating layer 2, a build-up conductor layer is located. The build-up conductor layer is the conductor layer 3 located on the surface of the build-up insulating layer 2. The build-up conductor layer is not particularly limited as long as it is a material having conductivity. Examples of the material having conductivity include metals such as copper and nichrome. The thickness of the build-up conductor layer is not limited and is, for example, 1μm or more and 50μm or less.

[0023] The build-up conductor layers may be the same metal or different metals. The build-up conductor layer and the core conductor layer may be the same metal or different metals. Further, the build-up conductor layers may have the same thickness or different thicknesses.

[0024] In the build-up insulating layer 2, via hole conductors 3b for electrically connecting the upper and lower surfaces of the build-up insulating layer 2 are located. Specifically, when focusing on two adjacent build-up insulating layers 2, the via hole conductor 3b is located in the via hole 23 penetrating from the second surface 2b of the second insulating layer 22 to the land conductor 3a located on the first surface 2a of the first insulating layer 21. The land conductor 3a and the via hole conductor 3b are part of the conductor layer 3.

[0025] The via hole conductor 3b includes a first conductor layer 31 and a second conductor layer 32 as shown in FIG. 2. The first conductor layer 31 is in contact with the second insulating layer 22 and the land conductor 3a. The second conductor layer 32 is located on the first conductor layer 31. The first conductor layer 31 and the second conductor layer 32 may be included in the conductor layer 3 other than the via hole conductor 3b such as the land conductor 3a.

[0026] The first conductor layer 31 functions, for example, as a base metal layer. The first conductor layer 31 is formed, for example, by sputtering and electroless plating. The first conductor layer 31 may be, for example, a nichrome layer. The thickness of the first conductor layer 31 is not limited and may be, for example, 1 μm or more and 30 μm or less. The second conductor layer 32 is the main part of the conductor layer 3, such as the via hole conductor 3b. The second conductor layer 32 is formed, for example, by electroplating. The second conductor layer 32 may be, for example, a copper layer. In the second conductor layer 32, the area near the interface with the first conductor layer 31 may be formed by sputtering, and the remaining part may be formed by electroplating. The first conductor layer 31 may be a metal such as titanium.

[0027] The first conductor layer 31 of the via-hole conductor 3b has at least one of a first amorphous portion 311 and a second amorphous portion 312. The first amorphous portion 311 is located at the interface between the first conductor layer 31 and the second insulating layer 22 of the via-hole conductor 3b. The second amorphous portion 312 is located at the interface between the side surface of the first conductor layer 31 and the second conductor layer 32 of the via-hole conductor 3b. The amorphous material, with its random arrangement of metal atoms, is located at the interface between dissimilar materials where stress tends to concentrate, thus dispersing the stress on the via-hole conductor 3b. Therefore, the presence of at least one of the first amorphous portion 311 and the second amorphous portion 312 in the first conductor layer 31 of the via-hole conductor 3b reduces the occurrence of cracks in the via-hole conductor 3b and the delamination of the via-hole conductor 3b. As a result, the wiring board 10 has excellent electrical reliability.

[0028] The first amorphous portion 311 is partially located at the interface between the first conductor layer 31 and the second insulating layer 22 of the via-hole conductor 3b. The second amorphous portion 312 is partially located at the interface between the side surface of the first conductor layer 31 and the second conductor layer 32 of the via-hole conductor 3b.

[0029] When the second insulating layer 22 contains an inorganic insulating filler, a portion of the inorganic insulating filler may be exposed from the inner wall surface of the via hole 23. In the first amorphous portion 311, the portion in contact with the exposed portion of the inorganic insulating filler is composed of a mixture of the first conductor layer 31 of the via hole conductor 3b and the inorganic insulating filler. In the first amorphous portion 311, the portion in contact with the second insulating layer 22 is composed of a conductor (for example, a metal such as nichrome) contained in the first conductor layer 31 of the via hole conductor 3b. The second amorphous portion 312 is composed of a mixture of a conductor (for example, a metal such as nichrome) contained in the first conductor layer 31 of the via hole conductor 3b and a conductor (for example, a metal such as copper) contained in the second conductor layer 32 of the via hole conductor 3b.

[0030] As shown in Figure 2, when the first conductor layer 31 of the via hole conductor 3b has both a first amorphous portion 311 and a second amorphous portion 312, the ratio of the first amorphous portion 311 and the second amorphous portion 312 per unit volume of the first conductor layer 31 of the via hole conductor 3b is not limited. For example, the ratio of the first amorphous portion 311 per unit volume of the first conductor layer 31 of the via hole conductor 3b may be higher than the ratio of the second amorphous portion 312 per unit volume of the first conductor layer 31 of the via hole conductor 3b. There is a large difference in elastic modulus between the first conductor layer 31 and the second insulating layer 22 of the via hole conductor 3b. Therefore, by increasing the ratio of the first amorphous portion 311 among the first amorphous portion 311 and the second amorphous portion 312 which have a buffering effect, peeling of the via hole conductor 3b is further reduced.

[0031] The proportion per unit volume can be determined, for example, by observing the atomic arrangement from two or three directions at 90-degree angles using a transmission electron microscope (TEM) at a magnification of 1 million to 50 million times, thereby confirming the proportion of irregular regions (sometimes referred to as maze structure).

[0032] As shown in Figure 1, a solder resist 4 may be located on the surface of the build-up layer. The solder resist 4 is made of a resin, such as an acrylic-modified epoxy resin. The solder resist 4 is provided with openings to electrically connect the conductive layer 3 and the electrodes of the electronic component 6 via solder 5. Examples of the electronic component 6 include semiconductor integrated circuit elements and optoelectronic elements.

[0033] As shown in Figure 3, in a wiring board 10 according to one embodiment, the first conductor layer 31 of the via hole conductor 3b may further have at least one of a third amorphous portion 313 located in part of the interface between the first conductor layer 31 of the via hole conductor 3b and the land conductor 3a, and a fourth amorphous portion 314 located in part of the interface between the first conductor layer 31 of the via hole conductor 3b and the bottom surface of the second conductor layer 32 of the via hole conductor 3b. Figure 3 is an enlarged explanatory diagram illustrating another embodiment of region X shown in Figure 1.

[0034] The third amorphous portion 313 is composed of a mixture of a conductor (e.g., a metal such as nichrome) contained in the first conductor layer 31 of the via hole conductor 3b and a conductor (e.g., a metal such as copper) contained in the land conductor 3a. In Figure 3, the land conductor 3a is composed of a first conductor layer 31 and a second conductor layer 32. Therefore, the third amorphous portion 313 is composed of a mixture of a conductor (e.g., a metal such as nichrome) contained in the first conductor layer 31 of the via hole conductor 3b and a conductor (e.g., a metal such as copper) contained in the second conductor layer 32 of the land conductor 3a.

[0035] The fourth amorphous portion 314 is composed of a mixture of a conductor (for example, a metal such as nichrome) contained in the first conductor layer 31 of the via hole conductor 3b and a conductor (for example, a metal such as copper) contained in the second conductor layer 32 of the via hole conductor 3b.

[0036] As shown in Figure 3, when the first conductor layer 31 of the via-hole conductor 3b has both a third amorphous portion 313 and a fourth amorphous portion 314, the proportion of the third amorphous portion 313 and the fourth amorphous portion 314 per unit volume of the first conductor layer 31 of the via-hole conductor 3b is not limited. For example, the proportion of the third amorphous portion 313 per unit volume of the first conductor layer 31 of the via-hole conductor 3b may be higher, lower, or the same as the proportion of the fourth amorphous portion 314 per unit volume of the first conductor layer 31 of the via-hole conductor 3b.

[0037] If at least one of the third amorphous portion 313 and the fourth amorphous portion 314 is located in the first conductor layer 31 of the via hole conductor 3b, the occurrence of cracks in the via hole conductor 3b and the delamination of the via hole conductor 3b are further reduced. On the other hand, considering the conductivity of the bottom surface of the via hole conductor 3b with the conductor layer 3 located in other layers, it is preferable that the proportion of the third amorphous portion 313 and the fourth amorphous portion 314 be low.

[0038] For example, the ratio of the third amorphous portion 313 and the fourth amorphous portion 314 to the unit volume of the first conductor layer 31 of the via hole conductor 3b may be lower than the ratio of the first amorphous portion 311 and the second amorphous portion 312 to the unit volume of the first conductor layer 31 of the via hole conductor 3b. With such a configuration, the occurrence of cracks in the via hole conductor 3b and the delamination of the via hole conductor 3b are further reduced, and the conductivity with conductor layers 3 located in other layers is less likely to be affected.

[0039] The method for forming amorphous portions such as the first amorphous portion 311 is not limited, and for example, they can be formed by the following procedure. First, a conductor layer 3 including a land conductor 3a is formed on the first surface 2a of the first insulating layer 21. The land conductor 3a and the conductor layer 3 are as described above, and a detailed explanation is omitted. The conductor layer 3 including the land conductor 3a has a laminated structure in which a first conductor layer 31 and a second conductor layer 32 are stacked, as shown in Figures 2 and 3.

[0040] Next, the conductor layer 3 formed on the first surface 2a of the first insulating layer 21 is covered with the second insulating layer 22. After covering, via holes 23 are formed in the second insulating layer 22. The method of forming the via holes 23 is not limited; for example, the via holes 23 can be formed using a laser. The via holes 23 penetrate from the second surface 2b of the second insulating layer 22 to the land conductor 3a, and the land conductor 3a is exposed at the bottom of the via holes 23.

[0041] Next, the via holes 23 are cleaned. Cleaning of the via holes 23 can be done by plasma treatment using oxygen gas or desmear treatment using an aqueous potassium permanganate solution. After cleaning, they are subjected to a drying process to remove about 80% of the moisture contained in the core insulating layer 1 and the build-up insulating layer 2.

[0042] The drying conditions are not limited as long as they remove approximately 80% of the moisture. For example, drying at a temperature of 80°C to 130°C for 60 minutes to 150 minutes removes approximately 80% of the moisture contained in the first insulating layer 21 and the second insulating layer 22. In this drying process, an oxide film with a thickness of 0.5 nm to 10 nm is formed on the land conductor 3a located at the bottom of the via hole 23. For example, if the second conductor layer 32 of the land conductor 3a is made of copper, the oxide film is formed of copper oxide. At this time, since conductivity would deteriorate if the oxide film were formed over the entire bottom surface of the via hole 23, the oxide film is formed only partially.

[0043] Next, the oxide film formed on the land conductor 3a is partially removed. The oxide film is removed, for example, by plasma. For example, nitrogen gas, oxygen gas, and argon gas can be used as the plasma.

[0044] Next, a first conductor layer 31 is formed on the inner wall surface of the via hole 23. The first conductor layer 31 is formed, for example, by sputtering. The first conductor layer 31 is as described above, so a detailed explanation is omitted. During sputtering, on the inner wall surface of the via hole 23, oxygen is supplied from the moisture contained in the second insulating layer 22 to the conductor (for example, a metal such as nichrome) contained in the first conductor layer 31, and a first amorphous portion 311 is formed. On the other hand, on the bottom surface of the via hole 23, oxygen is supplied from copper oxide to the conductor (for example, a metal such as nichrome) contained in the first conductor layer 31, and a third amorphous portion 313 is formed.

[0045] Next, a portion of the second conductor layer 32 is formed on the surface of the first conductor layer 31, for example, by sputtering. The second conductor layer 32 is as described above, so a detailed explanation is omitted. During sputtering, the area where sputtered atoms collide becomes hot, causing moisture contained in the second insulating layer 22 to come out at the interface between the first conductor layer 31 and the second conductor layer 32. As a result, oxygen is supplied from this moisture to the conductor (for example, a metal such as nichrome) contained in the first conductor layer 31 and the conductor (for example, a metal such as copper) contained in the second conductor layer 32, and the second amorphous portion 312 and the fourth amorphous portion 314 are formed.

[0046] Finally, the remaining portion of the second conductor layer 32 is formed, for example, by electroplating. In this way, amorphous portions such as the first amorphous portion 311 are formed on the first conductor layer 31.

[0047] Next, the mounting structure according to this disclosure will be described. The mounting structure according to one embodiment includes a wiring board 10 according to one embodiment and an electronic component 6 located on the surface of the wiring board 10. Figure 1 shows a state in which the wiring board 10 and the electronic component 6 are not connected. The mounting structure according to this disclosure is obtained by connecting the conductive layer 3 exposed from an opening in the solder resist 4 located on the surface of the build-up layer and the electrodes of the electronic component 6 via solder 5.

[0048] Examples of electronic components 6 include semiconductor integrated circuit elements and optoelectronic elements, as described above. Electronic components 6 may be located on both sides of the wiring board 10, or electronic components 6 may be located on one surface and, for example, a motherboard on the other surface.

[0049] The embodiments of this disclosure have been described above. However, the inventions relating to this disclosure are not limited to the embodiments described above, and various modifications and improvements are possible within the scope of this disclosure as shown in (1) and (6) below.

[0050] (1) The wiring board according to the present disclosure includes a first insulating layer having a first surface, a land conductor located on the first surface, a second insulating layer covering the first surface and the land conductor and having a second surface on the opposite side of the first insulating layer, via holes penetrating from the second surface of the second insulating layer to the land conductor, and via hole conductors located in the via holes and in contact with the land conductor. The via hole conductor includes a first conductor layer in contact with the second insulating layer and the land conductor, and a second conductor layer located on the first conductor layer. The first conductor layer has at least one of a first amorphous portion located at the interface between the first conductor layer and the second insulating layer, and a second amorphous portion located at the interface between the side surface of the first conductor layer and the second conductor layer.

[0051] With regard to embodiments of the present disclosure, embodiments shown in (2) to (5) below are further disclosed.

[0052] (2) In the wiring board described in (1) above, the first conductor layer has a first amorphous portion and a second amorphous portion. The proportion of the first amorphous portion per unit volume of the first conductor layer is higher than the proportion of the second amorphous portion per unit volume of the first conductor layer. (3) In the wiring board described in (1) or (2) above, the first conductor layer further comprises at least one of a third amorphous portion located in part of the interface between the first conductor layer and the land conductor, and a fourth amorphous portion located in part of the interface between the first conductor layer and the bottom surface of the second conductor layer. (4) In the wiring board described in (3) above, the proportion of the third amorphous portion and the fourth amorphous portion per unit volume of the first conductor layer is lower than the proportion of the first amorphous portion and the second amorphous portion per unit volume of the first conductor layer. (5) In the wiring board described in any of (1) to (4) above, the first conductor layer is a nichrome layer and the second conductor layer is a copper layer.

[0053] (6) The implementation structure relating to this disclosure includes a wiring board as described in any of (1) to (5) above, and electronic components mounted on the wiring board. [Explanation of symbols]

[0054] 1. Insulating layer for core 1a Through-hole conductor 2. Insulating layer for build-up 21 First insulating layer 22 Second insulating layer 23 Beer Hall 2a 1st page 2b 2nd side 3 Conductor layers 31. First Conductor Layer 32 Second Conductor Layer 3a Land conductor 3b Via hole conductor 311 First amorphous part 312 Second amorphous region 313 Third amorphous region 314 Fourth amorphous region 4 Solder Resist 5 Handa 6 Electronic Components 10 Wiring board

Claims

1. A first insulating layer having a first surface, A land conductor located on the first surface, A second insulating layer covering the first surface and the land conductor, and having a second surface on the side opposite to the first insulating layer, A via hole that penetrates from the second surface of the second insulating layer to the land conductor, A via hole conductor located in the via hole and in contact with the land conductor, Includes, The via-hole conductor includes a first conductor layer in contact with the second insulating layer and the land conductor, and a second conductor layer located on the first conductor layer. The first conductor layer has at least one of a first amorphous portion located at the interface between the first conductor layer and the second insulating layer, and a second amorphous portion located at the interface between the side surface of the first conductor layer and the second conductor layer. Wiring board.

2. The first conductor layer has the first amorphous portion and the second amorphous portion, The wiring substrate according to claim 1, wherein the proportion of the first amorphous portion per unit volume of the first conductor layer is higher than the proportion of the second amorphous portion per unit volume of the first conductor layer.

3. The wiring board according to claim 1, wherein the first conductor layer further comprises at least one of a third amorphous portion located in part of the interface between the first conductor layer and the land conductor, and a fourth amorphous portion located in part of the interface between the first conductor layer and the bottom surface of the second conductor layer.

4. The wiring board according to claim 3, wherein the ratio of the third amorphous portion and the fourth amorphous portion per unit volume of the first conductor layer is lower than the ratio of the first amorphous portion and the second amorphous portion per unit volume of the first conductor layer.

5. The wiring board according to claim 1, wherein the first conductor layer is a nichrome layer and the second conductor layer is a copper layer.

6. A mounting structure comprising a wiring board according to any one of claims 1 to 5 and an electronic component mounted on the wiring board.

Citation Information

Patent Citations

  • Printed wiring board

    JP2024001580A