Method for inspecting semiconductor devices and program for inspecting semiconductor devices

Abstract

This invention provides a semiconductor device inspection method and a semiconductor device inspection program that can improve the inspection accuracy of semiconductor devices. [Solution] According to one embodiment, a semiconductor device inspection method comprises the step of inspecting a semiconductor device DE on a wafer WF placed on a stage 110 of a semiconductor device DE inspection apparatus 1, wherein the semiconductor device DE inspection apparatus 1 comprises a stage 110 having a temperature control unit 130, the temperature control unit 130 includes a plurality of temperature control elements 131, the plurality of temperature control elements 131 are arranged in a plane parallel to the stage surface 112 of the stage 110 on which a wafer WF containing at least one semiconductor device DE is placed, and the size of each temperature control element 131 in the plane parallel to the stage surface 112 is less than or equal to the size of the semiconductor device DE in the plane parallel to the stage surface 112.

Description

Technical Field

[0001] The present disclosure relates to a method for inspecting a semiconductor device and an inspection program for a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a semiconductor device with a cooling device. In the semiconductor device with a cooling device of Patent Document 1, a cooling element is formed on a substrate on which a semiconductor device is formed so as to be adjacent to the semiconductor device. The cooling element is formed on the back side of the portion where the semiconductor device is formed. The cooling capacity of the cooling element is controlled based on the temperature of the semiconductor device. The cooling capacity of the cooling element is set based on the heat generation amount per unit time of the semiconductor device derived in advance. Further, the cooling capacity of the cooling element is controlled based on the power consumption of the semiconductor device. Furthermore, the cooling capacity of the cooling element is controlled based on the operating state of the semiconductor device. The cooling element is formed using a dummy pattern of the semiconductor device. Patent Documents 2 to 4 disclose inspection devices for semiconductor devices.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Summary of the Invention

Problems to be Solved by the Invention

[0006] According to one embodiment, a semiconductor device inspection method comprises the step of inspecting a semiconductor device in a sample placed on a stage of a semiconductor device inspection apparatus, wherein the semiconductor device inspection apparatus comprises a stage having a temperature control unit, the temperature control unit includes a plurality of temperature control elements, the plurality of temperature control elements are arranged in a plane parallel to the stage surface of the stage on which the sample including at least one of the semiconductor devices is placed, and the size of each temperature control element in the plane is less than or equal to the size of the semiconductor device in the plane.

[0007] According to one embodiment, the semiconductor device inspection program is a semiconductor device inspection program that causes a computer to perform the step of inspecting a semiconductor device in a sample placed on the stage of a semiconductor device inspection apparatus, wherein the semiconductor device inspection apparatus comprises a stage having a temperature control unit, the temperature control unit includes a plurality of temperature control elements, the plurality of temperature control elements are arranged in a plane parallel to the stage surface of the stage on which the sample including at least one semiconductor device is placed, and the size of each temperature control element in the plane is less than or equal to the size of the semiconductor device in the plane. [Effects of the Invention]

[0008] According to the above embodiment, the inspection accuracy of semiconductor devices can be improved. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 is a diagram illustrating an example of a semiconductor device inspection apparatus related to a comparative example. [Figure 2]Figure 2 illustrates the problems identified by the inventor in a semiconductor device inspection apparatus according to a comparative example. [Figure 3] Figure 3 is a diagram illustrating an example of a semiconductor device inspection apparatus according to Embodiment 1. [Figure 4] Figure 4 is a plan view illustrating a temperature control unit in a semiconductor device inspection apparatus according to Embodiment 1. [Figure 5] Figure 5 is a diagram illustrating a temperature control element in a semiconductor device inspection apparatus according to Embodiment 1. [Figure 6] Figure 6 is a diagram illustrating the positional relationship between the temperature control element and the semiconductor device in the semiconductor device inspection apparatus according to Embodiment 1. [Figure 7] Figure 7 is a diagram illustrating the positional relationship between a temperature control element and a circuit block in a semiconductor device inspection apparatus according to Embodiment 1. [Figure 8] Figure 8 is a plan view illustrating the position of circuit blocks in a semiconductor device in a semiconductor device inspection apparatus according to Embodiment 1. [Figure 9] Figure 9 is a diagram illustrating the correspondence between inspection content and circuit blocks in a semiconductor device inspection apparatus according to Embodiment 1. [Figure 10] Figure 10 is a diagram illustrating the correspondence between circuit blocks and their positions in a semiconductor device inspection apparatus according to Embodiment 1. [Figure 11] Figure 11 is a plan view illustrating the position of a semiconductor device on a wafer in a semiconductor device inspection apparatus according to Embodiment 1. [Figure 12] Figure 12 is a diagram illustrating the position of a semiconductor device on a wafer in a semiconductor device inspection apparatus according to Embodiment 1. [Figure 13] Figure 13 is a plan view illustrating the position of the temperature control element in the temperature control unit of the semiconductor device inspection apparatus according to Embodiment 1. [Figure 14]FIG. 14 is a diagram illustrating the position of a temperature adjustment element in a temperature adjustment unit in an inspection apparatus for a semiconductor device according to Embodiment 1. [Figure 15] FIG. 15 is a flowchart diagram illustrating an inspection method as an operation of an inspection apparatus for a semiconductor device according to Embodiment 1. [Figure 16] FIG. 16 is a flowchart diagram illustrating an inspection method as an operation of an inspection apparatus for a semiconductor device according to Embodiment 1. [Figure 17] FIG. 17 is a flowchart diagram illustrating the inspection of a semiconductor device to be inspected in an inspection method for a semiconductor device according to Embodiment 1. [Figure 18] FIG. 18 is a diagram illustrating a circuit block of a semiconductor device in an inspection apparatus for a semiconductor device according to a comparative example. [Figure 19] FIG. 19 is a diagram illustrating a circuit block of a semiconductor device in an inspection apparatus for a semiconductor device according to Embodiment 1. [Figure 20] FIG. 20 is a configuration diagram illustrating an inspection apparatus for a semiconductor device according to Embodiment 2. [Figure 21] FIG. 21 is a configuration diagram illustrating an inspection apparatus for a semiconductor device according to Embodiment 2. [Figure 22] FIG. 22 is a configuration diagram illustrating an inspection apparatus for a semiconductor device according to Embodiment 3. [Figure 23] FIG. 23 is a block diagram illustrating a control unit and a storage unit in an inspection apparatus for a semiconductor device according to Embodiment 3. [Figure 24] FIG. 24 is a graph illustrating a power change profile applied to a tester and a temperature adjustment element in an inspection apparatus for a semiconductor device according to Embodiment 3, where the horizontal axis represents time and the vertical axis represents the power of the tester and the power of the temperature adjustment element. [Figure 25] FIG. 25 is a flowchart diagram illustrating the inspection of a semiconductor device to be inspected in an inspection method for a semiconductor device according to Embodiment 3. [Figure 26]Figure 26 is a flowchart illustrating the inspection of a semiconductor device to be inspected in a semiconductor device inspection method according to a modified example 1 of Embodiment 3. [Figure 27] Figure 27 is a flowchart illustrating the inspection of a semiconductor device to be inspected in a semiconductor device inspection method according to a modified example 2 of Embodiment 3. [Modes for carrying out the invention]

[0010] For clarity of explanation, the following descriptions and drawings have been omitted and simplified as appropriate. In each drawing, the same elements are assigned the same reference numerals, and redundant explanations have been omitted where necessary. Some reference numerals may be omitted to avoid making the drawings cluttered.

[0011] First, in the <Comparative Example> section, the semiconductor device inspection apparatus related to the comparative example will be described. Then, in the <Problems Newly Identified by the Inventor> section, the problems newly identified by the inventor regarding the inspection apparatus of the comparative example will be described. Finally, in <Embodiment 1> to <Embodiment 3>, the semiconductor device inspection apparatus and inspection method related to Embodiments 1 to 3 will be described in comparison with the comparative example. This will further clarify the semiconductor device inspection apparatus and inspection method according to this embodiment. Note that the comparative example and the problems newly identified by the inventor are also within the scope of the technical concept of the embodiment.

[0012] <Comparative Example> Figure 1 is a diagram illustrating the configuration of a semiconductor device DE inspection apparatus 11 according to a comparative example. As shown in Figure 1, the inspection apparatus 11 includes a prober 101 and a tester 201. The prober 101 includes a stage 111 and a probe card 140. The stage 111 has a temperature control unit 120. The probe card 140 has a probe 150. The inspection apparatus 11 inspects semiconductor devices DE formed on a wafer WF. Multiple semiconductor devices DE may be formed on the wafer WF. The inspection apparatus 11 inspects each semiconductor device DE. In the following description, it will be assumed that multiple semiconductor devices DE are formed on the wafer WF, but it is sufficient that at least one semiconductor device DE is formed on the wafer WF. The wafer WF is sometimes referred to as a sample. Note that the sample is not limited to a wafer WF, but may also be a semiconductor chip, printed circuit board, or semiconductor substrate, as long as a semiconductor device DE is formed on it.

[0013] Stage 111 holds the wafer WF. Stage 111 has a stage surface 112. Stage 111 causes the wafer WF to be placed on the stage surface 112.

[0014] Here, for the sake of explaining the inspection device 11, we will introduce an XYZ Cartesian coordinate system. For example, the direction perpendicular to the stage surface 112 will be defined as the Z-axis direction, and the planes parallel to the stage surface 112 will be defined as the XY planes.

[0015] Stage 111 may have a suction mechanism such as a suction chuck. Stage 111 may position the wafer WF on the stage surface 112 by the suction mechanism. Stage 111 may have a moving mechanism that changes the relative position between the wafer WF and the probe 150. The probe card 140 or tester 201 may have a moving mechanism that changes the relative position between the wafer WF and the probe 150. The moving mechanism may be, for example, a mechanism that can slide in the X-axis, Y-axis, and Z-axis directions, or a mechanism that can rotate around the X-axis, Y-axis, and Z-axis as rotation axes.

[0016] The probe card 140 can make contact with the semiconductor device DE to be tested via the probe 150. This allows the probe card 140 to be electrically coupled with the semiconductor device DE. The probe card 140 is connected to a tester 201, which is provided separately from the prober 100, in a manner that enables information transmission. The probe card 140 applies electrical signals, including power and current, from the tester 201 to the semiconductor device DE via the probe 150. The probe card 140 can also transmit electrical signals from the semiconductor device DE to the tester 201.

[0017] The temperature control unit 120 is positioned to be integrated into the stage 111. The temperature control unit 120 can heat or cool the stage 111 to a predetermined temperature.

[0018] Next, the operation of the inspection apparatus 11 will be explained. First, in order to bring the wafer WF to a predetermined inspection temperature, the stage 111 is set to a predetermined temperature. Specifically, the temperature control unit 120 raises or lowers the temperature of the stage 111 by heating or cooling it so that the wafer WF reaches the inspection temperature. During the inspection of the semiconductor device DE to be inspected, the temperature control unit 120 controls the wafer WF to maintain a constant inspection temperature. Hereinafter, the semiconductor device DE to be inspected will be referred to as the semiconductor device DE. When the wafer WF reaches the inspection temperature and the inspection temperature stabilizes, the relative positions of the semiconductor device DE and the probe card 140 are changed so that they overlap in the Z-axis direction. For example, the stage 111 is moved horizontally so that the semiconductor device DE and the probe card 140 overlap in the Z-axis direction.

[0019] After the semiconductor device DE moves directly beneath the probe card 140, the relative position of the stage 111 and the probe card 140 in the Z-axis direction is brought closer together so that the probe 150 of the probe card 140 contacts the terminals of the semiconductor device DE. Electrical coupling is established when the probe 150 contacts the terminals of the semiconductor device DE. When testing of the semiconductor device DE is started, an electrical signal including power and current is supplied to the semiconductor device DE from the tester 201. In this way, a predetermined electrical signal is input from the tester 201 to the semiconductor device DE via the probe card 140.

[0020] The electrical signal from the semiconductor device DE is output to the tester 201 via the probe card 140. In this way, the tester 201 receives the output from the semiconductor device DE. The tester 201 has pre-stored expected values ​​of the output of the semiconductor device DE for a predetermined electrical signal. By comparing the expected value with the actual output value, the tester 201 determines whether the semiconductor device DE is operating correctly or incorrectly. In this way, the tester 201 checks the quality of the semiconductor device DE.

[0021] After the inspection of the semiconductor device DE is completed, the probe 150 of the probe card 140 is separated from the terminals of the semiconductor device DE, the stage 111 is moved horizontally, and the next semiconductor device DE to be inspected is inspected.

[0022] <Problems identified by the inventor> Figure 2 illustrates a problem identified by the inventor in the semiconductor device DE inspection apparatus 11 according to the comparative example. As shown in Figure 2, one of the problems identified by the inventor is that the temperature of the semiconductor device DE is not uniform. Recently, circuit blocks requiring high power are mounted inside semiconductor devices DE, and when these circuit blocks operate, the temperature of the semiconductor device DE rises locally. Here, this temperature rise is referred to as self-heating 160. The comparative example inspection apparatus 11 attempts to make the temperature of the semiconductor device DE uniform by keeping the temperature of the stage 110 constant. However, the inspection apparatus 11 has difficulty keeping up with localized temperature rises. Therefore, disturbance occurs in the temperature distribution inside the semiconductor device DE. This localized temperature fluctuation adversely affects the measurement temperature in the environment during inspection of the semiconductor device DE, hindering accurate inspection. Therefore, it is not possible to improve the inspection accuracy of the semiconductor device.

[0023] <Embodiment 1> Next, a semiconductor device DE inspection apparatus according to Embodiment 1 will be described. Figure 3 is a configuration diagram illustrating a semiconductor device DE inspection apparatus 1 according to Embodiment 1. As shown in Figure 3, the semiconductor device DE inspection apparatus 1 of this embodiment comprises a prober 100, a tester 210, a control unit 220, and an adjustment unit 230. The prober 100 comprises a stage 110 and a probe card 140. The stage 110 has a temperature control unit 120 and a temperature adjustment unit 130. The probe card 140 has a probe 150. The inspection apparatus 1 of this embodiment inspects a semiconductor device DE formed on a wafer WF, similar to the inspection apparatus 11 of the comparative example. The inspection apparatus 1 of this embodiment differs from the inspection apparatus 11 of the comparative example in that the stage 110 of the prober 100 includes a temperature adjustment unit 130. Furthermore, the inspection apparatus 1 of this embodiment differs from the inspection apparatus 11 of the comparative example in that it comprises a control unit 220 and an adjustment unit 230.

[0024] Stage 110 holds the wafer WF to be used as a sample. Stage 110 has a stage surface 112. Stage 110 causes the wafer WF containing at least one semiconductor device DE to be placed on the stage surface 112.

[0025] The temperature control unit 120 is a different component from the temperature adjustment unit 130. The temperature control unit 120 is positioned to be incorporated into the stage 110. On the stage 110, the temperature control unit 120 is positioned on the -Z axis side than the temperature adjustment unit 130. The temperature control unit 120 performs at least one of heating and / or cooling so that the temperature of the stage 110 reaches a predetermined value. In this way, the temperature control unit 120 can bring the stage 110 to a predetermined temperature. Although not shown, the temperature control unit 120 may be connected to the control unit 220 in a manner that enables information transmission. The control unit 220 may control the operation of the temperature control unit 120.

[0026] The temperature control unit 130 is a different component from the temperature control unit 120. The temperature control unit 130 is positioned to be incorporated into the stage 110. On the stage 110, the temperature control unit 130 is positioned on the +Z axis side of the temperature control unit 120. In other words, the temperature control unit 130 is positioned between the temperature control unit 120 and the stage surface 112. The temperature control unit 130 adjusts the temperature of the semiconductor device DE formed on the wafer WF. For example, in order to smoothly absorb and dissipate heat from the semiconductor device DE by the temperature control unit 130, it is preferable that the temperature control unit 130 is in close contact with the main body of the stage 110 and that the temperature resistance between the temperature control unit 130 and the main body of the stage 110 is extremely small. The wafer WF is placed on the temperature control unit 130. Therefore, the +Z axis side surface of the temperature control unit 130 may be the stage surface 112. It is preferable that the wafer WF is adsorbed onto the temperature control unit 130. With this configuration, the temperature control unit 130 can efficiently adjust the temperature of the semiconductor device DE formed on the wafer WF.

[0027] Multiple semiconductor devices DE may be formed on the wafer WF used as a sample. The probe 150 of the probe card 140 contacts the terminals of the semiconductor devices DE. This establishes an electrical coupling between the probe 150 and the terminals of the semiconductor devices DE. In the inspection of the semiconductor devices DE, each semiconductor device DE may be inspected one by one, or multiple semiconductor devices DE may be inspected in parallel. In this case, multiple probes 150 may each contact the terminals of multiple semiconductor devices DE.

[0028] When testing of the semiconductor device DE is initiated, an electrical signal including power and current is input from the tester 210 to the semiconductor device DE, and a predetermined electrical signal is input from the tester 210 to the semiconductor device DE via the probe card 140. The electrical signal from the semiconductor device DE is output to the tester 210 via the probe card 140. The tester 210 receives the output from the semiconductor device DE. In this way, the tester 210 tests the semiconductor device by applying an electrical signal to the semiconductor device DE.

[0029] The control unit 220 is connected to the tester 210 and the adjustment unit 230 in a manner that enables information transmission. The control unit 220 controls the operation of the tester 210. The control unit 220 also controls the operation of the adjustment unit 230. The adjustment unit 230 is connected to the temperature control unit 130 in a manner that enables information transmission. The adjustment unit 230 adjusts the operation of the temperature control unit 130. Specifically, the adjustment unit 230 adjusts the output of the temperature control unit 130. The control unit 220 controls the adjustment unit 230 so that it outputs an appropriate value.

[0030] Figure 4 is a plan view illustrating a temperature control unit 130 in a semiconductor device DE inspection apparatus 1 according to Embodiment 1. As shown in Figure 4, the temperature control unit 130 includes a plurality of temperature control elements 131. The plurality of temperature control elements 131 are arranged in a plane parallel to the stage surface 112 of the stage 110. For example, the plurality of temperature control elements 131 are arranged seamlessly in a matrix in the X-axis and Y-axis directions. Each temperature control element 131 operates under control from the adjustment unit 230. That is, the adjustment unit 230 adjusts the output of each temperature control element 131. As a result, each temperature control element 131 is individually controlled by the adjustment unit 230. Therefore, the temperature control unit 130 may include at least one temperature control element 131 that is controlled differently from the other temperature control elements 131. Each temperature control element 131 has, for example, a rectangular structure with a side length of approximately 1 mm to 5 mm, but is not necessarily limited to this. Each temperature control element 131 adjusts the temperature of a localized part of the semiconductor device DE.

[0031] Figure 5 is a diagram illustrating a temperature control element 131 in a semiconductor device DE inspection apparatus 1 according to Embodiment 1. As shown in Figure 5, the temperature control element 131 may also include a Peltier element 132. The Peltier element 132 has a configuration in which an N-type semiconductor 133 and a P-type semiconductor 134 are sandwiched between metals 135. Specifically, the N-type semiconductor 133 and the P-type semiconductor 134 are prismatic in shape extending in the Z-axis direction. The ends of the N-type semiconductor 133 and the P-type semiconductor 134 on the +Z-axis side are joined to one metal 135. The ends of the N-type semiconductor 133 and the P-type semiconductor 134 on the -Z-axis side are each connected to another metal 135.

[0032] By passing a current from the metal 135 at the -Z axis side end of the P-type semiconductor 134 to the metal 135 at the -Z axis side end of the N-type semiconductor 133, or conversely, by passing a current from the metal 135 at the -Z axis side end of the N-type semiconductor 133 to the metal 135 at the -Z axis side end of the P-type semiconductor 134, it is possible to dissipate or absorb heat in the metal 135 on the +Z axis side. The amount of heat absorbed or dissipated is determined by the temperature difference between the metal 135 on the +Z axis side and the metal 135 on the -Z axis side, and the magnitude of the current (also called the current value) passed through.

[0033] Note that the temperature control element 131 is not limited to those including a Peltier element 132. The temperature control element 131 may be a heat sink such as a capillary tube through which a coolant flows, a tiny connecting rod connected to a heat sink, a tiny heater, etc., as long as it can adjust the temperature of a localized part of the semiconductor device DE.

[0034] Figure 6 illustrates the positional relationship between the temperature control element 131 and the semiconductor device DE in the semiconductor device DE inspection apparatus 1 according to Embodiment 1. As shown in Figure 6, the size of the temperature control element 131 may be sufficiently small compared to the size of the semiconductor device DE. For example, the semiconductor device DE may be positioned on multiple temperature control elements 131. For example, when viewed from a direction perpendicular to the stage surface 112, the size of each temperature control element 131 in a plane parallel to the stage surface 112 may be less than or equal to the size of the semiconductor device DE in a plane parallel to the stage surface 112. In the figure, as an example, nine temperature control elements 131 correspond to one semiconductor device DE. Note that it is not necessary for an integer number of temperature control elements 131 to correspond to one semiconductor device DE without any gaps; for example, nine and a half temperature control elements 131 may correspond to one semiconductor device DE.

[0035] Figure 7 illustrates the positional relationship between the temperature control element 131 and the circuit block CB in the semiconductor device DE inspection apparatus 1 according to Embodiment 1. As shown in Figure 7, the semiconductor device DE may include a plurality of circuit blocks CB. The circuit block CB may include, for example, functional blocks such as a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and an FPGA (Field-programmable Gate Array). The size of the temperature control element 131 may be smaller than the size of the circuit block CB. For example, the circuit block CB may be positioned on a plurality of temperature control elements 131. For example, when viewed from a direction perpendicular to the stage surface 112, the size of each temperature control element 131 in a plane parallel to the stage surface 112 may be less than or equal to the size of the circuit block CB in a plane parallel to the stage surface 112. The probe 150 of the probe card 140 may contact the terminals of the circuit block CB. The tester 210 may inspect the circuit block CB by applying an electrical signal to the circuit block CB.

[0036] The control unit 220 determines the inspection content for the semiconductor device DE when inspecting the semiconductor device DE. The control unit 220 also identifies the circuit block CB to which electrical signals, including power and current, are applied. Then, the control unit 220 identifies the temperature control element 131 associated with the identified circuit block CB. For example, the control unit 220 determines the inspection content according to a program and a table, and identifies the circuit block CB and the temperature control element 131.

[0037] Figure 8 is a plan view illustrating the position of the circuit block CB in the semiconductor device DE in the semiconductor device DE inspection apparatus according to Embodiment 1. Figure 9 is a diagram illustrating the correspondence between the inspection content and the circuit block CB in the semiconductor device DE inspection apparatus according to Embodiment 1. Figure 10 is a diagram illustrating the correspondence between the circuit block CB and the position of the circuit block CB in the semiconductor device DE inspection apparatus according to Embodiment 1. The table showing the correspondence between the inspection content and the circuit block CB in Figure 9, and the table showing the correspondence between the circuit block CB and the position of the circuit block CB in Figure 10, etc., may be stored in the control unit 220 or in the storage unit 240 described later. The same applies to the tables, etc. in Figures 12 and 14.

[0038] As shown in Figures 8 to 10, in order to identify the temperature control element 131 corresponding to the circuit block CB within the semiconductor device DE under inspection, a pre-prepared correspondence such as a table is used. For example, the circuit block CB to be inspected can be identified by using the correspondence between the inspection content and the circuit block CB in Figure 9. The position of the identified circuit block CB within the semiconductor device DE can be determined by using the correspondence between the circuit block CB and its position within the semiconductor device DE in Figure 10. The position of the circuit block CB can be determined, for example, by a coordinate position relative to a predetermined reference position RPCB (e.g., the upper left corner) of the semiconductor device DE in Figure 8.

[0039] Figure 11 is a plan view illustrating the position of the semiconductor device DE on the wafer WF in the semiconductor device DE inspection apparatus according to Embodiment 1. Figure 12 is a diagram illustrating the position of the semiconductor device DE on the wafer WF in the semiconductor device DE inspection apparatus according to Embodiment 1. Figure 13 is a plan view illustrating the position of the temperature control element 131 in the temperature control unit 130 in the semiconductor device DE inspection apparatus according to Embodiment 1. Figure 14 is a diagram illustrating the position of the temperature control element 131 in the temperature control unit 130 in the semiconductor device DE inspection apparatus according to Embodiment 1.

[0040] As shown in Figures 11 to 14, by using the position relative to the reference position RP on the stage 110 for both the semiconductor device DE and the temperature control element 131, the temperature control element 131 associated with the circuit block CB within the semiconductor device DE can be identified. In this way, the Peltier element 132 corresponding to the circuit block CB under inspection can be selected and driven.

[0041] The control unit 220 controls the operation of the tester 210, causing the tester 210 to inspect the semiconductor device DE. Specifically, the control unit 220 causes the tester 210 to inspect the semiconductor device DE by applying an electrical signal to it. Based on the results of the tester 210 inspecting the semiconductor device DE by applying an electrical signal to it, the control unit 220 controls the adjustment unit 230.

[0042] Next, the operation of the semiconductor device DE inspection apparatus 1 according to Embodiment 1 will be explained using a flowchart. Figures 15 and 16 are flowchart diagrams illustrating an inspection method as an example of the operation of the semiconductor device DE inspection apparatus according to Embodiment 1. As shown in Figures 15 and 16, the semiconductor device DE inspection method of this embodiment includes a step (S200) of inspecting the semiconductor device DE placed on the stage 110. Note that a step (S100) of setting the temperature of the stage 110 to a predetermined value may be included before step S200.

[0043] Stage 110 may have a temperature control unit 120 that is different from the temperature control unit 130. In step S100, the temperature control unit 120 may perform at least one of heating and / or cooling so that the temperature of stage 110 reaches a predetermined value. For example, the control unit 220 may control the temperature control unit 120 so that the stage 110 reaches a predetermined temperature. Thereafter, the control unit 220 controls the operation of the temperature control unit 120 so that the temperature of stage 110 remains constant.

[0044] In step S200, the control unit 220 sequentially inspects the semiconductor device DE on the wafer WF placed on the stage 110. Here, the stage 110 has a temperature control unit 130 which includes a plurality of temperature control elements 131. The plurality of temperature control elements 131 are arranged in a plane parallel to the stage surface 112 of the stage 110. The size of each temperature control element 131 on the stage surface 112 is less than or equal to the size of the semiconductor device DE on the stage surface 112.

[0045] Figure 17 is a flowchart illustrating the inspection of a semiconductor device DE to be inspected in the inspection method for a semiconductor device DE according to Embodiment 1. As shown in Figure 17, the step of inspecting the semiconductor device DE (S200) includes the following steps S201 to S212. Specifically, the step of inspecting the semiconductor device DE (S200) includes the step of starting the inspection loop of the semiconductor device DE to be inspected (S201), the step of moving the semiconductor device DE to be inspected directly below the probe card 140 (S202), and the step of bringing the probe 150 into contact with the semiconductor device DE to be inspected (S203). Furthermore, the step of inspecting the semiconductor device DE (S200) also includes the step of determining the inspection content (S204), the step of starting the inspection (S205), the step of monitoring the applied power (S206), the step of identifying the application circuit block (S207), and the step of identifying the temperature control element 131 corresponding to the application circuit block (S208). Furthermore, the step of inspecting the semiconductor device DE (S200) includes the steps of controlling the temperature control element 131 (S209), ending the inspection (S210), moving the probe 150 away from the semiconductor device DE to be inspected (S211), and ending the inspection loop for the semiconductor device DE to be inspected (S212).

[0046] In step S201, the semiconductor device DE to be inspected is identified from among the multiple semiconductor devices DE formed on the wafer WF. For example, the control unit 220 identifies the semiconductor device DE to be inspected from among the multiple semiconductor devices DE formed on the wafer WF. If all of the semiconductor devices DE to be inspected have already been inspected, there are no semiconductor devices DE to be inspected, and the series of operations is terminated.

[0047] Next, in step S202, the stage 110 is moved horizontally, for example, so that the semiconductor device DE to be tested is directly below the probe card 140. For example, the control unit 220 moves the stage 110 horizontally so that the semiconductor device DE to be tested is directly below the probe card 140. Alternatively, the probe card 140 may be moved horizontally instead of the stage 110.

[0048] Next, in step S203, after the semiconductor device DE is placed directly beneath the probe card 140, the probe card 140 and the wafer WF are brought into close proximity, and the probe 150 of the probe card 140 makes contact with the terminals of the semiconductor device DE. For example, after the control unit 220 places the semiconductor device DE directly beneath the probe card 140, it brings the probe card 140 and the wafer WF into close proximity, and makes contact with the terminals of the semiconductor device DE. When the probe 150 and the semiconductor device DE make contact, they become electrically coupled.

[0049] Next, in step S204, the inspection content for the semiconductor device DE is determined. For example, the control unit 220 determines the inspection content for the semiconductor device DE to be inspected.

[0050] Next, in step S205, the control unit 220 issues an instruction to the tester 210 according to the determined inspection content. As a result, the tester 210 inspects the semiconductor device DE by applying electrical signals, including power and current, to the semiconductor device DE to be inspected.

[0051] Next, in step S206, the tester 210 under inspection continuously measures the electrical signal applied from the tester 210 to the semiconductor device DE under inspection and transmits the measurement result to the control unit 220. For example, the tester 210 may continuously observe the amount of power supplied in the electrical signal and transmit that value to the control unit 220.

[0052] In step S207, during the inspection, various circuit blocks CB that constitute the semiconductor device DE under inspection are driven, so the tester 210 sequentially transmits to the control unit 220 which circuit block CB is driven at that time, that is, which circuit block CB is consuming power. In other words, the tester 210 inspects the circuit blocks CB by applying an electrical signal to them. Here, the tester 210 does not have to identify the circuit blocks CB. The tester 210 may transmit only information that can identify the circuit blocks CB to the control unit 220. The control unit 220 may identify the specific circuit blocks CB. That is, the control unit 220 identifies the circuit blocks CB to which the electrical signal is applied. In identifying the location of the circuit blocks CB, the control unit 220 identifies the location of the circuit blocks CB on the wafer WF and the location of the corresponding temperature control element 131 by comparing the information of the semiconductor device DE under inspection, which includes information that can identify the circuit blocks CB transmitted from the tester 210, with the information such as the tables shown in Figures 8 to 14 above.

[0053] In this way, the control unit 220 recognizes, from the information of the identified circuit block CB, where the circuit block CB is located in the semiconductor device DE under inspection, and where the circuit block CB is located within the wafer WF. This allows the control unit 220 to determine the position of the circuit block CB within the wafer WF.

[0054] Next, in step S208, the control unit 220 identifies a temperature control element 131 adjacent to the circuit block CB. Specifically, the control unit 220 identifies a temperature control element 131 located directly below the circuit block CB to which an electrical signal is applied. The temperature control element 131 is not necessarily limited to one. Depending on the location of the circuit block CB, multiple temperature control elements 131 may be identified. In this way, the control unit 220 identifies a temperature control element 131 associated with the identified circuit block CB.

[0055] Next, in step S209, the temperature control element 131 is driven to absorb an amount of heat equivalent to the amount of heat generated in the semiconductor device DE under inspection by the electrical signal (supplied power) applied to the semiconductor device DE under inspection. This operation is performed by an instruction from the control unit 220 to the adjustment unit 230. Specifically, the control unit 220 identifies the temperature control element 131 to be driven and instructs the adjustment unit 230 to output the identified temperature control element 131. The adjustment unit 230 drives the temperature control element 131 according to the instruction from the control unit 220. Even if there are multiple temperature control elements 131, the control unit 220 instructs the adjustment unit 230 to drive each temperature control element 131 so that the multiple temperature control elements 131 share the heat absorption of the amount of heat generated in the semiconductor device DE under inspection. In this way, the control unit 220 controls the adjustment unit 230 which adjusts each temperature control element 131. The control unit 220 controls the adjustment unit 230 to individually adjust the output of each temperature control element 131. This allows at least one temperature control element 131 to be controlled differently from the other temperature control elements 131 during the step of inspecting the semiconductor device. In this case, the temperature control unit 130 may include at least one temperature control element 131 that is controlled differently from the other temperature control elements 131. The adjustment unit 230 adjusts the output of each temperature control element 131, for example, by controlling the amount of current applied to each temperature control element 131. The above operations are performed at regular time intervals, for example, between 10 ns and 10 ms. An example of a time interval has been given, but it is preferable to make the time interval as narrow as possible.

[0056] In step S210, the processes from steps S206 to S209 are repeated until the inspection of the current, power, and other parameters included in the electrical signal applied to the semiconductor device DE under inspection is completed.

[0057] In step S211, after the inspection of the semiconductor device DE to be inspected is completed, the probe card 140 is separated from the semiconductor device DE to be inspected. If the inspection of all semiconductor devices DE to be inspected is not completed, the process returns to step S201. If the inspection of all semiconductor devices DE to be inspected is completed, the series of processes is terminated.

[0058] Next, the effects of this embodiment will be explained in comparison with the comparative example. Figure 18 is a diagram illustrating the circuit block of a semiconductor device DE in a semiconductor device DE inspection apparatus according to the comparative example. Figure 19 is a diagram illustrating the circuit block of a semiconductor device DE in a semiconductor device DE inspection apparatus according to Embodiment 1.

[0059] As shown in Figures 18 and 19, the semiconductor device DE under inspection is formed on a wafer WF. The thickness of the wafer WF is, for example, approximately 0.7 mm. When a circuit block CB in the semiconductor device DE under inspection operates, the circuit block CB generates heat. The temperature of the circuit block CB then propagates through the wafer WF by heat conduction. This process is similar to the propagation of a wave generated from a heat-generating area 136 (indicated by a star), as shown in Figure 18. The amount of heat generated by this heat conduction is ultimately dissipated to the stage 111. For convenience, this heat wave is called a heat wave 137.

[0060] As shown in Figure 18, even if the temperature control unit 120 in the comparative example stage 111 controls the temperature of stage 111 to be uniform, there is a certain distance between the heat-generating area 136 and stage 111, and there is also the thermal resistance of the wafer WF. Therefore, the temperature of the heat-generating area 136 becomes higher than the temperature of stage 111. This temperature difference has not been considered a problem until now. However, in the case of semiconductor devices DE that consume a large amount of power, this temperature difference cannot be ignored. The large discrepancy between the set temperature set by the temperature control unit 120 and the actual temperature of the semiconductor device DE makes accurate inspection difficult. Therefore, it is difficult to improve the inspection accuracy of semiconductor devices DE.

[0061] Therefore, in this embodiment, as shown in Figure 19, a temperature control element 131a associated with the heat-generating part 136 is driven. This causes the temperature control element 131a to absorb heat in proportion to the amount of heat generated by the heat-generating part 136. The control unit 220 can identify which circuit block CB of the semiconductor device DE under inspection is operating based on the inspection content being performed at that time. The control unit 220 can also identify how much power is being consumed from the information on the tester 210. Furthermore, the control unit 220 can identify the position of the circuit block CB on the wafer WF and the position of the corresponding temperature control element 131 based on the information such as the tables shown in Figures 8 to 14. Thus, the control unit 220 can identify the position of the temperature control element 131a associated with the circuit block CB from the position of the circuit block CB. In addition, the control unit 220 can drive the temperature control element 131a to absorb heat in proportion to the power consumption of the circuit block CB. The temperature control element 131a absorbs heat, generating a heat wave 138 centered on the temperature control element 131a. The heat wave 138 is in opposite phase to the heat wave 137 from the heat-generating part 136. These heat waves 137 and 138 cancel each other out, mitigating the temperature rise of the heat-generating part 136.

[0062] Thus, according to this embodiment, the temperature of the semiconductor device DE can be controlled with high precision, thereby improving the inspection accuracy of the semiconductor device DE.

[0063] <Embodiment 2> Next, a semiconductor device DE inspection apparatus of Embodiment 2 will be described. Figures 20 and 21 are configuration diagrams illustrating semiconductor device DE inspection apparatus 2 and 2a according to Embodiment 2. As shown in Figures 20 and 21, the temperature control unit 130 of the inspection apparatus 2 and 2a of this embodiment further includes a temperature sensor 139. The temperature sensor 139 measures the temperature of the semiconductor device DE. The temperature sensor 139 may also measure the temperature of the circuit block CB. As shown in Figure 20, the temperature sensor 139 may be placed near the temperature control element 131. For example, multiple temperature sensors 139 may be placed near each of multiple temperature control elements 131. Each temperature sensor 139 may be placed between adjacent temperature control elements 131. For example, the temperature control elements 131 and temperature sensors 139 may be arranged alternately in the X-axis direction and the Y-axis direction.

[0064] Furthermore, as shown in Figure 21, the temperature sensor 139 may be placed on a probe card 140 located near the semiconductor device DE. Multiple temperature sensors 139 may be placed on the probe card 140.

[0065] The temperature sensor 139 may be connected to the adjustment unit 230 in a manner that enables it to transmit information. Alternatively, the temperature sensor 139 may be connected to the probe card 140 in a manner that enables it to transmit information. The temperature sensor 139 measures the temperature controlled by the temperature adjustment element 131. Specifically, the temperature sensor 139 measures the temperature of the semiconductor device DE and the temperature of the circuit block CB. Therefore, the step of inspecting the semiconductor device DE may include the step of measuring the temperature of the semiconductor device DE with the temperature sensor 139, or the step of measuring the temperature of the circuit block CB with the temperature sensor 139.

[0066] The temperature sensor 139 transmits the measurement result to the control unit 220 via the adjustment unit 230. The temperature sensor 139 also transmits the measurement result to the control unit 220 via the probe card 140 and the tester 210. Based on the measurement by the temperature sensor 139, if a predetermined circuit block CB of the semiconductor device DE falls outside a predetermined temperature range from the target set temperature, the control unit 220 modifies the control signal for controlling the temperature adjustment element 131 to the adjustment unit 230. For example, the control unit 220 modifies the amount of current applied to the temperature adjustment element 131 to the adjustment unit 230. As a result, the adjustment unit 230 adjusts the temperature adjustment element 131 to maintain the temperature of the semiconductor device DE and the temperature of the circuit block CB at the target temperature. In this way, the control unit 220 controls the adjustment unit 230 based on the measurement result of the temperature sensor 139 that measures the temperature of the semiconductor device DE. Alternatively, the control unit 220 may control the adjustment unit 230 based on the measurement result of the temperature sensor 139 that measures the temperature of the circuit block CB.

[0067] According to this embodiment, since the inspection devices 2 and 2a are equipped with a temperature sensor 139, the actual temperature of the semiconductor device DE and the circuit block CB can be confirmed. Therefore, it is possible to monitor whether the semiconductor device DE and the circuit block CB are maintaining the target set temperature. In addition, unexpected temperature changes can be detected. Furthermore, by feedback control of the temperature adjustment element 131, the performance in maintaining the target set temperature can be improved. Other configurations and effects are described in Embodiment 1.

[0068] <Embodiment 3> Next, a semiconductor device DE inspection apparatus according to Embodiment 3 will be described. Figure 22 is a configuration diagram illustrating a semiconductor device DE inspection apparatus 3 according to Embodiment 3. As shown in Figure 22, the inspection apparatus 3 further comprises a storage unit 240. The storage unit 240 is connected to the control unit 220 in a manner that enables information transmission. The storage unit 240 functions as a storage means.

[0069] Figure 23 is a block diagram illustrating the control unit 220 and storage unit 240 according to Embodiment 3. As shown in Figure 23, the control unit 220 may include, for example, an information processing device such as a microcomputer, personal computer, server, tablet, or mobile terminal. The control unit 220 may further include a processor PRC, memory MMR, and user interface UI. The control unit 220 may also include a storage unit 240.

[0070] The memory unit 240 stores a program that describes the processing performed by each component of the control unit 220. The processor PRC loads the program from the memory unit 240 into the memory MMR and executes the program. In this way, the processor PRC realizes the functions of each component in the control unit 220. The user interface UI may include input devices such as a keyboard, mouse, and imaging device, as well as output devices such as a display, printer, and speaker.

[0071] Each component of the control unit 220 may be implemented with dedicated hardware. Furthermore, some or all of each component may be implemented by general-purpose or dedicated circuits, processors (PRCs), etc., or combinations thereof. These may be implemented by a single chip or by multiple chips connected via a bus. Some or all of each component may be implemented by a combination of the aforementioned circuits, etc., and a program. Additionally, a CPU, GPU, FPGA, quantum processor (quantum computer control chip), etc., can be used as the processor (PRC).

[0072] Furthermore, if some or all of the components of the control unit 220 are implemented by multiple information processing devices or circuits, these devices may be centrally located or distributed. For example, the information processing devices or circuits may be implemented in a form where each is connected via a communication network (NW) by a client-server system, a cloud computing system, etc. Also, the functions of the control unit 220 may be provided in SaaS (Software as a Service) format.

[0073] The storage unit 240 may store information about the semiconductor device DE and various data. The storage unit 240 may include, for example, information such as the tables shown in Figures 8 to 14 above. The storage unit 240 may store the power change profile that the tester 210 is scheduled to apply to the semiconductor device DE as semiconductor device information. Therefore, the information about the semiconductor device DE includes the power change profile that is scheduled to be applied to the semiconductor device DE. The control unit 220 controls the adjustment unit 230 based on the information about the semiconductor device DE stored in the storage unit 240. Specifically, the control unit 220 controls the adjustment unit 230, which adjusts the output of each temperature adjustment element 131 based on the power change profile that is scheduled to be applied to the semiconductor device DE. The control unit 220 may control the adjustment unit 230 prior to the power change profile to be applied to the semiconductor device DE.

[0074] Figure 24 is a graph illustrating the power change profile applied to the tester 210 and the temperature control element 131 in the semiconductor device DE inspection apparatus 3 according to Embodiment 3. The horizontal axis represents time, and the vertical axis represents the power of the tester 210 and the power of the temperature control element 131. As shown in Figure 24, the control unit 220 controls the tester 210 to apply power to the semiconductor device DE with a predetermined power change profile. By applying power with such a power change profile, the tester 210 inspects the semiconductor device DE.

[0075] Meanwhile, the control unit 220 controls the adjustment unit 230 by a time T preceding the power application of the tester 210 to the semiconductor device DE. Specifically, the control unit 220 controls the adjustment unit 230 so that it applies power (including current) to the temperature adjustment element 131 with a power change profile corresponding to the power change profile, prior to the power applied by the tester 210 to the semiconductor device. The adjustment unit 230 drives the temperature adjustment element 131 prior to the heat generated by the semiconductor device DE, so as to counteract the amount of heat generated in the semiconductor device DE by the power change profile to be applied to the semiconductor device DE.

[0076] Figure 25 is a flowchart illustrating the inspection of a semiconductor device DE in the inspection method for a semiconductor device DE according to Embodiment 3. As shown in Figure 25, steps S201 to S204 are the same as the inspection method of Embodiment 1. After step S204, steps S207 and S208 are performed.

[0077] Subsequently, in step S301, the control unit 220 acquires in advance a power change profile to be applied to the semiconductor device DE according to the determined inspection content. At this time, the control unit 220 may acquire the power change profile immediately before performing the inspection, or it may use a power change profile previously stored in the storage unit 240.

[0078] In step S302, the control unit 220 uses a previously acquired power change profile to cause the adjustment unit 230 to start driving the temperature adjustment element 131 before power from the tester 210 is applied to the semiconductor device DE under test. In this way, the control unit 220 controls the adjustment unit 230 prior to the power change profile applied to the semiconductor device DE.

[0079] In step S303, the control unit 220 starts applying the power change profile to the semiconductor device DE to be tested to the tester 210 after a period of time has elapsed for the heat absorbed by the temperature control element 131 to be transferred to the heat-generating part 136 of the semiconductor device DE to be tested. The subsequent steps are the same as steps S210 to S211 of Embodiment 1.

[0080] According to this embodiment, the control unit 220 controls the temperature control element 131 located at the heat-generating portion 136 of the semiconductor device DE in advance of the power change profile during inspection of the semiconductor device DE. This makes it possible to offset the amount of heat generated before the temperature of the heat-generating portion 136 rises, thereby mitigating the temperature rise of the heat-generating portion 136. Other configurations and effects are described in Embodiments 1 and 2.

[0081] <Example 1> Next, a semiconductor device DE inspection apparatus 3 according to a modified example 1 of Embodiment 3 will be described. The configuration of the inspection apparatus 3 in this modified example is the same as the configuration of the inspection apparatus 3 described above. In this modified example, the control unit 220 causes the tester 210 to measure the consumed power by applying a dedicated sequence of electrical signals to the semiconductor device DE. The control unit 220 then controls the adjustment unit 230 based on the difference between the measured power consumption and the power consumption consumed by the semiconductor device DE as designed.

[0082] Figure 26 is a flowchart illustrating the inspection of a semiconductor device DE to be inspected in a method for inspecting a semiconductor device DE according to a modified example 1 of Embodiment 3. As shown in Figure 26, steps S201 to S301 are the same as in Embodiment 3.

[0083] In step S401, a dedicated sequence of electrical signals is applied to the semiconductor device DE to be tested, and the consumed power is measured. Alternatively, the power consumption obtained by applying a dedicated sequence of electrical signals to a nearby semiconductor device DE in advance may be used. The measurement of power consumption using the dedicated sequence is performed by the control unit 220 controlling the tester 210. Thus, this modified version includes the step of measuring the consumed power by applying a dedicated sequence of electrical signals to the semiconductor device DE.

[0084] In step S402, if there is a difference between the power consumption obtained by a dedicated sequence and the power consumption consumed by the semiconductor device DE in the design, a current correction amount is obtained for the temperature control element 131 that cancels out the amount of heat generated by the difference in power consumption.

[0085] In step S403, the amount of current applied to the temperature control element 131 is controlled by taking into account the acquired correction amount. In other words, the adjustment unit 230 is controlled based on the correction amount of the current that corrects the difference between the measured power consumption and the power consumption consumed by the semiconductor device DE obtained by the design simulation. The subsequent steps are the same as steps S303, S210, and S211 of Embodiment 3.

[0086] The power consumption of a semiconductor device DE is affected by the manufacturing process of the wafer WF. Therefore, the power consumption of a semiconductor device DE may vary depending on its position on the wafer WF. Consequently, the amount of heat generated also varies depending on its position on the wafer WF. According to this modified example, the temperature control element 131 is controlled with a correction amount suitable for the amount of heat generated by each semiconductor device DE, so the temperature rise of the heat-generating part 136 of the semiconductor device DE can be accurately suppressed.

[0087] <Modification 2> Next, a semiconductor device DE inspection apparatus 3 according to a modified example 2 of Embodiment 3 will be described. The configuration of the inspection apparatus 3 in this modified example is the same as the configuration of the inspection apparatus 3 described above. In this modified example, the control unit 220 controls the adjustment unit 230 based on the test results of at least one of the WAT and the completed tests performed on the semiconductor device DE in advance.

[0088] Figure 27 is a flowchart illustrating the inspection of a semiconductor device DE to be inspected in a semiconductor device inspection method according to a modified example 2 of Embodiment 3. As shown in Figure 27, steps S200 to S301 are the same as in Embodiment 3.

[0089] In step S501, the measurement results of the Wafer Acceptance Test (WAT) corresponding to the semiconductor device DE to be inspected are used to obtain values ​​from the storage unit 240 that allow for the determination of the quality of each semiconductor device DE, including its workmanship.

[0090] In step S502, if there is a difference between the acquired measurement result and the expected value, a correction amount is acquired for the amount of current applied to the temperature control element 131 to offset the amount of heat generated by the difference.

[0091] In step S503, the amount of current applied to the temperature control element 131 is controlled by taking into account the acquired correction amount. The subsequent steps are the same as steps S303, S210, and S211 of Embodiment 3. In this modified example, the measurement results of the previously performed inspection may be used instead of the measurement results of the WAT. Thus, in this modified example, the adjustment unit 230 is controlled based on the inspection results of at least one of the WAT and the previously performed inspection process performed on the semiconductor device DE.

[0092] In this modified example, it is possible to address the amount of heat generated due to power consumption, taking into account the effects of the wafer WF manufacturing process. As a result, the temperature control element 131 is controlled with a current amount suitable for the amount of heat generated by each semiconductor device DE, thereby accurately suppressing the temperature rise of the heat-generating portion 136 of the semiconductor device DE.

[0093] The present invention has been described in detail above based on embodiments, but it goes without saying that the present invention is not limited to the above embodiments and can be modified in various ways without departing from its essence. For example, combinations of the configurations of the comparative examples, embodiments 1 to 3, and modified examples 1 to 2 are also within the scope of the technical concept of the embodiments. Furthermore, the following configurations are also within the scope of the technical concept of the embodiments.

[0094] While the method for testing semiconductor device DE is described as testing the semiconductor device DE with probe card 140 and tester 210, it is not limited to this. For example, the method for testing semiconductor device DE may also be a method that tests the reflection and absorption of light by irradiating it with light, or a method that tests the absorption of magnetic fields by applying magnetism.

[0095] The following semiconductor device inspection program, which causes a computer to execute a method for inspecting a semiconductor device DE, is also within the scope of the technical concept of the embodiment. Such a program can be stored and supplied to a computer using various types of non-temporary computer-readable media. Non-temporary computer-readable media include various types of tangible recording media. Examples of non-temporary computer-readable media include magnetic recording media (e.g., flexible disks, magnetic tapes, hard disk drives), magneto-optical recording media (e.g., magneto-optical disks), CD-ROMs (Read Only Memory), CD-Rs, CD-R / Ws, and semiconductor memories (e.g., mask ROMs, PROMs (Programmable ROMs), EPROMs (Erasable PROMs), flash ROMs, RAMs (Random Access Memory)). The program may also be supplied to the computer by various types of temporary computer-readable media. Examples of temporary computer-readable media include electrical signals, optical signals, and electromagnetic waves. Temporary computer-readable media can be supplied to the computer via wired communication channels such as electric wires and optical fibers, or via wireless communication channels.

[0096] (Note A1) A semiconductor device inspection program that causes a computer to perform the step of inspecting a semiconductor device in a sample placed on the stage of a semiconductor device inspection apparatus, The semiconductor device inspection apparatus comprises the stage having a temperature control unit, The temperature control unit includes a plurality of temperature control elements, Multiple temperature control elements are arranged side by side in a plane parallel to the stage surface of the stage on which the sample, which includes at least one of the semiconductor devices, is placed. The in-plane size of each temperature control element is less than or equal to the in-plane size of the semiconductor device. A testing program for semiconductor devices. (Appendix A2) In the step of inspecting the semiconductor device, At least one of the temperature control elements is controlled differently from the other temperature control elements. The semiconductor device inspection program described in Appendix A1. (Note A3) The aforementioned stage has a temperature control unit different from the temperature control unit, The temperature control unit further causes the computer to perform at least one of heating and / or cooling so that the temperature of the stage reaches a predetermined value. The semiconductor device inspection program described in Appendix A1. (Note A4) The step of inspecting the aforementioned semiconductor device is: The step includes a temperature sensor measuring the temperature of the semiconductor device, The semiconductor device inspection program described in Appendix A1. (Note A5) The temperature sensor is positioned between adjacent temperature control elements. The semiconductor device inspection program described in Appendix A4. (Note A6) The temperature sensor is arranged on a probe card having a probe that contacts the terminals of the semiconductor device. The semiconductor device inspection program described in Appendix A4. (Note A7) The step of inspecting the aforementioned semiconductor device is: The steps include: bringing the probe of the probe card into contact with the terminals of the semiconductor device; The steps include: testing the semiconductor device by applying current to the semiconductor device via the probe of the tester; including, The semiconductor device inspection program described in Appendix A1. (Note A8) The step of inspecting the aforementioned semiconductor device is: The step includes determining the inspection content of the semiconductor device, The semiconductor device inspection program described in Appendix A1. (Note A9) The semiconductor device includes a plurality of circuit blocks, The size of each temperature control element within the plane is less than or equal to the size of the circuit block within the plane. The semiconductor device inspection program described in Appendix A1. (Note A10) The step of inspecting the aforementioned semiconductor device is: The steps include identifying at least one of a plurality of circuit blocks included in the semiconductor device to which current is applied, A step of identifying the temperature control element associated with the identified circuit block, including, The semiconductor device inspection program described in Appendix A1. (Note A11) The temperature control unit is positioned between the temperature control unit and the stage surface. The semiconductor device inspection program described in Appendix A3. (Note A12) Each temperature control element is controlled by the adjustment unit. The semiconductor device inspection program described in Appendix A1. (Note A13) The adjustment unit is, Based on the results of a tester that inspects the semiconductor device by applying current to it, each temperature control element is controlled. The semiconductor device inspection program described in Appendix A12. (Note A14) The adjustment unit is, Based on the results of a temperature sensor that measures the temperature of the semiconductor device, each temperature control element is controlled. The semiconductor device inspection program described in Appendix A12. (Note A15) The adjustment unit is, Based on the information of the semiconductor device stored in the memory unit, each temperature control element is controlled. The semiconductor device inspection program described in Appendix A12. (Note A16) The adjustment unit is, Based on the power change profile to be applied to the semiconductor device, each temperature control element is controlled. The semiconductor device inspection program described in Appendix A12. (Note A17) The adjustment unit is, Prior to the power change profile applied to the semiconductor device, each temperature control element is controlled. The semiconductor device inspection program described in Appendix A12. (Note A18) The step of inspecting the aforementioned semiconductor device is: The step includes measuring the consumed power by applying a dedicated sequence of electrical signals to the semiconductor device, The adjustment unit is, Each temperature control element is controlled based on a correction amount that corrects the difference between the measured power consumption and the power consumption consumed by the semiconductor device in the design. The semiconductor device inspection program described in Appendix A12. (Note A19) The adjustment unit is, Based on the results of at least one of the WAT and completed tests performed on the semiconductor device, each temperature control element is controlled. The semiconductor device inspection program described in Appendix A12. [Explanation of Symbols]

[0097] 1, 2, 2a, 3 Inspection equipment 11. Inspection equipment 100, 101 Prova 110 stages 111 Stages 112 Stages 120 Temperature Control Unit 130 Temperature control unit 131, 131a Temperature control element 132 Peltier element 133 N-type semiconductor 134 P-type semiconductor 135 Metal 136. Area of ​​fever 137, 138 Heatwave 139 Temperature sensor 140 Probe Cards 150 probes 160 Self-induced fever 201 Tester 210 Tester 220 Control Unit 230 Adjustment section 240 Storage section CB circuit block DE Semiconductor Devices WF wafer

Claims

1. The system includes a step of inspecting a semiconductor device in a sample placed on the stage of a semiconductor device inspection apparatus, The semiconductor device inspection apparatus comprises the stage having a temperature control unit, The temperature control unit includes a plurality of temperature control elements, Multiple temperature control elements are arranged side by side in a plane parallel to the stage surface of the stage on which the sample, which includes at least one of the semiconductor devices, is placed. The in-plane size of each temperature control element is less than or equal to the in-plane size of the semiconductor device. Methods for testing semiconductor devices.

2. In the step of inspecting the semiconductor device, At least one of the temperature control elements is controlled differently from the other temperature control elements. A method for inspecting a semiconductor device according to claim 1.

3. The aforementioned stage has a temperature control unit different from the temperature control unit, The temperature control unit further comprises the step of heating and cooling the stage so that the temperature of the stage reaches a predetermined value. A method for inspecting a semiconductor device according to claim 1.

4. The step of inspecting the aforementioned semiconductor device is: The step includes a temperature sensor measuring the temperature of the semiconductor device, A method for inspecting a semiconductor device according to claim 1.

5. The temperature sensor is positioned between adjacent temperature control elements. A method for inspecting a semiconductor device according to claim 4.

6. The temperature sensor is arranged on a probe card having a probe that contacts the terminals of the semiconductor device. A method for inspecting a semiconductor device according to claim 4.

7. The step of inspecting the aforementioned semiconductor device is: The steps include: bringing the probe of the probe card into contact with the terminals of the semiconductor device; The steps include: testing the semiconductor device by applying current to the semiconductor device via the probe of the tester; including, A method for inspecting a semiconductor device according to claim 1.

8. The step of inspecting the aforementioned semiconductor device is: The step includes determining the inspection content of the semiconductor device, A method for inspecting a semiconductor device according to claim 1.

9. The semiconductor device includes a plurality of circuit blocks, The size of each temperature control element within the plane is less than or equal to the size of the circuit block within the plane. A method for inspecting a semiconductor device according to claim 1.

10. The step of inspecting the aforementioned semiconductor device is: The steps include identifying at least one of a plurality of circuit blocks included in the semiconductor device to which current is applied, A step of identifying the temperature control element associated with the identified circuit block, including, A method for inspecting a semiconductor device according to claim 1.

11. The temperature control unit is positioned between the temperature control unit and the stage surface. A method for inspecting a semiconductor device according to claim 3.

12. Each temperature control element is controlled by the adjustment unit. A method for inspecting a semiconductor device according to claim 1.

13. The adjustment unit is, Based on the results of a tester that inspects the semiconductor device by applying current to it, each temperature control element is controlled. The method for inspecting a semiconductor device according to claim 12.

14. The adjustment unit is, Based on the results of a temperature sensor that measures the temperature of the semiconductor device, each temperature control element is controlled. The method for inspecting a semiconductor device according to claim 12.

15. The adjustment unit is, Based on the information of the semiconductor device stored in the memory unit, each temperature control element is controlled. The method for inspecting a semiconductor device according to claim 12.

16. The adjustment unit is, Based on the power change profile to be applied to the semiconductor device, each temperature control element is controlled. The method for inspecting a semiconductor device according to claim 12.

17. The adjustment unit is, Prior to the power change profile applied to the semiconductor device, each temperature control element is controlled. The method for inspecting a semiconductor device according to claim 12.

18. The step of inspecting the aforementioned semiconductor device is: The step includes measuring the consumed power by applying a dedicated sequence of electrical signals to the semiconductor device, The adjustment unit is, Each temperature control element is controlled based on a correction amount that corrects the difference between the measured power consumption and the power consumption consumed by the semiconductor device in the design. The method for inspecting a semiconductor device according to claim 12.

19. The adjustment unit is, Based on the results of at least one of the WAT and completed tests performed on the semiconductor device, each temperature control element is controlled. The method for inspecting a semiconductor device according to claim 12.

20. A semiconductor device inspection program that causes a computer to perform the step of inspecting a semiconductor device in a sample placed on the stage of a semiconductor device inspection apparatus, The semiconductor device inspection apparatus comprises the stage having a temperature control unit, The temperature control unit includes a plurality of temperature control elements, Multiple temperature control elements are arranged side by side in a plane parallel to the stage surface of the stage on which the sample, which includes at least one of the semiconductor devices, is placed. The in-plane size of each temperature control element is less than or equal to the in-plane size of the semiconductor device. A testing program for semiconductor devices.

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