Measurement method, measurement system, and inspection device

Abstract

This technology provides a method for accurately measuring the parallelism between the object being measured and a reference surface. [Solution] A measurement method is provided which includes the steps of: projecting a pattern onto a measurement target; receiving a first reflection pattern obtained by the measurement target from which the pattern has been reflected; projecting the pattern onto a reference surface that serves as a reference for parallelism; receiving a second reflection pattern obtained by the reference surface from which the pattern has been reflected; observing the first reflection pattern and the second reflection pattern; and measuring the parallelism between the measurement target and the reference surface based on the difference between the first reflection pattern and the second reflection pattern.

Description

Technical Field

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[0004] , , ,

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[0001] The present disclosure relates to a measurement method, a measurement system, and an inspection apparatus.

Background Art

[0002] There is a technique for measuring the parallelism between an object to be measured and a reference plane. For example, Patent Document 1 discloses an inspection apparatus including a support base for supporting a test object and a parallelism detection means provided above the support base and including an imaging device for detecting the parallelism between the test object and a probing card, and pressing the tip of the probing card against the test object to form a trace detected by the parallelism detection means.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The present disclosure provides a technique for accurately measuring the parallelism between a measurement object and a reference plane.

Means for Solving the Problems

[0005] [[ID=?]] According to one aspect of the present disclosure, there is provided a measurement method including a step of projecting a pattern onto a measurement object, a step of receiving a first reflected pattern in which the pattern is reflected by the measurement object, a step of projecting a pattern onto a reference plane serving as a reference for parallelism, a step of receiving a second reflected pattern in which the pattern is reflected by the reference plane, a step of observing the first reflected pattern and the second reflected pattern, and a step of measuring the parallelism between the measurement object and the reference plane based on the difference between the first reflected pattern and the second reflected pattern.

Effects of the Invention

[0006] It should be noted that there are some consecutive tags with the same content in the original text which seem to be placeholders without clear semantic meaning in context. I have left them as they are in the translation. Also, the "?" in the translation for lines 39 - 41 in the original Japanese text might be a formatting or tagging issue in the original that wasn't transferred clearly. If there's more context or correction needed for those parts, please provide additional information.One aspect of this method is that it allows for accurate measurement of the parallelism between the object being measured and the reference surface. [Brief explanation of the drawing]

[0007] [Figure 1] This is a schematic cross-sectional view showing an example of an inspection device. [Figure 2] This is a schematic cross-sectional view showing an example of a camera unit according to the first embodiment. [Figure 3] A block diagram showing an example of a computer hardware configuration. [Figure 4] This is a block diagram showing an example of the functional configuration of a control device. [Figure 5] This figure shows an example of an image taken when the object being measured is parallel to the reference plane. [Figure 6] This figure shows an example of an image taken when the object being measured and the reference plane are not parallel. [Figure 7] This figure shows an example of a parallelism measurement method according to the first embodiment. [Figure 8] This figure shows an example of the directional properties of different light sources. [Figure 9] This figure shows an example of dot size according to parallelism. [Figure 10] This figure shows an example of the relationship between the presence or absence of inclination and the captured image. [Figure 11] This flowchart shows an example of an inspection method. [Figure 12] This is a schematic cross-sectional view showing an example of a camera unit according to the second embodiment. [Figure 13] This figure shows a modified example of the parallelism measurement method according to the second embodiment. [Modes for carrying out the invention]

[0008] The following describes embodiments for implementing this disclosure with reference to the drawings. In each drawing, the same reference numerals are used for identical components, and redundant explanations may be omitted.

[0009] [First Embodiment] One embodiment of the present disclosure is an inspection apparatus for inspecting an object to be inspected. The object to be inspected may include, for example, a semiconductor device, a photonic integrated circuit (PIC), or co-package optics (CPO). In this embodiment, the inspection apparatus may inspect the electrical properties of a semiconductor device formed on a semiconductor wafer by bringing the needle tip of a probe provided on a probe card into contact with an electrode (test pad) provided on the semiconductor wafer. The inspection apparatus may also inspect the optical properties of a photonic integrated circuit using a ferrule or waveguide.

[0010] In recent years, inspection equipment has been required to have higher precision alignment capabilities. For example, optical inspection in silicon photonics requires alignment accuracy in the submicron range. Therefore, in order to improve the parallelism between the mounting stage on which the object to be inspected is placed and the probe card, technology is needed to measure the parallelism between the mounting stage and the probe card with high precision.

[0011] The inspection apparatus according to this embodiment is an example of a measurement system for measuring the parallelism between a measurement target and a reference surface. The inspection apparatus includes a camera unit for measuring the parallelism between a semiconductor wafer, which is an example of a measurement target, and the reference surface. Based on the parallelism measured using the camera unit, the inspection apparatus adjusts the mounting stage on which the semiconductor wafer is placed and brings the tip of the probe needle into contact with the test pad.

[0012] The reference plane is, for example, the plane containing the tip of the probe needle on the probe card. The camera unit is pre-adjusted to image the semiconductor wafer in a direction perpendicular to the reference plane.

[0013] In one aspect, this embodiment allows for accurate measurement of the parallelism between the semiconductor wafer and the reference surface. In another aspect, this embodiment allows for accurate contact between the probe tip and the test pad, as the mounting stage can be adjusted so that the semiconductor wafer is parallel to the reference surface based on the measured parallelism.

[0014] <Inspection device> An example of the inspection device according to this embodiment will be described with reference to FIG. 1. FIG. 1 is a schematic cross-sectional view showing an example of the inspection device.

[0015] As shown in FIG. 1, the inspection device 10 includes an inspection device main body 20 and a control device 50. The inspection device main body 20 has a hollow housing 21. A moving mechanism 23 for moving the mounting table 25 in the vertical direction (z-axis direction shown in FIG. 1) and the horizontal direction (direction in the xy plane parallel to the x-axis and y-axis shown in FIG. 1) is provided substantially at the center inside the housing 21. A semiconductor wafer W is placed on the upper surface of the mounting table 25. The mounting table 25 adsorbs and holds the semiconductor wafer W placed on its upper surface by means of a vacuum chuck or the like.

[0016] A camera unit 41 is provided on the side surface of the mounting table 25. The camera unit 41 is movable to a position facing a probe card 33 described later. For example, when the mounting table 25 is moved by the moving mechanism 23, the camera unit 41 provided on the side surface of the mounting table 25 moves. The moving mechanism 23 is controlled by the control device 50. The moving amount of the moving mechanism 23 is managed by the control device 50. The position of the camera unit 41 inside the housing 21 is managed by the control device 50.

[0017] A camera unit 42 is provided inside the housing 21. The camera unit 42 is movable to a position facing the mounting table 25. The camera unit 42 is pre-adjusted so as to be able to image the mounting table 25 or the semiconductor wafer W placed on the mounting table 25. The position of the camera unit 42 inside the housing 21 is managed by the control device 50.

[0018] The camera unit 42 is configured to project a predetermined pattern in a predetermined direction. In this embodiment, the predetermined pattern is a dot pattern in which multiple dots are arranged. The camera unit 42 is provided to project the dot pattern in the imaging direction. When the camera unit 42 projects the dot pattern in the imaging direction at a position facing the mounting table 25, the dot pattern is projected onto the surface of the semiconductor wafer W placed on the upper surface of the mounting table 25.

[0019] The camera unit 42 is configured to receive light incident from a predetermined direction. In this embodiment, the camera unit 42 is configured to receive light incident from the imaging direction. The camera unit 42 projects a dot pattern onto the semiconductor wafer W at a position facing the mounting table 25, and is therefore able to receive the dot pattern reflected by the semiconductor wafer W.

[0020] The camera unit 42 observes the projected dot pattern and captures an image containing the observed dot pattern. The camera unit 42 also observes the received dot pattern and captures an image containing the observed dot pattern. In this embodiment, the camera unit 42 is configured to simultaneously observe the projected dot pattern and the received dot pattern and capture an image in which the projected and received dot patterns are superimposed. However, the camera unit 42 may capture the image containing the projected dot pattern and the image containing the received dot pattern separately. Furthermore, the camera unit 42 may observe the projected dot pattern and the received dot pattern at different timings.

[0021] The housing 21 has a roughly circular opening at its top. A test head 30 is provided in the opening of the housing 21. The test head 30 is connected via an interface 32 to a probe card 33 on which a plurality of probes 34 are provided. The interface 32 detachably holds the probe card 33 at its bottom. The plurality of probes 34 provided on the probe card 33 are arranged on the probe card 33 so that their needle tips face downward. The probe card 33 may have probes 34 capable of optical inspection.

[0022] The probe card 33 has multiple probes 34 arranged such that when the semiconductor wafer W placed on the mounting table 25 moves to the position for inspection, the tips of the probes 34 contact the test pads provided on the semiconductor wafer W. The probes 34 are connected to wiring provided on the probe card 33. The wiring provided on the probe card 33 may include optical fibers and electrical cables. The wiring provided on the probe card 33 is connected to the test head 30 via wiring provided on the interface 32. An external tester 31 is connected to the test head 30.

[0023] When inspecting a semiconductor wafer W placed on a mounting table 25, the control device 50 moves the camera unit 41 to a position facing the mounting table 25. Based on the image captured by the camera unit 41, the control device 50 adjusts the position and orientation of the mounting table 25. Specifically, the control device 50 uses the movement mechanism 23 to control the position of the mounting table 25 in the xy plane and the tilt of the mounting table 25 with respect to the z axis so that the needle tip of the probe 34 faces each test pad on the semiconductor wafer W placed on the mounting table 25. Note that the position of the mounting table 25 in the xy plane may have already been adjusted.

[0024] The control device 50 adjusts the position and orientation of the mounting table 25, and then raises the mounting table 25 to bring the tip of the probe 34 into contact with each test pad on the semiconductor wafer W. The control device 50 then controls the external tester 31 to output a predetermined inspection signal to the test head 30. The inspection signal may include electrical and optical signals. The test head 30 outputs the inspection signal output from the external tester 31 to the probe card 33 via the interface 32. The inspection signal output to the probe card 33 is supplied to the probe 34 via the wiring inside the probe card 33. The inspection signal supplied to the probe 34 is output to the semiconductor wafer W via the probe 34.

[0025] The test signal output from the semiconductor wafer W is input to probe 34. The test signal input to probe 34 is output to test head 30 via the wiring in probe card 33 and the wiring in interface 32. The test signal output to test head 30 is output to external tester 31.

[0026] The external tester 31 evaluates the electrical and optical characteristics of the semiconductor wafer W based on the electrical and optical signals output to the test head 30 and the electrical and optical signals output from the test head 30, and outputs the evaluation results to the control device 50.

[0027] ≪Camera Unit≫ The configuration of the camera unit 42 according to this embodiment will be described with reference to Figure 2. Figure 2 is a schematic cross-sectional view showing an example of the camera unit according to the first embodiment.

[0028] As shown in Figure 2, the camera unit 42 includes a projection unit 61, a bright-field illuminator 62, an imaging unit 63, a mirror 64, dark-field illuminators 65-1, 65-2, a half-mirror 66, a mirror 67, a prism 68, and a mirror 69.

[0029] The projection unit 61 includes a white light source 71 and an aperture substrate 72. The white light source 71 emits strong white light. The white light source 71 may be, for example, a light-emitting diode (LED) or a semiconductor laser (LD). In this embodiment, the white light source 71 is assumed to be an LED light source.

[0030] The aperture substrate 72 forms a predetermined pattern in the strong white light irradiated from the white light source 71. The aperture substrate 72 may, for example, be a multilayer pure chromium substrate with a thickness of 2000 Å. A multilayer pure chromium substrate, which is an example of the aperture substrate 72, may have a predetermined pattern processed by dry etching. In this embodiment, the aperture substrate 72 forms a dot pattern containing multiple dots by dividing the strong white light into multiple dots. Hereinafter, the dot pattern formed in the strong white light will be referred to as the "projection pattern." The projection pattern is an example of a pattern.

[0031] The strong white light, on which a projection pattern has been formed by the aperture substrate 72, is incident on the prism 68. The prism 68 transmits the incident strong white light in the direction of illumination and also branches it in a direction perpendicular to the direction of illumination.

[0032] The strong white light transmitted through the prism 68 is directed downwards after passing through the half mirror 66 and the mirror 64. As a result, the projection pattern formed in the strong white light is projected onto the semiconductor wafer W. The projection pattern projected onto the semiconductor wafer W can be observed at the focal point FP by illumination with dark-field illumination 65-1 and 65-2. The working distance WD is the distance between the camera unit 42 and the focal point FP.

[0033] The strong white light branched by the prism 68 is reflected by the mirror 69, passes through the prism 68, and illuminates the imaging unit 63. The reflected light reflected by the mirror 69 contains a dot pattern formed in the strong white light by the aperture substrate 72. This makes the projection pattern formed in the strong monochromatic light imageable by the imaging unit 63. The mirror 69 is pre-adjusted to be parallel to the reference plane R. Hereinafter, the dot pattern contained in the reflected light will be referred to as the "reflection pattern." The dot pattern contained in the reflected light reflected by the mirror 69 is an example of a second reflection pattern. The prism 68 is an example of a second light receiving unit.

[0034] The bright-field illumination 62 is an illumination that emits visible light. The visible light emitted by the bright-field illumination 62 passes through the mirror 67 and the half-mirror 66 and is emitted in the direction of the strong white light. The visible light emitted by the bright-field illumination 62 merges with the strong white light emitted by the white light source 71 at the half-mirror 66. The visible light emitted by the bright-field illumination 62 makes it possible to inspect for abnormalities on the surface of the semiconductor wafer W.

[0035] The projection pattern projected from the camera unit 42 onto the semiconductor wafer W is reflected back towards the camera unit 42 from the surface of the semiconductor wafer W. The camera unit 42 receives the incident reflected light using the mirror 64. The reflected light incident on the camera unit 42 includes a dot pattern formed in strong white light by the aperture substrate 72. The dot pattern included in the reflected light reflected from the surface of the semiconductor wafer W is an example of a first reflection pattern.

[0036] The mirror 64 reflects the reflected light incident on the camera unit 42 in a direction that can be captured by the imaging unit 63. The reflected light reflected by the mirror 64 passes through the half mirror 66 and the prism 68 and is then irradiated onto the imaging unit 63. As a result, the reflection pattern contained in the reflected light can be captured by the imaging unit 63. The mirror 64 is an example of a first light receiving unit.

[0037] The imaging unit 63 observes the strong white light reflected by the mirror 69 and the reflected light reflected by the semiconductor wafer W, and captures an image including a first reflection pattern and a second reflection pattern. The first reflection pattern and the second reflection pattern are merged by the prism 68 and illuminated onto the imaging unit 63. Therefore, the imaging unit 63 can capture the first reflection pattern and the second reflection pattern simultaneously. The image captured by the imaging unit 63 has the first reflection pattern and the second reflection pattern superimposed on it. Hereinafter, the image captured with the first reflection pattern and the second reflection pattern superimposed will be called the "captured image".

[0038] ≪Control device≫ The control device 50 is implemented by a computer with a hardware configuration such as that shown in Figure 3. Figure 3 is a block diagram showing an example of a computer hardware configuration.

[0039] As shown in Figure 3, the computer 500 is equipped with an input device 501, an output device 502, an external interface 503, RAM (Random Access Memory) 504, ROM (Read Only Memory) 505, a CPU (Central Processing Unit) 506, a communication interface 507, and an HDD (Hard Disk Drive) 508, all of which are interconnected via bus B. The input device 501 and output device 502 may be connected and used only when necessary.

[0040] The input device 501 is a keyboard, mouse, touch panel, etc., used by operators to input various operation signals. The output device 502 is a display, etc., which displays the processing results from the computer 500. The communication I / F 507 is an interface that connects the computer 500 to a network. The HDD 508 is an example of a non-volatile storage device that stores programs and data.

[0041] External I / F 503 is an interface to external devices. Computer 500 can read from and / or write to recording media 503a such as an SD (Secure Digital) memory card via External I / F 503. ROM 505 is an example of a non-volatile semiconductor memory (storage device) that stores programs and data. RAM 504 is an example of a volatile semiconductor memory (storage device) that temporarily holds programs and data.

[0042] The CPU 506 is a processing unit that reads programs and data from storage devices such as the ROM 505 and HDD 508 onto the RAM 504 and executes processing, thereby realizing the overall control and functions of the computer 500.

[0043] <Functional Configuration> The functional configuration of the control device 50 will be explained with reference to Figure 4. Figure 4 is a diagram showing an example of the functional configuration of the control device.

[0044] As shown in Figure 4, the control device 50 includes a projection control unit 101, a light receiving control unit 102, an image acquisition unit 103, a dot selection unit 104, a parallelism measurement unit 105, and a mounting table adjustment unit 106. For example, the projection control unit 101, the light receiving control unit 102, the image acquisition unit 103, the dot selection unit 104, the parallelism measurement unit 105, and the mounting table adjustment unit 106 are realized by the CPU 506 shown in Figure 3 executing a program loaded on the RAM 504.

[0045] The projection control unit 101 controls the camera unit 42 to project a projection pattern. The projection control unit 101 may also control the brightness of the projection pattern projected from the camera unit 42 according to the height of the mounting table 25.

[0046] The light receiving control unit 102 controls the camera unit 42 to receive the reflection pattern reflected by the semiconductor wafer W. The control for the camera unit 42 to receive the reflection pattern includes controlling the camera unit 42 to a position where the reflection pattern can be received.

[0047] The image acquisition unit 103 controls the camera unit 42 to capture an image. The image acquisition unit 103 acquires the captured image captured by the imaging unit 63 of the camera unit 42. If optical distortion occurs in the captured image, the image acquisition unit 103 may correct the optical distortion.

[0048] The dot selection unit 104 selects the dots to be used for measuring parallelism from among the multiple dots included in the captured image. Specifically, the dot selection unit 104 excludes dots from the dots used for measuring parallelism if the distance between the dots included in the projection pattern and the dots included in the reflection pattern is an abnormal value. The abnormal distance values ​​may be determined based on the distribution of the distances of each dot included in the captured image.

[0049] In this embodiment, the parallelism between the semiconductor wafer W and the reference surface R is measured based on the distance between the dots in the projection pattern and the dots in the reflection pattern. If the semiconductor wafer W is parallel to the reference surface R, the distance between the dots in the projection pattern and the dots in the reflection pattern will be a minimum value. Conversely, the distance between the dots in the projection pattern and the dots in the reflection pattern indicates the degree of tilt of the semiconductor wafer W with respect to the reference surface R. On the other hand, the tilt of the semiconductor wafer W is not the only cause of the distance between the dots in the projection pattern and the dots in the reflection pattern. For example, if there is localized dirt or scratches on the semiconductor wafer W, the distance between the projection pattern and the reflection pattern may increase for some dots. By excluding dots that show abnormal values ​​in the distance between the dots in the projection pattern and the dots in the reflection pattern from the dots used for measuring parallelism, the parallelism between the semiconductor wafer W and the reference surface R can be measured with greater accuracy.

[0050] The parallelism measurement unit 105 measures the parallelism between the semiconductor wafer W and the reference surface R based on the captured image acquired by the image acquisition unit 103. Specifically, the parallelism measurement unit 105 detects the inclination of the semiconductor wafer W with respect to the reference surface R based on the difference between the projection pattern and the reflection pattern included in the captured image. In this case, the parallelism measurement unit 105 may measure the parallelism between the semiconductor wafer W and the reference surface R using only the dots selected by the dot selection unit 104 from among the dots included in the captured image.

[0051] The mounting table adjustment unit 106 controls the adjustment of the mounting table 25. The mounting table adjustment unit 106 adjusts the inclination of the mounting table 25 based on the parallelism between the semiconductor wafer W and the reference surface R measured by the parallelism measuring unit 105.

[0052] The mounting stage adjustment unit 106 controls the raising of the mounting stage 25 in order to bring the needle tip of the probe 34 into contact with each test pad on the semiconductor wafer W. When the height of the mounting stage 25 is changed, the mounting stage adjustment unit 106 may notify the projection control unit 101 of the amount of change in height. The projection control unit 101 may adjust the brightness of the projection pattern according to the amount of change in height.

[0053] ≪Photo taken≫ The images captured by the camera unit 42 will be explained with reference to Figures 5 and 6. Figure 5 shows an example of an image captured when the measurement object and the reference plane are parallel. Figure 6 shows an example of an image captured when the measurement object and the reference plane are not parallel.

[0054] As shown in Figures 5 and 6, the captured image 100 is an image of a dot pattern containing multiple dots. The multiple dots may be randomly arranged within the dot pattern. The multiple dots may be arranged asymmetrically with respect to a predetermined axis within the dot pattern. The predetermined axis may be the x-axis or y-axis in the image coordinate system. The axis on which the multiple dots are asymmetrical is not limited to the x-axis or y-axis; any axis can be set.

[0055] As shown in Figure 5, when the semiconductor wafer W, which is an example of the object to be measured, and the reference plane R are parallel, the positions of the dots in the projection pattern and the dots in the reflection pattern are almost identical. In addition, the dots captured in the image are almost uniform in size overall.

[0056] As shown in Figure 6, if the semiconductor wafer W, which is an example of the object to be measured, and the reference plane R are not parallel, the positions of the dots in the projection pattern and the dots in the reflection pattern will be misaligned. In this embodiment, since the tilt of the semiconductor wafer W is assumed to be minimal, the dots in the projection pattern and the dots in the reflection pattern will partially overlap. As a result, the captured image will show the dots in an elliptical or capsule shape (a cylindrical shape with hemispherical ends). In addition, because the tilt of the semiconductor wafer W makes the distance between the semiconductor wafer W and the camera unit 42 non-uniform, the dots captured in the image will have a size bias.

[0057] ≪Measurement of parallelism≫ A method for measuring the parallelism between a measurement target and a reference surface based on captured images according to this embodiment will be described with reference to Figure 7. Figure 7 is a diagram showing an example of the parallelism measurement method according to the first embodiment.

[0058] As shown in Figure 7, when the semiconductor wafer W and the reference plane R are not parallel, the center position O1 of the dot D1 in the projection pattern and the center position O2 of the dot D2 in the reflection pattern are at different positions. Furthermore, the greater the inclination of the semiconductor wafer W with respect to the reference plane R, the greater the distance L1 between the center positions O1 and O2.

[0059] Therefore, by calculating the distance between the center positions of each dot captured in the image, the tilt of the semiconductor wafer W with respect to the reference plane R can be detected. Furthermore, the parallelism between the semiconductor wafer W and the reference plane R can be measured based on the magnitude of the tilt detected for each dot. In this embodiment, the greater the distance between the center positions, the greater the tilt of the semiconductor wafer W with respect to the reference plane R, and the lower the parallelism between the semiconductor wafer W and the reference plane R.

[0060] ≪Types of light sources≫ Using a light source with low directivity to project the dot pattern allows for more accurate measurement of the parallelism between the semiconductor wafer W and the reference surface R. In this embodiment, as an example, the white light source 71 that projects the dot pattern is configured using an LED light source.

[0061] Figure 8 shows examples of the directional propagation of light for each light source. Figure 8(A) shows an example of the directional propagation of irradiated light when the light source is an LED. Figure 8(B) shows an example of the directional propagation of irradiated light when the light source is a Vcsel (Vertical Cavity Surface Emitting Laser). Figure 8(C) shows an example of the directional propagation of irradiated light when the light source is a laser.

[0062] As shown in Figure 8(C), lasers have high directivity, and even with long irradiation distances, the area illuminated by light remains narrow. On the other hand, as shown in Figure 8(A), LEDs have low directivity, and the area illuminated by light widens as the irradiation distance increases. As shown in Figure 8(B), the directivity of Vcsel is somewhere between that of LEDs and lasers.

[0063] Figure 9 shows an example of dot size according to parallelism. Figure 9(A) shows an example of dot size when the semiconductor wafer W and the reference surface R are parallel. Figure 9(B) shows an example of dot size when the semiconductor wafer W and the reference surface R are not parallel.

[0064] As shown in Figure 9(A), when the semiconductor wafer W and the reference plane R are parallel, the sizes S1, S2, and S3 of the projected dots D1, D2, and D3 are almost identical. On the other hand, as shown in Figure 9(B), when the semiconductor wafer W and the reference plane R are not parallel, the sizes S1, S2, and S3 of the projected dots D1, D2, and D3 are different. Specifically, the shorter the irradiation distance, the smaller the dot size, and the longer the irradiation distance, the larger the dot size.

[0065] In this case, if the directivity of light is low, the difference in the illuminated area caused by differences in irradiation distance becomes larger. For example, if the light source is an LED, the difference in sizes S1, S2, and S3 in Figure 9(C) is larger than when the light source is a laser. In other words, when a dot pattern is projected using a light source with low directivity, the difference in dot size becomes more pronounced, and the tilt of the semiconductor wafer W can be detected with greater accuracy.

[0066] Figure 10 shows an example of the relationship between the presence or absence of tilt and the captured image. Figure 10 shows captured images when the semiconductor wafer W is tilted (in other words, when the semiconductor wafer W and the reference plane R are parallel) and when the semiconductor wafer W is not tilted (in other words, when the semiconductor wafer W and the reference plane R are not parallel). Figure 10 also shows the distance (shooting distance) between the semiconductor wafer W and the camera unit 42 for each captured image.

[0067] As shown in Figure 10, when the semiconductor wafer W is not tilted, the imaging distance is almost uniform across the entire semiconductor wafer W, and the size of each dot in the captured image is almost uniform. On the other hand, when the semiconductor wafer W is tilted, the imaging distance is non-uniform across the entire semiconductor wafer W. Specifically, the imaging distance becomes longer for dots in the direction of the tilt of the semiconductor wafer W (to the left in Figure 10), and the size of the dots captured in the image becomes larger. Therefore, the direction and magnitude of the tilt of the semiconductor wafer W can be detected based on the distribution of dot sizes in the captured image.

[0068] <Processing Procedure> The inspection method performed by the inspection device 10 will be explained with reference to Figure 11. Figure 11 is a flowchart showing an example of the inspection method.

[0069] In step S101, the projection control unit 101 of the control device 50 controls the camera unit 42 to project a dot pattern. The camera unit 42 projects the dot pattern onto the semiconductor wafer W using the projection unit 61 in accordance with the control of the control device 50. The dot pattern (projected pattern) projected onto the semiconductor wafer W is reflected by the semiconductor wafer W and incident on the camera unit 42. Inside the camera unit 42, the dot pattern (second reflected pattern) reflected by the mirror 69 becomes imageable by the imaging unit 63.

[0070] In step S102, the light receiving control unit 102 of the control device 50 controls the camera unit 42 to receive the dot pattern reflected by the semiconductor wafer W. The camera unit 42 starts receiving the dot pattern (first reflection pattern) reflected by the semiconductor wafer W in accordance with the control by the control device 50.

[0071] In step S103, the image acquisition unit 103 of the control device 50 controls the camera unit 42 to capture an image. The camera unit 42 captures an image in which the first reflection pattern and the second reflection pattern are superimposed by the imaging unit 63, in accordance with the control of the control device 50. The image acquisition unit 103 acquires the captured image from the camera unit 42 and sends it to the dot selection unit 104 and the parallelism measurement unit 105.

[0072] In step S104, the dot selection unit 104 of the control device 50 selects the dots to be used for measuring parallelism from among the multiple dots included in the captured image taken in step S103. Specifically, the dot selection unit 104 excludes dots from the dots used for measuring parallelism if the distance between a dot included in the first reflection pattern and a dot included in the second reflection pattern is an abnormal value. The dot selection unit 104 sends information indicating the selected dots to the parallelism measurement unit 105.

[0073] In step S105, the parallelism measuring unit 105 of the control device 50 measures the parallelism between the semiconductor wafer W and the reference surface R based on the dots selected in step S104 from among the dots included in the captured image taken in step S103. Specifically, the parallelism measuring unit 105 detects the inclination of the semiconductor wafer W with respect to the reference surface R based on the difference between a first reflection pattern and a second reflection pattern included in the captured image. The parallelism measuring unit 105 sends information indicating the measured parallelism to the mounting stage adjustment unit 106.

[0074] In step S106, the mounting table adjustment unit 106 of the control device 50 controls the moving mechanism 23 to adjust the mounting table 25 based on the parallelism measured in step S105. Specifically, the mounting table adjustment unit 106 controls the moving mechanism 23 to change the tilt of the mounting table 25 with respect to the z-axis so that the parallelism between the semiconductor wafer W and the reference surface R is increased.

[0075] In step S107, the mounting table adjustment unit 106 of the control device 50 controls the moving mechanism 23 so that the tip of the probe 34 contacts the test pads provided on the semiconductor wafer W placed on the mounting table 25. The mounting table adjustment unit 106 raises the mounting table 25, whose position and orientation were adjusted in step S106, until the tip of the probe 34 contacts each test pad on the semiconductor wafer W.

[0076] When the tip of the probe 34 makes contact with each test pad on the semiconductor wafer W, the control device 50 controls the external tester 31 to evaluate the electrical and optical properties of the semiconductor wafer W. The control device 50 receives the evaluation results of the electrical and optical properties of the semiconductor wafer W from the external tester 31 and outputs the evaluation results.

[0077] <Effects of the First Embodiment> The inspection device 10 according to this embodiment projects a pattern onto the object to be measured, receives a first reflected pattern formed by the reflection of the pattern by the object to be measured, projects the pattern onto a reference surface that serves as a reference for parallelism, receives a second reflected pattern formed by the reflection of the pattern by the reference surface, and measures the parallelism between the object to be measured and the reference surface based on the difference between the first reflected pattern and the second reflected pattern. In one aspect, according to this embodiment, the parallelism between the object to be measured and the reference surface can be measured with high accuracy.

[0078] The inspection device 10 may observe the first reflection pattern and the second reflection pattern simultaneously. The inspection device 10 may also capture an image in which the first reflection pattern and the second reflection pattern are superimposed. In one aspect, according to this embodiment, since the first reflection pattern and the second reflection pattern can be observed simultaneously, the difference between the first reflection pattern and the second reflection pattern can be easily evaluated.

[0079] The pattern may consist of multiple dots. The multiple dots may be arranged asymmetrically with respect to a predetermined axis. In one aspect, according to this embodiment, the parallelism between the object to be measured and the reference surface can be measured accurately based on the difference between each of the multiple dots.

[0080] The inspection device 10 may select the dots to be used for measuring parallelism based on the difference between the dots included in the first reflection pattern and the dots included in the second reflection pattern. The difference between dots is not caused solely by the inclination of the object being measured. In one respect, according to this embodiment, differences caused by factors other than the inclination of the object being measured can be excluded.

[0081] The inspection device 10 may measure parallelism based on the center distance between the dots in the first reflection pattern and the dots in the second reflection pattern. The center distance between the dots in the first reflection pattern and the dots in the second reflection pattern increases as the inclination of the object being measured increases. In one respect, according to this embodiment, the magnitude of the inclination of the object being measured can be detected accurately for each dot.

[0082] The inspection device 10 may project the pattern using illumination with a light-emitting diode as the light source. Because the light emitted by the light-emitting diode has low linearity, the difference between the first reflection pattern and the second reflection pattern becomes large when the object to be measured is tilted. In one respect, according to this embodiment, the difference between the first reflection pattern and the second reflection pattern can be evaluated with high accuracy.

[0083] [Second Embodiment] In the first embodiment, the control device 50 was configured to measure the parallelism between a semiconductor wafer W, which is an example of a measurement target, and a reference surface R, based on the distance to the center position of dots included in the captured image. In the second embodiment, the camera unit 42 is configured to color the first reflection pattern and the second reflection pattern with different colors. The control device 50 is also configured to measure the parallelism between the semiconductor wafer W and the reference surface R based on the area of ​​the colors included in the captured image.

[0084] The inspection apparatus 10 according to the second embodiment will now be described, focusing on the differences from the first embodiment. Unless otherwise specified, the inspection apparatus 10 according to the second embodiment may be configured in the same way as the first embodiment.

[0085] ≪Camera Unit≫ The configuration of the camera unit 42 according to this embodiment will be described with reference to Figure 12. Figure 12 is a schematic cross-sectional view showing an example of a camera unit according to the second embodiment.

[0086] As shown in Figure 12, the camera unit 42 includes a projection unit 61, a bright-field illuminator 62, an imaging unit 63, a mirror 64, dark-field illuminators 65-1 and 65-2, a half-mirror 66, a mirror 67, a prism 68, a mirror 69, a band-pass filter 81, and a band-pass filter 82. In other words, the camera unit 42 according to this embodiment differs from the first embodiment (see Figure 2) in that it includes a band-pass filter 81 and a band-pass filter 82.

[0087] The bandpass filter 81 is configured to transmit only the wavelength corresponding to the first color. The first color can be any color, but red is one example. The bandpass filter 81 is placed between the prism 68 and the mirror 69. The bandpass filter 81 transmits only the component of the first color from the strong white light branched by the prism 68. In other words, the bandpass filter 81 colors the strong white light on which the projection pattern is formed with the first color. The strong white light colored with the first color is reflected by the mirror 69 and incident on the imaging unit 63 via the prism 68. As a result, the imaging unit 63 is able to capture an image containing a dot pattern colored with the first color.

[0088] The bandpass filter 82 is configured to transmit only the wavelength corresponding to the second color. The second color can be any color, but for example, it may be blue. The bandpass filter 82 is placed between the mirror 64 and the half-mirror 66. The bandpass filter 82 transmits only the component of the second color from the reflected light reflected by the semiconductor wafer W. In other words, the bandpass filter 82 colors the reflected light, including the reflection pattern, with the second color. The reflected light colored with the second color is incident on the imaging unit 63 via the prism 68. As a result, the imaging unit 63 is able to capture an image including a dot pattern colored with the second color.

[0089] The first and second colors can be arbitrarily selected as long as they are different colors. However, from the viewpoint of distinguishing the first and second reflection patterns in the captured image, it is preferable that the hue difference between the first and second colors be large. In this embodiment, an example is shown in which red is used as the first color and blue as the second color, but the first and second colors may be reversed, or at least one of the first or second colors may be a different color.

[0090] ≪Measurement of parallelism≫ A method for measuring the parallelism between a measurement target and a reference surface based on captured images according to this embodiment will be explained with reference to Figure 13. Figure 13 is a diagram showing an example of the parallelism measurement method according to the second embodiment.

[0091] As shown in Figure 13, when the semiconductor wafer W and the reference plane R are not parallel, the overlapping area between dot D1 in the projection pattern and dot D2 in the reflection pattern becomes smaller. Since dot D1 is colored with a first color C1 (e.g., red) and dot D2 is colored with a second color C2 (e.g., blue), the overlapping area between dot D1 and dot D2 is imaged with a mixture of the first color C1 and the second color C2, C3 (e.g., purple).

[0092] Therefore, by calculating the area of ​​the color mixture between the first and second colors for each dot captured in the image, the tilt of the semiconductor wafer W with respect to the reference surface R can be detected. Furthermore, the parallelism between the semiconductor wafer W and the reference surface R can be measured based on the magnitude of the tilt detected for each dot. In this embodiment, the smaller the color mixture area, the greater the tilt of the semiconductor wafer W with respect to the reference surface R, and the lower the parallelism between the semiconductor wafer W and the reference surface R.

[0093] <Effects of the second embodiment> The inspection device 10 according to this embodiment observes a first reflection pattern colored with a first color and a second reflection pattern colored with a second color. In one aspect, according to this embodiment, since the first reflection pattern and the second reflection pattern are colored with different colors, the first reflection pattern and the second reflection pattern can be easily distinguished.

[0094] The inspection device 10 may measure parallelism based on the area of ​​the mixture of the first color and the second color. The area where dots included in the first reflection pattern and dots included in the second reflection pattern overlap becomes smaller as the inclination of the object being measured increases. In one respect, according to this embodiment, the magnitude of the inclination of the object being measured can be detected accurately for each dot.

[0095] [supplement] The configuration of the inspection device 10 in the above-described embodiment is merely an example, and at least a portion of the processing performed by the control device 50 may be performed by another information processing device connected to the control device 50 in a data communication manner. For example, the other information processing device connected to the control device 50 in a data communication manner may be a computer that provides cloud services.

[0096] The embodiments disclosed herein are illustrative and not restrictive in all respects. The embodiments can be modified and improved in various ways without departing from the scope and spirit of the appended claims. The aspects described in the embodiments above can be otherwise configured and combined in a non-consistent manner. [Explanation of Symbols]

[0097] W: Semiconductor wafer 10: Inspection equipment 23: Movement mechanism 25: Mounting platform 30: Test head 31: External Tester 32: Interface 33: Probe card 34: Probe 41,42: Camera Unit 50: Control device 61: Projection section 62: Bright-field illumination 63: Imaging Unit 64, 67, 69: Mirror 65: Darkfield illumination 66: Half-mirror 68: Prism 71: White light source 72: Aperture substrate 81,82: Bandpass filter 101: Projection Control Unit 102: Light receiving control unit 103: Image acquisition unit 104: Dot selection area 105: Parallelism measuring section 106: Mounting platform adjustment section

Claims

1. The process of projecting a pattern onto the object to be measured, A step of receiving light from a first reflection pattern in which the pattern is reflected by the object to be measured, A step of projecting the pattern onto a reference surface that serves as a reference for parallelism, A step of receiving a second reflected pattern in which the pattern is reflected by the reference surface, A step of observing the first reflection pattern and the second reflection pattern, A step of measuring the parallelism between the object to be measured and the reference surface based on the difference between the first reflection pattern and the second reflection pattern, A measurement method having

2. The observation step involves simultaneously observing the first reflection pattern and the second reflection pattern. The measurement method according to claim 1.

3. The aforementioned pattern consists of multiple dots arranged as follows: The measurement method according to claim 1.

4. The plurality of dots are arranged asymmetrically with respect to a predetermined axis. The measurement method according to claim 3.

5. The method further includes the step of selecting the dot to be used for measuring parallelism based on the difference between the dot included in the first reflection pattern and the dot included in the second reflection pattern. The measurement method according to claim 3.

6. The measurement step involves measuring the parallelism based on the center distance between the dots included in the first reflection pattern and the dots included in the second reflection pattern. The measurement method according to any one of claims 3 to 5.

7. The projection step involves projecting the pattern using illumination with a light-emitting diode as the light source. The measurement method according to any one of claims 1 to 5.

8. The observation step involves observing the first reflection pattern colored with the first color and the second reflection pattern colored with the second color. The measurement method according to any one of claims 1 to 5.

9. The measurement step involves measuring the parallelism based on the area of ​​the mixed color of the first color and the second color. The measurement method according to claim 8.

10. A projection unit that projects a pattern onto a reference surface that serves as the reference for the object to be measured and for parallelism, A first light receiving unit that receives a first reflection pattern in which the pattern is reflected by the object to be measured, A second light-receiving unit that receives a second reflected pattern in which the pattern is reflected by the reference surface, An imaging unit that captures the first reflection pattern and the second reflection pattern, A parallelism measuring unit that measures the parallelism between the object to be measured and the reference surface based on the difference between the first reflection pattern and the second reflection pattern, A measurement system equipped with the following features.

11. The imaging unit captures an image in which the first reflection pattern and the second reflection pattern are superimposed. The measurement system according to claim 10.

12. An inspection device for inspecting an object to be inspected by bringing the needle tip of a probe provided on a probe card into contact with an electrode provided on the object to be inspected, A projection unit that projects a pattern onto the object to be inspected and a reference surface that serves as a reference for parallelism, which are placed on a mounting table. A first light receiving unit that receives a first reflected pattern in which the pattern is reflected by the object being inspected, A second light-receiving unit that receives a second reflected pattern in which the pattern is reflected by the reference surface, An imaging unit that captures the first reflection pattern and the second reflection pattern, A measuring unit that measures the parallelism between the object to be inspected and the reference surface based on the difference between the first reflection pattern and the second reflection pattern, Based on the aforementioned parallelism, an adjustment unit adjusts the aforementioned mounting base, An inspection device equipped with the following features.

Images