Semiconductor memory

The semiconductor memory device's innovative housing design with protrusions and a support structure addresses heat dissipation challenges by enhancing heat transfer and reducing component exposure, improving performance and reliability.

JP2026054225APending Publication Date: 2026-03-26KIOXIA CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-09-13
Publication Date
2026-03-26

AI Technical Summary

Technical Problem

Existing semiconductor memory devices face challenges in effectively dissipating heat, particularly due to the presence of heat-generating components like controllers and NANDs, and the exposure of taller components such as capacitors can lead to malfunctions and reduced heat dissipation performance.

Method used

The semiconductor memory device incorporates a housing design with a base member and a second cover member featuring protrusions, such as second fins, that cover taller components like capacitors, and a support structure that enhances heat dissipation by increasing the heat dissipation area and minimizing component exposure.

Benefits of technology

This configuration improves heat dissipation performance by allowing for more efficient heat transfer and reduces the risk of component malfunctions, while maintaining a compact design.

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Abstract

One embodiment provides a semiconductor memory device that can improve heat dissipation. [Solution] A semiconductor memory device according to one embodiment comprises a housing, a substrate, a first electronic component, and a second electronic component. The substrate is housed in the housing and has a first surface. The first electronic component is mounted on the first surface. The second electronic component is mounted on the first surface and has a greater height from the first surface than the first electronic component. The housing includes a first member and a second member. The first member has a first wall facing the first electronic component and an opening facing the second electronic component when viewed from a first direction which is the thickness direction of the substrate. The second member has a main body portion that covers the second electronic component at a position further from the substrate than the first wall and includes one or more protrusions projecting toward the opposite side from the second electronic component, and a support portion connected to the first member and supporting the main body portion.
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Description

Technical Field

[0001] Embodiments of the present invention relate to semiconductor memory devices.

Background Art

[0002] A semiconductor memory device having a housing, a substrate housed in the housing, and electronic components mounted on the substrate is known.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] One embodiment provides a semiconductor memory device capable of improving heat dissipation.

Means for Solving the Problems

[0005] A semiconductor memory device according to one embodiment includes a housing, a substrate, a first electronic component, and a second electronic component. The substrate is housed in the housing and has a first surface. The first electronic component is mounted on the first surface. The second electronic component is mounted on the first surface and has a greater height from the first surface than the first electronic component. The housing includes a first member and a second member. The first member has a first wall facing the first electronic component and an opening facing the second electronic component when viewed in a first direction which is the thickness direction of the substrate. The second member includes a main body portion that covers the second electronic component at a position farther from the substrate than the first wall and includes one or more protrusions protruding toward the side opposite to the second electronic component, and a support portion connected to the first member and supporting the main body portion.

Brief Description of the Drawings

[0006] [Figure 1] A perspective view showing a semiconductor memory device according to the first embodiment. [Figure 2] A perspective view showing a partially disassembled semiconductor memory device of the first embodiment. [Figure 3] A perspective view showing the housing of the first embodiment disassembled. [Figure 4] A plan view showing a semiconductor memory device of the first embodiment. [Figure 5] A perspective view illustrating the second cover member of the first embodiment. [Figure 6] Another perspective view illustrating the second cover member of the first embodiment. [Figure 7] A cross-sectional view of the semiconductor memory device shown in Figure 1, along the F7-F7 line. [Figure 8] A cross-sectional view of the semiconductor memory device shown in Figure 1, along the F8-F8 line. [Figure 9] A plan view showing a semiconductor memory device of the first embodiment. [Figure 10] A cross-sectional view showing a semiconductor memory device of a first modified example of the first embodiment. [Figure 11] A cross-sectional view showing a semiconductor memory device of a second modified example of the first embodiment. [Figure 12] A cross-sectional view showing a semiconductor memory device of a third modified example of the first embodiment. [Figure 13] A cross-sectional view showing a semiconductor memory device of a fourth modified example of the first embodiment. [Figure 14] A perspective view illustrating the second cover member of the second embodiment. [Figure 15] A perspective view showing the second cover member of the second embodiment. [Figure 16] Another perspective view illustrating the second cover member of the second embodiment. [Figure 17] A perspective view illustrating the second cover member of the third embodiment. [Figure 18] A perspective view showing the second cover member of the third embodiment. [Figure 19] Another perspective view illustrating the second cover member of the third embodiment. [Modes for carrying out the invention]

[0007] The semiconductor memory device of the embodiment will be described below with reference to the drawings. In the following description, components having the same or similar functions will be denoted by the same reference numerals. Duplication of these components may be omitted. In this application, terms are defined as follows: “Parallel,” “orthogonal,” or “same” may include “approximately parallel,” “approximately orthogonal,” or “approximately the same,” respectively. “Connected” may include, but is not limited to, cases where two elements are directly connected, or where two elements are connected with another element in between. Also, “connected” may include, but is not limited to, mechanical connections, or electrical connections. “Facing” and “overlapping” may include, but is not limited to, cases where two elements face each other with another element in between.

[0008] In this application, the +X direction, -X direction, +Y direction, -Y direction, +Z direction, and -Z direction are defined as follows: The +X direction, -X direction, +Y direction, and -Y direction are directions parallel to the first surface 21a of the substrate 21, which will be described later (see Figure 2). The +X direction is the direction from the first end 10e1 to the second end 10e2 of the housing 10, which will be described later (see Figure 1). The -X direction is the direction opposite to the +X direction. If the +X direction and the -X direction are not distinguished, they are simply referred to as the "X direction". The +Y direction and the -Y direction are directions that intersect (for example, are orthogonal to) the X direction. The +Y direction is the direction from the first side wall 13 to the second side wall 14 of the housing 10, which will be described later (see Figure 1). The -Y direction is the direction opposite to the +Y direction. If the +Y direction and the -Y direction are not distinguished, they are simply referred to as the "Y direction". The +Z and -Z directions intersect (for example, are orthogonal to) the X and Y directions. The +Z direction is the direction from the second main wall 12 to the first main wall 11 of the housing 10, which will be described later (see Figure 1). The -Z direction is the opposite direction to the +Z direction. When the +Z and -Z directions are not distinguished, they are simply referred to as the "Z direction". The Z direction is the thickness direction of the substrate 21. The Z direction is an example of the "first direction". The Y direction is an example of the "second direction". The X direction is an example of the "third direction".

[0009] (First Embodiment) <1. Overall Configuration of Semiconductor Memory Device> Referring to FIGS. 1 to 9, the semiconductor memory device 1 of the first embodiment will be described. The semiconductor memory device 1 is a storage device such as an SSD (Solid State Drive) for example. The semiconductor memory device 1 is connected to a host device and used as a storage device of the host device. The host device is a personal computer, a mobile device, a video recorder, an in-vehicle device, or the like, but is not limited to these examples.

[0010] FIG. 1 is a perspective view showing the semiconductor memory device 1. The semiconductor memory device 1 has, for example, a housing 10 and a substrate unit 20. Here, the substrate unit 20 will be described first.

[0011] <2. Substrate Unit> FIG. 2 is a perspective view showing a partially disassembled semiconductor memory device 1. The substrate unit 20 is an assembly on which components including circuits are mounted. The substrate unit 20 has, for example, a substrate 21, a connection connector 22, a controller 23, a plurality of DRAMs (Dynamic Random Access Memory) 24, a plurality of NAND-type flash memories 25 (hereinafter referred to as "NAND 25"), and a plurality of capacitors 26.

[0012] The substrate 21 is a plate member along the X direction and the Y direction. The substrate 21 is a printed substrate. The substrate 21 includes an insulating base material and a wiring pattern provided on the insulating base material. The substrate 21 has a first surface 21a and a second surface 21b located on the opposite side of the first surface 21a. The first surface 21a extends in the X direction and the Y direction. The first surface 21a is a surface facing the +Z direction. The second surface 21b extends in the X direction and the Y direction. The second surface 21b is a surface facing the -Z direction.

[0013] The substrate 21 has a first end 21e1 and a second end 21e2 as its longitudinal (X-direction) ends. The first end 21e1 is the -X-direction end of the substrate 21. The second end 21e2 is the +X-direction end of the substrate 21. Each of the first end 21e1 and the second end 21e2 has a through hole 21h. The through hole 21h penetrates the substrate 21 in the Z-direction. A fastening member FS2, which will be described later, is inserted through the through hole 21h.

[0014] The connection connector 22 is a connection portion that can be connected to the connector of the host device. The connection connector 22 includes a plurality of metal terminals that can be connected to the connector of the host device. The connection connector 22 is provided, for example, on the first end 21e1 of the circuit board 21. The connection connector 22 is exposed to the outside of the housing 10 through the opening 10a (see Figure 1) of the housing 10.

[0015] The controller 23 is a component that comprehensively controls the entire semiconductor memory device 1. The controller 23 is a semiconductor package that includes an SoC (System on a Chip) in which, for example, a host interface circuit for a host device and a control circuit for controlling multiple NAND 25s are integrated on a single semiconductor chip. The controller 23 is mounted, for example, on the first surface 21a of the substrate 21. In the X direction, the controller 23 is located between the center C of the substrate 21 in the X direction and the first end 21e1 of the substrate 21. The controller 23 is a heat-generating component that generates more heat during operation of the semiconductor memory device 1 compared to the DRAM 24 and NAND 25. The controller 23 is an example of a "fourth electronic component".

[0016] The controller 23 may be mounted on the second surface 21b of the circuit board 21 instead of the first surface 21a of the circuit board 21. The "fourth electronic component" is not limited to the controller 23. The "fourth electronic component" may be a power supply circuit component such as a PMIC (Power Management IC), a power conversion component such as a DC-DC converter, or other electronic component with a different function, instead of or in addition to the controller 23.

[0017] The DRAM 24 is a data buffer that temporarily stores data to be written received from a host device, or data to be read read from the NAND 25. Multiple DRAMs 24 are mounted, for example, on the first surface 21a of the substrate 21. The multiple DRAMs 24 are arranged in the X direction between the controller 23 and the multiple NANDs 25. The multiple DRAMs 24 are adjacent to the multiple capacitors 26 in the Y direction. For example, the multiple DRAMs 24 are positioned on the +Y direction side with respect to the multiple capacitors 26. The DRAM 24 is an example of a "third electronic component".

[0018] Note that the number of DRAM 24s may be just one. The DRAM 24 may be provided as a separate component from the controller 23, or it may be provided inside the controller 23 as part of the controller 23. The "third electronic component" is not limited to the DRAM 24. The "third electronic component" may be a power supply circuit component such as a PMIC, a power conversion component such as a DC-DC converter, or an electronic component with other functions, in place of / in addition to the DRAM 24.

[0019] NAND25 is a semiconductor package containing a non-volatile semiconductor memory chip. The NAND25 includes, for example, a plurality of NAND25A mounted on the first surface 21a of the substrate 21 and a plurality of NAND25B mounted on the second surface 21b of the substrate 21 (see Figure 8). The plurality of NAND25A are thermally connected to the first main wall 11 of the housing 10 via a thermal conductive member 27B. The plurality of NAND25B are thermally connected to the second main wall 12 of the housing 10 via a thermal conductive member 27D (see Figure 8).

[0020] Multiple NAND 25s are arranged in the X direction between the center C of the substrate 21 in the X direction and the second end 21e2 of the substrate 21. Compared to the DRAM 24, the NAND 25 is a heat-generating component that has a higher priority for heat dissipation. Compared to the DRAM 24, the NAND 25 is a heat-generating component that becomes hotter during the operation of the semiconductor memory device 1. The NAND 25 is an example of a "first electronic component".

[0021] Note that the number of NAND25 chips may be just one. The "first electronic component" is not limited to NAND25. The "first electronic component" may be other types of semiconductor memory such as NOR memory, MRAM (Magnetoresistive Random Access Memory), or resistive random access memory, or it may be an electronic component with a different function from semiconductor memory.

[0022] Capacitor 26 is one of the components electrically connected to the circuit board 21. Capacitor 26 performs a power backup function, for example, to protect data in the event of an unexpected power outage. In this embodiment, if the power supply from the host device is unexpectedly interrupted, capacitor 26 supplies power to the controller 23, multiple DRAMs 24, and multiple NANDs 25 for a certain period of time.

[0023] Multiple capacitors 26 are mounted on the first surface 21a of the substrate 21. The multiple capacitors 26 are positioned between the controller 23 and the multiple NAND 25 in the X direction. The height of the capacitors 26 from the first surface 21a of the substrate 21 is greater than that of the controller 23, DRAM 24, and NAND 25. The capacitor 26 has, for example, a cylindrical component body 26a and two terminals 26b connected to the substrate 21. In this embodiment, the capacitor 26 is mounted on the substrate 21 in a position where the axis of the cylindrical component body 26a is perpendicular to the first surface 21a of the substrate 21. The capacitor 26 is, for example, an electrolytic capacitor. The capacitor 26 is an example of a "second electronic component". Note that there may be just one capacitor 26.

[0024] <3. Enclosure> Next, returning to Figure 1, the housing 10 will be described. The housing 10 is a component that forms the outer casing of the semiconductor memory device 1. The housing 10 is made of, for example, metal. The housing 10 has a housing space CS in which the substrate unit 20 is housed.

[0025] The housing 10 has a first end 10e1 and a second end 10e2 as ends in the longitudinal direction (X direction) of the housing 10. The first end 10e1 is the end of the housing 10 on the -X direction side. The second end 10e2 is the end of the housing 10 on the +X direction side. In this embodiment, the second end 10e2 of the housing 10 has a pair of through holes 10h. The through holes 10h open in the Z direction. Fastening members FS1 (e.g., screws) for fixing the semiconductor memory device 1 to the host device are inserted through the through holes 10h.

[0026] The shape of the housing 10 is, for example, a flat rectangular cylinder. The housing 10 has, for example, a first main wall 11, a second main wall 12, a first side wall 13, and a second side wall 14. The first main wall 11, the second main wall 12, the first side wall 13, and the second side wall 14 are walls that define the accommodation space CS.

[0027] The first main wall 11 is located on the +Z side with respect to the substrate unit 20. The first main wall 11 is a plate portion that runs along the X and Y directions. The first main wall 11 has an inner surface 11a that faces the housing space CS (see Figure 8). The inner surface 11a is a surface that faces the -Z direction. The inner surface 11a runs along the X and Y directions. The second cover member 50, which will be described later, is connected to the inner surface 11a of the first main wall 11.

[0028] The second main wall 12 is located on the -Z side relative to the substrate unit 20. The second main wall 12 is a plate portion that runs along the X and Y directions. The first side wall 13 is located on the -Y side relative to the substrate unit 20. The first side wall 13 is plate-shaped that runs along the X and Z directions. The first side wall 13 connects the -Y side end of the first main wall 11 to the -Y side end of the second main wall 12. The second side wall 14 is located on the +Y side relative to the substrate unit 20. The second side wall 14 is plate-shaped that runs along the X and Z directions. The second side wall 14 connects the +Y side end of the first main wall 11 to the +Y side end of the second main wall 12.

[0029] Figure 3 is a perspective view showing the housing 10 in an exploded state. The housing 10 includes, for example, a first cover member 30, a base member 40, and a second cover member 50. In this embodiment, the housing 10 is formed by combining the first cover member 30, the base member 40, and the second cover member 50.

[0030] <3.1 First Cover Member> First, the first cover member 30 will be described. The first cover member 30 is a member that includes the second main wall 12. The first cover member 30 is a plate member that is aligned with the X and Y directions. When viewed from the Z direction, the first cover member 30 is rectangular in shape. Each of the four corners of the first cover member 30 has a support portion 31. The support portion 31 protrudes from the second main wall 12 in the +Z direction. The support portion 31 is in contact with the second surface 21b of the substrate 21 and supports the substrate 21 from the -Z direction side. The support portion 31 has a through hole 31h. The through hole 31h opens in the Z direction. A fastening member FS2 (e.g., a screw), which will be described later, is inserted through the through hole 10h.

[0031] <3.2 Base Components> Next, the base member 40 will be described. The base member 40 is a member that includes a first main wall 11, a first side wall 13, and a second side wall 14. The base member 40 is made of metal (for example, an aluminum alloy). The first main wall 11 is an example of a "first wall". The base member 40 is an example of a "first member".

[0032] The base member 40 is rectangular when viewed from the Z direction. Each of the four corners of the base member 40 has a support portion 41. The support portion 41 protrudes from the first main wall 11 in the -Z direction. The support portion 41 contacts the first surface 21a of the substrate 21 and supports the substrate 21 from the +Z direction side. The support portion 41 has a mounting hole 41h. The mounting hole 41h has a female thread and opens in the Z direction. The fastening member FS2, which is passed through the through hole 31h of the first cover member 30 and the through hole 21h of the substrate 21, engages with the mounting hole 41h. As a result, the first cover member 30 and the base member 40 are fixed together with the substrate 21 placed between the first cover member 30 and the base member 40. Alternatively, the base member 40 may have a through hole (insertion hole) and the first cover member 30 may have a mounting hole with a female thread.

[0033] (Structure of the first main wall) Figure 4 is a plan view showing the semiconductor memory device 1. For the sake of clarity, the second cover member 50 is not shown in Figure 4. In this embodiment, the first main wall 11 has a first region A1, a second region A2, and an opening 42.

[0034] The first region A1 is located in the X direction between the first end 10e1 of the housing 10 and the opening 42. When viewed from the Z direction, the first region A1 faces the controller 23. The first region A1 is a heat receiving area to which at least a portion of the heat emitted by the controller 23 is transferred. For example, a heat conductive member 27A is provided between the first region A1 and the controller 23 (see Figure 7). The first region A1 is thermally connected to the controller 23 via the heat conductive member 27A. The heat conductive member 27A is, for example, an elastic member. The heat conductive member 27A is, for example, a heat conductive sheet.

[0035] The second region A2 is located in the X direction between the second end 10e2 of the housing 10 and the opening 42. When viewed from the Z direction, the second region A2 faces the plurality of NAND 25. The second region A2 is a heat receiving area to which at least a portion of the heat emitted from the plurality of NAND 25 is transferred. For example, a heat conductive member 27B is sandwiched between the second region A2 and each of the plurality of NAND 25 (see Figure 7). The second region A2 is thermally connected to the NAND 25 via the heat conductive member 27B. The heat conductive member 27B is, for example, an elastic material. The heat conductive member 27B is, for example, a heat conductive sheet. The heat conductive member 27B is an example of a "first heat conductive member".

[0036] The opening 42 is provided between the first region A1 and the second region A2 in the X direction. When viewed from the Z direction, the opening 42 faces the multiple capacitors 26. The provision of the opening 42 prevents interference between the tall electronic components, the capacitors 26, and the first main wall 11. In this embodiment, each capacitor 26 is inserted into the opening 42 (see Figure 7). Each capacitor 26 protrudes beyond the first main wall 11 towards the +Z direction. Also in this embodiment, when viewed from the Z direction, at least a portion of each of the multiple DRAMs 24 faces the opening 42.

[0037] In this embodiment, the first main wall 11 has a through hole 11h near the opening 42 (see Figure 3). The through hole 11h penetrates the first main wall 11 in the Z direction. A fastening member FS3 (e.g., a screw), which will be described later, is inserted through the through hole 11h.

[0038] (First fin) In this embodiment, the base member 40 has one or more (e.g., multiple) first fins 43. The multiple first fins 43 are provided on the first main wall 11. Each first fin 43 protrudes from the first main wall 11 in the +Z direction. The multiple first fins 43 are arranged side by side in the Y direction. Each first fin 43 extends in the X direction. Each first fin 43 is a plate portion that runs along the X and Z directions. Each first fin 43 extends so as to straddle (overlap with) the opening 42 when viewed from the Z direction, and spans the first region A1 and the second region A2 of the first main wall 11. For example, a portion of each first fin 43 is provided in the first region A1 of the first main wall 11. Another portion of each first fin 43 is provided in the second region A2 of the first main wall 11. Each first fin 43 is a heat dissipation part that dissipates heat from the first region A1 and the second region A2 of the first main wall 11 to the outside of the housing 10.

[0039] In this embodiment, the first fin 43 has a notch 43c in the portion corresponding to the opening 42. The notch 43c is a notch that penetrates the first fin 43 in the Y direction. The notch 43c is provided adjacent to the edge of the first fin 43 on the -Z direction side.

[0040] The notch 43c faces one or more capacitors 26 when viewed from the Z direction. The notch 43c prevents interference between the tall electronic component, the capacitor 26, and the first fin 43A. In this embodiment, each capacitor 26 is inserted into the notch 43c (see Figure 8). Each capacitor 26 protrudes beyond the -Z side edge of the first fin 43A towards the +Z direction.

[0041] <3.3 Second Cover Member> Next, the second cover member 50 will be described. Figure 5 is a perspective view illustrating the second cover member 50. The second cover member 50 is a member provided corresponding to the opening 42 of the base member 40. The second cover member 50 is made of metal (for example, an aluminum alloy). The second cover member 50 is an example of the "second member". The second cover member 50 has, for example, a main body portion 51 and a pair of support portions 52. In this embodiment, the main body portion 51 and the pair of support portions 52 are integrally formed as a single piece by extrusion.

[0042] <3.3.1 Main Unit> The main body portion 51 is the part that forms the main part of the second cover member 50. The main body portion 51 includes, for example, a cover portion 61 and one or more (for example, multiple) second fins 62.

[0043] (Cover section) Figure 6 is another perspective view illustrating the second cover member 50. For ease of explanation, the first fin 43 is omitted from the illustration in Figure 6. The cover portion 61 is the part that covers the plurality of capacitors 26 from the +Z direction side. The cover portion 61 is positioned further away from the substrate 21 compared to the first main wall 11 (see Figure 8). When viewed from the Z direction, the cover portion 61 faces the plurality of capacitors 26. The cover portion 61 covers the plurality of capacitors 26 from the side opposite to the substrate 21. In this embodiment, the cover portion 61 is a plate portion that runs along the X and Y directions. The cover portion 61 may also be referred to as the "second wall". The length W2 of the cover portion 61 in the Y direction is smaller than the length W1 of the opening 42 in the Y direction.

[0044] Figure 7 is a cross-sectional view of the semiconductor memory device 1 shown in Figure 1 along the F7-F7 line. In this embodiment, the cover portion 61 is located inside the notch 43c of the first fin 43. The cover portion 61 extends in the Y direction through the multiple notches 43c of the first fin 43 (see Figure 8).

[0045] (Second fin) Figure 8 is a cross-sectional view of the semiconductor memory device 1 shown in Figure 1 along the F8-F8 line. Multiple second fins 62 are provided on the cover portion 61. Each second fin 62 protrudes from the cover portion 61 in the +Z direction. Each second fin 62 protrudes from the cover portion 61 toward the opposite side of the capacitor 26. When viewed from the Z direction, each second fin 62 overlaps with the capacitor 26. The second fins 62 are an example of a "protrusion".

[0046] Multiple second fins 62 are arranged in a line in the Y direction. Each second fin 62 extends in the X direction. Each second fin 62 is a plate portion that extends along the X and Z directions. Each second fin 62 extends, for example, along the entire length of the cover portion 61 in the X direction (see Figure 7). Each second fin 62 is a heat dissipation portion that dissipates heat from the cover portion 61 to the outside of the housing 10.

[0047] In this embodiment, the multiple second fins 62 are arranged alternately with the multiple first fins 43 in the Y direction. That is, each second fin 62 is positioned between two adjacent first fins 43 in the Y direction. The first fins 43 are provided with a gap S between them and the second fins 62, allowing air to flow through them.

[0048] In this embodiment, the second fin 62 extends beyond the +Z-side edge of the notch 43c of the first fin 43 into the +Z direction. For example, the Z-direction length L2 of the second fin 62 is more than half the Z-direction length L1 of the first fin 43. For example, with respect to the Z-direction position, the +Z-side end 62e of the second fin 62 is located in the same position as the +Z-side end 43e of the first fin 43.

[0049] <3.3.2 Support part> Each of the pair of support portions 52 is connected to the base member 40 and supports the main body portion 51. The support portions 52 are adjacent to the main body portion 51 in the Y direction. The support portions 52 have, for example, an upright portion 63 and a mounting portion 64.

[0050] (Standing part) The upright portion 63 is an extension that extends between the cover portion 61 and the mounting portion 64. For example, the upright portion 63 extends in the Z direction through the opening 42. The upright portion 63 is adjacent to multiple capacitors 26 in the Y direction. The +Z direction end of the upright portion 63 is connected to the cover portion 61 at a position on the +Z direction side of the first main wall 11. The -Z direction end of the upright portion 63 is connected to the mounting portion 64 at a position on the -Z direction side of the first main wall 11. In this embodiment, the upright portion 63 is a plate portion that runs along the X and Z directions. The upright portion 63 extends, for example, along the entire length of the cover portion 61 in the X direction. The upright portion 63 may also be referred to as the "third wall".

[0051] (Mounting part) The mounting portion 64 is the part that is attached to the base member 40. The mounting portion 64 extends in the Y direction toward the outside of the housing 10 from the -Z direction end of the upright portion 63. The mounting portion 64 faces the inner surface 11a of the first main wall 11 from the -Z direction side. The mounting portion 64 is a plate portion that is aligned with the X and Y directions. In this embodiment, the mounting portion 64 is fixed to the first main wall 11 and supported by the first main wall 11. The mounting portion 64 extends, for example, along the entire length of the cover portion 61 in the X direction.

[0052] In this embodiment, the mounting portion 64 has a mounting hole 64h (see Figure 3). The mounting hole 64h has a female thread and opens in the Z direction. The fastening member FS3, which is inserted through the through hole 11h of the first main wall 11, engages with the mounting hole 64h. As a result, the mounting portion 64 is fixed to the first main wall 11, and the base member 40 and the second cover member 50 are integrated.

[0053] Alternatively, the mounting portion 64 may have a through hole (insertion hole), and the first main wall 11 may have a mounting hole with a female thread. Furthermore, the fixing structure between the mounting portion 64 and the first main wall 11 is not limited to a configuration using fastening members. For example, the fixing structure between the mounting portion 64 and the first main wall 11 may be a method using adhesive sheets or adhesives, or a method using metal joining.

[0054] As shown in Figure 8, the second cover member 50 has a pair of support parts 52, namely a first support part 52A and a second support part 52B. The first support part 52A is located on the -Y direction side with respect to the cover part 61. The second support part 52B is located on the +Y direction side with respect to the cover part 61.

[0055] In this embodiment, the upright portion 63 of the first support portion 52A is connected to the end of the cover portion 61 in the -Y direction. The upright portion 63 of the second support portion 52B is connected to the end of the cover portion 61 in the +Y direction. In this embodiment, the upright portion 63 of the first support portion 52A and the upright portion 63 of the second support portion 52B have the same shape.

[0056] On the other hand, the mounting portion 64 of the first support portion 52A and the mounting portion 64 of the second support portion 52B have different shapes. For example, the length L4 in the Y direction of the mounting portion 64 of the second support portion 52B is greater than the length L3 in the Y direction of the mounting portion 64 of the first support portion 52A.

[0057] In this embodiment, when viewed from the Z direction, the mounting portion 64 of the second support portion 52B faces the DRAM 23. For example, when viewed from the Z direction, the mounting portion 64 of the second support portion 52B faces multiple DRAMs 23 (see Figure 6). A heat conductive member 27C is sandwiched between the mounting portion 64 of the second support portion 52B and each of the multiple DRAMs 23. The mounting portion 64 of the second support portion 52B is thermally connected to the DRAMs 23 via the heat conductive member 27C. The heat conductive member 27C is, for example, an elastic material. The heat conductive member 27C is, for example, a heat conductive sheet. The mounting portion 64 of the second support portion 52B is an example of a "heat receiving portion". The heat conductive member 27C is an example of a "second heat conductive member".

[0058] In this embodiment, at least a portion of the DRAM 23 faces the opening 42 when viewed from the Z direction. At least a portion of the mounting portion 64 of the second support portion 52B is thermally connected to the DRAM 23 via the heat conductive member 27C at a position that overlaps with the opening 42 when viewed from the Z direction.

[0059] Figure 9 is a plan view showing the semiconductor memory device 1. In this embodiment, the opening 42 has a first end 42e1 and a second end 42e2 as a pair of ends in the X direction. The first end 42a is the end on the -X direction side. The first end 42a is adjacent to the first region A1 of the first main wall 11. The first end 42a extends in the Y direction. The second end 42b is the end on the -X direction side. The second end 42b is adjacent to the second region A2 of the first main wall 11. The second end 42b extends in the Y direction.

[0060] In this embodiment, when viewed from the Z direction, the second cover member 50 is provided with a gap g1 between it and the first end 42a of the opening 42. At the boundary between the first end 42a of the opening 42 and the second cover member 50, the first main wall 11 and the second cover member 50 are not in contact. The presence of the gap g1 suppresses the transfer of heat from the first region A1 of the first main wall 11 to the second cover member 50 compared to the case where the gap g1 does not exist.

[0061] On the other hand, when viewed from the Z direction, the second cover member 50 may be provided without a gap between it and the second end 42b of the opening 42. For example, at the boundary between the second end 42b of the opening 42 and the second cover member 50, the first main wall 11 and the second cover member 50 are in contact. The second cover member 50 may also be provided with a gap similar to the gap g1 between it and the second end 42b of the opening 42.

[0062] <4. Effect> (From the perspective of limiting contact from the outside) When the second cover member 50 is attached to the base member 40, the capacitor 26 is covered from the +Z direction by the cover portion 61 of the second cover member 50. As a result, the capacitor 26 is not largely exposed to the outside of the housing 10. Therefore, the capacitor 26 is less likely to be contacted from the outside, and malfunctions are less likely to occur in the capacitor 26 or the circuit board 21.

[0063] (From the perspective of heat dissipation) A portion of the heat generated by the DRAM 24 is transferred to the mounting portion 64 of the second cover member 50 via the heat conductive member 27C. The heat transferred to the mounting portion 64 of the second cover member 50 is then transferred to the cover portion 61 and the plurality of second fins 62 via the upright portion 63. The heat transferred to the cover portion 61 and the plurality of second fins 62 is then dissipated from the cover portion 61 and the plurality of second fins 62 to the outside of the housing 10.

[0064] <5. Advantages> As a comparative example, consider a semiconductor memory device that does not have a second cover member 50. In such a comparative example configuration, if an opening 42 is provided to avoid interference with the capacitor 26, for example, the heat dissipation area of ​​the housing 10 decreases. Therefore, it is difficult to improve the heat dissipation performance of the semiconductor memory device. Also, if the capacitor 26 is exposed to the outside of the housing 10 through the opening 42, there is a possibility that the capacitor 26 or the substrate 21 may malfunction due to contact through the opening 42.

[0065] On the other hand, the semiconductor memory device 1 of this embodiment includes a housing 10, a substrate 21, a NAND 25, and a capacitor 26. The capacitor 26 has a greater height from the first surface 21a of the substrate 21 compared to the NAND 25. The housing 10 includes a base member 40 and a second cover member 50. When viewed from the Z direction, the base member 40 has a first main wall 11 facing the NAND 25 and an opening 42 facing the capacitor 26. The second cover member 50 has a main body portion 51 that covers the capacitor 26 at a position further away from the substrate 21 than the first main wall 11 and includes one or more second fins 62, and a support portion 52 connected to the base member 40 and supporting the main body portion 51.

[0066] With this configuration, the presence of a second cover member 50 that covers the capacitor 26 and has one or more protrusions (e.g., a second fin 62) increases the heat dissipation area. Therefore, the heat dissipation performance of the semiconductor memory device 1 can be improved. In addition, by providing the second cover member 50 that covers the capacitor 26, it is possible to suppress malfunctions in the capacitor 26 or the substrate 21 due to contact through the opening 42.

[0067] In this embodiment, the projection extends in the X direction. Providing such a projection makes it easier to further improve the heat dissipation performance of the semiconductor memory device 1.

[0068] In this embodiment, the main body 51 includes a cover portion 61 that covers the capacitor 26 at a position further away from the substrate 21 than the first main wall 11. The one or more protrusions are one or more second fins 62 that project from the cover portion 61 on the side opposite to the capacitor 26. With this configuration, the presence of the second fins 62 makes it easier to further improve the heat dissipation of the semiconductor memory device 1.

[0069] In this embodiment, the base member 40 has a plurality of first fins 43 provided on the first main wall 11. The one or more second fins 62 include second fins 62 arranged between the plurality of first fins 43 in the Y direction. With this configuration, the size or shape of the second fins 62 is less constrained by the first fins 43. Therefore, the degree of freedom in the size or shape of the second fins 62 is increased. This makes it easier to further improve the heat dissipation performance of the semiconductor memory device 1.

[0070] In this embodiment, the length L2 of the second fin 62 in the Z direction is more than half the length L1 of one of the multiple first fins 43 in the Z direction. With this configuration, the provision of a large second fin 62 makes it easier to further improve the heat dissipation performance of the semiconductor memory device 1.

[0071] In this embodiment, the support portion 52 includes an upright portion 63 that passes through the opening 42 and is connected to the main body portion 51. With this configuration, the support portion 52 can extend from the outside to the inside of the base member 40 through the opening 42. This makes it easier to dissipate more heat from the inside of the housing 10 to the outside of the housing 10. This makes it easier to further improve the heat dissipation performance of the semiconductor memory device 1.

[0072] In this embodiment, the first main wall 11 is thermally connected to the NAND 25 via the first heat conductive member 27B. The second support portion 52B is connected to the upright portion 63 and includes a heat receiving portion (mounting portion 64) that faces the DRAM 24 when viewed from the Z direction. The heat receiving portion is thermally connected to the DRAM 24 via the second heat conductive member 27C. With this configuration, the heat from the DRAM 24 can be dissipated to the outside of the housing 10 through the second cover member 50. This makes it easier to further improve the heat dissipation performance of the semiconductor memory device 1.

[0073] In this embodiment, at least a portion of the DRAM 24 faces the opening 42 when viewed from the Z direction. At least a portion of the heat receiving portion (mounting portion 64) is thermally connected to the DRAM 24 via the heat conductive member 27C at a position that overlaps with the opening 42 when viewed from the Z direction. With this configuration, even if the opening 42, which is provided to avoid interference with the capacitor 26, overlaps with the DRAM 24 in the Z direction, the heat generated by the DRAM 24 can be dissipated through the second cover member 50. This makes it easier to further improve the heat dissipation performance of the semiconductor memory device 1.

[0074] In this embodiment, the heat receiving section is attached to the first main wall 11 within the housing 10. With this configuration, the heat receiving section that receives heat from the DRAM 24 can be formed by the mounting section for attaching the support section 52 to the housing 10. This makes it possible to miniaturize the semiconductor memory device 1 compared to the case where the mounting section for attaching the support section 52 to the housing 10 and the heat receiving section that receives heat from the DRAM 24 are formed separately.

[0075] In this embodiment, the semiconductor memory device 1 includes a controller 23 that operates at a higher temperature than the NAND 25. The first main wall 11 includes a first region A1 facing the controller 23 and a second region A2 facing the NAND 24 when viewed from the Z direction. The opening 42 is provided in the first main wall 11 between the first region A1 and the second region A2. With this configuration, because of the presence of the opening 42, heat transferred from the controller 23 to the first region A1 is less likely to transfer from the first region A1 to the second region A2. As a result, the temperature of the NAND 25 is suppressed by the heat transferred from the controller to the first region A1. This makes it less likely for defects related to the NAND 25 to occur.

[0076] In this embodiment, the opening 42 has a first end 42e1 adjacent to the first region A1. When viewed from the Z direction, the first end 42e1 of the opening 42 is provided with a gap g1 between it and the cover portion 61. With this configuration, the presence of the gap g1 makes it difficult for heat transferred from the controller 23 to the first region A1 to further transfer from the first region A1 to the second region A2. This further suppresses the rise in temperature of the NAND 25 due to heat transferred from the controller to the first region A1. As a result, malfunctions related to the NAND 25 become even less likely to occur.

[0077] <6. Variation> Next, a modified version of the first embodiment will be described. In each modified version, the configuration is the same as that of the first embodiment, except for the configuration described below.

[0078] <6.1 First Variation> Figure 10 is a cross-sectional view showing a semiconductor memory device 1A of a first modified example. In this modified example, the mounting portion 64 of the support portion 52B of the second cover member 50 has a first portion 64a and a second portion 64b. When viewed from the Z direction, the first portion 64a faces the opening 42. The first portion 64a is exposed to the outside of the housing 10 through the opening 42. On the other hand, the second portion 64b is located on the +Y direction side relative to the first portion 64a. When viewed from the Z direction, the second portion 64b faces the first main wall 11 of the housing 10. The second portion 64b is not exposed to the outside of the housing 10 through the opening 42. The second portion 64b is located on the -Z direction side of the first main wall 11 of the housing 10. The second portion 64b is fixed to the first main wall 11 of the housing 10.

[0079] In this embodiment, the second cover member 50 has a third fin 65 in addition to the plurality of second fins 62. The third fin 65 is provided on the first portion 64a of the mounting portion 64 of the second cover member 50. The third fin 65 does not overlap with the capacitor 26 when viewed from the Z direction. The third fin 65 extends in the +Z direction from the first portion 64a of the mounting portion 64 of the second cover member 50. The length of the third fin 65 in the Z direction is, for example, the same as the length of the upright portion 63 in the Z direction.

[0080] The third fin 65 extends, for example, along the entire length of the cover portion 61 in the X direction. The third fin 65 is a plate portion that is aligned with the X and Z directions. When viewed from the Z direction, the third fin 65 overlaps with one of the first fins 43 at least partially. At least a portion of the third fin 65 is positioned in a notch 43c of one of the first fins 43.

[0081] With this configuration, the third fin 65 is provided in a region that does not overlap with the capacitor 26 when viewed from the Z direction. By providing the third fin 65, the heat dissipation area of ​​the housing 10 can be further increased without increasing the size of the semiconductor memory device 1A. This makes it easier to further improve the heat dissipation performance of the semiconductor memory device 1A.

[0082] <6.2 Second Variation> Figure 11 is a cross-sectional view showing a second modified semiconductor memory device 1B. In this modified version, the semiconductor memory device 1B has a second cover member 50B instead of the second cover member 50. The second cover member 50B has a main body portion 51B and a pair of support portions 52.

[0083] The main body 51B, when viewed from the X direction, is, for example, wave-shaped. The main body 51B covers a plurality of capacitors 26 at a position further away from the substrate 21 than the first main wall 11, and the capacitors 26 have one or more (e.g., multiple) protrusions 71 projecting toward the opposite side. For example, in the main body 51B, the capacitors 26 have a plurality of protrusions 71 projecting toward the opposite side and a recess 72 positioned between two adjacent protrusions 71 in the Y direction and recessed toward the -Z direction. The main body 51B is formed in a wave shape when viewed from the X direction by the alternating repetition of the protrusions 71 and recesses 72 in the Y direction. In this modified example, the main body 51B including the protrusions 71 and recesses 72 and the pair of support parts 52 are integrally formed as a single piece by press working.

[0084] In this modified example, the projection 71 extends beyond the edge of the notch 43c of the first fin 43 on the +Z side and into the +Z direction. The recess 72 is located in the notch 43c of the first fin 43. The projection 71 and recess 72 extend in the X direction. The projection 71 and recess 72 extend, for example, along the entire length of the main body 51B in the X direction. The main body 51B is a heat dissipation section that dissipates heat to the outside of the housing 10.

[0085] In this modified example, the multiple protrusions 71 are arranged side by side in the Y direction. For example, the multiple protrusions 71 are arranged alternately with the multiple first fins 43 in the Y direction. That is, each protrusion 71 is positioned between two adjacent first fins 43 in the Y direction. The first fins 43 are provided with a gap S between them and the protrusions 71, allowing air to flow.

[0086] With this configuration, the presence of the projection 71 on the main body 51B allows for an increased heat dissipation area compared to the case where the main body 51B is a flat plate. This makes it easier to further improve the heat dissipation performance of the semiconductor memory device 1B.

[0087] <6.3 Third Variation> Figure 12 is a cross-sectional view showing a third modified semiconductor memory device 1C. In this modified example, a heat insulating member 81 is provided between the mounting portion 64 and the inner surface 11a of the first main wall 11. For example, the heat insulating member 81 is provided between the mounting portion 64 of the first support portion 52A and the inner surface 11a of the first main wall 11, and between the mounting portion 64 of the second support portion 52B and the inner surface 11a of the first main wall 11. The heat insulating member 81 is made of a material that conducts heat less easily than the first main wall 11, for example. The heat insulating member 81 is, for example, an elastic material. The heat insulating member 81 is, for example, a sheet oriented along the X and Y directions.

[0088] With this configuration, the presence of the heat insulating member 81 suppresses heat transfer between the second cover member 50 and the first main wall 11. This makes it difficult for heat transferred from the DRAM 24 to the second cover member 50 to transfer to the NAND 25 through the first main wall 11. This further suppresses the temperature rise of the NAND 25. As a result, malfunctions related to the NAND 25 become even less likely to occur.

[0089] <6.4 Fourth Variation> Figure 13 is a cross-sectional view showing a fourth modified semiconductor memory device 1D. In this modified example, a heat conductive member 86 is provided between the mounting portion 64 and the first main wall 11. For example, the heat conductive member 86 is provided between the mounting portion 64 of the first support portion 52A and the inner surface 11a of the first main wall 11, and between the mounting portion 64 of the second support portion 52B and the inner surface 11a of the first main wall 11. The heat conductive member 86 is, for example, an elastic material. The heat conductive member 86 is, for example, a sheet oriented along the X and Y directions. The heat conductive member 86 is an example of the "third heat conductive member".

[0090] With this configuration, the presence of a heat conductive member 86 facilitates heat transfer between the second cover member 50 and the first main wall 11. This prevents the temperature of one of the second cover member 50 and the first main wall 11 from becoming locally higher than the other. With this configuration, malfunctions related to the semiconductor memory device 1 caused by temperature rise can be further suppressed.

[0091] (Second Embodiment) Next, the semiconductor memory device 1E of the second embodiment will be described. The second embodiment differs from the first embodiment in that a hole 96 into which a capacitor 26 is inserted is provided in the second cover member 50E. Other than what is described below, the configuration is the same as that of the first embodiment.

[0092] Figure 14 is a perspective view illustrating the second cover member 50E of the second embodiment. For convenience of explanation, the first fin 43 is omitted from the illustration in Figure 14. In this embodiment, the housing 10 has a second cover member 50E instead of the second cover member 50 of the first embodiment. The second cover member 50E has a main body portion 51E and a pair of support portions 52E provided separately on both sides of the main body portion 51E in the Y direction.

[0093] (Main body) The main body 51E covers a plurality of capacitors 26 at a position further away from the substrate 21 than the first main wall 11, and the capacitors 26 have one or more second fins 62 protruding toward the opposite side. The main body 51E includes, for example, a base 91 and one or more second fins 62.

[0094] Figure 15 is a perspective view showing the second cover member 50E of the second embodiment. In this embodiment, the base 91 is a solid rectangular parallelepiped. The base 91 is provided with a plurality of holes 96. The plurality of holes 96 open in the -Z direction. When viewed from the Z direction, the plurality of holes 96 are provided in positions that correspond one-to-one with the plurality of capacitors 26. The diameter of the holes 96 is slightly larger than the diameter of the component body 26a of the capacitor 26. The component body 26a of the capacitor 26 is inserted into each hole 96 (see Figure 14). Note that the holes 96 are not limited to cylindrical holes, but may also be prismatic holes or elliptical holes, etc.

[0095] A portion of the base 91 is positioned further away from the substrate 21 than the first main wall 11, with multiple capacitors 26 housed in multiple holes 96 (see Figure 14). When viewed from the Z direction, the base 91 faces the multiple capacitors 26. The base 91 covers the multiple capacitors 26 housed in the multiple holes 96 from the +Z direction side.

[0096] (Support part) Each of the pair of support portions 52E has a mounting portion 64. The mounting portion 64 extends in the Y direction from the -Z direction end of the base portion 91. In this embodiment, the pair of support portions 52E has a first support portion 52EA and a second support portion 52EB. The first support portion 52EA is located on the -Y direction side with respect to the base portion 91. The second support portion 52EB is located on the +Y direction side with respect to the base portion 91. The mounting portion 64 of the first support portion 52EA and the mounting portion 64 of the second support portion 52EB have different shapes. For example, the Y direction length L4 of the mounting portion 64 of the second support portion 52EB is greater than the Y direction length L3 of the mounting portion 64 of the first support portion 52EA.

[0097] Figure 16 is another perspective view illustrating the second cover member 50E of the second embodiment. The mounting portion 64 of the support portion 52E faces the inner surface 11a of the first main wall 11 from the -Z direction side. In this embodiment, the mounting portion 64 is fixed to the first main wall 11 and supported by the first main wall 11. The mounting portion 64 of the second support portion 52EB also faces a plurality of DRAMs 23, similar to the mounting portion 64 of the second support portion 52B in the first embodiment (see Figure 14). The mounting portion 64 of the second support portion 52EB is thermally connected to the DRAMs 23 via a heat conductive member 27C. The mounting portion 64 of the second support portion 52EB is an example of a "heat receiving portion".

[0098] With this configuration, the heat dissipation of the semiconductor memory device 1E can be improved, similar to the first embodiment. In this embodiment, the second cover member 50E has a hole 96 into which the capacitor 26 is inserted. By providing such a hole 96, the second cover member 50E can prevent the capacitor 26 from tipping over or falling out due to vibration or shock. This further enhances the reliability of the semiconductor memory device 1E.

[0099] (Third embodiment) Next, the semiconductor memory device 1F of the third embodiment will be described. The third embodiment differs from the first embodiment in that the mounting portion 64 of the second support portion 52B of the second cover member 50F extends significantly in the X direction compared to the main body portion 51. Other than what is described below, the configuration is the same as that of the first embodiment.

[0100] Figure 17 is a perspective view illustrating the second cover member 50F of the third embodiment. For convenience of explanation, the first fin 43 is omitted from the illustration in Figure 17. In this embodiment, the substrate unit 20 has four DRAMs 24. The four DRAMs 24 include, for example, two DRAMs 24A and two DRAMs 24B.

[0101] DRAM24A is positioned adjacent to the main body 51 of the second cover member 50F in the Y direction. On the other hand, DRAM24B is positioned in the X direction, on the +X side of the main body 51 of the second cover member 50F. DRAM24B is positioned not adjacent to the main body 51 of the second cover member 50F in the Y direction. DRAM24A and DRAM24B are examples of "third electronic components". Note that DRAM24B may be referred to as "fifth electronic component" to distinguish it from DRAM24A.

[0102] Figure 18 is a perspective view showing the second cover member 50F of the third embodiment. In this embodiment, the mounting portion 64 (heat receiving portion) of the second support portion 52B has a first portion 101 and a second portion 102. The first portion 101 is adjacent to the main body portion 51 of the second cover member 50F in the Y direction. On the other hand, the second portion 102 extends from the first portion 101 in the +X direction. The second portion 102 is an extended portion that extends more than the main body portion 51 in the X direction. In other words, the second portion 102 extends beyond the edge of the main body portion 51 on the +X direction side toward the +X direction.

[0103] Figure 19 is another perspective view illustrating the second cover member 50F of the third embodiment. The mounting portion 64 of the first support portion 52A and the mounting portion 64 of the second support portion 52B face the inner surface 11a of the first main wall 11 from the -Z direction side. In this embodiment, the mounting portion 64 is fixed to the first main wall 11 and supported by the first main wall 11.

[0104] The first portion 101 of the mounting portion 64 of the second support portion 52B faces the two DRAMs 23A (see Figure 17). The first portion 101 of the mounting portion 64 of the second support portion 52B is thermally connected to the DRAMs 23A via the heat conductive member 27C. On the other hand, the second portion 102 of the mounting portion 64 of the second support portion 52B faces the two DRAMs 23B (see Figure 17). The second portion 102 of the mounting portion 64 of the second support portion 52B is thermally connected to the DRAMs 23B via the heat conductive member 27C. Note that the electronic component to which the first portion 101 of the mounting portion 64 of the second support portion 52B is thermally connected and the electronic component to which the second portion 102 of the mounting portion 64 of the second support portion 52B is thermally connected may be of different types.

[0105] With this configuration, the heat dissipation of the semiconductor memory device 1F can be improved, similar to the first embodiment. In this embodiment, the second support portion 52B of the second cover member 50F is a second portion 102 (extended portion) that extends more than the main body portion 51 in the X direction. Having such a second portion 102 makes it easier to dissipate heat from inside the housing 10 to the outside of the housing 10. This further improves the heat dissipation of the semiconductor memory device 1F.

[0106] Several embodiments and variations have been described above. However, the embodiments and variations are not limited to the examples described above. For example, some of the embodiments and variations described above may be implemented in combination with each other. For example, the ordinal numbers (1st, 2nd, ...) attached to the names of the components in the above description may be changed as appropriate.

[0107] According to at least one embodiment described above, the semiconductor memory device comprises a housing, a substrate, a first electronic component, and a second electronic component. The substrate is housed in the housing and has a first surface. The first electronic component is mounted on the first surface. The second electronic component is mounted on the first surface and has a greater height from the first surface than the first electronic component. The housing includes a first member and a second member. The first member, when viewed from a first direction which is the thickness direction of the substrate, has a first wall facing the first electronic component and an opening facing the second electronic component. The second member has a main body portion that covers the second electronic component at a position further from the substrate than the first wall and includes one or more protrusions projecting toward the opposite side from the second electronic component, and a support portion connected to the first member and supporting the main body portion. Such a configuration can improve heat dissipation.

[0108] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of Symbols]

[0109] 1A, 1B, 1C, 1D, 1E, 1F… Semiconductor memory devices 10…Cabinet 11...1st main wall (1st wall) 12…Second main wall 13…First side wall 14…Second side wall 20... Circuit board unit 21… Circuit board 21a…Side 1 21b…Second side 23…Controller (4th electronic component) 24,24A,24B…DRAM (third electronic component) 25…NAND (First Electronic Components) 26…Capacitor (Second Electronic Component) 27A... Heat conductive material 27B...Heat conducting member (first heat conducting member) 27C…Heat conductive material (second heat conductive material) 30…First cover component 40…Base component A1…First area A2…Second area 42...Aperture 43…First Fin 50...Second cover component 51...Main body 52,52A,52B…Support part 52E, 52EA, 52EB…Support part 61...Cover part 62…Second Fin 63...Standing part 64…Mounting part 81…Insulation material 86…Heat conductive material 91...Base 96... Hole 101...First part of the mounting section 102...Second part of the mounting section (extended section)

Claims

1. The casing and A substrate housed in the aforementioned housing and having a first surface, The first electronic component mounted on the first surface, A second electronic component mounted on the first surface, having a greater height from the first surface than the first electronic component, Equipped with, The housing includes a first member and a second member, The first member, when viewed from a first direction which is the thickness direction of the substrate, has a first wall facing the first electronic component and an opening facing the second electronic component. The second member has a main body portion that covers the second electronic component at a position further from the substrate than the first wall and includes one or more protrusions projecting toward the opposite side from the second electronic component, and a support portion that is connected to the first member and supports the main body portion. Semiconductor memory device.

2. When the second direction is a direction intersecting the first direction and where the main body and the support portion are adjacent, and the third direction is a direction intersecting the first and second directions, Each of the one or more of the aforementioned protrusions extends in the third direction. The semiconductor memory device according to claim 1.

3. The first member further has a plurality of first fins provided on the first wall, The one or more protrusions include protrusions positioned between the plurality of first fins in a second direction intersecting the first direction. A semiconductor memory device according to claim 1 or claim 2.

4. The length of the projection in the first direction is at least half the length of one of the first fins included in the plurality of first fins in the first direction. The semiconductor memory device according to claim 3.

5. The main body includes a cover portion that covers the second electronic component at a position further away from the substrate than the first wall, The one or more protrusions are one or more second fins that project from the cover portion toward the side opposite to the second electronic component relative to the cover portion. A semiconductor memory device according to claim 1 or claim 2.

6. The support portion includes an upright portion that passes through the opening and is connected to the main body portion. A semiconductor memory device according to claim 1 or claim 2.

7. The device further comprises a third electronic component mounted on the first surface, The first wall is thermally connected to the first electronic component via the first heat conductive member. The support portion includes a heat receiving portion that faces the third electronic component when viewed from the first direction and is thermally connected to the third electronic component via a second heat conducting member. The semiconductor memory device according to claim 6.

8. At least a portion of the third electronic component faces the opening when viewed from the first direction, At least a portion of the heat receiving section is thermally connected to the third electronic component via the second heat conductive member at a position that overlaps with the opening when viewed from the first direction. The semiconductor memory device according to claim 7.

9. The heat receiving section is fixed to the first wall within the housing. The semiconductor memory device according to claim 7.

10. The heat-insulating member is further provided between the heat-receiving section and the first wall. The semiconductor memory device according to claim 9.

11. The system further comprises a third heat conductive member provided between the heat receiving section and the first wall. The semiconductor memory device according to claim 9.

12. When the second direction is a direction intersecting the first direction and where the main body and the support portion are adjacent, and the third direction is a direction intersecting the first and second directions, The heat receiving portion includes an extended portion that is larger than the main body portion in the third direction. The semiconductor memory device according to claim 7.

13. The third electronic component, when viewed from the first direction, faces the first wall, The extended portion is positioned between the first wall and the third electronic component and is thermally connected to the third electronic component via the second heat conductive member. The semiconductor memory device according to claim 12.

14. The substrate further comprises a fourth electronic component mounted on the substrate, the fourth electronic component having a higher operating temperature than the first electronic component, The first wall includes, when viewed from the first direction, a first region facing the fourth electronic component and a second region facing the first electronic component. The opening is provided in the first wall between the first region and the second region. A semiconductor memory device according to claim 1 or claim 2.

15. The opening has a first end adjacent to the first region, When viewed from the first direction, the first end of the opening is provided with a gap between it and the second member. The semiconductor memory device according to claim 14.

16. The main body portion has a hole into which at least a part of the second electronic component is inserted. A semiconductor memory device according to claim 1 or claim 2.

17. The main body includes a solid rectangular parallelepiped base, The aforementioned hole is provided in the base, The semiconductor memory device according to claim 16.

Citation Information

Patent Citations

  • Electronic device

    US9609739B2