Semiconductor equipment

Abstract

The present disclosure aims to provide a semiconductor device capable of improving gate breakdown voltage and lowering saturation voltage. [Solution] The semiconductor device according to the present disclosure comprises a semiconductor substrate, a base layer of a first conductivity type provided on the surface side of the semiconductor substrate, and a trench provided on the surface side of the semiconductor substrate that penetrates the base layer and has an upper electrode covered with an upper oxide film, a lower electrode covered with a lower oxide film, and a boundary oxide film located between the upper electrode and the lower electrode. The upper electrode has a concave shape on the surface facing the lower electrode and has a pointed portion that constitutes the concave shape, the pointed portion has a shape that extends in the width direction of the trench, the pointed portion and the lower electrode face each other in the width direction of the trench, the thickness of the upper oxide film is constant along the base layer and the layer below the base layer, and the thickness of the boundary oxide film is thicker than the thickness of the upper oxide film.

Description

Technical Field

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[0001] The present disclosure relates to a semiconductor device whose conduction is controlled by a gate signal.

Background Art

[0002] Conventionally, a semiconductor device having a gate structure including an upper electrode and a lower electrode has been disclosed (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In a gate structure having an upper electrode and a lower electrode, a pointed portion is formed in a part of the upper electrode on the side facing the lower electrode. In this pointed portion, the electric field becomes high, so that gate leakage increases and there is a problem that the gate breakdown voltage decreases.

[0005] <​​​​​​​​​​​To solve the above problems, the semiconductor device according to this disclosure comprises a semiconductor substrate, a base layer of a first conductivity type provided on the surface side of the semiconductor substrate, and a trench provided on the surface side of the semiconductor substrate that penetrates the base layer and has an upper electrode covered with an upper oxide film, a lower electrode covered with a lower oxide film, and a boundary oxide film located between the upper electrode and the lower electrode. The upper electrode has a concave shape on the surface facing the lower electrode and has a pointed portion that constitutes the concave shape, the pointed portion has a shape that extends in the width direction of the trench, the pointed portion and the lower electrode face each other in the width direction of the trench, the thickness of the upper oxide film is constant along the base layer and the layer below the base layer, and the thickness of the boundary oxide film is thicker than the thickness of the upper oxide film. [Effects of the Invention]

[0008] According to this disclosure, it is possible to improve the gate breakdown voltage and lower the saturation voltage. [Brief explanation of the drawing]

[0009] [Figure 1] This is a cross-sectional view of the semiconductor device according to Embodiment 1. [Figure 2] This is a cross-sectional view of the semiconductor device according to Embodiment 1. [Figure 3] This is a cross-sectional view of a semiconductor device according to Modified Example 1. [Figure 4] This is a cross-sectional view of a semiconductor device according to modified example 2. [Figure 5] This is a cross-sectional view of a semiconductor device according to modified example 5. [Modes for carrying out the invention]

[0010] <Embodiment 1> In the following description, a semiconductor device according to Embodiment 1 will be described with reference to the drawings. Note that the same or corresponding components will be denoted by the same reference numerals, and repetition in the description may be omitted. In the following description, N and P indicate the conductivity type of the semiconductor. In this disclosure, the first conductivity type is described as P-type and the second conductivity type as N-type. These conductivity types may be reversed.

[0011] Figure 1 is a cross-sectional view of a semiconductor device according to Embodiment 1. In Figure 1, the semiconductor substrate extends from the base layer 3 to the collector layer 7. In Figure 1, the upper end of the base layer 3 is referred to as the surface of the semiconductor substrate, and the lower end of the collector layer 7 is referred to as the back surface of the semiconductor substrate. The surface and back surface are opposite each other. In the following description, the semiconductor device will be described as an IGBT (Insulated Gate Bipolar Transistor), but it is not limited to this. The semiconductor device may be, for example, an RC-IGBT (Reverse Conducting IGBT).

[0012] As shown in Figure 1, an N-type carrier storage layer 4 with a higher concentration of N-type impurities than the drift layer 5 is provided on the surface side of the N-type drift layer 5. Note that the semiconductor device may also have a configuration without the carrier storage layer 4. In this case, the drift layer 5 would also be provided in the region of the carrier storage layer 4 shown in Figure 1.

[0013] A P-type base layer 3 is provided on the surface side of the carrier storage layer 4.

[0014] The semiconductor substrate is provided with a trench 9 that penetrates the base layer 3 and the carrier storage layer 4 and reaches the drift layer 5. Inside the trench 9, there is an upper electrode 10 at the top that is at the gate potential and a lower electrode 12 at the bottom that is at the emitter potential. Alternatively, the upper electrode 10 may be at the emitter potential and the lower electrode 12 at the gate potential.

[0015] The upper electrode 10 is covered by an upper oxide film 13, and the lower electrode 12 is covered by a lower oxide film 14. The thickness of the upper oxide film 13 is constant along the base layer 3 and the carrier accumulation layer 4. That is, the thickness of the upper oxide film 13 is constant along the side surface of the upper electrode 10.

[0016] The trench 9 has a boundary oxide film 15 between the upper electrode 10 and the lower electrode 12. The upper electrode 10 and the lower electrode 12 are electrically separated through the boundary oxide film 15. The film thickness of the boundary oxide film 15 is thicker than the film thickness of the upper oxide film 13.

[0017] The surface of the upper electrode 10 facing the lower electrode 12 is concave, and has a pointed portion 11 that forms the concave shape. The pointed portion 11 and the lower electrode 12 face each other in the width direction of the trench 9 (the direction perpendicular to the direction connecting the front surface and the back surface).

[0018] The pointed portion 11 has a shape that spreads in the width direction of the trench 9 (spreads outside the trench 9), and the inner surface is curved. Specifically, as shown in FIG. 2, the pointed portion 11 includes a base portion 16 and a tip portion 17. Also, the angle θ formed by the straight line in the width direction of the trench 9 passing through the base portion 16 and the straight line connecting the base portion 16 and the tip portion 17 exceeds 90 degrees (90 degrees < θ). Note that the angle θ may be 90 degrees < θ ≦ 135 degrees. In FIG. 2, the illustration of the buffer layer 6, the collector layer 7, and the collector electrode 8 is omitted.

[0019] Returning to FIG. 1, an interlayer insulating film 2 is provided on the trench 9. An emitter electrode 1 is provided on the base layer 3 and the interlayer insulating film 2.

[0020] On the back surface side of the drift layer 5, an N-type buffer layer 6 having a higher N-type impurity concentration than the drift layer 5 is provided. On the back surface side of the buffer layer 6, a P-type collector layer 7 is provided. On the back surface side of the collector layer 7, a collector electrode 8 is provided.

[0021] According to the first embodiment, since the pointed portion 11 of the upper electrode 10 has a shape that spreads in the width direction of the trench 9, the distance between the upper electrode 10 and the lower electrode 12 can be ensured, and the gate breakdown voltage can be improved.

[0022] Furthermore, because the thickness of the upper oxide film 13 is constant along the base layer 3 and the carrier storage layer 4, an N-type storage layer is formed at the interface of the carrier storage layer 4 facing the pointed portion 11 (the interface between the trench 9 and the carrier storage layer 4), making it easier for holes to accumulate. Consequently, it becomes possible to lower the saturation voltage Vce(sat).

[0023] Furthermore, since the thickness of the boundary oxide film 15 is greater than the thickness of the upper oxide film 13, it is possible to improve the insulation between the upper electrode 10 and the lower electrode 12.

[0024] <Example 1> Figure 3 is a cross-sectional view of a semiconductor device according to Modification 1. As shown in Figure 3, the side surfaces (both left and right sides) of the lower electrode 12 include recesses 19 that are recessed inward from the corners 18 on the surface side of the lower electrode 12. The tip 17 of the pointed portion 11 and the recess 19 face each other in the width direction of the trench 9. Note that the buffer layer 6, collector layer 7, and collector electrode 8 are not shown in Figure 3.

[0025] According to Modification 1, the lower electrode 12 has a recess 19, which allows the distance L1 between the upper electrode 10 and the lower electrode 12 to be increased. Therefore, it is possible to improve the gate breakdown voltage.

[0026] <Modification 2> Figure 4 is a cross-sectional view of a semiconductor device according to Modification 2. As shown in Figure 4, the corner 18 on the surface side of the lower electrode 12 has a curvature R1. That is, the corner 18 is rounded. Note that the buffer layer 6, collector layer 7, and collector electrode 8 are not shown in Figure 4.

[0027] According to the modified example 2, the corner portion 18 of the lower electrode 12 has a curvature R1, which can alleviate electric field concentration at the corner portion 18. Therefore, it is possible to improve the gate breakdown voltage.

[0028] <Variation 3> In the semiconductor device according to Modification 3, the upper oxide film 13 consists of two layers: a thermal oxide film and a CVD film. Specifically, a thermal oxide film is provided along the inner wall of the trench 9, and a CVD film is provided on top of the thermal oxide film.

[0029] According to Modification 3, by using a thermal oxide film, curvature can be imparted to the corner portion 18 of the lower electrode 12 by accelerated oxidation. By using a CVD film, the pointed portion 11 of the upper electrode 10 can be widened in the width direction of the trench 9, thereby ensuring a sufficient distance between the upper electrode 10 and the lower electrode 12. In other words, by providing both a thermal oxide film and a CVD film, it is possible to improve the gate breakdown pressure.

[0030] Furthermore, since the entire upper oxide film 13 consists of two layers, there are no connecting parts between the layers, unlike configurations that have an upper oxide film with a mixture of single-layer and double-layer portions (see, for example, Patent Document 1). Therefore, it is possible to prevent localized electric field concentration.

[0031] <Modification 4> In the semiconductor device according to Modification 4, the upper oxide film 13 consists of three layers: a first thermal oxide film, a CVD film, and a second thermal oxide film. Specifically, the first thermal oxide film is provided along the inner wall of the trench, the CVD film is provided on top of the first thermal oxide film, and the second thermal oxide film is provided on top of the CVD film.

[0032] According to Modification 4, by using the first thermal oxide film, curvature can be imparted to the corner portion 18 of the lower electrode 12 by accelerated oxidation. By using the CVD film, the pointed portion 11 of the upper electrode 10 can be widened in the width direction of the trench 9, thereby ensuring a sufficient distance between the upper electrode 10 and the lower electrode 12. In the semiconductor device manufacturing process, the thickness of the CVD film tends to vary considerably, but by providing the second thermal oxide film on top of the CVD film, this variation in the CVD film can be suppressed. In other words, by providing the first thermal oxide film, the CVD film, and the second thermal oxide film, it becomes possible to improve the gate breakdown voltage.

[0033] Furthermore, similar to the third modification, it becomes possible to prevent localized electric field concentration.

[0034] <Modification 5> Figure 5 is a cross-sectional view of a semiconductor device according to Modification 5. As shown in Figure 5, the length L2 of the lower electrode 12 is longer than the length L3 of the portion of the upper electrode 10 that protrudes from the base layer 3 to the back side. Note that the buffer layer 6, collector layer 7, and collector electrode 8 are not shown in Figure 5.

[0035] Since the layers below the base layer 3 are N-type, the electric field tends to increase. According to Modification 5, by making the N-type region facing the lower electrode 12 (the region consisting of the carrier storage layer 4 and the drift layer 5 in the example of Figure 5) larger than the N-type region facing the upper electrode 10 (the region consisting of the carrier storage layer 4 in the example of Figure 5), it becomes possible to mitigate the electric field through the field-plate effect.

[0036] Within the scope of this disclosure, it is possible to freely combine the embodiments, or to modify or omit the embodiments as appropriate.

[0037] <Note> The various aspects of this disclosure are summarized below as an appendix.

[0038] (Note 1) Semiconductor substrate and A first conductivity type base layer provided on the surface side of the semiconductor substrate, A trench is provided on the surface side of the semiconductor substrate, penetrating the base layer, and having an upper electrode covered with an upper oxide film, a lower electrode covered with a lower oxide film, and a boundary oxide film located between the upper electrode and the lower electrode. Equipped with, The upper electrode has a concave shape on the surface facing the lower electrode, and has a pointed portion that constitutes the concave shape. The pointed portion has a shape that widens in the width direction of the trench. The pointed portion and the lower electrode face each other in the width direction of the trench, The thickness of the upper oxide film is constant along the base layer and the layer below the base layer. A semiconductor device wherein the thickness of the boundary oxide film is greater than the thickness of the upper oxide film.

[0039] (Note 2) The pointed portion includes the base and the tip, The semiconductor device as described in Appendix 1, wherein the angle between the straight line in the width direction of the trench passing through the base and the straight line connecting the base and the tip exceeds 90 degrees.

[0040] (Note 3) The semiconductor device according to Appendix 1 or 2, wherein the side surface of the lower electrode includes a recess that is recessed inward from the corner on the surface side of the lower electrode.

[0041] (Note 4) The semiconductor device according to any one of appendices 1 to 3, wherein the corner on the surface side of the lower electrode has curvature.

[0042] (Note 5) The semiconductor device according to any one of the appendices 1 to 4, wherein the upper oxide film consists of two layers: a thermal oxide film and a CVD (Chemical Vapor Deposition) film.

[0043] (Note 6) The semiconductor device according to any one of the appendices 1 to 4, wherein the upper oxide film consists of three layers: a first thermal oxide film, a CVD film, and a second thermal oxide film.

[0044] (Note 7) The semiconductor device according to any one of the appendices 1 to 6, wherein the length of the lower electrode is longer than the length of the portion of the upper electrode that protrudes from the base layer to the back surface side. [Explanation of Symbols]

[0045] 1 Emitter electrode, 2 Interlayer insulating film, 3 Base layer, 4 Carrier storage layer, 5 Drift layer, 6 Buffer layer, 7 Collector layer, 8 Collector electrode, 9 Trench, 10 Upper electrode, 11 Pointed part, 12 Lower electrode, 13 Upper oxide film, 14 Lower oxide film, 15 Boundary oxide film, 16 Base, 17 Tip, 18 Corner, 19 Recess.

Claims

1. Semiconductor substrate and A first conductivity type base layer provided on the surface side of the semiconductor substrate, A trench is provided on the surface side of the semiconductor substrate, penetrating the base layer, and having an upper electrode covered with an upper oxide film, a lower electrode covered with a lower oxide film, and a boundary oxide film located between the upper electrode and the lower electrode. Equipped with, The upper electrode has a concave shape on the surface facing the lower electrode, and has a pointed portion that constitutes the concave shape. The pointed portion has a shape that widens in the width direction of the trench. The pointed portion and the lower electrode face each other in the width direction of the trench, The thickness of the upper oxide film is constant along the base layer and the layer below the base layer. A semiconductor device wherein the thickness of the boundary oxide film is greater than the thickness of the upper oxide film.

2. The pointed portion includes the base and the tip, The semiconductor device according to claim 1, wherein the angle between the straight line in the width direction of the trench passing through the base and the straight line connecting the base and the tip is greater than 90 degrees.

3. The semiconductor device according to claim 1 or 2, wherein the side surface of the lower electrode includes a recess that is recessed inward from the corner on the surface side of the lower electrode.

4. The semiconductor device according to claim 1 or 2, wherein the corner on the surface side of the lower electrode has curvature.

5. The semiconductor device according to claim 1 or 2, wherein the upper oxide film consists of two layers: a thermal oxide film and a CVD (Chemical Vapor Deposition) film.

6. The semiconductor device according to claim 1 or 2, wherein the upper oxide film consists of three layers: a first thermal oxide film, a CVD film, and a second thermal oxide film.

7. The semiconductor device according to claim 1 or 2, wherein the length of the lower electrode is longer than the length of the portion of the upper electrode that protrudes from the base layer to the back surface side.

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