Memory card, system, and method

The memory card tunes data sampling timing and voltage levels using extended commands, addressing inefficiencies in SD cards for faster operations and ensuring accurate and efficient data transfer.

JP2026069979APending Publication Date: 2026-04-27KIOXIA CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
KIOXIA CORP
Filing Date
2024-10-15
Publication Date
2026-04-27

AI Technical Summary

Technical Problem

Existing SD cards lack a mechanism to accurately tune the data sampling timing for both reading and writing operations, especially as they become faster, leading to inefficiencies in data transfer.

Method used

The memory card includes a controller that interprets extended commands (CMD19) to receive and transmit tuning pattern data, allowing it to tune the data sampling timing for both reading and writing, and can also adjust voltage thresholds and center values to optimize data transfer.

Benefits of technology

This solution enables high-speed and accurate read/write operations by precisely tuning the data sampling timing and voltage levels, enhancing compatibility with different data transfer methods and reducing tuning time.

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Abstract

We offer a memory card with a new mechanism for tuning. [Solution] According to the embodiment, the memory card comprises a non-volatile memory and a controller. The controller is connectable to a host and controls the non-volatile memory. The controller is configured to receive tuning pattern data from the host when it receives a first command for tuning the sampling timing of data received by the host from the controller, the first argument of which is a first value indicating that the host will send tuning pattern data used for tuning, and to send tuning pattern data to the host when it receives a first command in which the first argument of which is a second value indicating that the memory card will send tuning pattern data.
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Description

[Technical Field]

[0001] Embodiments of the present invention relate to memory cards, systems, and methods. [Background technology]

[0002] SD card with flash memory TM Memory cards are widespread. TM The memory card is SD TM They are also called cards.

[0003] According to the SD Association standard, the host is an SD TM To ensure accurate reading of data on the memory card, the host should use the SD card. TM A command is defined for tuning the sampling timing of data received from the memory card. Specifically, CMD19 (send tuning block command) is defined. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2010-157058 [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] One embodiment of the present invention provides a memory card, system, and method having a novel mechanism for tuning. [Means for solving the problem]

[0006] According to an embodiment, the memory card includes a non-volatile memory and a controller. The controller is connectable to a host and controls the non-volatile memory. When the controller receives a first command for tuning the sampling timing of data received by the host from the controller, and a first value indicating that the host transmits tuning pattern data used for the tuning is set as a first argument, the controller receives the tuning pattern data from the host. When the controller receives a first command in which a second value indicating that the memory card transmits the tuning pattern data is set as the first argument, the controller is configured to transmit the tuning pattern data to the host.

Brief Description of Drawings

[0007] [Figure 1] FIG. showing a configuration example of an information processing system including the memory card of the first embodiment and a host using the memory card as an external storage device. [Figure 2] FIG. showing the pin arrangement of the connector in the SD Express card. [Figure 3] FIG. showing a configuration example of the memory card of the first embodiment. [Figure 4] FIG. showing a configuration example of the host of the first embodiment. [Figure 5] FIG. for explaining the basic specifications of CMD19 defined in the SD Association standard. [Figure 6] FIG. for explaining an extension example of CMD19. [Figure 7] FIG. showing a list of arguments of the extended version of CMD19. [Figure 8] Flowchart showing the operation procedure during tuning of the sampling timing of data for writing by the memory card and host of the first embodiment. [Figure 9] FIG. for explaining all patterns within the range of the UI to be executed during tuning of the sampling timing of data. [Figure 10]A diagram showing an example configuration of a host according to the second embodiment. [Figure 11] A flowchart illustrating the operation procedure for tuning the data sampling timing for writing to the memory card and host in the second embodiment. [Figure 12] A diagram showing one example configuration of a memory card according to the third embodiment. [Figure 13] A diagram showing an example configuration of a host according to the third embodiment. [Figure 14] A diagram showing an example of the eye pattern of the signal waveform of the data line between the memory card and the host in the third embodiment. [Figure 15] A diagram showing an example of a voltage threshold for data signals supported by the memory card of the third embodiment. [Figure 16] A flowchart illustrating the operation procedure for tuning the voltage used for data transfer by the memory card and host in the third embodiment. [Figure 17] A diagram showing one example configuration of a memory card according to the fourth embodiment. [Figure 18] A diagram showing an example configuration of the host according to the fourth embodiment. [Figure 19] A figure showing an example of the eye pattern of the signal waveform of the data line between the memory card and the host in the fourth embodiment. [Figure 20] A diagram showing an example of the center voltage value of the data signals supported by the memory card of the fourth embodiment. [Figure 21] A flowchart illustrating the operation procedure for tuning the voltage used for data transfer by the memory card and host in the fourth embodiment. [Modes for carrying out the invention]

[0008] The embodiments will be described below with reference to the drawings.

[0009] (First Embodiment) First, the first embodiment will be described.

[0010] Figure 1 shows an example configuration of an information processing system 3, which includes a memory card 1 of the first embodiment and a host 2 that uses the memory card 1 as an external storage device. The memory card is also referred to as a storage device, and the memory card is also referred to as a memory system.

[0011] Memory card 1 is, for example, an SD card. TM This is a memory card. Memory card 1, for example, supports UHS (ultra high speed)-I. SD card that supports UHS-I. TM Memory cards are also known as UHS-I cards.

[0012] Host 2 consists of information processing devices such as personal computers, portable players, and digital cameras.

[0013] The memory card 1 includes a non-volatile memory 14, a memory controller 11, an I / O cell 12, and a connector 13.

[0014] The non-volatile memory 14 is, for example, a NAND flash memory.

[0015] The memory controller 11 controls the non-volatile memory 14. The memory controller 11 also controls communication with the host 2. The memory controller is also referred to as a controller.

[0016] I / O cell 12 works in conjunction with I / O cell 22 of host 2 (described later) to function as command line 32, clock line 33, and data line 31 between memory card 1 and host 2. I / O cells are also referred to as interface drivers.

[0017] Connector 13 is a connector having pins 1 to 9 to which a command line 32, a clock line 33, a data line 31, etc. are assigned. For example, the data line 31 (DAT0 to 3) is assigned to pins 7, 8, 9, 1. Also, the command line 32 is assigned to pin 2. The clock line 33 is assigned to pin 5.

[0018] Host 2 has an I / O cell 22 and a host controller 21.

[0019] The I / O cell 22 cooperates with the I / O cell 12 of the memory card 1 to form a command line 32, a clock line 33, and a data line 31 between the memory card 1 and the host 2.

[0020] The host controller 21 controls communication with the memory card 1.

[0021] In FIG. 1, as an example of the memory card 1, an SD memory card supporting UHS-I is shown. The memory card 1 of the first embodiment may be a memory card when an SD Express card operates in the SD mode. TM The memory card shown. The memory card 1 of the first embodiment may be a memory card when an SD Express card operates in the SD mode.

[0022] FIG. 2 shows the pin arrangement of the connector 13 in the memory card 1-2 which is an SD Express card.

[0023] The memory card 1-2 operates in either the SD mode or the PCIe mode. When operating in the PCIe mode, it has an interface compliant with the PCI Express TM (PCIe TM ) standard and an NVM Express TM (NVMe TMIt uses a protocol that conforms to the standard. For this purpose, the connector 13 of memory card 1-2 has pins 10-19 in addition to pins 1-9, as shown in Figure 2. The arrangement of pins 1-9 enclosed by the dashed line indicated by symbol a1 is the same as the arrangement of pins 1-9 of memory card 1 in Figure 1. When operating in SD mode, memory card 1-2 uses only the first row of pins 1-9 and the second row of pins 10-19.

[0024] Figure 3 shows an example configuration of memory card 1.

[0025] In addition to the components already described, the memory card 1 has a pattern data storage unit 15. The pattern data storage unit 15 stores tuning pattern data used when the host 2 tunes the sampling timing of the data received from the memory card 1. The tuning pattern data is data that includes a bit pattern that results in the worst eye aperture conditions when transmitting and receiving using the data line 31.

[0026] Note that in Figure 3, for the sake of clarity, the pattern data storage unit 15 is shown as a separate component from the memory controller 11 and the non-volatile memory 14. The pattern data storage unit 15 may be provided in the built-in memory of the memory controller 11 or in the non-volatile memory 14.

[0027] Figure 4 shows an example configuration of host 2.

[0028] In addition to the components already described, host 2 includes a host CPU 25, a clock unit 23, a sampling clock adjustment unit 24, and a pattern data transmission / reception unit 26.

[0029] The host CPU 25 runs various programs, including the operating system, firmware, and software for the multimedia player.

[0030] The clock unit 23 generates a clock signal that serves as the basic frequency for the operation of the information processing system 3.

[0031] The sampling clock adjustment unit 24 uses tuning pattern data to tune the data sampling timing when host 2 reads data from memory card 1 or when host 2 writes data to memory card 1. Conventionally, tuning the data sampling timing could be performed when host 2 reads data from memory card 1 by using CMD19 as defined in the SD Association standard. In the future, as memory card 1 becomes faster, the need to tune the data sampling timing when host 2 writes data to memory card 1 will also increase. From this perspective, the memory card 1 of the first embodiment is configured to perform tuning of the data sampling timing for writing. This point will be described later.

[0032] The pattern data transmission / reception unit 26 transmits tuning pattern data to or receives it from the memory card 1.

[0033] Note that in Figure 4, for the sake of clarity, the sampling clock adjustment unit 24 and the pattern data transmission / reception unit 26 are shown as separate components from the host controller 21. The sampling clock adjustment unit 24 and the pattern data transmission / reception unit 26 may be provided as a single unit within the host controller 21.

[0034] Figure 5 is a diagram illustrating the basic specifications of CMD19.

[0035] Host 2 sends CMD19 to memory card 1 using command line 32.

[0036] Upon receiving CMD19, memory card 1 sends a response (R1) to host 2 using command line 32. Following this response, memory card 1 sends tuning pattern data (Data Block) to host 2 using data line 31.

[0037] Host 2 tunes the sampling timing of the data received from memory card 1 by receiving tuning pattern data from memory card 1. Specifically, the host controller 21 receives tuning pattern data via the pattern data transmission / reception unit 26 and performs sampling timing tuning via the sampling clock adjustment unit 25.

[0038] In other words, CMD19 is a command used to request that memory card 1 send tuning pattern data.

[0039] On the other hand, Figure 6 is a diagram illustrating an example of an extension of CMD19.

[0040] In the first embodiment, when CMD19 is received, the memory card 1 interprets the various arguments (TD, DDR, CT, TLT, CLT) enclosed by the dashed line indicated by symbol b1. Figure 7 shows a list of the arguments for CMD19.

[0041] The argument TD, when set to 0, indicates that memory card 1 will transmit tuning pattern data, as shown in Figure 5. Argument TD=0 is the setting for using CMD19 according to its basic specifications.

[0042] On the other hand, if the argument TD is 1, it indicates that host 2 will send tuning pattern data. Returning to Figure 6, let's explain CMD19 with argument TD=1.

[0043] The purpose of host 2 issuing CMD19 with argument TD=1 is to tune the sampling timing of the data sent from host 2 to memory card 1 so that host 2 can accurately write data to memory card 1. This tuning assumes that host 2 has received tuning pattern data from memory card 1 by issuing CMD19 with argument TD=0, and that the tuning of the sampling timing of the data received from memory card 1 is complete. In other words, it assumes that it has been confirmed that host 2 can accurately read the data from memory card 1.

[0044] Host 2 sends CMD19 with the argument TD=1 to memory card 1 using command line 32.

[0045] Upon receiving CMD19 with argument TD=1, memory card 1 sends a response (R1) to host 2 using command line 32. In the case of CMD19 with argument TD=1, memory card 1 does not send tuning pattern data, but waits for tuning pattern data to be sent.

[0046] When host 2 receives a response (R1) to CMD19, it transmits tuning pattern data (Data Block) to memory card 1 using data line 31. Host 2 also transmits data (CS) to detect errors in the tuning pattern data that may occur during transmission and reception.

[0047] Thus, the memory card 1 of the first embodiment can interpret the argument TD of CMD19. This allows the host 2 to use CMD19 to send tuning pattern data to the memory card 1.

[0048] Furthermore, when memory card 1 receives a CMD19 with argument TD=1, it stores the tuning pattern data sent from host 2 in, for example, the built-in memory of the memory controller 11. Memory card 1 may also store the tuning pattern data sent from host 2 in memory other than the built-in memory of the memory controller 11. For example, memory card 1 may store the tuning pattern data sent from host 2 in non-volatile memory 14. Subsequently, when memory card 1 receives a CMD19 with argument TD=0, if it has stored tuning pattern data sent from host 2, it transmits the stored tuning pattern data to host 2. If memory card 1 receives a CMD19 with argument TD=0 without first receiving a CMD19 with argument TD=1, it transmits the tuning pattern data stored in the pattern data storage unit 15 to host 2.

[0049] In this way, host 2 can receive the tuning pattern data sent from host 2 to memory card 1 from memory card 1 by using CMD19 with argument TD=1.

[0050] The arguments of CMD19 other than the argument TD shown in Figures 6 and 7 (DDR, CT, TLT, CLT) will be described later as appropriate.

[0051] Next, referring to the flowchart in Figure 8, we will describe the tuning of the data sampling timing for writing, which is performed collaboratively by the memory card 1 and the host 2 in the first embodiment. Here, we assume that the tuning of the data sampling timing for reading has already been completed.

[0052] First, host 2 sends a CMD19 (CMD19 with argument TD=0) to memory card 1, which is set by argument TD to send tuning pattern data (S101). Meanwhile, memory card 1 receives a CMD19 with argument TD=0 from host 2 (S151). Upon receiving a CMD19 with argument TD=0, memory card 1 sends the tuning pattern data stored in the pattern data storage unit 15 to host 2 (S152). Host 2 receives and holds the tuning pattern data from memory card 1 (S102).

[0053] Next, host 2 sends CMD19 (CMD19 with argument TD=1) to memory card 1, which is set by argument TD to indicate that host 2 will send tuning pattern data (S103). Meanwhile, memory card 1 receives CMD19 with argument TD=1 from host 2 (S153). Having received CMD19 with argument TD=1, memory card 1 waits for tuning pattern data to be sent from host 2.

[0054] Host 2, which sent CMD19 with argument TD=1, then sends the tuning pattern data it has acquired and is holding from memory card 1 to memory card 1 in S102 (S104). Memory card 1 receives and holds the tuning pattern data from host 2 (S154).

[0055] Next, host 2 sends CMD19 with argument TD=0 to memory card 1 (S105). Memory card 1 receives CMD19 with argument TD=0 from host 2 (S155). At this time, since memory card 1 holds the tuning pattern data sent from host 2, it sends the tuning pattern data it received and holds from host 2 to host 2 in S154, rather than the tuning pattern data stored in pattern data storage unit 15 (S155). Meanwhile, host 2 receives this tuning pattern data from memory card 1 (S106).

[0056] Host 2 compares the pattern data received from memory card 1 in S106 with the pattern data received and held from memory card 1 in S102 (S107). As mentioned above, it is assumed that the tuning of the data sampling timing for reading has been completed, so the pattern data received and held from memory card 1 in S102 can be treated as reference data. Host 2 converts this comparison result into, for example, an evaluation value and stores it.

[0057] Host 2 repeatedly performs the S103-S107 processes, as shown in Figure 9, by shifting the sampling clock by one unit of a predetermined time relative to the clock generated by the clock unit 23. CLK_INT is the waveform of the sampling clock that matches the clock generated by the clock unit 23. The lower section of CLK_INT, Clock with delay Tap1, is the waveform of the sampling clock that is shifted by one unit relative to the clock generated by the clock unit 23. Tap1 indicates a shift of one unit. Further down, Clock with delay Tap2 is the waveform of the sampling clock that is shifted by two units relative to the clock generated by the clock unit 23. Tap2 indicates a shift of two units. Similarly, further down, waveforms of the sampling clock that are shifted by N units relative to the clock generated by the clock unit 23 are shown. For example, Host 2 performs the S103-S107 processes until the pattern of the sampling clock shift covers the range of the UI (unit interval) of the clock generated by the clock unit 23. Alternatively, host 2 may execute the processes S103 to S106 until a certain amount of time has elapsed that exceeds the range of the UI.

[0058] Host 2 determines whether all patterns within the UI range have been executed for processing S103 to S107 (S108). If there are still unexecuted patterns (S108: NO), Host 2 shifts the sampling clock by 1 unit (S109) and returns to S103 to execute processing S103.

[0059] If all patterns within the UI range have been executed (S108:YES), Host 2 selects the optimal amount of shift for the sampling clock and sets the sampling point based on the comparison results in S107 (S110).

[0060] As described above, the memory card 1 of the first embodiment can interpret the argument TD for CMD19 and, if the argument TD is a predetermined value, receive tuning pattern data from the host 2 and transmit the tuning pattern data received and held from the host to the host 2. This extension of CMD19 allows the host 2 to tune the data sampling timing for writing in addition to reading.

[0061] As a result, the memory card 1 of the first embodiment enables the host 2 to perform high-speed read / write operations more accurately.

[0062] Incidentally, in the processing associated with CMD19, data transmission and reception may be performed using the SDR (single-data rate) method, which uses only one edge of the rising edge of the clock for data transfer. On the other hand, memory card 1 often uses the DDR (double-data rate) method, which uses both the rising and falling edges of the clock for data transfer. Therefore, the memory card according to this embodiment may be configured to use two types of tuning pattern data: one with a data pattern for SDR and another with a data pattern for DDR.

[0063] The DDR argument of CMD19 shown in Figures 6 and 7 specifies either an SDR data pattern or a DDR data pattern for the tuning pattern data transmitted and received between memory card 1 and host 2. For example, argument DDR=0 specifies tuning pattern data for SDR data patterns, and argument DDR=1 specifies tuning pattern data for DDR data patterns.

[0064] By providing the argument DDR as an argument to CMD19, it is possible to ensure compatibility of CMD19, for example, so that CMD19 can be used as a command for sending and receiving pattern data in both cases, whether host 2 is connected to memory card 1 that sends and receives data using the SDR method or memory card 1 that sends and receives data using the DDR method.

[0065] (Second Embodiment) Next, a second embodiment will be described. Here, the same reference numerals are used for the same components as in the first embodiment, and redundant explanations of the same components are omitted.

[0066] Figure 10 shows an example configuration of the host 2 in the second embodiment.

[0067] The host 2 of the second embodiment further includes a host-side pattern data storage unit 27 compared to the host 2 of the first embodiment. The host-side pattern data storage unit 27 stores tuning pattern data, similar to the pattern data storage unit 15 of the memory card 1. The tuning pattern data stored in the host-side pattern data storage unit 27 may be the same as or different from the tuning pattern data stored in the pattern data storage unit 15 of the memory card 1. Preferably, the tuning pattern data stored in the host-side pattern data storage unit 27 is created as a bit pattern that produces a worse eye aperture condition than the tuning pattern data stored in the pattern data storage unit 15 of the memory card 1.

[0068] In the second embodiment, the host 2, which stores tuning pattern data in the host-side pattern data storage unit 27, differs from the first embodiment in that, when tuning the sampling timing of data for writing, it does not need to send the CMD19 with argument TD=0 described in the first embodiment to the memory card 1 and acquire tuning pattern data from the memory card 1. In other words, in the second embodiment, the process of the host 2 acquiring tuning pattern data from the memory card 1 is unnecessary.

[0069] As a result, compared to the first embodiment, the second embodiment can reduce the time required to tune the data sampling timing for the lights.

[0070] Furthermore, by using tuning pattern data created as a bit pattern that generates the worst possible eye aperture conditions, which is held by host 2, more precise tuning becomes possible.

[0071] Figure 11 is a flowchart showing the operation procedure for tuning the data sampling timing for writing to memory card 1 and host 2 in the second embodiment.

[0072] The differences between the flowchart shown in Figure 8 and the first embodiment are, firstly, that the processes S101 and S102 of the host 2 in Figure 8, and the corresponding processes S151 and S152 of the memory card 1 in Figure 8, are omitted. Secondly, the process S104 of the host 2 in Figure 8 is replaced with transmitting the pattern data stored in the host-side pattern data storage unit 27 to the memory card 1 (S121).

[0073] Thus, in the second embodiment, the host 2 holds the tuning pattern data, which reduces the time required for tuning and enables more precise tuning.

[0074] (Third embodiment) Next, a third embodiment will be described. Here, the same reference numerals are used for components identical to those in the first or second embodiment, and redundant descriptions of identical components are omitted.

[0075] The third embodiment extends CMD19 to enable tuning of the voltage used for data transfer.

[0076] Figure 12 shows an example configuration of the memory card 1 according to the third embodiment.

[0077] The memory card 1 of the third embodiment further includes a threshold level control unit 16 compared to the memory card 1 of the first embodiment. In Figure 12, for the sake of clarity, the threshold level control unit 16 is shown as a separate component from the memory controller 11. The threshold level control unit 16 may be provided as one unit within the memory controller 11.

[0078] The threshold level control unit 16 changes the voltage threshold used for data transfer between the memory card 1 and the host 2 using the data line 31, in response to a request from the host 2. Specifically, the threshold level control unit 16 lowers the upper limit of the voltage threshold for the data signal propagated on the data line 31, or raises the lower limit.

[0079] More specifically, the memory card 1 of the third embodiment interprets the argument TLT of the CMD19 shown in Figures 6 and 7, and recognizes that the host 2 has requested that the CMD19 with argument TLT=1 be changed to change the upper or lower limit of the voltage threshold of the data signal during data transfer using the data line 31.

[0080] Figure 13 shows an example configuration of the host 2 in the third embodiment.

[0081] The host 2 of the third embodiment, compared to the host 2 of the first embodiment, has a threshold level adjustment unit 28 instead of a sampling clock adjustment unit 24. In Figure 13, for the sake of clarity, the threshold level adjustment unit 28 is shown as a separate component from the host controller 21. The threshold level adjustment unit 28 may be provided as one unit within the host controller 21.

[0082] The threshold level adjustment unit 28 uses the CMD 19 to tune the voltage used for data transfer between the host 2 and the memory card 1 using the data line 31. Refer to Figures 14 and 15 for details of the tuning performed by the threshold level adjustment unit 28.

[0083] Figure 14 shows an example of the eye pattern of the signal waveform of data line 31.

[0084] In UHS-I, the minimum upper limit of the threshold for a 1.8V signal (V OH The minimum value (V) is defined as 1.40V, and the maximum value of the lower limit of the threshold is also defined. OL A maximum voltage of 0.45V is defined. At this voltage, the upper and lower voltage range is 0.95V.

[0085] Note that in the case of eMMC (embedded multimedia card), the 1.2V signal V OH (min) is defined as 0.825V, and V OL (max) is defined as 0.325V. Below, SD TM Considering that memory cards may support 1.2V signals in the future, we will include an explanation regarding 1.2V signals, referencing the eMMC standard.

[0086] In contrast, the memory card 1 of the third embodiment, as shown in Figure 15, has a threshold value of V for the 1.8V signal. OHAs a minimum, in addition to 1.40V, it supports, for example, 1.38V, 1.36V, and 1.34V. OL As for (max), in addition to 0.45V, it supports, for example, 0.47V, 0.49V, and 0.51V. OH (min) = 1.34V, V OL If data transfer can be performed without problems with a power of (max)=0.51V, the upper and lower limits will be 0.83. In this case, the slope of the signal's rise / fall is mitigated, which suppresses ringing, relaxes the eye aperture requirements, and further reduces power consumption. Note that memory card 1 is V OH (min) = 1.40V, V OL (max)=0.45V is preset as the initial value.

[0087] Furthermore, regarding eMMC, as shown in Figure 15, the memory card 1 of the third embodiment has a threshold of 1,2V signals, V OH As (min), in addition to 0.825V, it supports, for example, 0.815V, 0.805V, and 0.795V. On the other hand, V OL In addition to 0.325V, it also supports 0.335V, 0.345V, and 0.355V (max).

[0088] Referring to the flowchart in Figure 16, the tuning of the voltage used for data transfer performed collaboratively by the memory card 1 and host 2 in the third embodiment will be described. Here, it is assumed that the tuning of the data sampling timing for read / write has been completed.

[0089] First, host 2 verifies that data can be written to and read from memory card 1 correctly (S201). The process in S201 may be performed by sending and receiving tuning pattern data using CMD19 with the argument TD, but it is not limited to this and can be performed in various other ways.

[0090] Next, host 2 sends CMD19 (argument TLT=1) to memory card 1, which is set by the argument TLT to perform threshold level tuning (S202). This CMD19 with argument TLT=1 is sent to memory card 1 using command line 32. At this time, host 2 uses, for example, the data line to determine the current V OH A value one step lower than (min) or the current V OL Send a value one step higher than (max) to memory card 1. Host 2 sends V OH (min) and V OL You can change (max) at the same time, or you can change them separately.

[0091] Alternatively, if memory card 1 receives a CMD19 with argument TLT=1, rather than host 2 specifying a numerical value, it will autonomously, for example, V OH (min) and V OL You can also change (max) one step at a time.

[0092] Memory card 1 receives CMD19 with argument TLT=1 from host 2 (S251), V OH (min), V OL Change (max) (S252).

[0093] Next, host 2 performs data write / read operations on memory card 1 (S203). Host 2 determines whether or not there are any problems with the data write / read operations in S203 (S204). The operations in S203 and S204 may also be performed by sending and receiving tuning pattern data using CMD19 with the argument TD, but are not limited to this and can be performed in various other ways.

[0094] If there are no issues writing / reading data to S203 (S204: YES), then Host 2 will proceed to V OH (min), V OL Determine whether there is room to change the value of (max) (S205). OH (min), V OLIf there is room to lower the value of (max) (S205:YES), Host 2 returns to S202 and V OH (min), V OL To determine whether the value of (max) can be changed by another step, a series of operations starting from S202 are executed.

[0095] V OH (min), V OL If there is no room to change the value of (max) (S205:NO), Host 2 will terminate tuning.

[0096] Also, if there is a problem writing / reading data to S203 (S204:NO), Host 2 will V OH (min), V OL Restore the (max) value to its original value (S206) and finish tuning.

[0097] As described above, the memory card 1 of the third embodiment interprets the argument TLT for CMD19, and V OH (min), V OL Change the value of (max). This CMD19 extension allows host 2 to V OH (min), V OL By changing (max), it becomes possible to tune the voltage used for data transfer.

[0098] Note that the argument CT of CMD19 shown in Figures 6 and 7 specifies either tuning from the initial state or corrective tuning. For example, argument CT=0 specifies tuning from the initial state, and argument CT=1 specifies corrective tuning.

[0099] For example, in response to CMD19 with TLT=1, V autonomously OH (min) and V OL For memory card 1, which changes (max) one step at a time, if argument CT=0 is also set, it will change one step at a time from the preset value, and if argument CT=1 is also set, it will change one step at a time from the current value.

[0100] This eliminates the need to start from preset values ​​each time, thus reducing tuning time.

[0101] (Fourth Embodiment) Next, the fourth embodiment will be described. Here, the same reference numerals are used for the same components as in the first to third embodiments, and redundant explanations of the same components are omitted.

[0102] In the third embodiment, the CMD19 is extended to allow tuning of the voltage used for data transfer. This tuning involves changing either the upper or lower limit of the voltage threshold, or both. The fourth embodiment also extends the CMD19 to allow tuning of the voltage used for data transfer. This tuning involves changing the voltage center value.

[0103] Figure 17 shows an example configuration of the memory card 1 according to the fourth embodiment.

[0104] The memory card 1 of the fourth embodiment, compared to the memory card 1 of the third embodiment, has a voltage center value control unit 17 instead of a threshold level control unit 16. In Figure 17, for the sake of clarity, the voltage center value control unit 17 is shown as a separate component from the memory controller 11. The voltage center value control unit 17 may be provided as one unit within the memory controller 11.

[0105] The voltage center value control unit 17 changes the center value of the voltage used for data transfer between the memory card 1 and the host 2 using the data line 31, in response to a request from the host 2. Specifically, the voltage center value control unit 17 lowers the center value of the voltage of the data signal propagated on the data line 31.

[0106] More specifically, the memory card 1 of the fourth embodiment interprets the argument CLT of the CMD19 shown in Figures 6 and 7, and recognizes that the host 2 has requested that the CMD19 with argument CLT=1 be changed to change the center voltage used for data transfer using the data line 31.

[0107] Figure 18 shows an example configuration of the host 2 in the fourth embodiment.

[0108] The host 2 of the fourth embodiment, compared to the host 2 of the third embodiment, has a voltage center value adjustment unit 29 instead of a threshold level adjustment unit 28. In Figure 18, for the sake of clarity, the voltage center value adjustment unit 29 is shown as a separate component from the host controller 21. The voltage center value adjustment unit 29 may be provided as one unit within the host controller 21.

[0109] The voltage center value adjustment unit 29 uses the existing CMD 19 to tune the voltage used for data transfer between the host 2 and the memory card 1 using the data line 31. Refer to Figures 19 and 20 to describe the details of the tuning performed by the threshold level adjustment unit 28.

[0110] Figure 19 shows an example of the eye pattern of the signal waveform of data line 31.

[0111] In UHS-I, 0.925V is defined as the center value of a 1.8V signal. For example, as shown in the eye pattern on the left in Figure 19, if the upper limit is 1.40V and the lower limit is 0.45V, the upper and lower range will be 0.95V.

[0112] In the case of eMMC, 0.575V is defined as the center value of the 1.2V signal. For example, as shown in the eye pattern on the right side of Figure 19, if the upper limit is 0.825V and the lower limit is 0.45V, the upper and lower range will be 0.50V.

[0113] In contrast, the memory card 1 of the fourth embodiment supports, for example, 0.915V, 0.905V, and 0.895V in addition to 0.925V for the center value of the 1.8V signal. If data transfer can be performed without problems at a lower power level for the center value, the upper and lower limits can be reduced. In this case, as with the third embodiment, the rise / fall slope of the signal is mitigated, which suppresses ringing, relaxes the eye aperture conditions, and further reduces power consumption. The memory card 1 is initially preset with a center value of 0.925V.

[0114] Furthermore, with respect to the eMMC, as shown in Figure 20, the memory card 1 of the fourth embodiment supports, in addition to 0.575V, for example, 0.565V, 0.555V, and 0.545V with respect to the center value of the 1.2V signal.

[0115] Referring to the flowchart in Figure 21, the tuning of the voltage used for data transfer performed collaboratively by the memory card 1 and host 2 in the fourth embodiment will be described. Here, it is assumed that the tuning of the data sampling timing for read / write has been completed.

[0116] First, host 2 verifies that data can be written to and read from memory card 1 accurately (S301). The process in S301 may be performed by sending and receiving tuning pattern data using CMD19 with argument TD, but it is not limited to this and can be performed in various other ways.

[0117] Next, host 2 sends a CMD19 (argument CLT=1) to memory card 1, which is set by the argument CLT to perform voltage center value tuning (S302). This CMD19 with argument CLT=1 is sent to memory card 1 using command line 32. At this time, host 2 sends a value one step lower than the current center value to memory card 1, for example, using the data line.

[0118] Alternatively, instead of host 2 specifying a numerical value, memory card 1 may autonomously lower the voltage center value of the data signal by one step if it receives a CMD19 with argument CLT=1.

[0119] Memory card 1 receives CMD19 with argument CLT=1 from host 2 (S351) and lowers the voltage center value of the data signal (S352).

[0120] Next, host 2 performs data write / read operations on memory card 1 (S303). Host 2 determines whether or not there are any problems with the data write / read operation in S303 (S304). The operations in S303 and S304 may also be performed by sending and receiving tuning pattern data using CMD19 with the argument TD, but are not limited to this and can be performed in various other ways.

[0121] If there are no problems writing / reading the data in S303 (S304: YES), Host 2 determines whether there is room to lower the voltage center value of the data signal (S305). If there is room to lower the voltage center value of the data signal (S305: YES), Host 2 returns to S302 and performs a series of operations from S302 to determine whether the voltage center value of the data signal can be lowered by another step.

[0122] If there is no room to lower the voltage center value of the data signal (S305:NO), Host 2 terminates tuning.

[0123] Additionally, if there is a problem writing / reading data in S303 (S304: NO), Host 2 resets the voltage center value of the data signal (S306) and terminates tuning.

[0124] In this way, host 2 repeats the processes from S302 to S304 a predetermined number of times or until the process in S303 fails, and detects the smallest value that can be set as the voltage center value of the data signal.

[0125] As described above, the memory card 1 of the fourth embodiment interprets the argument CLT for the existing CMD19 and lowers the voltage center value of the data signal. This extension of CMD19 allows the host 2 to tune the voltage used for data transfer by lowering the voltage center value of the data signal.

[0126] Furthermore, the argument CT of CMD19, as described in the third embodiment, can also be used in the tuning of the fourth embodiment.

[0127] For example, in the case of memory card 1, which autonomously lowers the voltage center value of the data signal by one step in response to CMD19 with CLT=1, if the argument CT=0 is also set, it will be lowered by one step from the preset value, and if the argument CT=1 is also set, it will be lowered by one step from the current value.

[0128] This means that, as with the third embodiment, it is not necessary to start the changes from a preset value each time, thus reducing tuning time.

[0129] Furthermore, as explained in the third embodiment, V OH (min), V OL It is preferable to perform both tuning the voltage used for data transfer by changing (max) and tuning the voltage used for data transfer by lowering the voltage center value of the data signal, as described in the fourth embodiment.

[0130] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of Symbols]

[0131] 1...Memory card, 2...Host, 3...Information processing system, 11...Memory controller, 12...I / O cell, 13...Connector, 14...Non-volatile memory, 15...Pattern data storage unit, 16...Threshold level control unit, 17...Voltage center value control unit, 21...Host controller, 22...I / O cell, 23...Clock unit, 24...Sampling clock adjustment unit, 25...Host CPU, 26...Pattern data transmission / reception unit, 27...Host-side pattern data storage unit, 28...Threshold level adjustment unit, 29...Voltage center value adjustment unit, 31...Data line, 32...Command line, 33...Clock line.

Claims

1. Non-volatile memory and A controller that can connect to a host and controls the non-volatile memory, A memory card having the following features: The aforementioned controller, When the host receives a first command for tuning the sampling timing of data received from the controller, the first command has a first value set as the first argument indicating that the host will transmit tuning pattern data used for the tuning, the host receives the tuning pattern data from the host, When the first command is received, in which a second value indicating that the memory card will transmit the tuning pattern data is set as the first argument, the tuning pattern data is transmitted to the host. It is structured in such a way. Memory card.

2. The aforementioned controller, When the first command, in which the second value is set as the first argument, is received, it is determined whether or not the tuning pattern data received from the host is held. If the tuning pattern data received from the host is being held, the held tuning pattern data is transmitted to the host. If the tuning pattern data received from the host is not held, the tuning pattern data held on the memory card is sent to the host. It is structured in such a way. The memory card according to claim 1.

3. The tuning pattern data received from the host in response to the first command in which the first value is set as the first argument is the tuning pattern data that was sent to the host in response to the first command in which the second value is set as the first argument before the reception of the first command. The memory card according to claim 1.

4. The tuning pattern data received from the host in response to the first command in which the first value is set as the first argument is the tuning pattern data that the host has previously held. The memory card according to claim 1.

5. Non-volatile memory and A controller that can connect to a host and controls the non-volatile memory, It is equipped with, The controller is configured to change the upper or lower limit of a voltage threshold when it receives a first command for tuning the sampling timing of data received by the host from the controller, the first command having a third value as its second argument indicating tuning the voltage threshold used for data transfer between the controller and the host. Memory card.

6. The controller is configured to, in response to the first command in which the third value is set as the second argument, set the upper limit threshold to the next smallest value from a selection of multiple values ​​corresponding to the upper limit threshold, or set the lower limit threshold to the next largeest value from a selection of multiple values ​​corresponding to the lower limit threshold, which includes the value next largest value corresponding to the lower limit threshold of the current threshold. The memory card according to claim 5.

7. Non-volatile memory and A controller that can connect to a host and controls the non-volatile memory, It is equipped with, The controller is configured to lower the center value when it receives a first command for tuning the sampling timing of data received by the host from the controller, the first command having a fourth value as its third argument indicating tuning the center value of the voltage used for data transfer between the controller and the host. Memory card.

8. A memory card according to any one of claims 1 to 4, A host that can connect to the aforementioned memory card, It is equipped with, The aforementioned host, (1) Send the first command with the first value set as the first argument to the memory card, and send the tuning pattern data to the memory card. (2) The first command, with the second value set as the first argument, is sent to the memory card, and the tuning pattern data is received from the memory card. (3) Compare the tuning pattern data transmitted to the memory card with the tuning pattern data received from the memory card. This process is repeated while shifting the sampling clock until the shift in the sampling clock is at least equal to or greater than the unit interval, thereby setting the sampling point for the data that the host transmits to the memory card. It is structured in such a way. system.

9. A memory card according to claim 5 or 6, A host that can connect to the aforementioned memory card, It is equipped with, The aforementioned host, (1) The first command, with the third value set as the second argument, is sent to the memory card. (2) Write predetermined data to the memory card and read predetermined data from the memory card. (3) Determine whether the writing and reading operations are successful. This process is repeated a predetermined number of times or until the write or read operation fails, and the smallest value that can be set as the upper threshold and the largest value that can be set as the lower threshold are detected. system.

10. The memory card described in claim 7, A host that can connect to the aforementioned memory card, It is equipped with, The aforementioned host, (1) The first command, with the fourth value set as the third argument, is sent to the memory card. (2) Write predetermined data to the memory card and read predetermined data from the memory card. (3) Determine whether the writing and reading operations are successful. This process is repeated a predetermined number of times or until the write or read fails, and the smallest value that can be set as the center value is detected. It is structured in such a way. system.

11. A method for controlling a memory card that is connectable to a host and contains non-volatile memory, A first command for tuning the sampling timing of data received by the host from the memory card, wherein a first value indicating that the host will transmit tuning pattern data used for the tuning is set as the first argument; in response to the first command, the tuning pattern data is received from the host, When the first command is received, in which a second value indicating that the memory card will transmit the tuning pattern data is set as the first argument, the tuning pattern data is transmitted to the host. method.

12. A method for controlling a memory card that is connectable to a host and contains non-volatile memory, A first command for tuning the sampling timing of data received by the host from the memory card, wherein a third value indicating tuning the voltage threshold used for data transfer between the memory card and the host is set as the second argument of the first command, the upper or lower limit of the threshold is changed. method.

13. A method for controlling a memory card that is connectable to a host and contains non-volatile memory, When the host receives a first command for tuning the sampling timing of data received from the memory card, the first command has a fourth value set as the third argument indicating tuning the center value of the voltage used for data transfer between the memory card and the host, the center value is lowered. method.

Citation Information

Patent Citations

  • Memory device, host device, and sampling clock adjusting method

    JP2010157058A