Wiring board, and method for manufacturing a wiring board
By employing insulating layers with varying thermal conductivity and angled openings, the wiring board addresses connection reliability issues in multilayer boards, enhancing adhesion and durability through improved conductor layer connections.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- IBIDEN CO LTD
- Filing Date
- 2024-11-07
- Publication Date
- 2026-05-19
AI Technical Summary
The via holes in multilayer wiring boards with forward taper shapes result in reduced reliability of connections between conductor layers due to the tapering diameter, leading to inconsistent adhesion and potential failure points.
The wiring board design includes insulating layers with distinct upper and lower layers of varying thermal conductivity, and openings with angled wall surfaces that differ in inclination, ensuring a larger contact area and improved adhesion between conductor layers and via conductors.
This design enhances the reliability of connections by increasing the adhesion strength between conductor layers and via conductors, thereby improving the overall performance and durability of the wiring board.
Smart Images

Figure 2026082440000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a wiring board and a method for manufacturing the wiring board.
Background Art
[0002] Patent Document 1 discloses a multilayer wiring board having a stacked via structure. The stacked via structure is composed of a plurality of stacked via pads. Each via pad is formed from the surface of each interlayer insulating layer across the inside of the via hole provided in the interlayer insulating layer and contacts the connection portion of the wiring layer formed on the lower side of each interlayer insulating layer.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] In the multilayer wiring board disclosed in Patent Document 1, the via holes formed in each interlayer insulating layer are formed in a forward taper shape in which the diameter becomes smaller as the via hole approaches the wiring layer on the lower side of the interlayer insulating layer penetrated by the via hole. Therefore, the portion of each via pad penetrating the interlayer insulating layer also has a forward taper shape in which the diameter becomes smaller as it approaches the lower wiring layer. In the via pads penetrating the interlayer insulating layer in such a forward taper shape portion, high reliability may not be obtained with respect to the connection with the lower wiring layer.
Means for Solving the Problems
[0005] The wiring board of the present invention includes a first conductor layer and an insulating layer covering the first conductor layer. The insulating layer includes a lower layer in contact with the first conductor layer and an upper layer laminated on the lower layer, and the insulating layer further includes an opening that penetrates the lower layer and the upper layer to expose a portion of the first conductor layer, the thermal conductivity of the lower layer is lower than that of the upper layer, the opening includes a first portion that penetrates the upper layer and a second portion that penetrates the lower layer, and within the opening, the angle between the surface of the first conductor layer and the wall surface of the lower layer exposed in the second portion is smaller than the angle between the surface and the wall surface of the upper layer exposed in the first portion.
[0006] The present invention provides a method for manufacturing a wiring board, comprising: forming a conductor layer; forming an insulating layer covering the conductor layer; and forming an opening that penetrates the insulating layer, thereby exposing a portion of the surface of the conductor layer within the opening. The formation of the insulating layer comprises: forming a lower layer of the insulating layer in contact with the conductor layer; and laminating an upper layer of the insulating layer having a thermal conductivity higher than that of the lower layer on top of the lower layer. The formation of the opening comprises: forming a wall surface of the upper layer exposed to the opening; and forming a wall surface of the lower layer exposed to the opening that has an angle between itself and the surface smaller than the angle between the surface of the conductor layer exposed to the opening and the wall surface of the upper layer.
[0007] According to embodiments of the present invention, the reliability of the connection between the conductor layer and the conductor penetrating the insulating layer covering the conductor layer can be improved, thereby potentially improving the reliability of the wiring board. [Brief explanation of the drawing]
[0008] [Figure 1] A cross-sectional view showing an example of a wiring board according to the first embodiment. [Figure 2A] Enlarged view of section II of the wiring board in Figure 1. [Figure 2B] A schematic diagram showing the opening 5 and its surrounding components in Figure 2A. [Figure 3A]A cross-sectional view showing a modified example of the opening in the wiring board of the embodiment. [Figure 3B] A cross-sectional view showing a modified example of the opening in the wiring board of the embodiment. [Figure 4] A cross-sectional view showing a modified example of the insulating layer in the wiring board of the embodiment. [Figure 5] A cross-sectional view showing an example of a wiring board according to the second embodiment. [Figure 6] Figure 5 shows an enlarged view of section VI of the wiring board. [Figure 7A] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 7B] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 7C] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 7D] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 7E] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 7F] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 7G] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Figure 7H] A cross-sectional view showing an example of a wiring board being manufactured using the manufacturing method of the embodiment of the wiring board. [Modes for carrying out the invention]
[0009] <Basic configuration of the wiring board in the embodiment> Wiring boards of embodiments of the present invention will be described with reference to the drawings. Figure 1 shows wiring board 1, which is an example of a wiring board of the first embodiment, and Figure 2A shows an enlarged view of part II of wiring board 1 in Figure 1. Note that the wiring boards illustrated in each drawing referenced in the following description are merely examples of wiring boards of each embodiment. The laminated structure of the wiring boards of embodiments is not limited to the laminated structure of the wiring boards shown in each drawing, and the number of conductive layers and insulating layers included in the wiring boards of embodiments is not limited to the number of conductive layers and insulating layers included in the wiring boards shown in each drawing. In addition to the insulating layers and conductive layers that the wiring boards shown in each drawing have, the wiring boards of embodiments may include any number of insulating layers and conductive layers, and may not include all of the insulating layers and conductive layers that the wiring boards shown in each drawing have. Note that in each drawing referenced in the following description, certain parts may be enlarged to make the disclosed embodiments easier to understand. Therefore, each component may not be depicted in the exact proportions between them in terms of size and length.
[0010] As shown in Figure 1, the wiring board 1 of the first embodiment comprises conductor layers 21-24 and insulating layers 31-33. Each conductor layer 21-24 and each insulating layer 31-33 are alternately stacked. The stacking direction of each conductor layer and each insulating layer is the thickness direction of the wiring board 1, and is hereinafter also referred to as the "Z direction". The wiring board 1 has two main surfaces perpendicular to the Z direction: a first surface 1a and a second surface 1b opposite to the first surface 1a. In the wiring board 1 of Figure 1, the conductor layer 21, insulating layer 31, conductor layer 22, insulating layer 32, conductor layer 23, insulating layer 33, and conductor layer 24 are stacked in order from the second surface 1b side toward the first surface 1a side. Insulating layer 31 covers conductor layer 21, insulating layer 32 covers conductor layer 22, and insulating layer 33 covers conductor layer 23.
[0011] In the description of the wiring board 1 in Figure 1, the first surface 1a is also referred to as the "upper side," and the second surface 1b is also referred to as the "lower side." Therefore, in each conductor layer and each insulating layer, the surface facing the first surface 1a is also referred to as the "upper surface," and the surface facing the second surface 1b is also referred to as the "lower surface."
[0012] Also, in the wiring board 1, the lower conductor layer of the two conductor layers sandwiching any one of the insulating layers 31 to 33 may be the first conductor layer, and the upper conductor layer may be the second conductor layer. That is, between the conductor layer 21 and the conductor layer 22 sandwiching the insulating layer 31, the conductor layer 21 may be the first conductor layer, and the conductor layer 22 may be the second conductor layer. Similarly, between the conductor layer 22 and the conductor layer 23 sandwiching the insulating layer 32, the conductor layer 22 may be the first conductor layer, and the conductor layer 23 may be the second conductor layer. Between the conductor layer 23 and the conductor layer 24 sandwiching the insulating layer 33, the conductor layer 23 may be the first conductor layer, and the conductor layer 24 may be the second conductor layer.
[0013] The insulating layers 31 to 33 each include an opening 5 penetrating any one of the insulating layers 31 to 33. The opening 5 penetrating the insulating layer 31 exposes a part of the conductor layer 21 on its bottom surface. Similarly, the opening 5 penetrating the insulating layer 32 exposes a part of the conductor layer 22 on its bottom surface, and the opening 5 penetrating the insulating layer 33 exposes a part of the conductor layer 23 on its bottom surface.
[0014] The wiring board 1 further includes via conductors 4 penetrating each of the insulating layers 31 to 33. The openings 5 formed in each of the insulating layers 31 to 33 are filled with the via conductors 4. Each via conductor 4 is formed of a conductor filling the opening 5. The conductor filling the opening 5 may be any metal such as copper, nickel, gold, titanium, palladium, and tungsten as described later. The via conductor 4 penetrating the insulating layer 31 is integrally formed with the conductor layer 22 and connects the conductor layer 21 and the conductor layer 22. The via conductor 4 penetrating the insulating layer 32 is integrally formed with the conductor layer 23 and connects the conductor layer 22 and the conductor layer 23. And the via conductor 4 penetrating the insulating layer 33 is integrally formed with the conductor layer 24 and connects the conductor layer 23 and the conductor layer 24.
[0015] The wiring board 1 in Figure 1 further includes a solder resist 71 covering the lower surface of the conductor layer 21 and the lower surface of the insulating layer 31, and a solder resist 72 covering the upper surface of the conductor layer 24 and the upper surface of the insulating layer 33. The solder resists 71 and 72 are formed, for example, from a photosensitive epoxy resin. Each solder resist has an opening formed therein that exposes a predetermined area of the conductor layer 21 or the conductor layer 24.
[0016] The conductive layers 21-24 and the via conductor 4 are each formed from any metal having appropriate conductivity. Examples of materials that form these conductive components include copper, nickel, gold, titanium, palladium, and tungsten. However, the materials for the conductive layers 21-24 and the via conductor 4 are not limited to these metals.
[0017] Although the conductor layers 21-24 and via conductor 4 are simplified in Figure 1 and depicted as consisting of only one layer, they may have a multilayer structure composed of two or more metal films, as shown in Figure 2A. In the example in Figure 2A, the conductor layer 22 and via conductor 4 are composed of a lower layer consisting of a first metal layer 41 and an upper layer consisting of a second metal layer 42. The first metal layer 41 may be, for example, an electroless plating film or a sputtering film, and the second metal layer 42 may be, for example, an electroplating film.
[0018] The insulating layers 31-33 shown in Figure 1 are mainly formed from any insulating resin. Examples of insulating resins used to form the insulating layers 31-33 include epoxy resin, bismaleimide triazine resin (BT resin), phenolic resin, fluororesin, liquid crystal polymer (LCP), acrylic resin, fluoroethylene (PTFE) resin, polyester (PE) resin, and modified polyimide (MPI) resin. The insulating layers 31-33 may contain reinforcing materials such as glass fibers (not shown), but insulating layers 31-33 without reinforcing materials are sometimes preferred in terms of ease of forming minute openings 5.
[0019] Furthermore, as shown in Figure 2A, the insulating layers 31-33 may contain particles 6 as fillers to adjust various properties such as thermal and mechanical properties. In the example in Figure 2A, particles 6 are inorganic particles mainly composed of silicon dioxide (silica) and alumina. Note that the resins listed above as materials for the insulating layers 31-33 are merely examples of materials that can form each insulating layer. Each insulating layer can be formed from any material that can provide insulation to the conductive layers 21-24 and support the conductive layers 21-24.
[0020] <Structure of the insulating layer and shape of the openings penetrating the insulating layer> As shown in Figure 1, in the wiring board 1, each insulating layer 31 to 33 includes a lower layer 3b and an upper layer 3a laminated on top of the lower layer 3b. Specifically, insulating layer 31 includes a lower layer 3b that is in contact with the conductor layer 21 and an upper layer 3a laminated on top of the lower layer 3b that is in contact with the conductor layer 21, and insulating layer 31 is composed of these lower layer 3b and upper layer 3a. The lower surface of the upper layer 3a that constitutes insulating layer 31 is in contact with the upper surface of the lower layer 3b that constitutes insulating layer 31. The conductor layer 22 is formed on the upper surface of the upper layer 3a that constitutes insulating layer 31.
[0021] Similarly, the insulating layer 32 includes a lower layer 3b in contact with the conductor layer 22 and an upper layer 3a laminated on top of the lower layer 3b in contact with the conductor layer 22. The lower surface of the upper layer 3a constituting the insulating layer 32 is in contact with the upper surface of the lower layer 3b constituting the insulating layer 32. The conductor layer 23 is formed on the upper surface of the upper layer 3a constituting the insulating layer 32. The insulating layer 33 also includes a lower layer 3b in contact with the conductor layer 23 and an upper layer 3a laminated on top of the lower layer 3b in contact with the conductor layer 23. The lower surface of the upper layer 3a constituting the insulating layer 33 is in contact with the upper surface of the lower layer 3b constituting the insulating layer 33. The conductor layer 23 is formed on the upper surface of the upper layer 3a constituting the insulating layer 33.
[0022] Since each of the insulating layers 31 to 33 is composed of a lower layer 3b and an upper layer 3a, any opening 5 that penetrates any of the insulating layers 31 to 33 penetrates both the upper layer 3a and the lower layer 3b. Therefore, the via conductors 4 that fill each opening 5 also penetrate both the upper layer 3a and the lower layer 3b.
[0023] The opening 5 that penetrates the upper layer 3a and the lower layer 3b includes a first portion 51 that penetrates the upper layer 3a and a second portion 52 that penetrates the lower layer 3b, as shown in Figure 2A. In the wiring board 1 of the embodiment, as shown in Figure 2A, within the opening 5, the wall surface 3ba of the lower layer 3b exposed to the second portion 52 of the opening 5 has an angle θb with the surface 2a of the conductor layer 21 facing the inside of the opening 5. On the other hand, the wall surface 3aa of the upper layer 3a exposed to the first portion 51 of the opening 5 has an angle θa with the surface 2a of the conductor layer 21. In the wiring board 1 of the embodiment, the angle θb is smaller than the angle θa. In the example in Figure 2A, the angle θa may be, for example, about 110° or more and 135° or less, and the angle θb may be, for example, about 90° or more and 120° or less.
[0024] The opening 5, which includes a first portion 51 having an angle θa with respect to the surface 2a of the conductor layer 21, and a second portion 52 having an angle θb with respect to the surface 2a of the conductor layer 21, is filled with via conductors 4. Therefore, the via conductor 4 has a wall surface 4aa facing the wall surface 3aa and having an angle θa with respect to the surface 2a, and a wall surface 4ba facing the wall surface 3ba and having an angle θb with respect to the surface 2a. Inside the opening 5, the angle between the wall surface 4ba of the via conductor 4 in contact with the lower layer 3b and the surface 2a of the conductor layer 21 (=angle θb) is smaller than the angle between the wall surface 4aa of the via conductor 4 in contact with the upper layer 3a and the surface 2a of the conductor layer 21 (=angle θa).
[0025] In the description of the wiring board in the embodiment, the relationship between angles θa and θb refers to the comparison result at any cross-section including the central axis of the opening 5 along the Z direction. Furthermore, it is possible that angle θb is not smaller than angle θa over the entire circumference around the central axis of the opening 5 along the Z direction, but the relationship angle θb < angle θa holds true at least in one cross-section.
[0026] Furthermore, in the wiring board 1 of the embodiment, the thermal conductivity of the lower layer 3b is lower than that of the upper layer 3a in each of the insulating layers 31 to 33. Therefore, there is a difference in the processability of the upper layer 3a and the lower layer 3b when forming the opening 5. Due to this difference, an opening 5 is formed that includes a first portion 51 surrounded by a wall surface 3aa having an angle θa between it and the surface of the conductor layer exposed on the bottom surface, and a second portion 52 surrounded by a wall surface 3ba having an angle θb smaller than the angle θa between it and the surface.
[0027] In the example shown in Figure 2A, the upper layer 3a and the lower layer 3b each contain an insulating resin 30, such as epoxy resin, which is exemplified as the main material of each insulating layer, and particles 6 added to the insulating resin. In the example shown in Figure 2A, the same particles 6 made of the same material are added to both the upper layer 3a and the lower layer 3b in the same proportion. That is, the difference between the thermal conductivity of the upper layer 3a and the thermal conductivity of the lower layer 3b may be mainly due to differences in the properties of the insulating resin 30, such as epoxy resin, that constitutes each insulating layer.
[0028] In the following, the angle (angle θa) between the wall surface 3aa surrounding the first part 51 and the surface 2a of each conductor layer exposed in the opening 5 will also be simply referred to as the "angle of the first part 51." Similarly, the angle (angle θb) between the wall surface 3ba surrounding the second part 52 and the surface 2a of each conductor layer exposed in the opening 5 will also be simply referred to as the "angle of the second part 52."
[0029] Although not shown in Figure 2A, even in the opening 5 that penetrates the insulating layer 32 or insulating layer 33, the angle θb of the second portion 52 may be smaller than the angle θa of the first portion 51. Alternatively, an opening 5 may be formed in only a portion of the insulating layers 31 to 33 in which the angle θb of the second portion 52 is smaller than the angle θa of the first portion 51. Furthermore, in some of the multiple openings 5 in each insulating layer 31 to 33, the angle θb of the second portion 52 may be smaller than the angle θa of the first portion 51, and in all of the multiple openings 5 in each insulating layer, the angle θb of the second portion 52 may be smaller than the angle θa of the first portion 51.
[0030] <Detailed shape of the opening> The shape of the opening 5 will be further explained with reference to Figure 2B, which schematically shows the opening 5 and the components surrounding it. Note that in Figure 2B, only the outlines of the opening 5 and the components surrounding it are shown for clarity. Conductor layers partially exposed within the opening 5 are denoted by reference numeral 2 to indicate that they are any one of the conductor layers 21 to 23. Insulating layers penetrated by the opening 5 are denoted by reference numeral 3 to indicate that they are any one of the insulating layers 31 to 33.
[0031] In the wiring board 1 of the embodiment, as described above, the opening 5 formed in the insulating layer 3 has a first portion 51 that penetrates the upper layer 3a of the insulating layer 3 and a second portion 52 that penetrates the lower layer 3b of the insulating layer 3, and the angle θb of the second portion 52 is smaller than the angle θa of the first portion 51. That is, the inclination of the wall surface 3ba surrounding the second portion 52 with respect to the perpendicular N of the surface 2a of the conductor layer 2 is smaller than the inclination of the wall surface 3aa surrounding the first portion 51 with respect to the perpendicular of the reference plane. Therefore, the wall surface of the insulating layer 3 exposed in the opening 5 is bent at the boundary between the first portion 51 and the second portion 52.
[0032] Furthermore, the first portion 51 of the opening 5 that penetrates the insulating layer 3 has a tapered shape that narrows towards the conductor layer 2 exposed in the opening 5. The first portion 51 having a tapered shape may have a gradient of φ1a = (angle θa - 2 / π) (radians) and may have a taper angle of φ2a = 2 × φ1a.
[0033] In Figure 2B, the second portion 52 of the opening 5 also has a tapered shape that narrows towards the conductor layer 2 exposed in the opening 5. The tapered second portion 52 may have a gradient of φ1b = (angle θb - 2 / π) (radians) and may have a taper angle of φ2b = 2 × φ1b. In the wiring board of this embodiment, since the angle θb is smaller than the angle θa, the gradient φ1b may be smaller than the gradient φ1a, and the taper angle φ2b may be smaller than the taper angle φ2a.
[0034] Furthermore, in the case of an opening 5 where the angle θb is smaller than the angle θa, the width Wr of the opening 5 on the surface 2a of the conductor layer 2 may be larger than the width of the opening 5 on the surface 2a of the conductor layer 2 when the angle θb is greater than or equal to the angle θa. That is, the width of the via conductor 4 (see Figure 2A) filling the opening 5 on the surface 2a may be larger than the width of the via conductor 4 on the surface 2a when the angle θb is greater than or equal to the angle θa. Therefore, the opening area of the opening 5 on the surface 2a of the conductor layer 2 may be larger than the opening area of the opening 5 on the surface 2a when the angle θb is greater than or equal to the angle θa. That is, the contact area between the via conductor 4 and the surface 2a of the conductor layer 2 exposed in the opening 5 may be larger than the contact area between the via conductor 4 and the surface 2a when the angle θb is greater than or equal to the angle θa. Note that the "width" of the opening 5 and the "width" of the via conductor 4 are the longest distance between any two points on the outer circumference of the opening 5 and the via conductor 4, respectively, on a virtual plane parallel to the surface 2a at any position in the Z direction.
[0035] Thus, in the wiring board of the embodiment in which the angle θb is smaller than the angle θa, the contact area between the via conductor 4 and the surface 2a of the conductor layer 2 exposed in the opening 5 may be larger than when the angle θb is greater than or equal to the angle θb. Therefore, the adhesion strength between the conductor layer 2 and the via conductor 4 is considered to be higher than the adhesion strength between the via conductor and the conductor layer in a conventional wiring board that fills an opening without a bend in the wall surface. Consequently, the wiring board of the embodiment can improve the connection reliability between the conductor layer and the via conductor that penetrates the insulating layer covering the conductor layer, thereby improving the reliability of the wiring board.
[0036] <Modified example of the wiring board of the first embodiment> Figures 3A, 3B, and 4 show enlarged views of the opening 5 in the first to third modified examples of the wiring board 1 shown in Figure 1. Figures 3A, 3B, and 4 show the opening 5 penetrating any of the insulating layers 31 to 33 of Figure 1, and each insulating layer shown in the figure is denoted by reference numeral 3 to indicate that it is any one of the insulating layers 31 to 33. In addition, each conductor layer exposed in the opening 5 is denoted by reference numeral 2 to indicate that it is any one of the conductor layers 21 to 23 of the wiring board 1 in Figure 1.
[0037] In the first modified example shown in Figure 3A, the opening 5, like the opening 5 in Figure 2, includes a first portion 51 that penetrates the upper layer 3a of the insulating layer 3 and a second portion 52 that penetrates the lower layer 3b. In this modified example as well, the angle θb of the second portion 52 is smaller than the angle θa of the first portion 51, and the angle θa is greater than 90°. On the other hand, in this modified example, the angle θb is less than 90°, and therefore, with respect to the perpendicular N of the surface 2a of the conductor layer 2, the wall surfaces 3aa and 3ba are inclined in opposite directions.
[0038] Furthermore, the second portion 52 of this modified example has a tapered shape that narrows toward the first portion 51. That is, the second portion 52 has a so-called reverse tapered shape toward the conductor layer 2, and the width of the second portion 52 increases as it approaches the conductor layer 2. Therefore, the width Wb of the opening 5 on the surface 2a of the conductor layer 2 is greater than the width Wi of the opening 5 at the interface IF, which is hypothetical at the boundary between the first portion 51 and the second portion 52. Consequently, the opening area of the opening 5 on the surface 2a of the conductor layer 2 is greater than the opening area of the opening 5 at the interface IF. Therefore, in this modified example, the adhesion strength between the via conductor 4 (see Figure 2A) filling the opening 5 and the conductor layer 2 exposed within the opening 5 may be further improved, and the reliability of the wiring board 1 may be further improved.
[0039] In the second modified example shown in Figure 3B, the opening 5 also has a first portion 51 and a second portion 52, with the angle θa of the first portion 51 being greater than 90°. On the other hand, the angle θb of the second portion 52 is approximately 90°. Therefore, the width Wb2 of the second portion 52 on the surface 2a of the conductor layer 2 and the width Wi2 of the second portion 52 at the interface IF, which is hypothetical at the boundary between the first portion 51 and the second portion 52, are approximately equal. Consequently, the opening area of the opening 5 on the surface 2a of the conductor layer 2 and the opening area of the opening 5 on the second portion 52 side at the interface IF are approximately equal.
[0040] Furthermore, in the second modified example shown in Figure 3B, the width and area of the opening 5 change discontinuously at the boundary between the first portion 51 and the second portion 52. Specifically, the width and area of the opening 5 change discontinuously, with the interface IF being larger on the second portion 52 side than on the first portion 51 side. As a result, a step is created at the position of the interface IF on the wall surface of the insulating layer 3 surrounding the opening 5. In other words, at the position of the interface IF in the Z direction, the wall surface 3aa surrounding the first portion 51 protrudes more inward into the opening 5 than the wall surface 3ba surrounding the second portion 52. However, even in this modified example, the angle θb of the second portion 52 is smaller than the angle θa of the first portion 51. Therefore, even in this modified example, the adhesion strength between the via conductor 4 (see Figure 2A) filling the opening 5 and the conductor layer 2 may be improved compared to the adhesion strength between the via conductor and the conductor layer in conventional wiring boards, which may improve the reliability of the wiring board.
[0041] In the third modified example shown in Figure 4, the shape of the opening 5 is substantially the same as that of the opening 5 shown in Figure 2A, but the filler content in the upper layer 3a and lower layer 3b of the insulating layer 3 differs from the particle 6 content in the insulating layer 31 in Figure 2A. In the example in Figure 4, the upper layer 3a of the insulating layer 3 contains particle 6a as filler, and the lower layer 3b contains particle 6b as filler. Particles 6a and 6b may be inorganic particles made of, for example, silica (SiO2) or alumina.
[0042] In the third modified example shown in Figure 4, the material of the particles 6a contained in the upper layer 3a of the insulating layer 3 is different from the material of the particles 6b contained in the lower layer 3b. Therefore, it is thought that the difference between the materials of particles 6a and particles 6b results in a difference in the thermal conductivity of the upper layer 3a and the lower layer 3b. In other words, the thermal conductivity of the particles 6b contained in the lower layer 3b may be lower than that of the particles 6a contained in the upper layer 3a. The lower layer 3b may have a lower thermal conductivity than the upper layer 3a because it contains particles 6b having a lower thermal conductivity than the particles 6a contained in the upper layer 3a. For example, particles 6a may be crystalline silica with a thermal conductivity of about 10.3 W / m·K, and particles 6b may be fused silica (amorphous silica) with a thermal conductivity of about 1.3 W / m·K.
[0043] <Second Embodiment> Figure 5 shows a wiring board 1β, which is an example of a wiring board of the second embodiment, and Figure 6 shows an enlarged view of part VI in Figure 5. In wiring board 1β, the conductor layer 24 of the wiring board 1 of the first embodiment shown in Figure 1 is not formed, and conductive bumps 8 are formed on the surface 2a of the conductor layer 23. That is, wiring board 1β includes conductive bumps 8. The conductive bumps 8 penetrate the insulating layer 33 and the solder resist 72. The conductive bumps 8 fill the opening 5 of the insulating layer 33 and protrude from the surface 3c of the insulating layer 33, and further protrude from the upper surface 7c of the solder resist 72 by filling the opening 72a of the solder resist 72. In the wiring board 1β, the openings 5 and via conductors 4 that penetrate the insulating layer 31 or insulating layer 32 have a tapered shape that narrows towards the conductor layer 21 at a substantially constant taper angle. However, in the second embodiment, the openings 5 and via conductors 4 may each have the same shape as the openings 5 and via conductors 4 in the first embodiment. Also, in the second embodiment, the insulating layer 32 and insulating layer 33 may include an upper layer 3a and a lower layer 3b, similar to the first embodiment in Figure 1. In Figure 5, components similar to those of the wiring board 1 in Figure 1 are denoted by the same reference numerals as in Figure 1, or are omitted as appropriate, and repetitive explanations are omitted as appropriate.
[0044] The conductive bumps 8 are formed from a suitable conductive metal, such as solder or copper. When using the wiring board 1β, the conductive bumps 8 are used as connecting materials for mounting components (not shown), such as semiconductor devices.
[0045] As shown in Figure 6, the insulating layer 33, like the insulating layers of the wiring board 1 in Figure 1, includes an upper layer 3a and a lower layer 3b, and the opening 5 penetrating the insulating layer 33, like the opening 5 in Figure 2A, includes a first portion 51 penetrating the upper layer 3a and a second portion 52 penetrating the lower layer 3b. Inside the opening 5, the wall surface 3ba of the lower layer 3b exposed to the second portion 52 of the opening 5 has an angle θb with respect to the surface 2a of the conductor layer 23, and the wall surface 3aa of the upper layer 3a exposed to the first portion 51 of the opening 5 has an angle θa with respect to the surface 2a of the conductor layer 23. In the wiring board 1β of the second embodiment, the angle θb is smaller than the angle θa.
[0046] Furthermore, the conductive bump 8 filling the opening 5 has a wall surface 8aa that faces the wall surface 3aa and has an angle θa between it and the surface 2a, and a wall surface 8ba that faces the wall surface 3ba and has an angle θb between it and the surface 2a. Inside the opening 5, the angle between the wall surface 8ba of the conductive bump 8 in contact with the lower layer 3b and the surface 2a of the conductor layer 23 (=angle θb) is smaller than the angle between the wall surface 8aa of the conductive bump 8 in contact with the upper layer 3a and the surface 2a of the conductor layer 23 (=angle θa).
[0047] Therefore, for the same reasons as those for the improved adhesion strength between the via conductor 4 and each conductor layer in the wiring board 1 of the first embodiment shown in Figure 1, it is considered that the adhesion strength between the conductive bump 8 and the conductor layer is improved compared to the adhesion strength between the conductive bump filling the opening without a bend in the wall surface and the conductor layer. Consequently, the reliability of the wiring board may also be improved in the second embodiment.
[0048] <Method for manufacturing a wiring board according to an embodiment> Referring to Figures 7A to 7H, an example of a method for manufacturing a wiring board according to the embodiment will be explained using the wiring board 1 shown in Figure 1 as an example.
[0049] As shown in Figure 7A, a support substrate SP is prepared, which includes a core layer GS and metal film layers ML1 and ML2 laminated on both sides of the core layer GS, respectively. The core layer GS is composed of, for example, a glass material or a glass epoxy material. The metal film layers ML1 and ML2 are electroless plating films or sputtering films made of, for example, copper and titanium, respectively. The metal film layer ML1 and the metal film layer ML2 are joined by an adhesive layer AL whose adhesion changes depending on the light received, for example.
[0050] In the following explanation, the side of the support substrate SP closer to the core layer GS will also be referred to as "bottom" or "lower side," and the side further from the core layer GS will also be referred to as "top" or "upper side." Therefore, the side of each element constituting the wiring board that faces the support substrate SP will also be referred to as the "bottom surface," and the side that faces away from the support substrate SP will also be referred to as the "top surface."
[0051] The manufacturing method of the wiring board according to the embodiment includes forming a conductor layer 21 and forming an insulating layer 31 that covers the conductor layer 21. That is, as shown in Figure 7A, the conductor layer 21 is formed on the metal film layers ML2 on both sides of the prepared support substrate SP. In forming the conductor layer 21, for example, a plating resist (not shown) having predetermined openings is formed on the metal film layer ML2. By electroplating using the metal film layer ML2 as a power supply layer, a plating film is deposited in the openings of the plating resist. After that, the plating resist is removed. A conductor layer 21 is formed, including each conductor pattern made of the plating film deposited in the openings of the plating resist.
[0052] After the conductor layer 21 is formed, an insulating layer 31 is formed to cover the conductor layer 21. In the manufacturing method of the wiring board of this embodiment, forming the insulating layer 31 includes forming a lower layer 3b of the insulating layer 31 that is in contact with the conductor layer 21, and laminating an upper layer 3a of the insulating layer 31 on top of the lower layer 3b. That is, in the example of Figure 7A, an insulating lower layer 3b is formed on top of the conductor layer 21 and the metal film layer ML2 to cover the conductor layer 21 and the metal film layer ML2, and an insulating upper layer 3a is formed on top of the formed lower layer 3b to cover the upper surface of the lower layer 3b.
[0053] The main materials used to form the lower layer 3b and upper layer 3a of the insulating layer 31 are, for example, epoxy resin, BT resin, phenolic resin, fluororesin, LCP, acrylic resin, PTFE resin, PE resin, or MPI resin. In forming the lower layer 3b and upper layer 3a of the insulating layer 31, as an example, a resin film made of a resin constituting the insulating layer 31, such as epoxy resin, is laminated on the conductor layer 21 and the metal film layer ML2, or laminated on the lower layer 3b. Then, by heating and pressurizing the laminated resin film, the lower layer 3b is formed on the conductor layer 21 and the metal film layer ML2, and the upper layer 3a is formed on the lower layer 3b.
[0054] The thermal conductivity of the upper layer 3a formed by the manufacturing method of the wiring board of this embodiment is higher than that of the lower layer 3b. That is, the lower layer 3b is formed to have a lower thermal conductivity than the upper layer 3a, and the upper layer 3a is formed to have a higher thermal conductivity than the lower layer 3b. For example, the lower layer 3b is formed from a material having a lower thermal conductivity than the material used to form the upper layer 3a. The upper layer 3a is formed from a material having a higher thermal conductivity than the material used to form the lower layer 3b. By forming a lower layer 3b with a lower thermal conductivity than the upper layer 3a, it becomes easier to form an opening 5 of the intended shape in the insulating layer 31, as will be described later.
[0055] In the manufacturing method of the wiring board of the embodiment, a lower layer 3b having a lower thermal conductivity than the upper layer 3a can be formed by any method. For example, as the material for forming the lower layer 3b, a resin having a lower thermal conductivity than the resins mainly used to form the upper layer 3a, such as epoxy resin, can be used. By doing so, a lower layer 3b having a lower thermal conductivity than the upper layer 3a may be formed. Alternatively, as will be described later, the thermal conductivity of the lower layer 3b and the thermal conductivity of the upper layer 3a may be adjusted to have a desired magnitude relationship by selecting the material and content of particles added to the resins mainly constituting the lower layer 3b and the upper layer 3a, respectively.
[0056] As shown in Figures 7B to 7D, the manufacturing method of the wiring board of this embodiment includes exposing a portion of the surface 2a of the conductor layer 21 within the opening 5 by forming an opening 5 that penetrates the insulating layer 31. That is, in the manufacturing method of the wiring board of this embodiment, an opening 5 is formed that penetrates both the upper layer 3a and the lower layer 3b of the insulating layer 31 and reaches the conductor layer 21. In the manufacturing process of the wiring board 1 in Figure 1, the opening 5 is formed at a predetermined position where via conductors 4 (see Figure 1) are to be formed. Note that in Figure 7B, and later in Figures 7F and 7G, only one surface side of the support substrate SP is shown, and the state of the other side is omitted. However, the insulating layers and conductor layers may be formed on the surface of the support substrate SP on the side that is omitted from the illustration, in the same way as on the illustrated side, or such conductor layers and insulating layers may not be formed. Also, in Figures 7C and 7D, and later in Figure 7E, the state of each process in the VIIC section shown in Figure 7B is shown in magnified view. The particles 6 (see Figure 2A) contained in the insulating layer 31 of the wiring board 1 in Figure 1 are shown only in Figures 7C to 7E, and are omitted in drawings other than Figures 7C to 7E.
[0057] The aperture 5 is preferably formed by irradiating a laser beam (not shown) onto a predetermined position on the upper surface of the insulating layer 31. Examples of lasers used to irradiate the laser beam that forms the aperture 5 include carbon dioxide lasers, YAG lasers, excimer lasers, and UV lasers. Upon irradiation with the laser beam, the portion of the resin, such as epoxy resin, constituting the insulating layer 31 that is irradiated with the laser beam is sublimated and dissipates, thereby forming the aperture 5. In the formation of the aperture 5 by laser beam, as the beam diameter decreases with the progression of the laser beam, a tapered shape of the aperture 5 that narrows from the upper surface side of the insulating layer 31 irradiated with the laser beam toward the conductive layer 21 side is easily formed, as shown in Figure 7B.
[0058] Furthermore, in the formation of the aperture 5 using laser light, a portion of the insulating layer 31 material that has been altered by the heat generated by the laser light irradiation, known as "smear," remains on the wall surface of the insulating layer 31 exposed to the aperture 5 as an altered layer 30a, as shown in Figure 7C. For example, the resin constituting the insulating layer 31 may be altered by the heat generated by the laser light irradiation, such as melting to a degree that does not lead to sublimation, then re-solidifying, or carbonizing. Note that the "alteration" of the resin material of the insulating layer 31 refers to a change in the internal structure of the resin constituting the insulating layer 31 to a state that can be removed by the desmear treatment of the aperture 5 described later.
[0059] In the formation of the opening 5, the wall surface 3aa of the upper layer 3a and the wall surface 3ba of the lower layer 3b are formed. The wall surfaces 3aa and 3ba each face the opening 5 via the altered layer 30a. In Figure 7C, the formation state of the altered layer 30a is different between the upper layer 3a and the lower layer 3b. That is, in the manufacturing method of the wiring board of this embodiment, the upper layer 3a, which has a higher thermal conductivity than the lower layer 3b, is formed, and the lower layer 3b, which has a lower thermal conductivity than the upper layer 3a, is formed, so the thermal conductivity generated by the laser light is different between the upper layer 3a and the lower layer 3b. Therefore, the formation state of the altered layer 30a is different between the upper layer 3a and the lower layer 3b.
[0060] In the upper layer 3a, the resin within the laser light transmission path sublimes instantaneously in response to the laser light irradiation. Furthermore, because the upper layer 3a has a relatively high thermal conductivity, heat is quickly transferred far away from the laser light, so the temperature of the resin outside the laser light transmission path does not rise easily, and it is thought that not much of the resin is altered. For this reason, even in Figure 7C, a relatively thin altered layer 30a is formed in the upper layer 3a. In addition, the thickness of the altered layer 30a in the upper layer 3a is approximately constant, and therefore, the surface 30c on the side of the altered layer 30a facing the opening 5 (the inner surface) and the surface 30b on the opposite side of the opening 5 (the outer surface) are approximately parallel. That is, the wall surface 3aa of the upper layer 3a facing the outer surface 30b of the altered layer 30a is approximately parallel to the inner surface 30c of the altered layer 30a, and is inclined with respect to the central axis C of the opening 5 at approximately the same inclination as the inclination of the inner surface 30c of the altered layer 30a.
[0061] On the other hand, in the lower layer 3b, the resin within the laser light transmission path sublimes instantaneously in response to the laser light irradiation. Furthermore, in the lower layer 3b, which has a relatively low thermal conductivity, heat from the laser light tends to accumulate around the aperture 5, and therefore it is thought that more resin is altered compared to the upper layer 3a. In addition, since the irradiated laser light is reflected by the surface 2a of the conductive layer 21, it is thought that more resin is altered in the region closer to the conductive layer 21 due to the heat generated by the reflected laser light than in the region closer to the upper layer 3a. For this reason, in Figure 7C, the thickness of the altered layer 30a formed in the lower layer 3b is generally greater than the thickness of the altered layer 30a formed in the upper layer 3a. Moreover, the thickness of the altered layer 30a formed in the lower layer 3b is greater on the conductive layer 21 side than on the upper layer 3a side.
[0062] As described above, the resin in the laser light transmission path dissipates by sublimation in both the upper layer 3a and the lower layer 3b. Therefore, the inner surface 30c of the altered layer 30a is inclined with respect to the central axis C of the aperture 5 at a continuously approximately constant angle from the upper layer 3a to the lower layer 3b, corresponding to the laser beam diameter tapering toward the conductor layer 21. In other words, the inner surface 30c of the altered layer 30a is inclined to approach the center of the aperture 5 on the conductor layer 21 side. In the lower layer 3b, as described above, the thickness of the altered layer 30a is greater on the conductor layer 21 side than on the upper layer 3a side, so the inclination of the outer surface 30b of the altered layer 30a in the lower layer 3b with respect to the central axis C of the aperture 5 is smaller than the inclination of the inner surface 30c of the altered layer 30a with respect to the central axis C. Therefore, the inclination of the wall surface 3ba of the lower layer 3b, which faces the outer surface 30b of the altered layer 30a, with respect to the central axis C is smaller than the inclination of the inner surface 30c of the altered layer 30a with respect to the central axis C. Consequently, the angle θb between the surface 2a and the wall surface 3ba of the conductor layer 21 is smaller than the angle θa between the surface 2a and the wall surface 3aa of the upper layer 3a.
[0063] Thus, in the manufacturing method of the wiring board of this embodiment, forming the opening 5 may include irradiating the insulating layer 31 at the position where the opening 5 is formed with laser light, and forming a modified resin layer 30a of the insulating layer 31 on the lower layer 3b and upper layer 3a of the insulating layer 31, respectively, around the opening 5, by irradiating with laser light.
[0064] Furthermore, the altered layer 30a formed on the lower layer 3b may be formed such that the outer surface 30b of the altered layer 30a has an angle θb between it and the surface 2a of the conductor layer 21 that is exposed to the opening 5 that is smaller than the angle θa of the wall surface 3aa of the upper layer 3a. On the other hand, the altered layer 30a formed on the upper layer 3a may be formed such that the outer surface 30b of the altered layer 30a has an angle θa between it and the surface 2a of the conductor layer 21 that is exposed to the opening 5 that is larger than the angle of the wall surface 3ba of the lower layer 3b.
[0065] The upper layer 3a and lower layer 3b of the insulating layer 31 shown in Figure 7C are each formed of an insulating resin 30 containing particles 6 added as fillers. The insulating resin 30 is the epoxy resin, fluororesin, etc., as previously exemplified as the material for the lower layer 3b and upper layer 3a. The particles 6 are inorganic particles mainly composed of silica, alumina, etc. When the upper layer 3a and lower layer 3b containing particles 6 are formed, the lower layer 3b having a lower thermal conductivity than the upper layer 3a may be due to differences in the properties of the particles 6. That is, for example, the thermal conductivity of the particles 6 contained in the lower layer 3b may be lower than the thermal conductivity of the particles 6 contained in the upper layer 3a.
[0066] After the formation of the altered layer 30a, a desmear treatment is performed using a treatment solution such as an alkaline permanganate solution to remove the smear within the opening 5. The desmear treatment removes the altered layer 30a shown in Figure 7C. Thus, in the manufacturing method of the wiring board of this embodiment, forming the opening 5 may include removing the altered layer 30a formed by laser irradiation.
[0067] Removing the altered layer 30a exposes the wall surface 3aa of the upper layer 3a and the wall surface 3ba of the lower layer 3b to the interior of the opening 5, as shown in Figure 7D. As previously mentioned, the wall surface 3ba of the lower layer 3b has an angle θb between it and the surface 2a of the conductor layer 21 that is smaller than the angle θa that the wall surface 3aa of the upper layer 3a has between it and the surface 2a of the conductor layer 21 that is exposed to the opening 5. In the manufacturing method of the wiring board of this embodiment, forming the opening 5 thus includes forming the wall surface 3aa of the upper layer 3a that is exposed to the opening 5. Forming the opening 5 further includes forming the wall surface 3ba of the lower layer 3b that is exposed to the opening 5. The wall surface 3ba formed in conjunction with the formation of the opening 5 has an angle θb between it and the surface 2a of the conductor layer 21 that is smaller than the angle θa between the surface 2a of the conductor layer 21 that is exposed to the opening 5 and the wall surface 3aa of the upper layer 3a.
[0068] Thus, in the manufacturing method of the wiring board of this embodiment, the opening 5 is formed such that the angle between the wall surface 3ba surrounding the opening 5 in the lower layer 3b and the surface 2a of the conductor layer 21 is smaller than the angle between the wall surface 3aa surrounding the opening 5 and the surface 2a in the upper layer 3a. Therefore, it is considered that the opening area of the opening 5 on the surface 2a of the conductor layer 21 can be made larger compared to the opening formed in the insulating layer 31 which is composed only of the upper layer 3a. Consequently, the adhesion strength between the via conductor 4 (see Figure 7F) formed in the opening 5 and the conductor layer 21 can be increased, which may improve the reliability of the manufactured wiring board.
[0069] After the opening 5 is formed, the conductor layer 22 is formed as shown in Figures 7E and 7F. First, as shown in Figure 7E, a first metal layer 41 is formed on the upper surface of the insulating layer 31, and on the wall surface 3aa of the upper layer 3a, the wall surface 3ba of the lower layer 3b, and the surface 2a of the conductor layer 21, which are exposed inside the opening 5, respectively. The first metal layer 41 is formed by, for example, electroless plating or sputtering. The first metal layer 41 is a metal film formed of a metal with appropriate conductivity, such as copper.
[0070] After the formation of the first metal layer 41, as shown in Figure 7F, a plating resist R having an opening RO corresponding to the conductor pattern of the conductor layer 22 is formed, for example, by lamination of a dry film resist and photolithography. Then, a second metal layer 42, consisting of an electroplated film of a metal such as copper, is formed in the opening RO by electroplating using the first metal layer 41 (see Figure 7E) as a power supply layer. As the opening 5 is filled with the second metal layer 42, a via conductor 4 is formed in the opening 5. As described above, a via conductor 4 with high adhesion to the conductor layer 21 is formed.
[0071] After the formation of the second metal layer 42, the plating resist R is removed using a suitable solvent. Furthermore, the portion of the first metal layer 41 (see Figure 7E) that is exposed by the removal of the plating resist R is removed by quick etching or the like. A conductor layer 22 having the desired conductor pattern is obtained.
[0072] As shown in Figure 7G, insulating layer 32, conductor layer 23, insulating layer 33, and conductor layer 24 are formed sequentially on the insulating layer 31 and conductor layer 22. An opening 5 is formed in each insulating layer, and a via conductor 4 is formed in the opening 5. Insulating layers 32 and 33 are formed, for example, in the same manner as the method for forming insulating layer 31. Conductor layers 23 and 24 are formed, for example, in the same manner as the method for forming conductor layer 22. Furthermore, the openings 5 and via conductors 4 formed in insulating layers 32 and 33 are formed in the same manner as the openings 5 and via conductors 4 formed in insulating layer 31.
[0073] After the conductor layer 24 is formed, the support substrate SP is removed. First, the core layer GS of the support substrate SP is removed. The lower surface of the metal film layer ML2 of the support substrate SP is exposed. The core layer GS is removed, for example, by softening the adhesive layer AL by laser irradiation, and then peeling the metal film layer ML2 from the adhesive layer AL. Then, the metal film layer ML2 is removed by etching. The lower surface of the conductor layer 21 and the lower surface of the insulating layer 31 are exposed.
[0074] As shown in Figure 7H, solder resist 72 is formed on the conductive layer 24 and the insulating layer 33. Solder resist 71 is formed on the underside of the conductive layer 21 and the insulating layer 31, which are exposed by the removal of the support substrate. Solder resists 71 and 72 are formed by any method such as spraying, laminating, or coating, using, for example, a photosensitive polyimide resin or epoxy resin. Openings are formed in each of the solder resists 71 and 72 to expose a portion of the conductive layer 21 or conductive layer 24, for example, by photolithography or laser irradiation. Through these steps, the wiring board 1 shown in Figure 1 is completed.
[0075] The wiring boards of the embodiments are not limited to the structures illustrated in each drawing, nor to the structures, shapes, and materials illustrated herein. As stated above, the wiring boards of the embodiments may have any laminated structure. For example, the wiring boards of the embodiments do not have to be so-called coreless boards, such as the wiring board 1 in Figure 1, and may include a core board and build-up layers formed on both sides thereof. Any insulating layer of the wiring board of the embodiments may be formed by an upper layer and a lower layer, and any insulating layer may have an opening surrounded by walls that are inclined at different angles to each other in the upper and lower layers of the insulating layer. Furthermore, an insulating layer having an opening 5 for via conductors in the first embodiment of Figure 1 and an insulating layer having an opening 5 for conductive bumps in the second embodiment may be mixed in the wiring board of the embodiments.
[0076] The manufacturing method of the wiring board of the embodiment is not limited to the method described with reference to the drawings. For example, the method for forming each insulating layer and each conductor layer is not limited to the method described with reference to Figures 7A to 7H. Each conductor layer may be formed by a method other than the semi-additive method, such as the fully additive method. In forming openings in each insulating layer, it is not necessarily required to form a modified layer and then form the upper and lower walls of the insulating layer that are inclined at different angles to each other. The upper and lower walls that are inclined at different angles to each other may be formed by any method. The manufacturing method of the wiring board of the embodiment may include additional steps other than those described above, and some of the described steps may be omitted. [Explanation of symbols]
[0077] 1, 1β Wiring board 2 Conductor layers (general term) 2a Surface of the conductor layer 21 Conductor layer (first conductor layer) 22-23 Conductor layer (first conductor layer or second conductor layer) 24 Conductor layer (2nd conductor layer) 3. Insulating layer (general term) 30 Insulating resin 30a Altered layer 30b The outer surface of the altered layer (the surface opposite the opening side) 31-33 Insulating layer 3a Upper layer of the insulating layer 3aa Upper wall 3b Lower layer of the insulating layer 3ba Lower wall 4 via conductors 4aa Wall surface of a via conductor in contact with the upper layer of the insulating layer 4ba Wall surface of via conductor in contact with the lower layer of the insulating layer 5 aperture 51 Part 1 52 Part 2 6, 6a, 6b particles 8. Conductive bumps θa is the angle between the upper wall of the insulating layer and the surface of each conductor layer. θb is the angle between the wall surface of the lower layer of the insulating layer and the surface of each conductor layer.
Claims
1. The first conductor layer, An insulating layer covering the first conductor layer, A wiring board including, The insulating layer includes a lower layer in contact with the first conductor layer and an upper layer laminated on top of the lower layer. The insulating layer further includes an opening that penetrates the lower layer and the upper layer, exposing a portion of the first conductor layer. The thermal conductivity of the lower layer is lower than that of the upper layer. The opening includes a first portion that penetrates the upper layer and a second portion that penetrates the lower layer. Within the opening, the angle between the surface of the first conductor layer and the wall surface of the lower layer exposed to the second portion is smaller than the angle between the surface and the wall surface of the upper layer exposed to the first portion.
2. A wiring board according to claim 1, The upper layer and the lower layer each comprise an insulating resin and particles added to the insulating resin, The material of the particles contained in the upper layer is different from the material of the particles contained in the lower layer.
3. The wiring board according to claim 2, wherein the thermal conductivity of the particles contained in the lower layer is lower than that of the particles contained in the upper layer.
4. A wiring board according to claim 1, further A second conductive layer formed on the surface of the insulating layer, A via conductor formed of a conductor that fills the opening and connects the first conductor layer and the second conductor layer, Includes, Within the opening, the angle between the wall surface of the via conductor in contact with the lower layer and the surface of the conductor layer is smaller than the angle between the wall surface of the via conductor in contact with the upper layer and the surface of the conductor layer.
5. A wiring board according to claim 1, further comprising conductive bumps that fill the openings and protrude from the surface of the insulating layer.
6. Forming a conductive layer, Forming an insulating layer to cover the aforementioned conductive layer, By forming an opening that penetrates the insulating layer, a portion of the surface of the conductor layer is exposed within the opening. A method for manufacturing a wiring board, including, Forming the aforementioned insulating layer means To form a lower layer of the insulating layer that is in contact with the conductor layer, The upper layer of the insulating layer having a higher thermal conductivity than the thermal conductivity of the lower layer is laminated on top of the lower layer. Includes, Forming the aforementioned opening means To form the upper wall surface exposed to the opening, The lower layer's wall surface, exposed to the opening, is formed such that it has an angle between itself and the surface that is smaller than the angle between the surface of the conductor layer exposed to the opening and the wall surface of the upper layer, It includes.
7. A method for manufacturing a wiring board according to claim 6, Forming the aforementioned opening means Irradiating the position where the opening in the insulating layer is formed with laser light, By irradiating the aperture with the aforementioned laser light, a modified layer of the constituent resin of the insulating layer is formed in the lower layer surrounding the aperture. Removing the aforementioned altered layer, Includes, The altered layer formed in the lower layer is formed such that the surface of the altered layer opposite to the opening has a smaller angle with respect to the surface of the conductor layer than the angle with respect to the wall surface of the upper layer, with respect to the surface of the conductor layer that is exposed to the opening.
8. A method for manufacturing a wiring board according to claim 7, Forming the opening includes further forming the altered layer in the upper layer around the opening by irradiating it with the laser light. The altered layer formed in the upper layer is formed such that the surface of the altered layer formed in the upper layer opposite to the opening has an angle greater than the angle of the wall surface of the lower layer between it and the surface of the conductor layer that is exposed to the opening.
9. A method for manufacturing a wiring board according to claim 6, The upper and lower layers of the insulating layer are each formed of an insulating resin containing particles. The thermal conductivity of the particles contained in the lower layer is lower than that of the particles contained in the upper layer.