Wiring board and its manufacturing method, semiconductor device

Abstract

In a wiring substrate with a glass layer, this invention achieves both high wiring density and improved heat dissipation. [Solution] The wiring board 1 has a ceramic layer 10, a first wiring layer 20 provided on the ceramic layer 10, a glass layer 40 arranged in contact with the ceramic layer 10 and having no voids, and a second wiring layer 50 provided on one side of the glass layer and electrically connected to the first wiring layer 20.

Description

Technical Field

[0001] The present invention relates to a wiring board, a method for manufacturing the same, and a semiconductor device.

Background Art

[0002] With the high performance and high density mounting of semiconductor devices, the miniaturization and densification of wiring are progressing. In conventional wiring boards using organic materials, it is difficult to form fine and high-density wiring due to the influence of expansion, contraction, and distortion during the process. Further, in wiring boards using organic materials, the reliability problem caused by moisture absorption has also become significant with the miniaturization of wiring.

[0003] To address these problems, a method of combining an inorganic material such as silicon with a wiring board using an organic material or forming high-density and fine wiring using silicon alone as a base material has been adopted. However, silicon has problems such as high material cost, difficulty in forming through-conductors in the vertical direction of the base material, and high processing cost.

[0004] Compared with silicon, glass is inexpensive, has high surface smoothness and flatness, has few defects, and is easy to form high-density and fine wiring. Further, since glass itself is an insulating material, it is not necessary to form an insulating layer, and it is relatively easy to form through-conductors in the vertical direction of the substrate. Therefore, in recent years, the development of wiring boards for semiconductor mounting using glass as a base material has been progressing (for example, see Patent Document 1).

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] However, because glass has low thermal conductivity, wiring substrates made of glass are at a disadvantage in terms of heat dissipation required for high-density wiring.

[0007] The present invention has been made in view of the above points, and aims to achieve both high wiring density and improved heat dissipation in a wiring substrate having a glass layer. [Means for solving the problem]

[0008] This wiring board comprises a ceramic layer, a first wiring layer provided on the ceramic layer, a glass layer without voids arranged in contact with the ceramic layer, and a second wiring layer provided on one side of the glass layer and electrically connected to the first wiring layer. [Effects of the Invention]

[0009] According to the disclosed technology, it is possible to achieve both high wiring density and improved heat dissipation in a wiring substrate having a glass layer. [Brief explanation of the drawing]

[0010] [Figure 1] This is a cross-sectional view illustrating a wiring board according to the first embodiment. [Figure 2] This is a cross-sectional SEM image of the interface between the ceramic layer and the glass layer. [Figure 3] This is a diagram (part 1) illustrating the manufacturing process of a wiring board according to the first embodiment. [Figure 4] This is a diagram (part 2) illustrating the manufacturing process of a wiring board according to the first embodiment. [Figure 5] This is a cross-sectional view illustrating a wiring board according to a modified example 1 of the first embodiment. [Figure 6] This is a cross-sectional view illustrating a wiring board according to a modified example 2 of the first embodiment. [Figure 7] This is a cross-sectional view illustrating a wiring board according to a modified example 3 of the first embodiment. [Figure 8] This is a cross-sectional view illustrating a wiring board according to a modified example 4 of the first embodiment. [Figure 9] This is a cross-sectional view illustrating a semiconductor device according to the second embodiment. [Modes for carrying out the invention]

[0011] The embodiments for carrying out the invention will be described below with reference to the drawings. In each drawing, the same reference numerals are used for identical components, and redundant explanations may be omitted.

[0012] <First Embodiment> [Structure of a wiring board] Figure 1 is a cross-sectional view illustrating a wiring board according to the first embodiment. As shown in Figure 1, the wiring board 1 has a ceramic layer 10, a first wiring layer 20, a first via wiring 30, a glass layer 40, a second wiring layer 50, and a second via wiring 60.

[0013] The ceramic layer 10 has a multilayer structure in which ceramic substrates 11, 12, and 13 are sequentially laminated. The number of layers of ceramic substrates is not limited to the example in Figure 1. The ceramic substrates 11 to 13 constituting the ceramic layer 10 are preferably one of alumina (aluminum oxide) ceramic, mullite ceramic, or aluminum nitride ceramic.

[0014] Alumina ceramics have higher mechanical strength than glass layer 40. Furthermore, alumina ceramics have higher thermal conductivity than glass layer 40, at approximately 15-20 W / mK. The thermal expansion coefficient of alumina ceramics is approximately 7 × 10⁻⁶. -6 The temperature is approximately / °C. Alumina ceramics can be fired in air or a non-oxidizing atmosphere at approximately 1500-1600°C.

[0015] Mullite ceramics have a lower thermal conductivity of approximately 7 W / mK than alumina ceramics, but their coefficient of thermal expansion is approximately 4.5 × 10⁻⁶. -6 Its advantage lies in its temperature of / °C, which is close to that of silicon, a semiconductor device material. Mullite ceramics can be fired at around 1500-1600°C in air or a non-oxidizing atmosphere.

[0016] Aluminum nitride ceramic has a thermal conductivity of 140 to 240 W / mK, which is much higher than that of alumina ceramic, and is advantageous for improving heat dissipation. Also, aluminum nitride ceramic has a thermal expansion coefficient of about 4.5×10 -6 / °C, which is advantageous in that it is close to that of silicon, a semiconductor device material. The firing of aluminum nitride ceramic can be carried out at about 1800 to 1900°C in a nitrogen atmosphere. Instead of a nitrogen atmosphere, firing in an atmosphere of a non-oxidizing gas such as argon is also possible.

[0017] The first wiring layer 20 is provided on the ceramic layer 10. In the example of FIG. 1, the first wiring layer 20 is disposed inside the ceramic layer 10. Specifically, the first wiring layer 20 is disposed on the upper surface of the ceramic substrate 11 and covered with the ceramic substrate 12. The first wiring layer 20 may include a plurality of layers. For example, the first wiring layer 20 may be disposed on the upper surface of the ceramic substrate 11 and the upper surface of the ceramic substrate 12. The thickness of the first wiring layer 20 can be, for example, 5 μm or more and 40 μm or less.

[0018] The first via wiring 30 is provided on the ceramic layer 10. The first via wiring 30 can include a through conductor 31 that penetrates the ceramic substrate 11, a through conductor 32 that penetrates the ceramic substrate 12, a through conductor 33 that penetrates the ceramic substrates 11 and 12, a through conductor 34 that penetrates the ceramic substrates 12 and 13, and a through conductor 35 that penetrates the ceramic substrates 11, 12, and 13. The first via wiring 30 does not have to include all of these through conductors. The first via wiring 30 may include a through conductor that penetrates only the ceramic substrate 13.

[0019] The first wiring layer 20 and the first via wiring 30 can be primarily composed of, for example, tungsten, molybdenum, copper, or aluminum. Conductors made of tungsten, molybdenum, or copper can be formed by firing simultaneously with alumina ceramic, mullite ceramic, or aluminum nitride ceramic in a non-oxidizing atmosphere. Since copper melts during firing, it is necessary to prevent it from being exposed on the surface of the ceramic substrate during firing. Conductors made of aluminum can be formed by firing simultaneously with alumina ceramic or mullite ceramic in a non-oxidizing atmosphere or in an atmospheric atmosphere. Since aluminum melts during firing, it is necessary to prevent it from being exposed on the surface of the ceramic substrate during firing. Although copper and aluminum require more effort to protect the molten metal, they have the advantage of low resistance.

[0020] The glass layer 40 is placed in contact with the ceramic layer 10. The thickness of the glass layer 40 is, for example, 20 μm to 200 μm. If the thickness of the glass layer 40 is within this range, the second via wiring 60 can be easily formed. Also, if the thickness of the glass layer 40 is within this range, impedance matching becomes easier.

[0021] The glass layer 40 is amorphous and can be mainly composed of silicon oxide. The glass layer 40 does not contain voids. In this specification, voids are defined as gaps with a size of 0.5 μm or more, and gaps with a size of less than 0.5 μm are not included as voids. Note that voids exist in the ceramic layer 10.

[0022] Figure 2 shows a cross-sectional SEM image of the interface between the ceramic layer and the glass layer. Here, as an example, a cross-sectional SEM image is shown of a case where a glass layer is formed on a high-purity alumina ceramic layer that does not contain silicon. As shown in Figure 2, the presence of voids of approximately 1-5 μm can be confirmed in the alumina ceramic layer. On the other hand, no voids can be confirmed in the glass layer.

[0023] Due to these differences in the presence or absence of voids, it is difficult to form fine wiring in the ceramic layer, but it is possible to form fine wiring in the glass layer. For example, fine wiring with a line / space of 2 μm / 2 μm or less can be formed in the glass layer. On the other hand, when fine wiring is formed in the ceramic layer 10, disconnections or partial thinning of the wiring may occur due to the presence of voids, so it is preferable that the wiring formed in the ceramic layer 10 has a line / space of 30 μm / 30 μm or more.

[0024] In the example shown in Figure 1, the glass layer 40 is placed in a recess 10x provided on one surface 10a of the ceramic layer 10. In the example shown in Figure 1, there is one recess 10x, but the number of recesses 10x provided in a single ceramic layer 10 does not have to be one; there can be any number of one or more. In this case, the glass layers 40 are placed in each recess 10x, spaced apart from each other. It is preferable that one surface 40a of the glass layer 40 is coplanar with one surface 10a of the ceramic layer 10.

[0025] The second wiring layer 50 is provided on one surface 40a of the glass layer 40. The second wiring layer 50 is electrically connected to the first wiring layer 20. In the example of Figure 1, a portion of the second wiring layer 50 is arranged from one surface 40a of the glass layer 40 to one surface 10a of the ceramic layer 10, and is electrically connected to the first wiring layer 20 via through conductors 34 that constitute the first via wiring 30 provided in the ceramic layer 10.

[0026] The thickness of the second wiring layer 50 can be, for example, 1 μm or more and 5 μm or less. The line / space ratio of the second wiring layer 50 can be, for example, 2 μm / 2 μm or less. However, as mentioned above, it is not preferable to form fine wiring on one surface 10a of the ceramic layer 10. Therefore, in the portion of the second wiring layer 50 that extends from one surface 40a of the glass layer 40 to one surface 10a of the ceramic layer 10, it is preferable to switch the line / space ratio on one surface 10a and set the line / space ratio to 30 μm / 30 μm or more.

[0027] [Manufacturing method for wiring boards] Figures 3 and 4 illustrate the manufacturing process of a wiring board according to the first embodiment. The manufacturing process of the wiring board 1 will be described with reference to Figures 3 and 4.

[0028] First, in the process shown in Figures 3(a) and 3(b), a ceramic layer 10 on which a first wiring layer 20 and a first via wiring 30 are provided is formed. Specifically, in the process shown in Figure 3(a), green sheets 311, 312, and 313 are prepared, and through holes are provided in the portions where through conductors will be formed. An opening 10z is provided in green sheet 313. The through holes formed in green sheets 311, 312, and 313 can be formed such that, for example, the diameter after firing is about 80 to 400 μm. It is preferable that green sheets 311, 312, and 313 are made of alumina ceramic, mullite ceramic, or aluminum nitride ceramic. Green sheets 311, 312, and 313 are sintered and densified to become the ceramic substrates 11, 12, and 13 shown in Figure 1.

[0029] Next, a metal paste 20a, which will become the first wiring layer 20 after firing, is formed on one side of the green sheet 311. Also, a metal paste 31a, which will become the through-conductor 31 after firing, a metal paste 33a, which will become part of the through-conductor 33 after firing, and a metal paste 35a, which will become part of the through-conductor 35 after firing, are formed in the through-holes formed in the green sheet 311. Furthermore, a metal paste 32a, which will become the through-conductor 32 after firing, a metal paste 33b, which will become part of the through-conductor 33 after firing, and a metal paste 35b, which will become part of the through-conductor 35 after firing, are formed in the through-holes formed in the green sheet 312. Finally, a metal paste 34b, which will become part of the through-conductor 34 after firing, and a metal paste 35c, which will become part of the through-conductor 35 after firing, are formed in the through-holes formed in the green sheet 313. Each metal paste can be primarily composed of, for example, tungsten, molybdenum, copper, or aluminum. Each metal paste can be formed, for example, by a screen printing method.

[0030] Next, in the process shown in Figure 3(b), a laminate is created by sequentially stacking the green sheets 311, 312, and 313 produced in the process shown in Figure 3(a), and each green sheet and each metal paste are fired simultaneously. For example, if the green sheets 311 to 313 are aluminum ceramic or mullite ceramic, and each metal paste is tungsten, molybdenum, or copper, the firing is performed in a non-oxidizing atmosphere at approximately 1500 to 1600°C.

[0031] As a result, the green sheets 311, 312, and 313 become ceramic substrates 11, 12, and 13, and a ceramic layer 10 is formed by integrating them. The opening 10z has a bottom surface formed by one side of the ceramic substrate 12, forming a recess 10x. The metal paste 20a becomes the first wiring layer 20. The metal paste 31a becomes the through conductor 31. The metal paste 32a becomes the through conductor 32. The metal pastes 33a and 33b integrate to form the through conductor 33. The metal pastes 34a and 34b integrate to form the through conductor 34. The metal pastes 35a, 35b, and 35c integrate to form the through conductor 35. As a result, a first via wiring 30 is formed, including the through conductors 31, 32, 33, 34, and 35.

[0032] Furthermore, after forming the ceramic layer 10, it is preferable to polish one surface 10a of the ceramic layer 10 to make it a flat surface.

[0033] Next, in the process shown in Figure 3(c), a glass layer 40 without voids is formed in contact with the ceramic layer 10. Specifically, for example, a paste made of glass powder is applied to the recess 10x of the ceramic layer 10, or a glass preform is placed on top, and then the glass layer 40 is formed by heat treatment in a vacuum or non-oxidizing atmosphere. By these methods, a glass layer 40 without voids can be formed. The heat treatment temperature is set so that the paste made of glass powder or the glass preform melts, but the first via wiring 30 exposed from the ceramic layer 10 does not melt. For example, if the first via wiring 30 is tungsten, molybdenum, or copper, the heat treatment temperature can be, for example, 500°C to 1000°C. If the first via wiring 30 is aluminum, the heat treatment temperature can be, for example, 500°C to 600°C.

[0034] Furthermore, after forming the glass layer 40, it is preferable to polish one surface 40a of the glass layer 40 to a mirror finish. At this time, it is preferable to also polish one surface 10a of the ceramic layer 10 so that one surface 40a of the glass layer 40 and one surface 10a of the ceramic layer 10 are on the same plane.

[0035] Next, in the process shown in Figure 4(a), a through-hole 40x is formed in the glass layer 40, exposing the upper surface of the first via wiring 30. Various commercially available methods can be applied to form the through-hole 40x. For example, one method is to optically alter the location where the through-hole 40x is to be formed, and then chemically etch it. Alternatively, the through-hole 40x may be formed by irradiating the glass layer 40 with laser light.

[0036] Next, in the process shown in Figure 4(b), a second via wiring 60 is formed to fill the through hole 40x. The second via wiring 60 can be formed, for example, using copper by a wet plating method.

[0037] Next, in the process shown in Figure 4(c), a second wiring layer 50 is formed on one surface 40a of the glass layer 40, which is electrically connected to the first wiring layer 20. The second wiring layer 50 can be formed, for example, using copper by sputtering or plating. The line / space of the second wiring layer 50 can be, for example, 2 μm / 2 μm or less. When the second wiring layer 50 is formed from one surface 40a of the glass layer 40 to one surface 10a of the ceramic layer 10, it is preferable to switch the line / space on one surface 10a to 30 μm / 30 μm or more. The second wiring layer 50 and the second via wiring 60 may be formed integrally by plating or the like. With the above steps, the wiring substrate 1 is completed.

[0038] Note that the structure shown in Figure 4(c) represents one wiring board 1, and multiple such structures are manufactured simultaneously during the manufacturing process, and finally cut into individual wiring boards 1. In conventional substrate materials consisting only of a glass layer, a problem arises when cracks propagate in the planar direction starting from the side surface during the final cutting. The cause of the cracks is that tensile stress originating from the formation of the conductive layer on the substrate surface concentrates on the side surface during cutting. It is known that glass materials are prone to crack propagation under such stress, but ceramic materials, on the other hand, have relatively high mechanical strength and, being polycrystalline, are less susceptible to crack propagation due to the influence of grain boundaries and voids. Therefore, in the structure shown in Figure 4(c), the fact that the cut surface is ceramic rather than glass has the effect of preventing cracks during cutting.

[0039] Thus, in the wiring board 1, a glass layer 40 without voids is placed in contact with the ceramic layer 10. By using a glass layer 40 without voids, it becomes possible to increase the density of the second wiring layer 50 formed on one surface 40a of the glass layer 40. Furthermore, although the glass layer 40 has low thermal conductivity, it is placed in contact with the ceramic layer 10, which has high mechanical strength, and the ceramic layer 10 maintains high mechanical strength, so the thickness can be reduced. As a result, the thermal resistance of the glass layer 40 is reduced by making it thinner, and heat dissipation and removal is made easier through the ceramic layer 10, which has excellent thermal conductivity, thus improving the heat dissipation performance of the wiring board 1.

[0040] Furthermore, by reducing the thickness of the glass layer 40, the length of the second via wiring 60 can be shortened. In other words, since it is not necessary to form the second via wiring 60 with a high aspect ratio, the diameter and pitch of the second via wiring 60 can be reduced. This makes it possible to increase the density of the second wiring layer 50.

[0041] <Variation 1 of the First Embodiment> Modification 1 of the first embodiment shows an example in which a third wiring layer is formed at the interface between the glass layer and the ceramic layer.

[0042] Figure 5 is a cross-sectional view illustrating a wiring board according to Modification 1 of the First Embodiment. As shown in Figure 5, the wiring board 1A differs from the wiring board 1 in that a third wiring layer 70 is formed at the interface between the glass layer 40 and the ceramic layer 10.

[0043] The third wiring layer 70 is positioned on one side of the ceramic substrate 12 that constitutes the bottom surface of the recess 10x and is covered by the glass layer 40. The third wiring layer 70 is electrically connected to the first wiring layer 20 via the first via wiring 30. The second wiring layer 50 is electrically connected to the third wiring layer 70 via the second via wiring 60 provided in the glass layer 40.

[0044] The third wiring layer 70 is formed, for example, on one surface of the ceramic substrate 12 that constitutes the bottom surface of the recess 10x before forming the glass layer 40. The third wiring layer 70 can be formed, for example, by using a metal paste similar to the metal paste 20a and firing it simultaneously with the metal paste 20a. The third wiring layer 70 may also be formed after firing the ceramic layer 10 by placing the metal paste on one surface of the ceramic substrate 12 that constitutes the bottom surface of the recess 10x and performing a secondary firing. Alternatively, the third wiring layer 70 may be formed after firing the ceramic layer 10 on one surface of the ceramic substrate 12 that constitutes the bottom surface of the recess 10x by wet plating or sputtering.

[0045] In this way, by arranging the first wiring layer 20 inside the ceramic layer 10, the second wiring layer 50 on one surface 40a of the glass layer 40, and the third wiring layer 70 at the interface between the ceramic layer 10 and the glass layer 40, it is possible to improve the wiring density of the wiring substrate 1 and thereby improve its functionality.

[0046] <Modification 2 of the First Embodiment> Modification 2 of the first embodiment shows an example in which a connecting portion is provided on one surface of the glass layer.

[0047] Figure 6 is a cross-sectional view illustrating a wiring board according to a modified example 2 of the first embodiment. As shown in Figure 6, the wiring board 1B differs from the wiring board 1 in that a plurality of connection portions 80 are provided on one surface 40a of the glass layer 40.

[0048] The connection portion 80 is an assembly of protruding electrodes. The protruding electrodes can be formed from, for example, copper. Multiple connection portions 80 (four in the example of Figure 6) are provided on the wiring board 1B to mount two or more semiconductor chips. Each connection portion 80 is interconnected by the second wiring layer 50. With this configuration, when semiconductor chips are mounted on each connection portion 80, adjacent semiconductor chips can be easily connected to each other.

[0049] <Modification 3 of the First Embodiment> Modification 3 of the first embodiment shows an example in which the glass layer is arranged across the entire surface of one side of the ceramic layer.

[0050] Figure 7 is a cross-sectional view illustrating a wiring board according to a modification 3 of the first embodiment. As shown in Figure 7, the wiring board 1C differs from the wiring board 1 in that the glass layer 40 is arranged on one surface 10a of the ceramic layer 10 and covers the entire surface 10a of the ceramic layer 10.

[0051] In the wiring board 1C, the ceramic layer 10 has ceramic substrates 11 and 12, but does not have a ceramic substrate 13. Therefore, in the wiring board 1C, the ceramic layer 10 does not have a recess 10x.

[0052] In the wiring board 1C, the second wiring layer 50, provided on one side 40a of the glass layer 40, is electrically connected to the first wiring layer 20 via the second via wiring 60 provided in the glass layer 40 and the first via wiring 30 provided in the ceramic layer 10.

[0053] Thus, the glass layer 40 may be placed in a recess 10x provided in the ceramic layer 10, or it may be placed on one surface 10a of the ceramic layer 10 so as to cover the entire surface 10a of the ceramic layer 10.

[0054] <Modification 4 of the First Embodiment> Modification 4 of the first embodiment shows an example of a wiring structure that reduces electromagnetic interference between signal wirings.

[0055] Figure 8 is a cross-sectional view illustrating a wiring board according to a modified example 4 of the first embodiment. As shown in Figure 8, the wiring board 1D differs from the wiring board 1C in that the second wiring layer 50 includes grounding wiring 50G and signal wiring 50S.

[0056] The grounding wire 50G is positioned on both sides of the signal wire 50S, spaced apart from the signal wire 50S. The grounding wire 50G is connected to the third wiring layer 70G via the second via wire 60. By bringing the third wiring layer 70G to ground potential via the first via wire 30, all grounding wires 50G also become ground potential. This reduces electromagnetic interference between the signal wires 50S. It is also possible to provide the grounding wire 50G and signal wire 50S on one surface 40a of the glass layer 40 located within the recess 10x.

[0057] <Second Embodiment> The second embodiment shows an example of a semiconductor device in which a semiconductor chip is mounted on a wiring board.

[0058] Figure 9 is a cross-sectional view illustrating a semiconductor device according to the second embodiment. As shown in Figure 9, the semiconductor device 2 includes a wiring board 1B and a plurality of semiconductor chips 100 mounted on the wiring board 1B. Each semiconductor chip 100 is electrically connected to a connection portion 80 provided on the wiring board 1B. As described above, each connection portion 80 is interconnected by a second wiring layer 50. Therefore, adjacent semiconductor chips 100 can be easily connected to each other via a short path.

[0059] If necessary, an external connection terminal 110, such as a solder ball, may be provided on the underside of the first via wiring 30.

[0060] Although preferred embodiments have been described in detail above, the invention is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims. [Explanation of Symbols]

[0061] 1,1A,1B,1C,1D Wiring board 2 Semiconductor devices 10 Ceramic Layers 10a, 40a One side 10x recess 10z opening 11,12,13 Ceramic substrate 20 1st wiring layer 20a, 31a, 32a, 33a, 33b, 34a, 34b, 35a, 35b, 35c metal paste 30. First via wiring 31, 32, 33, 34, 35 Through conductor 40 glass layers 40x through holes 50 2nd wiring layer 50G grounding wiring 50S signal wiring 60 Second via wiring 70,70G 3rd wiring layer 80 Connection part 100 semiconductor chips 110 External connection terminals 311, 312, 313 Green Sheet

Claims

1. Ceramic layer and A first wiring layer provided on the ceramic layer, A glass layer without voids is placed in contact with the aforementioned ceramic layer, A wiring substrate having a second wiring layer provided on one side of the glass layer and electrically connected to the first wiring layer.

2. The wiring board according to claim 1, wherein the glass layer is disposed in one or more recesses provided on one surface of the ceramic layer.

3. The wiring substrate according to claim 2, wherein one surface of the glass layer is coplanar with one surface of the ceramic layer.

4. The wiring board according to claim 3, wherein the second wiring layer is arranged from one surface of the glass layer to one surface of the ceramic layer and is electrically connected to the first wiring layer via a first via wiring provided in the ceramic layer.

5. The wiring substrate according to claim 1, wherein the glass layer is disposed on one surface of the ceramic layer and covers the entire surface of the ceramic layer.

6. A wiring substrate according to any one of claims 1 to 5, wherein a third wiring layer is formed at the interface between the glass layer and the ceramic layer.

7. The wiring substrate according to any one of claims 1 to 5, wherein the glass layer is mainly composed of silicon oxide.

8. Multiple connection points for mounting two or more semiconductor chips are provided on one surface of the glass layer. The wiring board according to any one of claims 1 to 5, wherein each of the aforementioned connection parts is interconnected by the second wiring layer.

9. The wiring board according to claim 8, The circuit board has a plurality of semiconductor chips mounted on it, A semiconductor device in which each of the aforementioned semiconductor chips is electrically connected to each of the aforementioned connection parts.

10. A step of forming a ceramic layer on which a first wiring layer is provided, A step of forming a glass layer in contact with the ceramic layer, in which no voids exist, The process includes the step of forming a second wiring layer on one surface of the glass layer, which is electrically connected to the first wiring layer. A method for manufacturing a wiring board, wherein the glass layer is formed by applying a paste made of glass powder or by placing a glass preform and then heat-treating it in a vacuum or non-oxidizing atmosphere.

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