Electrostatic chucks and semiconductor chip processing equipment

Abstract

The present invention provides an electrostatic chuck and semiconductor chip processing equipment, in which the electrostatic chuck includes a heat-generating layer and an electrostatic attraction layer, and the heat-insulating layer, heating layer, insulating layer, electrode layer, pressure-resistant layer, sealing coating, etc. included in the electrostatic chuck are deposited directly on the base, eliminating the need for adhesive to bond the electrostatic chuck to the base. This eliminates the hidden risks of plasma arcing or particulate contamination caused by adhesives in conventional electrostatic chuck structures, improves the stability of the electrostatic chuck, and extends the service life of the electrostatic chuck.

Description

[Technical Field]

[0001] This application claims priority from a Chinese patent application filed with the China Patent Office on January 19, 2023, bearing application number 202310076927.2 and entitled "Electrostatic chuck and semiconductor chip processing equipment," the entire contents of which are incorporated herein by reference.

[0002] The present invention relates to the field of semiconductor technology, and more particularly to electrostatic chucks and semiconductor chip processing equipment. [Background technology]

[0003] In semiconductor chip processing equipment, electrostatic chucks (ESCs) are important units used in plasma or chemical reaction chambers during chip processing. Because they function as the lower electrode that attracts and supports wafers, electrostatic chucks must possess several important material properties and operational functions. For example, they must be sufficiently hard to reduce abrasion to wafers (e.g., silicon wafers, SiC wafers, etc.) during vertical attachment and detachment movements; have high resistivity and stable electrical insulation properties to generate electrostatic attractive forces (e.g., Coulomb forces) between the ESC and the wafer to achieve wafer attachment and detachment; have a stable material structure to provide etching / corrosion resistance to different chemical atmospheres and plasmas; and have excellent thermal conductivity and stable distribution uniformity to maintain wafer temperature uniformity and achieve uniform processing of the wafer surface (e.g., plasma etching, thin film deposition, etc.). Therefore, to provide the necessary and stable process functions during chip processing, electrostatic chucks must possess the above excellent electrical and physical properties. Summary of the Invention [Problem to be solved by the invention]

[0004] In view of this, the present invention provides an electrostatic chuck and semiconductor chip processing equipment, which effectively solves the technical problems existing in the prior art, eliminates the hidden dangers of adhesive, plasma arcs, or particulate contaminants in the conventional electrostatic chuck structure, improves the stability of the electrostatic chuck, and extends the service life of the electrostatic chuck. [Means for solving the problem]

[0005] To achieve the above objectives, the present invention provides the following technical solutions: An electrostatic chuck including a base, a heat generating layer formed on the base, and an electrostatic attraction layer formed on the heat generating layer, the heat generating layer includes a heat insulating layer formed on the base and a heating layer formed on the heat insulating layer on a side away from the base, The electrostatic attraction layer includes an insulating layer formed on the side of the heat generating layer away from the base, an electrode layer formed on the side of the insulating layer away from the base, a pressure-resistant layer formed on the side of the electrode layer away from the base and extending to cover at least a portion of the side wall of the base, and a sealing coating covering the exposed surface of the pressure-resistant layer.

[0006] Preferably, the heat generating layer further includes a heat spreader layer formed on the side of the heating layer away from the base.

[0007] Preferably, the material of the heating layer is a conductive metal or a conductive ceramic; The uniform temperature layer includes at least one superposed sub-uniform temperature layer, and the material of the sub-uniform temperature layer is AlN, Al2O3, SiC, Si3N4, or a mixture of Al2O3 and AlN, or a mixture of SiC and Si3N4.

[0008] Preferably, the thermal insulation layer comprises an alloy sub-layer on the base, and The alloy sub-layer includes a ceramic sub-layer on a side of the alloy sub-layer away from the base.

[0009] Preferably, the material of the alloy sub-layer comprises SST316; the material of the ceramic sub-layer comprises Y2O3 and / or SiO2; The thickness range of the heat insulating layer is 0.1 to 1000 μm, including the end point value, and the thickness range of the heat insulating layer is (1000 μm to 5000 μm).

[0010] Preferably, the insulating layer includes a plurality of insulating sub-layers superposed along a direction from the base to the heat generating layer, and the different insulating sub-layers have different densities and / or porosities.

[0011] Preferably, the insulating layer includes a first sub-insulating layer, a second sub-insulating layer and a third sub-insulating layer superimposed along a direction from the base to the heat generating layer.

[0012] Preferably, the porosity of the second sub-insulating layer is greater than the porosity of the first sub-insulating layer and the porosity of the third sub-insulating layer.

[0013] Preferably, the porosity of the second insulating sub-layer is greater than 8%, and the porosity of the first insulating sub-layer and the porosity of the third insulating sub-layer are each less than 6%.

[0014] Preferably, the porosity of the first sub-insulating layer is greater than the porosity of the second sub-insulating layer, and the porosity of the second sub-insulating layer is greater than the porosity of the third sub-insulating layer.

[0015] Preferably, the porosity of the first sub-insulating layer is greater than 10%, the porosity of the second sub-insulating layer is in the range of [6%, 8%], and the porosity of the third sub-insulating layer is less than 6%.

[0016] Preferably, the materials of the sub-insulating layers are the same or different.

[0017] Preferably, the material of the electrode layer is a conductive metal or a conductive ceramic.

[0018] Preferably, the material of the pressure-resistant layer includes ceramics, The pressure-resistant layer has a porosity of less than 5%.

[0019] Preferably, the material of the sealing coating comprises ceramics; the sealing coating has a porosity of less than 0.1%; The thickness range of the sealing coating is 0.1 to 300 μm, including the endpoint value; The sealing coating has a voltage resistance exceeding 1500 V / mil.

[0020] Preferably, the flatness of the electrode layer and the insulating layer is within 100 μm.

[0021] Preferably, the parallelism between adjacent layers in the heat insulating layer, the heating layer, the insulating layer, the electrode layer, the pressure-resistant layer and the sealing coating is within 100 μm.

[0022] Preferably, the seat is a metal seat or an alloy seat.

[0023] Correspondingly, the present invention further provides a semiconductor chip processing device, which includes the above-mentioned electrostatic chuck.

[0024] Preferably, the semiconductor chip processing equipment includes plasma processing equipment, plasma etching equipment, IBE ion beam etching equipment, PVD thin film deposition equipment, CVD thin film deposition equipment, PECVD thin film deposition equipment, ALD thin film deposition equipment, PEPVD thin film deposition equipment, IBD thin film deposition equipment, ion implantation equipment, or surface doping equipment. [Effects of the Invention]

[0025] Compared with the prior art, the technical solution provided by the present invention has at least the following advantages: The present invention provides an electrostatic chuck and semiconductor chip processing equipment, comprising: a pedestal, a heat generating layer formed on the pedestal, and an electrostatic attraction layer formed on the heat generating layer, the heat generating layer including a heat insulating layer formed on the pedestal and a heating layer formed on a side of the heat insulating layer away from the pedestal, the electrostatic attraction layer including an insulating layer formed on the side of the heat generating layer away from the pedestal, an electrode layer formed on the insulating layer on the side away from the pedestal, a pressure resistant layer formed on the side of the electrode layer away from the pedestal and extending to cover at least a portion of a sidewall of the pedestal, and a sealing coating covering the exposed surface of the pressure resistant layer, the side of the sealing coating away from the pedestal being capable of adsorbing a wafer.

[0026] As can be seen from the above, according to the technical solution provided by the present invention, the electrostatic chuck includes a heating layer and an electrostatic attraction layer, and the heat insulating layer, heating layer, insulating layer, electrode layer, pressure-resistant layer, sealing coating, etc. included in the electrostatic chuck are directly deposited on the pedestal, eliminating the need for adhesives to bond the electrostatic chuck and the pedestal. This eliminates the hidden risks of plasma arcs or particulate contaminants caused by adhesives in conventional electrostatic chuck structures, improves the stability of the electrostatic chuck, and extends the service life of the electrostatic chuck. [Brief explanation of the drawings]

[0027] In order to clearly explain the embodiments of the present invention or the technical solutions of the prior art, the following briefly introduces the drawings necessary for the description of the embodiments or prior art. The drawings described below are only embodiments of the present invention, and those skilled in the art can obtain other drawings based on the provided drawings without exerting any effort that amounts to inventive step. [Figure 1] 1 is a structural schematic diagram of an electrostatic chuck provided by an embodiment of the present invention; [Figure 2] 1 is a structural schematic diagram of another electrostatic chuck provided by an embodiment of the present invention; [Figure 3] 1 is a flowchart of a method for manufacturing an electrostatic chuck provided by an embodiment of the present invention. [Figures 4a-4h] 4A to 4C are structural schematic diagrams corresponding to the steps in FIG. 3. DETAILED DESCRIPTION OF THE INVENTION

[0028] The following clearly and completely describes the technical solutions of the embodiments of the present invention, combined with the drawings of the embodiments of the present invention, and the described embodiments are not all embodiments but only some embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without any inventive effort fall within the scope of protection of the present invention.

[0029] As described in the background art, conventional electrostatic chucks are generally manufactured by bonding a ceramic electrostatic disk with adsorption / desorption functions to an aluminum base or an anodized aluminum base. To achieve controllable electrostatic chuck functions, such as adsorption / desorption and RF coupling, the ceramic disk is generally made of aluminum oxide (Al2O3) or aluminum nitride (AlN). During semiconductor wafer or chip processing, the ESC is exposed to a chemically reactive medium, plasma, or an environment where plasma and chemically reactive media coexist, and is eroded by the plasma, the chemical medium, or simultaneously by the plasma and chemical medium. In particular, when an electrostatic chuck operates in a halogen (e.g., F, Cl, Br) plasma and chemical media environment, both the ceramic disk (e.g., Al2O3 or AlN) and the entire unit are etched and eroded by the plasma and halogen. This plasma and media corrosion can change the surface morphology, chemical composition, and material properties (e.g., surface roughness, resistance, etc.) of the ceramic disk, severely affecting the electrostatic chuck's performance, such as leakage current, wafer backside helium leakage rate, and de-chuck time. In some cases, for example, when a thin ceramic disk (typically only 1 mm or 2 mm thick) is fixed to a pedestal by bonding, the adhesive between them is susceptible to corrosion by the plasma and chemical media, resulting in plasma arcing or particle contamination, which can degrade the plasma process and shorten the service life of the electrostatic chuck.

[0030] Based on this, embodiments of the present invention provide an electrostatic chuck and semiconductor chip processing equipment that effectively solve the technical problems existing in the prior art, eliminate the hidden risks of adhesive, plasma arc, or particulate contamination in the conventional electrostatic chuck structure, improve the stability of the electrostatic chuck, and extend the service life of the electrostatic chuck.

[0031] In order to achieve the above object, the technical solutions provided by the embodiments of the present invention are as follows. Specifically, the technical solutions provided by the embodiments of the present invention will be described in detail in combination with FIGS. 1 to 4h.

[0032] As shown in FIG. 1, the structure of an electrostatic chuck provided by an embodiment of the present invention is a schematic diagram, and the electrostatic chuck includes: The device includes a base 100 , a heat generating layer 200 formed on the base 100 , and an electrostatic attraction layer 300 formed on the heat generating layer 200 .

[0033] The heat generating layer 200 includes a heat insulating layer 210 formed on the base 100 and a heating layer 220 formed on the side of the heat insulating layer 210 away from the base 100 .

[0034] The electrostatic attraction layer 300 includes an insulating layer 310 formed on the side of the heating layer 200 away from the base 100, an electrode layer 320 formed on the side of the insulating layer 310 away from the base 100, a voltage-resistant layer 330 formed on the side of the electrode layer 320 away from the base 100 and extending to cover at least a portion of the side wall of the base 100, and a sealing coating 340 covering the exposed surface of the voltage-resistant layer 330, and the side of the sealing coating 340 away from the base 100 attracts the wafer.

[0035] Here, the breakdown voltage layer 330 may extend to cover a portion of the side wall of the base 100, or may extend to cover the entire side wall of the base 100, to which the present invention is not specifically limited.

[0036] Furthermore, according to the technical solutions provided by the embodiments of the present invention, the electrostatic chuck includes a heating layer and an electrostatic attraction layer, and the heat insulating layer, heating layer, insulating layer, electrode layer, pressure-resistant layer, sealing coating, etc. included in the electrostatic chuck are directly deposited on the pedestal, eliminating the need for adhesive to bond the electrostatic chuck and the pedestal. This eliminates the hidden risks of plasma arcing or particulate contamination caused by adhesives in conventional electrostatic chuck structures, improves the stability of the electrostatic chuck, and extends the service life of the electrostatic chuck.

[0037] In one embodiment of the present invention, the heat generating layer provided by the present invention includes a heat insulating portion and a heating portion, and further includes a heat soaking portion, thereby providing a better heating effect. As shown in Figure 2, which is a structural schematic diagram of another electrostatic chuck provided by an embodiment of the present invention, the heat generating layer 200 provided by the embodiment of the present invention further includes a heat soaking layer 230 formed on the side of the heating layer 220 away from the pedestal 100. The electrostatic attraction layer 300 provided in the embodiment of the present invention is formed on the thermally uniform layer 230. That is, the electrostatic attraction layer 300 provided in the embodiment of the present invention includes an insulating layer 310 formed on the side of the thermally uniform layer 230 away from the pedestal 100, an electrode layer 320 formed on the side of the insulating layer 310 away from the pedestal 100, a voltage-resistant layer 330 formed on the side of the electrode layer 320 away from the pedestal 100 and extending to cover at least a portion of the sidewall of the pedestal 100, and a sealing coating 340 covering the exposed surface of the voltage-resistant layer 330, and the side of the sealing coating 340 away from the pedestal 100 attracts the wafer.

[0038] The electrostatic chuck provided by the embodiment of the present invention will be described in more detail below, taking into account the manufacturing method thereof. As shown in Figure 3 and Figures 4a to 4h, Figure 3 is a flowchart of the manufacturing method of the electrostatic chuck provided by the embodiment of the present invention, and Figures 4a to 4h are structural schematic diagrams corresponding to each step of Figure 3.

[0039] Step S1: Provide a base.

[0040] 4a, the base 100 provided by the embodiment of the present invention may be a metal base or an alloy base, such as an aluminum base, an aluminum alloy base, an anodized aluminum base, or a titanium alloy base, but the present invention is not limited thereto. Since the manufacturing of the sealing coating 340 must be performed in a PEPVD (plasma-enhanced physical vapor deposition) environment in a vacuum environment, and the process temperature can reach 150°C or higher, one preferred solution provided by the embodiment of the present invention is to manufacture the electrostatic chuck base 100 using a titanium alloy, which has high thermal stability and a small thermal expansion coefficient, to prevent the coating from cracking and peeling due to temperature rise during the manufacturing of the sealing coating 340.

[0041] Table 1 shows the coefficient of thermal expansion (CTE), resistivity, and thermal conductivity of various materials. As can be seen from Table 1, compared to aluminum alloy, titanium alloy, stainless steel SST316, and Y2O3 ceramic have closer coefficients of thermal expansion and smaller thermal conductivities, making them more suitable for manufacturing electrostatic chuck pedestal 100 with excellent thermal insulation performance. [Table 1]

[0042] Step S2: Deposit a heat insulating layer on the pedestal.

[0043] 4b, the thermal insulation layer 210 provided by the embodiment of the present invention has poor thermal conductivity, and can effectively or maximally prevent the heat from the heat generating layer of the electrostatic chuck from being introduced into the pedestal 100. The embodiment of the present invention limits the thickness of the thermal insulation layer 210 and / or selects and manufactures the thermal insulation layer 210 from a material having an expansion coefficient close to or similar to that of the pedestal 100, thereby avoiding cracks caused by different volume expansions due to heating or cooling.

[0044] Preferably, based on the data in Table 1, the thermal insulation layer 210 provided by the embodiment of the present invention includes an alloy sublayer on the base and a ceramic sublayer on the side of the alloy sublayer away from the base. Preferably, the material of the alloy sublayer provided by the embodiment of the present invention is stainless steel SST316. Because the alloy sublayer is an alloy coating, excellent interfacial bonding strength can be maintained between the stainless steel SST316 and the titanium alloy base. Furthermore, due to the low thermal conductivity of stainless steel SST316, the thermal insulation layer 210 has good thermal insulation performance. Furthermore, the material of the ceramic sublayer provided by the embodiment of the present invention includes YO and / or SiO. These ceramic coatings are well deposited on the surface of the alloy sublayer, providing excellent thermal insulation and thermal insulation. Furthermore, because they have a thermal expansion coefficient similar to that of the base and the alloy sublayer, cracking or peeling due to volume changes during deposition does not occur. Furthermore, the thermal insulation layer 210 provided by the embodiment of the present invention may be composed only of a ceramic sublayer formed on the base 100, although this is not specifically limited by the present invention. Furthermore, the thickness range of the heat insulating layer 210 provided in the embodiment of the present invention may be 0.1 to 1000 μm, including the end point value, and the thickness range of the heat insulating layer 210 may be (1000 μm to 5000 μm).

[0045] Step S3: Depositing a heating layer on the insulating layer.

[0046] 4c, the heating layer 220 provided by the embodiment of the present invention is formed on the side of the thermal insulation layer 210 away from the pedestal 100. In one embodiment of the present invention, the material of the heating layer 220 provided by the present invention may be a conductive metal (e.g., W, Mo, etc.) or a conductive ceramic (e.g., SiC, ITO, etc.), the heating layer 220 may be formed by different processes such as deposition, printing, or printing, and may be in the form of a whole block or divided blocks, and the heating temperature range of the heating layer 220 is determined according to the application requirements of the electrostatic chuck.

[0047] Step S4: Deposit a thermal soaking layer on the heating layer.

[0048] As shown in FIG. 4d, a thermal uniformity layer 230 is deposited on the surface of the heating layer 220. The thermal uniformity sub-layer 230 has good thermal conductivity, thermal uniformity, and electrical insulation properties, thereby maximizing the transfer of heat generated by the heating layer 220 to the surface of the electrostatic chuck. Preferably, the thermal uniformity layer provided by the present invention is made of a ceramic coating with good thermal conductivity similar to that of an aluminum alloy. The thermal uniformity layer includes at least one overlapping sub-layer. That is, the thermal uniformity layer may include one sub-layer, two sub-layers overlapping from the pedestal to the electrostatic attraction layer, or more sub-layers overlapping from the pedestal to the electrostatic attraction layer, although the present invention is not limited thereto. The material of the sub-layer may be AlN, Al2O3, SiC, Si3N4, a composite of Al2O3 and AlN, or a composite of SiC and Si3N4.

[0049] Step S5: Deposit an insulating layer on the thermal soaking layer.

[0050] As shown in FIG. 4e, in order to ensure sufficient insulation resistance strength between the electrode layer and the base of the electrostatic chuck and to ensure that cracks and spalling do not occur during the repeated use of the electrostatic chuck while being heated and cooled, in an embodiment of the present invention, an insulating layer 310 is deposited on the surface of the heating layer, and the insulating layer 310 includes a plurality of insulating sub-layers, each consisting of at least two layers, stacked along the direction from the base 100 to the heating layer 200, and the different insulating sub-layers have different densities and / or porosities.

[0051] Preferably, the materials of the multiple insulating sub-layers provided by embodiments of the present invention are similar or different. The material of the insulating sub-layers may be a ceramic material, such as Al2O3. In embodiments of the present invention, the insulating layers are deposited by plasma spray (PS), suspension plasma spray (SPS), or vacuum deposition. SPS involves dissolving small-particle ceramic powder in a liquid and introducing the powder-containing liquid into a plasma torch to deposit a spray coating. The coating deposited by SPS has the following characteristics: smaller porosity size, smoother coating surface, and reduced roughness. For the performance of Y2O3 coatings produced by PS and SPS, see Table 2. The performance data in Table 2 is measured and obtained based on a 250 μm-thick Y2O3 coating. [Table 2]

[0052] By adjusting the thickness and porosity of the different insulating sub-layers, the resulting insulating layer has sufficient thickness, high resistance, and high breakdown voltage strength. Furthermore, the multiple insulating sub-layers with different porosities mitigate the volume change effect caused by thermal expansion and contraction of the base due to voids and crack defects, eliminating the risk of cracking of the insulating layer. Table 3 shows the porosity and breakdown voltage of insulating coatings with different thicknesses, specifically the combinations and electrical performance of four Al2O3 insulating sub-layers (bottom layer, middle layer, second middle layer, and top layer) provided by an embodiment of the present invention. [Table 3]

[0053] In one embodiment of the present invention, the insulating layer provided by the present invention includes a first sub-insulating layer, a second sub-insulating layer and a third sub-insulating layer superimposed along a direction from the base to the heating layer.

[0054] Preferably, the porosity of the second sub-insulating layer provided by the present invention is greater than that of the first sub-insulating layer and the third sub-insulating layer. The porosity of the second sub-insulating layer is greater than 8%, and the porosity of the first sub-insulating layer and the third sub-insulating layer are both less than 6%. In the present invention, the third sub-insulating layer is configured to have a low porosity, for example, less than 5%, to ensure high quality of the electrode layer subsequently deposited thereon. The intermediate second sub-insulating layer is configured to have a high porosity, for example, greater than 8% or even greater than 10%, to effectively release or mitigate the upward force transmitted due to the expansion of the pedestal. The first sub-insulating layer is configured to have a low porosity, for example, less than 6%, to ensure good interfacial adhesion strength between the underlying structural layer and the pedestal. In addition, the thicknesses of the three sub-insulating layers provided by the present invention may be similar or different, and in order to address the adverse effects of expansion of the base, the thickness of the second sub-insulating layer is arranged to be greater than the thicknesses of the first and third sub-insulating layers, the thickness of the second sub-insulating layer is arranged to be 350 μm or more, and the thicknesses of the first and third sub-insulating layers are arranged to be 250 μm or more.

[0055] Alternatively, in an embodiment of the present invention, the porosity of the first sub-insulating layer is greater than that of the second sub-insulating layer, and the porosity of the second sub-insulating layer is greater than that of the third sub-insulating layer. The porosity of the first sub-insulating layer is greater than 10%, the porosity of the second sub-insulating layer is in the range of [6%-8%], and the porosity of the third sub-insulating layer is less than 6%. The porosity of the insulating layer provided by the present invention gradually decreases along the direction from the base to the heating layer, so that the high porosity of the first sub-insulating layer can release or relieve the force caused by the expansion of the base, and the low porosity of the third sub-insulating layer provides good interfacial adhesion strength to the electrode layer.

[0056] Step S6: Deposit an electrode layer on the insulating layer.

[0057] As shown in FIG. 4f, the electrode layer 320 according to the present invention may be made of a conductive metal (e.g., tungsten (W), molybdenum (Mo), copper (Cu), aluminum (Al), titanium (Ti), or silver (Ag)) or a conductive ceramic (e.g., SiC or ITO), which has good electrical and thermal conductivity and high oxidation resistance. The electrode layer 320 may be fabricated by a method such as CVD (Chemical Vapor Deposition), PVD (Physical Vapor Deposition), PEPVD (Plasma Enhanced Physical Vapor Deposition), PS, or SPS, or by a printing process, and may have a thickness ranging from 0.05 to 300 μm. Preferably, the electrode layer 320 provided by the embodiment of the present invention may be a monopolar, bipolar, or multipolar electrode layer having a whole block, a divided block, or a whole block having a predetermined pattern, although the present invention is not specifically limited thereto.

[0058] In one embodiment of the present invention, the electrode layer 320 provided by the present invention may be a DC electrode layer, for which the present invention is not specifically limited.

[0059] In addition, the flatness of the electrode layer and the insulating layer provided in the embodiments of the present invention is within 100 μm, more preferably within the range of 20 μm to 50 μm, and even more preferably 20 μm or less.

[0060] Step S7: A voltage-resistant layer is deposited on the electrode layer.

[0061] 4g, a voltage-breakdown-resistant layer 330 having a thickness of about 350 μm is deposited on the surface of the electrode layer 320, and the voltage-breakdown-resistant layer 330 further extends to cover at least a portion of the sidewall of the pedestal 100. Since the voltage-breakdown capability of the voltage-breakdown layer 330 directly determines the DC power that can be used by the electrostatic chuck during use, achieving the required thickness requires that the structure of the voltage-breakdown layer be densified, and changes in structure and composition in the plasma environment must be eliminated or reduced. The pressure-resistant layer 330 covers the entire upper surface of the electrode layer 320 and also extends to cover the electrode layer 320, the heat insulating layer 210, the heating layer 220, the temperature-equalizing layer 230, the sidewalls of the insulating layer 310, and part of the sidewall of the pedestal 100. This structure eliminates the need for adhesive between the electrostatic chuck and the pedestal 100, and further eliminates the hidden risks of plasma arcing or particulate contamination caused by adhesive in conventional electrostatic chuck structures, thereby improving the stability of the electrostatic chuck and extending the service life of the electrostatic chuck.

[0062] Preferably, the material of the pressure-resistant layer 330 provided in the embodiments of the present invention is a high-resistivity ceramic, and the pressure-resistant layer 330 is formed by a PS process or vacuum deposition method, with the porosity of the pressure-resistant layer 330 being 3-5%, or less than 5%. In one embodiment, the pressure-resistant layer 330 may have a single-layer structure or a multi-layer structure, preferably a single-layer structure. In another embodiment, the pressure-resistant layer 330 has a two-layer structure of PS or SPS. Preferably, a PS pressure-resistant coating having a thickness of 200 or 300 μm and a roughness of 4-6 μm is first deposited on the electrode layer, and then an SPS coating having a thickness of 50 or 150 μm and a roughness of 1.5-2.5 μm is deposited on the surface of the PS coating. The reduced roughness of the SPS coating results in a smooth and flat coating surface, allowing for the subsequent deposition of a dense sealing layer with good bonding strength. Based on the requirements for the use of the electrostatic chuck, the voltage-resistant layer 330 should have high electrical resistivity (at least greater than 10 Ω*cm, preferably greater than 10 Ω*cm). The voltage-resistant layer 330 also has high dielectric strength, high thermal conductivity, greater hardness than silicon, and a sufficient thickness to achieve excellent plasma erosion resistance, which ensures stable chuck / de-chuck function and a long service life of the electrostatic chuck. The material of the voltage-resistant layer 330 may be yttrium oxide (YO), aluminum oxide (AlO), yttrium fluoride (YF), yttrium aluminum garnet (YAG), erbium oxide (ErO), or yttrium oxyfluoride (YOF), or a combination of these ceramic materials. The surface of the voltage-resistant layer 330 is polished and processed to achieve the required surface roughness (Ra) and surface pattern structure of the electrostatic chuck. In one embodiment, the surface of the pressure-resistant layer 330 is polished and processed to have an electrostatic chuck surface structure in which the contact area with the wafer is only 4-80% of the total surface area, i.e., the surface of the electrostatic chuck surface that contacts the wafer is a bump structure surface with a diameter of 1-5 mm, a height of 5-50 μm, and distributed according to a predetermined shape.

[0063] Step S8: Deposit a sealing coating on the pressure-resistant layer.

[0064] As shown in FIG. 4h, a dense plasma-etch-resistant sealing coating 340 is further deposited on the outer surface of the pressure-resistant layer 330. The dense plasma-etch-resistant sealing coating 340 should be highly dense (with a porosity close to zero or less than 0.1%) and have a high purity without structural defects such as cracks. In one embodiment, the dense plasma-etch-resistant sealing coating 340 simultaneously covers the entire pressure-resistant coating, i.e., the top surface of the electrode layer 320, the sidewalls of the thermal insulation layer 210, the heating layer 220, the isothermal layer 230, and the insulating layer 310, and a portion of the sidewall surface of the pedestal 100. The dense plasma-etch-resistant sealing coating 340 may have a single-layer structure or a multi-layer structure. If it has a multi-layer structure, the materials of each layer may be the same or different. For example, the bottom layer may be aluminum oxide, and the top layer may be yttrium oxide or yttrium aluminum garnet (YAG). 1, the formed dense plasma-etch-resistant sealing coating 340 should have a dense, defect-free structure, completely cover the entire voltage-resistant layer 330, and cover the side surfaces of each underlying layer. Similarly, the dense plasma-etch-resistant sealing coating 340 should have the same or similar properties as the voltage-resistant layer 330, such as high resistivity (at least greater than 10 Ω*cm, and most preferably greater than 10 Ω*cm), a sufficient thickness (0.5 μm to 100 μm, and may be greater than 250 μm) to achieve high dielectric strength, high thermal conductivity, a hardness greater than silicon, and excellent plasma corrosion resistance, which allow the electrostatic chuck to have stable chuck / de-chuck function and a long service life. Compared to the pressure-resistant layer 330, the dense plasma-etch-resistant sealing coating 340 has a denser and more defect-free coating structure, which can better repair and seal surface defects, such as voids and cracks, in the upper coating, resulting in a smoother surface for the upper coating, providing the electrostatic chuck with a stable structure and function.

[0065] The materials for the dense plasma-etch-resistant sealing coating 340 can be divided into two types. The first type can be ceramic materials such as yttrium oxide (YO), aluminum oxide (AlO), yttrium fluoride (YF), yttrium aluminum garnet (YAG), or erbium oxide (ErO), or a combination of these ceramic materials. Such plasma-etch-resistant coatings have excellent plasma corrosion resistance and provide a long service life for the electrostatic chuck formed therewith. However, there is a risk of introducing trace metal contamination during high-power plasma etching processes. The second type can be ceramic materials such as silicon carbide (SiC), silicon dioxide (SiO), silicon nitride (SiN), and diamond, or a combination of these ceramic materials. Such plasma etch-resistant sealing coatings have a low risk of introducing metal contamination into high-power plasma etching processes and offer good plasma etch resistance, but they cannot compete with the first type of ceramic materials.

[0066] The porosity of the sealing coating 340 material provided in the embodiments of the present invention is less than 0.1%, the thickness of the sealing coating 340 ranges from 0.1 to 300 μm, including the end point value, and the pressure resistance of the sealing coating 340 exceeds 1500 V / mil. This further improves the power consumption for forming the sealing coating 340 in the etching process, greatly enhancing the process and structural stability of the electrostatic chuck, and expanding the application range of the electrostatic chuck.

[0067] The manufacturing process of the dense plasma etch-resistant sealing coating 340 includes physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), plasma-enhanced physical vapor deposition (PEPVD), aerosol deposition (AD), sputtering, ion-assisted deposition (IAD), vacuum vapor deposition, atomic layer deposition (ALD), etc. Because the manufacturing process of the sealing coating 340 is generally performed in a vacuum environment, the evacuation process prior to coating fabrication desorbs adsorbed gases present in cracks and voids in the plasma coating, and the subsequent coating formation process completely seals the upper sealing coating 340. Therefore, the formation of the dense plasma etch-resistant sealing coating 340 further stabilizes the performance of the electrostatic chuck material.

[0068] In one embodiment of the present invention, the sealing coating 340 provided by the present invention is a suitable dense plasma etch-resistant coating manufactured by a PEPVD process. Because the sealing coating 340 provided by the embodiment of the present invention is formed by a PEPVD process under vacuum conditions, the evacuation process prior to coating sufficiently removes water vapor and impurities adsorbed by pores and cracks in the previous process of the electrostatic chuck. Then, when the background vacuum is reached during the coating process, a continuous and dense sealing coating 340 is formed, which provides good sealing and protection for the surface and side surfaces of the electrostatic chuck.

[0069] In one embodiment of the present invention, the thermal insulation layer, heating layer, temperature isolating layer, insulating layer, electrode layer, and pressure-resistant layer of the electrostatic chuck provided by the present invention are manufactured and formed by alternately or selectively using processes such as PlasmaSpray, PEPVD, CVD, PVD, ALD, vacuum deposition, and printing. Finally, a dense sealing coating is deposited by PEPVD to seal structural surface defects formed in previous processes (e.g., pores and cracks in the coating formed by plasma spraying), thereby improving and controlling the surface roughness and hardness of the electrostatic chuck. By adjusting the dense sealing coating and its components and structure, the breakdown voltage capability of the electrostatic chuck is improved, and the formed electrostatic chuck is endowed with properties such as good thermal conductivity and plasma etching resistance, thereby further extending the operating life of the electrostatic chuck.

[0070] Furthermore, in embodiments of the present invention, different materials are used to form the various layer structures of the electrostatic chuck, and the texture of the different structural layers is controlled so that the resulting electrostatic chuck has good thermal conductivity, heat insulation, electrical conductivity, insulation, and good chemical corrosion resistance. In addition, the insulating sub-layers with different porosities in the insulating layer provide the electrostatic chuck with good tissue adaptation and tissue stability within a certain volume expansion range, and furthermore, cracking and peeling of the various layers of the electrostatic chuck due to thermal expansion and contraction of the pedestal within the operating temperature range are avoided.

[0071] The entire electrostatic chuck provided by the present invention is formed by depositing multiple film layers (including a thermal insulation layer, a heating layer, a temperature-equalizing layer, an insulating layer, an electrode layer, a pressure-resistant layer, and a hermetic sealing layer) on a pedestal. During the manufacturing process, the thickness, flatness, and parallelism of the pedestal surface and each film layer are strictly controlled, resulting in a flat and stable interfacial bonding structure between the formed layers. Furthermore, the resulting electrostatic chuck has stable operational performance, such as chucking and dechucking. In one embodiment, the manufacturing process for the upper surface of the pedestal and each film layer thereon, or some of the film layers, further includes grinding, lapping, roughening, etc. The lapping or grinding process after film layer deposition allows the thickness, flatness, and parallelism of the film layers to meet the necessary technical requirements. Typically, the flatness and parallelism should be within 100 μm, more typically between 20 μm and 50 μm, and even below 20 μm. A roughening process after lapping / grinding can improve the adhesion between the subsequent film layers. Roughening is typically achieved by sandblasting, with the required surface roughness typically ranging from 3 μm to 5 μm. By controlling the flatness and parallelism of each film layer, thickness variations for film layers with thicknesses of 200 μm or more are kept within 20 μm, and more stringently, within 10 μm. Typically, thickness variations between electrode layers are kept within 10 μm, with better results achieved by limiting it to within 5 μm. Finally, the flatness and parallelism of the entire electrostatic chuck are maintained within 50 μm, and even within 20 μm.

[0072] Furthermore, since the electrostatic chuck provided by the embodiments of the present invention is manufactured and formed by depositing different coatings on the pedestal, after the electrostatic chuck reaches the end of its service life, the electrostatic chuck formed with the different coating can be conveniently removed, and a new electrostatic chuck can be redesigned and deposited on the pedestal according to needs, further reducing costs.

[0073] In any one of the above embodiments of the present invention, the parallelism between adjacent layers in the heat insulating layer, the heating layer, the insulating layer, the electrode layer, the pressure-resistant layer and the sealing coating is within 100 μm, more preferably within the range of 20 μm to 50 μm, and even more preferably 20 μm or less.

[0074] Correspondingly, embodiments of the present invention further provide semiconductor chip processing equipment, including plasma processing equipment, plasma etching equipment, IBE ion beam etching equipment, PVD thin film deposition equipment, CVD thin film deposition equipment, PECVD thin film deposition equipment, ALD thin film deposition equipment, PEPVD thin film deposition equipment, IBD thin film deposition equipment, ion implantation equipment, or surface doping equipment, etc. The semiconductor chip processing equipment includes an electrostatic chuck provided by any one of the above embodiments.

[0075] An embodiment of the present invention provides an electrostatic chuck and a semiconductor chip processing apparatus, comprising: a pedestal; a heat generating layer formed on the pedestal; and an electrostatic attraction layer formed on the heat generating layer, wherein the heat generating layer comprises a heat insulating layer formed on the pedestal and a heating layer formed on a side of the heat insulating layer away from the pedestal, and the electrostatic attraction layer comprises an insulating layer formed on a side of the heat generating layer away from the pedestal; an electrode layer formed on the insulating layer on a side of the insulating layer away from the pedestal; a pressure-resistant layer formed on the side of the electrode layer away from the pedestal and extending to cover at least a portion of a sidewall of the pedestal; and a sealing coating covering an exposed surface of the pressure-resistant layer, wherein the side of the sealing coating away from the pedestal attracts a wafer.

[0076] As can be seen from the above, according to the technical solutions provided by the embodiments of the present invention, the electrostatic chuck includes a heating layer and an electrostatic attraction layer, and the heat insulating layer, heating layer, insulating layer, electrode layer, pressure-resistant layer, sealing coating, etc. included in the electrostatic chuck are directly deposited on the pedestal, eliminating the need for adhesive to bond the electrostatic chuck and the pedestal. This eliminates the hidden risks of plasma arcing or particulate contamination caused by adhesives in conventional electrostatic chuck structures, improves the stability of the electrostatic chuck, and extends the service life of the electrostatic chuck.

[0077] In describing the present invention, the orientations or positional relationships indicated by terms such as "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are orientations or positional relationships according to the drawings, and do not indicate or imply that the designated devices or elements must have a particular orientation or be constructed and operated in a particular orientation, but are merely intended to conveniently describe and simplify the description of the present invention and do not limit the present invention.

[0078] Furthermore, the terms "first," "second," etc. do not indicate or imply relative importance or the number of the indicated technical features, but are merely for descriptive purposes. A feature qualified by "first" or "second" explicitly or implicitly includes at least one of the feature. In the description of the present invention, unless specifically limited, "plurality" means at least two, e.g., two, three, etc.

[0079] In the present invention, unless otherwise expressly specified or limited, the terms "attached," "coupled," "connected," "fixed," etc. should be understood in a broad sense, and may mean, for example, a fixed connection, a detachable connection, or an integral connection, a mechanical connection, an electrical connection, or a communicative connection, a direct connection, an indirect connection through an intermediate medium, or even internal communication between two elements or an interactive relationship between two elements. Those skilled in the art can understand the specific meaning of the above terms in the present invention according to the specific circumstances.

[0080] In the present invention, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature means that the first and second features are in direct contact with each other, or that the first and second features are in indirect contact with each other via an intermediate medium. Furthermore, a first feature being "above," "above," and "on the upper surface" of a second feature means that the first feature is directly above or diagonally above the second feature, or simply that the horizontal height of the first feature is higher than that of the second feature. A first feature being "below," "below," and "on the lower surface" of a second feature means that the first feature is directly below or diagonally below the second feature, or simply that the horizontal height of the first feature is lower than that of the second feature.

[0081] In the present invention, the terms "one embodiment," "some embodiments," "exemplary," "specific examples," or "some examples" mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the use of the term "exemplary" does not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any appropriate manner in any one or more embodiments or examples. Furthermore, unless inconsistent, those skilled in the art may combine and combine different embodiments or examples described herein, and features of different embodiments or examples.

[0082] Although the above has shown and described embodiments of the present invention, the above embodiments are illustrative and do not limit the present invention, and those skilled in the art may make changes, corrections, substitutions, and modifications to the above embodiments within the scope of the present invention.

Claims

1. An electrostatic chuck including a base, a heat generating layer formed on the base, and an electrostatic attraction layer formed on the heat generating layer, the heat generating layer includes a heat insulating layer formed on the base and a heating layer formed on the heat insulating layer on a side away from the base, the electrostatic attraction layer includes an insulating layer formed on a side of the heat generating layer away from the pedestal, an electrode layer formed on the insulating layer on a side of the pedestal away from the pedestal, a pressure-resistant layer formed on the side of the electrode layer away from the pedestal and extending to cover at least a portion of a side wall of the pedestal, and a sealing coating covering an exposed surface of the pressure-resistant layer.

2. The electrostatic chuck according to claim 1 , wherein the heat generating layer further includes a heat spreader layer formed on a side of the heating layer away from the pedestal.

3. the material of the heating layer is a conductive metal or a conductive ceramic; The heat spreader layer includes at least one superposed sub-heat spreader layer, and the material of the sub-heat spreader layer is AlN, Al 2 O 3 , SiC, Si 3 N 4 , or Al 2 O 3 and AlN mixture material, or SiC and Si 3 N 4 3. The electrostatic chuck according to claim 2, wherein the material is a mixture of

4. the thermal insulation layer comprises an alloy sub-layer on the base; and 2. The electrostatic chuck of claim 1, further comprising a ceramic sub-layer on a side of said alloy sub-layer remote from said pedestal.

5. the material of the alloy sub-layer comprises SST316; The material of the ceramic sub-layer is Y 2 O 3 and / or SiO 2 Including, 2. The electrostatic chuck of claim 1, wherein the thickness range of the thermal insulating layer is 0.1 to 1000 μm, including endpoint values, and the thickness range of the thermal insulating layer is (1000 μm-5000 μm).

6. 2. The electrostatic chuck according to claim 1, wherein the insulating layer includes a plurality of insulating sub-layers superimposed along a direction from the base to the heat generating layer, and the different insulating sub-layers have different densities and / or porosities.

7. 7. The electrostatic chuck of claim 6, wherein the insulating layer includes a first sub-insulating layer, a second sub-insulating layer, and a third sub-insulating layer superimposed along a direction from the base to the heating layer.

8. 8. The electrostatic chuck of claim 7, wherein the porosity of the second sub-insulating layer is greater than the porosity of the first sub-insulating layer and the porosity of the third sub-insulating layer.

9. 9. The electrostatic chuck of claim 8, wherein the porosity of the second sub-insulating layer is greater than 8%, and the porosity of the first sub-insulating layer and the porosity of the third sub-insulating layer are each less than 6%.

10. 8. The electrostatic chuck of claim 7, wherein the porosity of the first sub-insulating layer is greater than the porosity of the second sub-insulating layer, and the porosity of the second sub-insulating layer is greater than the porosity of the third sub-insulating layer.

11. 11. The electrostatic chuck of claim 10, wherein the porosity of the first sub-insulating layer is greater than 10%, the porosity of the second sub-insulating layer is in the range of [6%, 8%], and the porosity of the third sub-insulating layer is less than 6%.

12. 7. The electrostatic chuck of claim 6, wherein the materials of the plurality of sub-insulating layers are the same or different.

13. 2. The electrostatic chuck according to claim 1, wherein the material of the electrode layer is a conductive metal or a conductive ceramic.

14. the material of the pressure-resistant layer includes ceramics; 2. The electrostatic chuck of claim 1, wherein the pressure-resistant layer has a porosity of less than 5%.

15. the material of the sealing coating includes ceramics; the porosity of said sealing coating is less than 0.1%; the thickness range of the sealing coating is 0.1 to 300 μm, including the endpoint value; 2. The electrostatic chuck of claim 1, wherein the sealing coating has a pressure resistance exceeding 1500 V / mil.

16. 2. The electrostatic chuck according to claim 1, wherein the flatness of the electrode layer and the insulating layer is within 100 [mu]m.

17. 2. The electrostatic chuck according to claim 1, wherein the parallelism between adjacent layers in the heat insulating layer, the heating layer, the insulating layer, the electrode layer, the pressure-resistant layer, and the sealing coating is within 100 μm.

18. 2. The electrostatic chuck according to claim 1, wherein the base is a metal base or an alloy base.

19. 19. A semiconductor chip processing device, comprising the electrostatic chuck according to any one of claims 1 to 18.

20. 20. The semiconductor chip processing equipment of claim 19, wherein the semiconductor chip processing equipment comprises a plasma processing equipment, a plasma etching equipment, an IBE ion beam etching equipment, a PVD thin film deposition equipment, a CVD thin film deposition equipment, a PECVD thin film deposition equipment, an ALD thin film deposition equipment, a PEPVD thin film deposition equipment, an IBD thin film deposition equipment, an ion implantation equipment, or a surface doping equipment.

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