Doped polycrystalline SiC wafer with improved flatness and electrical conductivity, and method for manufacturing same

Abstract

A polycrystalline SiC plate having a preferred crystallographic orientation, said plate having on each face thereof: (i) its texture coefficient C 422 is less than 40% (ii) its texture coefficient C 220 +C 200 +C 400 is more than 50%, preferably more than 80%. The plates can be manufactured using a CVD process. The resulting blanks can be thinned by grinding and polishing. Flatness, electrical conductivity, and thermal conductivity, important properties for use as microelectronic substrates, can be improved by heat treatment.

Description

[Technical Field]

[0001] The present invention relates to the field of materials science, more specifically to the field of materials that can be used to manufacture substrates for integrated circuits, and to the processes that allow these materials to be produced. More precisely, it concerns polycrystalline silicon carbide (SiC). This material, like all materials for microelectronic substrates, is used in the form of thin slices (those skilled in the art often use the English term "wafers"), which are typically circular. SiC is particularly suitable for the manufacture of substrates for power electronic components. SiC wafers must meet very strict specifications regarding flatness, uniformity of properties, and the absence of defects.

[0002] The present invention provides a new type of polycrystalline SiC wafer that can be used to manufacture substrates for integrated circuits. These wafers are made from β-SiC and have specific crystallographic properties.

[0003] Given that integrated circuits are typically deposited on the surface of a single crystal semiconductor, in the case of a polycrystalline silicon carbide wafer, the electronically active surface (i.e., the surface on which the integrated circuits will be deposited) must be specially prepared by transfer of a single crystal SiC layer, the process of which is outside the scope of the present invention.

[0004] The present invention also relates to a new method for producing such β-type polycrystalline silicon carbide wafers capable of receiving the transfer of a single-crystalline SiC layer in a subsequent manufacturing step. [Background technology]

[0005] The vast majority of microelectronic circuits have been fabricated on monocrystalline silicon substrates. For certain applications, semiconducting silicon is not an ideal substrate, but it is still used due to the lack of better alternatives. Silicon carbide (abbreviated SiC), on the other hand, is an outstanding semiconducting material: it has a wide bandgap, a high breakdown field, a high mobility of charge carriers at saturation, and a high thermal conductivity. This combination of excellent physical properties gives it excellent voltage resistance, even at high temperatures and with very high current densities. An introductory review of this subject can be found in the article "SiC Power Components - Technology" by D. Tournier, which was published in issue D-3120 in 2007 as part of the "Techniques de l'Ingenieur" series.

[0006] Therefore, SiC is an ideal material for manufacturing power components required for efficient conversion of electrical energy in applications such as power distribution, renewable energy, and electric vehicles. The use of SiC allows for advantageous replacement of silicon-based transistors, such as insulated gate bipolar transistors (IGBTs), with power components such as metal oxide gate field effect transistors (MOSFETs), which have a voltage resistance of several kV and significantly lower energy losses during switching. For these power components, voltage and temperature resistance can be limiting factors in the design of the electronic components and electronic boards on which they are mounted. The recent development of electric vehicles (EVs) has enabled significant improvements in energy efficiency through the use of such SiC power components in converting direct current (DC) from the battery into usable alternating current (AC) for the motor. However, the cost and availability of these components remain barriers to technology adoption, which is why silicon continues to be widely used as the substrate material, even in certain applications where SiC offers technological advantages.

[0007] According to the state of the art, silicon carbide substrates intended to receive the deposition of microelectronic circuits generally take the form of circular wafers. They are industrially produced using the PVT (Physical Vapor Transfer) process, which involves sublimating SiC powder at high temperatures (above 2200 °C) and condensing the vapor onto a seed to obtain an ingot or boule of monocrystalline SiC. From this monocrystalline ingot, monocrystalline SiC substrates (wafers) are sliced. After thinning and polishing, a crystalline SiC layer is deposited epitaxially on one side of the substrate to obtain a crystal with minimal defects. After the epitaxy process, these wafers are ready for the fabrication of electronic components.

[0008] Improvements in industrial PVT processes over the past 30 years have significantly reduced the density of key crystal defects (such as dislocations and micropipes) in these substrates, which have a strong impact on the reliability of SiC components. Furthermore, it has become possible to scale up the size of substrates (wafers) to a standard diameter of 150 mm, with a projected evolution to 200 mm. Despite industrial efforts, the PVT process remains difficult to master, has low productivity, and is extremely energy-intensive, due to the need to maintain ovens at very high temperatures for approximately 100 hours.

[0009] Furthermore, in power components, R ON Reducing the resistance as low as possible is a crucial criterion for limiting Joule heating when current passes through it and improving the energy efficiency of the system. In these applications, single-crystal SiC is doped both to allow the fabrication of the component's p / n junctions and to reduce the resistivity at the drain contact. The addition of nitrogen makes it possible to dope the substrate during crystal growth. As a standard, "n"-type doped wafers have a resistivity of about 20 mΩ·cm. Reducing the resistivity below this threshold without compromising the crystal quality is very difficult, since excessive doping creates stresses and promotes additional dislocations in the crystal.

[0010] A new technology under development makes it possible to combine low-cost SiC substrates (wafers) with improved electrical properties with high-quality monocrystalline SiC thin layers for the production of microelectronic components. The monocrystalline SiC layers are bonded to the substrate by a molecular bonding process described in WO 01 / 18873 (Energy and Atomic Energy Commission), which also makes it possible to minimize the contact resistance between the substrate and the transferred monocrystalline layer. Document EP 3 018 696 A1 describes an embodiment of such a process, whereby a monocrystalline SiC layer is transferred to a polycrystalline SiC substrate (herein referred to as "p-SiC" or "wafer p-SiC").

[0011] These p-SiC substrates must meet stringent requirements for electrical resistance, thermal conductivity, and flatness. Currently, companies such as Ferrotec Corporation are supplying prototype "dummy wafer" products to the market. These standard 150mm diameter, 750µm thick wafers are used to balance the fill volume of single-crystal SiC wafers in certain processes and improve uniformity.

[0012] According to the state of the art, p-SiC wafers are obtained by depositing polycrystalline SiC on a cylindrical graphite substrate by CVD. Under these conditions, the resulting SiC is of the β-type and 3C polytype. The SiC layer deposited on the periphery of the cylinder is removed by machining to expose the graphite, which is then oxidized in air, allowing two SiC disks to be separated from both sides of the cylinder. This method is described in patent applications JP 1994 340994 and JP 1997 296361.

[0013] However, it soon became apparent that the resulting disks (wafers) exhibited deformations (bending and warping) that were unacceptable for their intended use. The bending and warping parameters, which describe the wafer's flatness for the semiconductor industry, are well known to experts in the field of semiconductor substrates for microelectronics (these parameters are written in capital letters in English only). They can be measured according to the SEMI MF1390 standard, as described below. The process described in the two Japanese publications mentioned above solves this problem by depositing ultrathin films less than 100 μm thick in multiple stages. In fact, if the deposited film is sufficiently thick, the increase in grain size generates internal compressive stresses. Cone-shaped grains repel each other during the growth process. This physical mechanism was demonstrated in P. Chaudhari's paper "Grain Growth and Stress Relaxation in Thin Films" (Journal of Vacuum Science and Technology 9, 520, 1972), a fundamental reference for any expert on thin film deposition from the vapor phase. The processes described in JP1994-340994 and JP1997-296361 enable the formation of a thick p-SiC layer of several hundred microns by suppressing the increase in internal compressive stress, thereby limiting deformation during exfoliation from graphite.

[0014] Japanese patent JP3648112 B2 describes a similar process in which alternating deposition of layers with tensile and compressive stresses makes it possible to cancel the stress moment throughout the thickness of the deposit. This mechanical moment is the origin of the deformation observed when peeling a p-SiC disk from its graphite substrate.

[0015] However, it is important to note that the above process is not suitable for achieving low resistivity and good thermal conductivity throughout the thickness of the wafer due to the presence of multiple interfaces separating the layers through the thickness of the wafer. It would be more desirable to find a single layer solution to this problem.

[0016] U.S. Patent No. 10,934,634 B2 describes a method for obtaining p-SiC wafers with excellent flatness from a single layer of SiC deposited by CVD on a graphite substrate. A sufficiently thick deposition, typically 2 mm, results in an upper region where grain size fluctuations stabilize. In this region, compressive stress no longer varies (as demonstrated in the Chaudhari reference). Processing can then be performed to extract 350 μm-thick slices. These slices have stress and grain size gradients, and the grain size gradient across the thickness is nearly zero, allowing the mechanical moment across the thickness to be integrated to nearly zero. The expected effect is very little wafer deformation. However, the cost and energy consumption of this process are likely to be unfavorable, since approximately 1.65 mm of the 2 mm CVD layer must be removed by grinding and polishing to obtain wafers with the desired thickness and flatness.

[0017] To reduce manufacturing costs, it is best to grow the p-SiC layer by CVD with a high deposition rate, keep its thickness as close as possible to the final thickness, and stabilize the grain size soon after the layer growth begins, thereby avoiding unnecessary extra thickness required to reduce or eliminate the grain size gradient.

[0018] At the Transducers & Eurosensors 2007 conference, XAFu et al. presented a paper titled "Nitrogen-Doped Polycrystalline 3C-SiC Thin Films Deposited by LPCVD for MEMS Applications." In this paper, they investigated SiC deposition under conditions where the mole fraction of dopant gas (NH3) relative to the silicon precursor (dichlorosilane) varied from 2% to 12%. Under these conditions, a doping concentration greater than 5% was required to obtain a resistivity below 20 mΩ·cm. Further increases in the doping concentration increased the residual stress without increasing the stress gradient. In this study, deposition was performed at a low temperature of 900°C and low pressure. This promoted crystal growth along the (111) axis, while the deposition rate was extremely slow at 0.6 μm / h. Under these conditions, the crystal orientation of the deposited thin films, as measured by X-ray diffraction (XRD), was not altered by significant doping.

[0019] A 2014 paper by HKELatha et al. (Mater. Res. Express 1 015902) investigated the effects of heavy doping on 3C-SiC obtained by CVD using silicon and carbon as precursors and NH3 as the doping agent in methyltrichlorosilane (MTCS). The deposition conditions were low pressure and 1040°C. The growth rate of the deposited layer reached approximately 5 μm / h, which is much higher than conventional methods but still insufficient to produce large thicknesses (hundreds of μm) in an economically viable manner. Under these conditions, the doping level was observed to affect the crystal orientation and grain size. X-ray diffraction (XRD) analysis confirmed that heavy doping was accompanied by an enlargement of the grain size and a change in the crystal orientation axis.

[0020] WO 2021 / 060515 (Tokai Carbon) proposes a process for obtaining p-SiC substrates with thicknesses of 500 μm to 6 mm at high deposition temperatures approaching 1500 °C. The deposition time is 5 to 15 hours, which corresponds to a deposition rate of more than 100 μm / h and is particularly suitable for industrial production. Doping of p-SiC is achieved by adding nitrogen to the mixture. To obtain sufficiently flat substrates, the patent proposes a process for varying the concentration of the SiC precursor during deposition, thereby reducing excessively pronounced grain size gradients in the deposited layer. This process is carried out with a nitrogen mass concentration of 200 ppm (2.8 × 10 19 atom / cm 3 ) to 1000 ppm (1.38 × 10 20 atom / cm 3 It has been suggested that if the nitrogen concentration exceeds 1000 ppm, excessive nitrogen concentration in p-SiC will cause serious defects in the crystal and lead to deformation of the substrate. [Prior art documents] [Patent documents]

[0021] [Patent Document 1] International Publication No. 2001 / 18873 [Patent Document 2] European Patent Publication EP 3 018 696 A1 Specification [Patent Document 3] Japanese Patent Application Publication (1994) H6-340994 [Patent Document 4] Japanese Patent Application Publication (1997) H9-296361 [Patent Document 5] Japanese Patent No. 3648112 [Patent Document 6] U.S. Patent No. 10,934,634 [Patent Document 7] International Publication No. 2021 / 060515 [Non-patent literature]

[0022] [Non-Patent Document 1] P. Chaudhari, "Grain Growth and Stress Relaxation in Thin Films," Journal of Vacuum Science and Technology 9, 520 (1972) [Non-patent document 2] A 2014 paper by HKELatha et al. (Mater. Res. Express 1 015902)

[0023] Therefore, a high concentration of nitrogen dopants in p-SiC materials is a potential limiting factor for achieving good flatness, but is desirable for achieving low electrical resistivity. These conflicting trends must be considered when fabricating p-SiC substrates with low resistivity (e.g., less than 10 mΩ·cm) and sufficient flatness by CVD, and then processing p-SiC wafers by grinding, aiming to remove as little material as possible. Regarding the flatness of raw substrates obtained by CVD, it should be noted that the process of grinding to remove material from a surface with a hardness comparable to that of SiC is long and expensive. Furthermore, the thickness of material removed by grinding corresponds to the material lost. In fact, the manufacturing cost of p-SiC wafers must be reduced sufficiently to allow them to serve as composite substrates combined with thin films of single-crystal SiC for power electronics applications.

[0024] In the current state of the art, the nominal thickness of a finished p-SiC wafer is 350 μm with a nominal diameter of 150 mm. Thicker raw products (blanks) are produced by a CVD deposition process on a graphite substrate. For economic reasons, the thickness of the p-SiC blank after exfoliation from the graphite should not exceed 1 mm. This thickness is typically targeted at 750 μm, preferably 600 μm, to streamline the CVD deposition time and reduce the thickness removed by grinding and polishing to a maximum of 650 μm (usually 400 μm, preferably 250 μm). It should be noted in this context that, given that SiC is a material obtained from a high-temperature manufacturing process and is one of the hardest known materials after diamond, it is generally desirable to minimize the thickness of material to be removed by grinding.

[0025] The warpage of a 6-inch diameter, 350 μm thick wafer must be less than 50 μm after grinding and polishing to comply with microelectronics standards. To achieve this goal, a graphite raw blank is first ground to prepare an intermediate blank. This is then used as a starting point for fine grinding and polishing to prepare a p-SiC wafer, onto which a single-crystal SiC layer is then transferred. The difference between the initial thickness of the raw blank and the deformation measured on the raw blank must be equal to or greater than the thickness of the intermediate blank. This means that the volume of the ground intermediate (cylindrical) blank must be included in the volume of the raw blank (see Figure 1).

[0026] In the present invention, the inventors have determined that the concentration of dopants (e.g., n-type, such as nitrogen or phosphorus) is typically 5×10 19 atom / cm 3 More than 10 x 10 20 atom / cm 3The goal is to optimize the production of polycrystalline SiC plates with resistivity levels exceeding 15 mΩ·cm, preferably less than 10 mΩ·cm. The material's thermal conductivity should typically be 200 W / m / K or greater, with values ​​exceeding 250 W / m / K preferred, even in the presence of high concentrations of nitrogen dopants, which can affect thermal conductivity by creating additional crystal defects detrimental to phonon propagation. There is also a need for polycrystalline SiC plates with excellent surface uniformity in grain size, preferably a fine grain structure. Summary of the Invention [Problem to be solved by the invention]

[0027] As a result of research conducted by the present inventors, it has been found that bulk plates of β-type polycrystalline SiC (referred to herein as "p-SiC") can be obtained on a substrate having a graphite surface by chemical vapor deposition (CVD) at a temperature range of about 1,300 K to about 1,800 K. In this process, a gas mixture is introduced into a heated vessel to produce a vapor phase containing at least one silicon and / or carbon gaseous precursor, at least one doping gas containing at least one doping atom (e.g., nitrogen and / or phosphorus), and a carrier gas. The gas mixture decomposes on the surface of the graphite substrate to form a layer of β-type polycrystalline SiC on the graphite surface of the substrate. The method is characterized in that the temperature in the reactor is between 1,450 K and 1,650 K, and the total partial pressure of the gaseous precursor is less than 350 mbar, preferably less than 300 mbar. This deposition is carried out on the graphite surface of a substrate having a graphite surface. The substrate may be a graphite plate. The substrate, more particularly the graphite plate, is preferably circular so as to allow for the direct production of circular SiC disks.

[0028] According to an advantageous embodiment of this deposition process, the gas phase contains trichloromethylsilane as a silicon and carbon precursor, and the doping gas is advantageously selected from the group consisting of NH3, N2H4, N2, H2NCH3.

[0029] This process allows the deposition of a layer of polycrystalline silicon carbide (p-SiC), which can then be separated from the graphite surface that has been formed. The resulting p-SiC plate can then be reduced in thickness by grinding and polishing both sides.

[0030] It is therefore possible to produce polycrystalline SiC plates, which are raw blanks that can be used after a grinding step to become intermediate blanks for polycrystalline SiC substrates (wafers), and to produce wafers onto which a monocrystalline SiC layer can be transferred, which can be used in the manufacture of substrates for the deposition of integrated circuits. Said plates, raw blanks and intermediate blanks are the subject of the present invention, as will be explained later. They have the advantage of having a specific microstructure and crystallographic texture, as will be explained later.

[0031] In a typical embodiment, a plate according to the invention undergoes material removal on either or both of these two faces before exhibiting said properties. [Means for solving the problem]

[0032] The first object of the present invention is a β-type polycrystalline SiC plate having a preferential crystallographic orientation, The plate has, on each side thereof: (i) its texture coefficient C 422 is less than 40% (ii) its texture coefficient C 220 +C 200 +C 400 is more than 50%, preferably more than 80%. According to a first aspect of the first object of the present invention, the electrical resistivity is less than 10 mΩ·cm, preferably less than 5 mΩ·cm, and more preferably less than 3 mΩ·cm.

[0033] According to a second aspect of the first object of the present invention, which can be combined with the first aspect, the plate has a nitrogen level of 5×10 as measured by Secondary Ion Mass Spectroscopy (SIMS). 19 atom / cm 3 More than 1 x 10 20 atom / cm 3 More preferably, it exceeds 1.5 × 10 20 atom / cm 3 More than 100% nitrogen is doped.

[0034] According to a third aspect of the first object of the present invention, which can be combined with the first and / or second aspects, the plate contains a phosphorus concentration of 5×10 as measured by secondary ion mass spectrometry. 19 atom / cm 3 More than 1 x 10 20 atom / cm 3 More preferably, it exceeds 1.5 × 10 20 atom / cm 3 is doped with more than 1000 .mu.m.

[0035] According to a fourth aspect of the first object of the present invention, which can be combined with the first and / or second and / or third aspects, on each of the two faces of the plate, its texture coefficient C 422 is less than 20%, preferably less than 15%, and more preferably less than 10%.

[0036] According to a fifth aspect of the first object of the present invention, which can be combined with the first and / or second and / or third and / or fourth aspects, the plate has a nitrogen or phosphorus concentration of 5×10 as measured by secondary ion mass spectrometry. 19 atom / cm 3doped with more than 1000 .mu.m of nitrogen, said plate having an electrical resistivity of less than 5 mΩ·cm and a preferential crystallographic orientation, said plate having the following characteristics on each of its two faces: (i) its texture coefficient C 422 is less than 20%, and (ii) its texture coefficient C 220 +C 200 +C 400 is more than 60%, preferably more than 80%.

[0037] According to a sixth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth aspects, the plate is a green blank resulting from a process of vapor deposition which has been subjected to at least one heat treatment step at a temperature in the range of 1800°C to 2300°C, preferably in the range of 1850°C to 2200°C, more preferably in the range of 1900°C to 2150°C, even more preferably in the range of 1950°C to 2150°C, and it is found that before or after said heat treatment a material thickness of at least 100 μm has been removed from the green blank, at least on the side which was in contact with the growth substrate, and preferably the plate is held flat on a flat surface during this heat treatment.

[0038] According to a seventh aspect of the first object of the present invention, which can be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth aspects, said plate is an intermediate blank for the manufacture of wafers obtained by modifying a raw blank according to this sixth aspect of the first object.

[0039] According to an eighth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh aspects, the thickness of the plate is less than 550 μm, preferably less than 500 μm, more preferably less than 450 μm, and even more preferably between 355 μm and 420 μm.

[0040] According to a ninth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth aspects, the plate has a diameter between 140 mm and 165 mm, a thickness between 350 μm and 450 μm and a deformation characterized by a warp of less than 100 μm, preferably less than 50 μm, and even more preferably less than 30 μm.

[0041] According to a tenth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth and / or ninth aspects, the thickness of the plate is between 350 μm and 400 μm.

[0042] According to an eleventh aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth and / or ninth and / or tenth aspects, the plate has a diameter of between 185 mm and 210 mm and a thickness of between 500 μm and 650 μm, preferably between 500 μm and 600 μm.

[0043] According to a twelfth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth and / or ninth and / or tenth and / or eleventh aspects, said plate has a deformation characterized by a warpage of less than 70 μm, preferably less than 50 μm, even more preferably less than 40 μm.

[0044] According to a thirteenth aspect of the first object of the present invention, which can be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth and / or ninth and / or tenth and / or eleventh and / or twelfth aspects, it is provided that, on each of the two faces of the plate, a contribution C 200 +C 400 is greater than 1%, more preferably greater than 2%, and even more preferably greater than 5%.

[0045] According to a fourteenth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth and / or ninth and / or tenth and / or eleventh and / or twelfth and / or thirteenth aspects, the plate has a thermal conductivity greater than 250 W / (mK), preferably greater than 260 W / (mK), more preferably greater than 270 W / (m·K).

[0046] According to a fifteenth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth and / or ninth and / or tenth and / or eleventh and / or twelfth and / or thirteenth and / or fourteenth aspects, said plate is obtained by a CVD process.

[0047] According to a sixteenth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth and / or ninth and / or tenth and / or eleventh and / or twelfth and / or thirteenth and / or fourteenth and / or fifteenth aspects, the plate has the following characteristics: - an electrical resistivity of less than 5 mΩ cm, preferably less than 3 mΩ cm; - Doping level measured by SIMS is 1×10 20 atoms / cm 3 more preferably 1.5 × 10 20 atoms / cm 3 Beyond - Texture coefficient C on each of the two sides of the plate 220 +C 200 +C 400 is over 80%, - Texture coefficient C on each of the two sides of the plate 422 is less than 15%, preferably less than 10%, - C on each of the two sides of the plate 200 +C 400 contribution of more than 2%, preferably more than 5%, - Thermal conductivity is greater than 260 W / (m·K), preferably greater than 270 W / (m·K).

[0048] According to a seventeenth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth and / or ninth and / or tenth and / or eleventh and / or twelfth and / or thirteenth and / or fourteenth and / or fifteenth and / or sixteenth aspects, the plate has the following characteristics: - an electrical resistivity of less than 5 mΩ cm, preferably less than 3 mΩ cm; - Doping level measured by SIMS is 1×10 20 atoms / cm 3 More preferably, it exceeds 1.5 × 10 20 atoms / cm 3 Beyond - Texture coefficient C on each of the two sides of the plate 220 +C 200 +C 400 is over 80%, - Texture coefficient C on each of the two sides of the plate 422 is less than 15%, preferably less than 10%, - C on each of the two sides of the plate 200 +C 400 contribution exceeds 5%, - Thermal conductivity is greater than 260 W / (mK), preferably greater than 270 W / (m·K).

[0049] According to an eighteenth aspect of the first object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh and / or eighth and / or ninth and / or tenth and / or eleventh and / or twelfth and / or thirteenth and / or fourteenth and / or fifteenth and / or sixteenth aspects and / or said seventeenth aspect, said plate is characterised in that it has undergone material removal on one and / or the other of these two faces before exhibiting at least one of the features or properties according to the first object of the present invention or any of its eighteen aspects.

[0050] A second object of the present invention is a method for producing a β-type polycrystalline SiC plate, which comprises a step of chemical vapor deposition for depositing a polycrystalline SiC layer on the graphite surface of a substrate having a graphite surface, by introducing a gas mixture into a heated vessel to produce the following gas phase: - at least one gaseous silicon and / or carbon precursor, - at least one doping gas containing at least one nitrogen and / or phosphorus atom; - carrier gas, the gas mixture decomposes on the graphite substrate surface to form a polycrystalline SiC layer on the graphite surface of the substrate; The method is characterized in that:

[0051] - the temperature in the heated vessel is between 1450 K and 1650 K and the total partial pressure of the gaseous precursor is less than 350 mbar, preferably less than 300 mbar;

[0052] the step of chemical vapor deposition is followed by at least one heat treatment of the polycrystalline SiC layer at a temperature between 1800°C and 2300°C, preferably between 1850°C and 2200°C, more preferably between 1900°C and 2150°C, even more preferably between 1950°C and 2150°C.

[0053] According to a first aspect of the second object of the present invention, the process is characterized in that the temperature in the heated vessel is between 1450 K and 1650 K and the total partial pressure of the gaseous precursor is less than 300 mbar.

[0054] According to a second aspect of the second object of the present invention, which can be combined with the first aspect, the step of chemical vapor deposition is followed by a step of heat treating the polycrystalline SiC plate at a temperature of at least between 1900°C and 2150°C.

[0055] According to a third aspect of the second object of the present invention, which can be combined with the first and / or second aspects, the heat treatment is carried out at a temperature between 1950°C and 2150°C.

[0056] According to a fourth aspect of the second object of the present invention, which can be combined with the first and / or second and / or third aspects, the doping gas is selected from the group consisting of NH3, N2H4, N2, H2NCH3.

[0057] According to a fifth aspect of the second object of the present invention, which can be combined with the first and / or second and / or third and / or fourth aspects, the doping gas is such that the level of nitrogen or phosphorus in the polycrystalline SiC plate is less than 5×10 as measured by secondary ion mass spectrometry. 19 atom / cm 3 More than 1 x 10 20atom / cm 3 More preferably, it exceeds 1.5 × 10 20 atom / cm 3 is present in the heated vessel at a concentration selected to exceed

[0058] According to a sixth aspect of the second object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth aspects, during this heat treatment the plate or raw blank is held flat on a flat surface.

[0059] According to a seventh aspect of the second object of the present invention, which may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth aspects, the green blank or plate has at least 100 μm of material removed from at least the side that was in contact with the growth substrate before or after the heat treatment.

[0060] According to an eighth aspect of the second object of the present invention, there is provided a SiC plate produced by a process of chemical vapor deposition according to the second object of the present invention, or such a plate is produced by said process of chemical vapor deposition, said provided or produced plate may be measured after removing a material thickness of at least 100 μm on each of its two sides, and may have a texture coefficient C 422 is less than 30% and the texture coefficient C 220 The heat treatment is also carried out in accordance with the second object of the present invention, and this eighth aspect of the second object of the present invention may be combined with the first and / or second and / or third and / or fourth and / or fifth and / or sixth and / or seventh aspects of the second object of the present invention.

[0061] 1 to 8 illustrate different aspects of the present invention. [Brief explanation of the drawings]

[0062] [Figure 1] FIG. 1 shows, diagrammatically, the measurement of a parameter called "warpage" which represents a particular aspect of flatness defects in semiconductor wafers. [Figure 2] FIG. 2 shows, in a schematic and simplified manner, a vertical section through a reactor according to the invention, which allows the production of blanks for polycrystalline SiC substrates according to the invention. [Figure 3] Figure 3 shows Example 1, an image of a cross section of a p-SiC plate obtained by a CVD process outside the scope of the present invention, observed with a backscattered electron scanning electron microscope, showing the state before heat treatment at 2000°C. The white bar at the bottom right represents a length of 100 μm. [Figure 4] Figure 4, which relates to Example 1, is a backscattered electron scanning electron microscope image of a cross section of a p-SiC plate obtained by a CVD process outside the scope of the present invention, showing the state after heat treatment at 2000 °C. The white bar in the lower right corner represents a length of 100 μm. This sample was taken from a p-SiC plate obtained at the same time (same reactor, same experimental conditions, same test) as the sample in Figure 3. [Figure 5] Figure 5 relates to Example 2 and is an image of a cross section of a p-SiC plate obtained by a CVD process outside the scope of the present invention, observed with a backscattered electron scanning electron microscope, showing the state before heat treatment at 2000°C. The white bar in the lower right corner represents a length of 100 μm. [Figure 6] Figure 6, which relates to Example 2, is a backscattered electron scanning electron microscope image of a cross section of a p-SiC plate obtained by a CVD process outside the scope of the present invention, showing the state after heat treatment at 2000 °C. The white bar in the lower right corner represents a length of 100 μm. This sample was taken from a p-SiC plate obtained at the same time (same reactor, same experimental conditions, same test) as the sample in Figure 5. [Figure 7] Figure 7, relating to Example 3, is a backscattered electron scanning electron microscope image of the cross section of a p-SiC plate obtained by the CVD process according to the present invention, showing the state before heat treatment at 2000 °C. The white bar in the lower right corner represents a length of 100 μm. [Figure 8] Figure 8, which relates to Example 3, is an image of a cross section of a p-SiC plate obtained by a CVD process outside the scope of the present invention, observed with a backscattered electron scanning electron microscope, showing the state after heat treatment at 2000°C. The white bar in the lower right corner indicates a length of 100 μm. This sample was taken from a p-SiC plate obtained at the same time (same reactor, same experimental conditions, same test) as the sample in Figure 7. [Figure 9a] Figure 9 shows diffraction patterns obtained by irradiating a β-type polycrystalline SiC plate (before heat treatment) obtained by the CVD process according to the present invention with X-rays having a wavelength of 1.5406 angstroms. Figures 9a, 9b, 9c, 9d, 9e, and 9f show regions with different 2θ angles, and the scale of the vertical axis may be different in each figure to clarify low intensity peaks. [Figure 9b] Figure 9 shows diffraction patterns obtained by irradiating a β-type polycrystalline SiC plate (before heat treatment) obtained by the CVD process according to the present invention with X-rays having a wavelength of 1.5406 angstroms. Figures 9a, 9b, 9c, 9d, 9e, and 9f show regions with different 2θ angles, and the scale of the vertical axis may be different in each figure to clarify low intensity peaks. [Figure 9c] Figure 9 shows diffraction patterns obtained by irradiating a β-type polycrystalline SiC plate (before heat treatment) obtained by the CVD process according to the present invention with X-rays having a wavelength of 1.5406 angstroms. Figures 9a, 9b, 9c, 9d, 9e, and 9f show regions with different 2θ angles, and the scale of the vertical axis may be different in each figure to clarify low intensity peaks. [Figure 9d] Figure 9 shows diffraction patterns obtained by irradiating a β-type polycrystalline SiC plate (before heat treatment) obtained by the CVD process according to the present invention with X-rays having a wavelength of 1.5406 angstroms. Figures 9a, 9b, 9c, 9d, 9e, and 9f show regions with different 2θ angles, and the scale of the vertical axis may be different in each figure to clarify low intensity peaks. [Figure 9e]Figure 9 shows diffraction patterns obtained by irradiating a β-type polycrystalline SiC plate (before heat treatment) obtained by the CVD process according to the present invention with X-rays having a wavelength of 1.5406 angstroms. Figures 9a, 9b, 9c, 9d, 9e, and 9f show regions with different 2θ angles, and the scale of the vertical axis may be different in each figure to clarify low intensity peaks. [Figure 9f] Figure 9 shows diffraction patterns obtained by irradiating a β-type polycrystalline SiC plate (before heat treatment) obtained by the CVD process according to the present invention with X-rays having a wavelength of 1.5406 angstroms. Figures 9a, 9b, 9c, 9d, 9e, and 9f show regions with different 2θ angles, and the scale of the vertical axis may be different in each figure to clarify low intensity peaks. [Figure 10a] FIG. 10 shows the same type of diffractogram as in FIG. 9 for the same plate as in FIG. 9 after heat treatment according to the invention. [Figure 10b] FIG. 10 shows the same type of diffractogram as in FIG. 9 for the same plate as in FIG. 9 after heat treatment according to the invention. [Figure 10c] FIG. 10 shows the same type of diffractogram as in FIG. 9 for the same plate as in FIG. 9 after heat treatment according to the invention. [Figure 10d] FIG. 10 shows the same type of diffractogram as in FIG. 9 for the same plate as in FIG. 9 after heat treatment according to the invention. [Figure 10e] FIG. 10 shows the same type of diffractogram as in FIG. 9 for the same plate as in FIG. 9 after heat treatment according to the invention.

[0063] The term "plate" here should be understood in the broadest sense and includes in particular the objects designated hereinafter as "raw blanks", "heat-treated raw blanks", "intermediate blanks" and "wafers", which generally have a flat shape.

[0064] Engineers in the field of semiconductor substrates for microelectronics know various methods for assessing the global flatness of a wafer. These various parameters are known by terms or acronyms such as bow (the distance between the best-fit plane at the center of an unclamped wafer and the surface; see section 3.1.2 of the ASTM F534 standard "Standard Test Method for Warpage of Silicon Wafers"), bow (the sum of the maximum positive and negative deviations from the best-fit plane of an unclamped wafer; see the ASTM F1390 standard "Standard Test Method for Measuring Silicon Wafer Warpage by Automatic Noncontact Scanning"), TTV (total thickness variation, i.e., the difference between the maximum and minimum thickness values ​​of a clamped wafer; see the ASTM F657 standard "Standard Test Method for Measuring Bow and Total Thickness Variation of Silicon Slices and Wafers by Noncontact Scanning"), TIR (total indicated thickness variation, i.e., the sum of the maximum positive and negative deviations from the plane corresponding to the best fit of a clamped wafer), SRAD (spherical reference measurement, representing the radius of curvature of the sphere corresponding to the best fit), and other acronyms represent parameters that characterize the local flatness of a wafer. Specifically, these are LFPD (Local Focal Plane Deviation, i.e., the maximum distance between the wafer surface and the plane corresponding to the best fit (above or below the unclamped wafer surface) in a given region) and LTV (Local Thickness Variation, i.e., the difference between the maximum and minimum thickness of the unclamped wafer in a given region).

[0065] In the present invention, the flatness of a wafer is characterized by a parameter commonly called "warpage." This parameter refers to the algebraic difference of the deviation of the wafer from a reference surface. Figure 1 shows a schematic diagram of how this parameter can be determined from the surface profile by the algebraic difference of the ordinates B and C of a disk placed on a base surface.

[0066] It is also possible to determine the mid-plane from the surface profile (usually using an algorithm that implements the least squares method). Calculating the warpage from the deviation from the mid-plane will give the same result as long as the mid-plane is parallel to the base surface. If the mid-plane is not parallel to the base surface, the measurement method relative to the base surface will increase the measurement relative to the mid-plane.

[0067] Here we describe a new process for depositing green blanks of β-type p-SiC that contributes to solving the problems presented.

[0068] This deposition process, the first step in the process for producing polycrystalline SiC plates according to the present invention, uses chemical vapor deposition (CVD) technology carried out in a heated chamber. The process involves at least one silicon precursor gas (e.g., silane or chlorosilane), at least one carbon precursor gas (e.g., alkane or alkene), and / or at least one silicon-carbon precursor gas (e.g., methyltrichlorosilane, abbreviated as MTCS), and at least one doping gas containing nitrogen (e.g., NH3, NH2H4, N2) and / or phosphorus. The doping gas may also be a carbon and / or silicon precursor (e.g., an amine, e.g., H2NCH3). These gases are diluted with a carrier gas, which may be a reducing gas, e.g., hydrogen, and / or an inert gas, e.g., argon.

[0069] For example, a gas composition for carrying out a process according to the present invention may include a carbon precursor, a silicon precursor, a doping gas, and a carrier gas. Another example is a gas composition including silicon and carbon precursors, a silicon precursor, a carbon precursor, a doping gas, and a carrier gas.

[0070] In a particular embodiment of this deposition process, the gas phase comprises trichloromethylsilane, preferably without any other silicon and / or carbon precursors, and the doping gas is advantageously selected from the group consisting of NH3, N2H4, N2, H2NCH3.

[0071] This gas mixture is introduced into a reactor maintained at high temperature, where the precursor gases decompose and react at the surface to form the 3C-SiC polytype. This material is particularly suitable for combination with single-crystal SiC layers due to its mechanical and thermal resistance properties, thermal expansion coefficient compatibility, and purity. It also contains a very high nitrogen concentration (typically 10 20 atoms / cm 3 ), reducing the resistivity to below 20 Ω·cm without degrading the substrate quality that would adversely affect power component manufacturing. Furthermore, the material continues to withstand the high-temperature processes that wafers undergo during electronic component manufacturing.

[0072] The reactor temperature during the CVD deposition of SiC should be between about 1300 K and about 1800 K, preferably between about 1350 K and about 1700 K, more preferably between about 1400 K and about 1650 K, and even more preferably between about 1450 K and about 1650 K. The total pressure in the reactor advantageously does not exceed 350 mbar, preferably does not exceed 300 mbar.

[0073] In an advantageous embodiment of the process for producing p-SiC plates according to the present invention, deposition is performed by CVD on the graphite surface of a substrate. In a particularly advantageous embodiment, the substrate is a fine-grained, purified isostatic graphite substrate, designed to avoid contamination and outgassing during deposition. For example, to obtain a 150 mm diameter wafer, deposition is performed on a disk-shaped graphite cylinder with a nominal diameter close to 150 mm and a thickness of at least 2 mm to ensure sufficient substrate flatness. The reactor can contain multiple such disks with identical or different diameters. Both sides of the disk are preferably machined with sufficient precision to achieve a flatness of <15 μm. The thermal expansion coefficient of the isotropic graphite is carefully selected to match that of the SiC layer upon cooling after deposition. Substrates sold by Mersen under the name "Grade 2303" can be used.

[0074] A typical embodiment of the process for depositing a green blank that can be used to produce p-SiC plates according to the present invention will now be described. First, with reference to FIG. 2, an example of a reactor capable of carrying out this deposition process will be described. This deposition process is carried out in a specific type of reactor 1. The reactor 1 comprises a vessel 2, which contains a reaction space 3, a heating space 4, and a reaction gas exhaust space 5. The vessel 2 is designed to reach low pressures, down to a minimum of several tens of millibars, by exhausting gases to an exhaust gas treatment device (not shown). Precursor gases are introduced into the reaction space 3 of the reactor 1 via multiple injectors 11 supplied by gas lines 8, referred to as precursor gas inlet lines. The reaction gases travel from the reaction space 3 to the exhaust space 5, from where they are drawn through exhaust nozzles 10 into gas line 9, referred to as the reaction gas exhaust line. The heating space 4 contains multiple heating elements 6 (typically solenoids). A graphite cylinder or disk 12 (also referred to herein as a substrate) is loaded into the vessel 2. For simplicity, FIG. 2 does not show the support structure that holds the substrate 12 within the reactor 1.

[0075] The reaction vessel 2 is heated by magnetic field induction inside a graphite susceptor 7, through which precursor gases (e.g., silane, alkane, and / or methylchlorosilane), carrier gases (e.g., hydrogen and / or argon), and doping gases (e.g., NH3, amines, and / or N2) circulate. A graphite substrate 12 is in thermal equilibrium within the reaction space 3 heated by the susceptor 7, the temperature of which is typically between 1300 and 1700 K (measured by thermocouple), more preferably between 1350 and 1650 K. The gas mixture is introduced via a nozzle or injector 11, which ensures a homogeneous gas flow distribution within the vessel 2. Within this temperature range, the deposition rate can vary over a fairly wide range, from 1 μm / h to over 100 μm / h. The total partial pressure of the gaseous precursors is advantageously less than 350 mbar, preferably less than 300 mbar.

[0076] To achieve a minimum deposition thickness of approximately 600 μm for p-SiC, the gas injection time can vary from several hours to tens of hours or even hundreds of hours, depending on the conditions selected. By adjusting the control parameters described above, it is possible to obtain the product of the present invention, as will be explained in detail in the Examples. This allows high-quality p-SiC wafers to be obtained under economically satisfactory conditions, enabling their use in electronics applications to replace single-crystal SiC produced by conventional PVT processes.

[0077] Once the target thickness of the deposition on the graphite substrate 12 is reached, the injection of precursor gas into the furnace is stopped, and the chamber is cooled to room temperature and removed. The graphite disk 12, now coated with a thick SiC deposition layer, is then machined and then oxidized in air, typically at 900°C, to remove any graphite residue. A raw SiC disk is then recovered from each side.

[0078] The deformation of the disk (raw blank) is measured using a white light confocal sensor that scans the surface of the SiC disk that was in contact with the graphite. To perform this measurement, the disk is placed on a support with the CVD deposition side. The difference between the maximum and minimum heights of the surface scanned by the sensor is measured relative to the support surface of the measurement tool. Before being peeled from the graphite, the graphite side surface was a flat reference surface. After graphite peeling, this surface deforms due to stress relaxation of the deposition layer. This deformed surface can be interpolated by a midplane using the least squares method. When this midplane is parallel to the support surface, the measured deformation is equal to the warpage. This deformation measurement method generally increases the measured warpage.

[0079] The green blank obtained by the above-described deposition process (after removal of at least about 100 μm or more of material thickness from the side that was in contact with the growth substrate) exhibits specific crystallographic properties, namely, a preferential crystallographic orientation on each of its two sides, characterized by: (i) its texture coefficient C 422 is less than 40% (ii) its texture coefficient C 220 is more than 50%, preferably more than 80%.

[0080] Preferably, the texture coefficient C 422 is less than 30% and its texture coefficient C 220 More preferably, the texture coefficient C 422 is less than 30% and its texture coefficient C 220 is over 80%.

[0081] As described above, the manufacturing process of a p-SiC plate according to the present invention includes a first step in which silicon carbide is deposited from the vapor phase onto a graphite surface of a substrate having a graphite surface to obtain a raw blank of polycrystalline silicon carbide (hereinafter abbreviated as "p-SiC") having a first thickness.

[0082] According to an essential feature of the invention, this green blank is subjected to a specific heat treatment, which will now be described.

[0083] In a second step, the green blank is subjected to a heat treatment between 1800°C and 2300°C to obtain a heat-treated green blank, which is always polycrystalline silicon carbide. During this heat treatment, the green blank is preferably held flat on a flat surface.

[0084] In a third step, the heat-treated green blank is subjected to a double-sided grinding process to obtain an intermediate polycrystalline silicon carbide blank of a second thickness. This grinding process is performed in multiple sub-steps and is known as such.

[0085] The second and third steps can be interchanged, and the heat treatment can also be carried out on the partially ground blank so that the third step is carried out partly before the second step and partly after the second step.

[0086] This intermediate blank can be converted by various polishing steps (possibly preceded by one or more fine grinding steps) into a polycrystalline SiC wafer ready for the deposition of a thin film of monocrystalline silicon carbide (hereinafter referred to as "m-SiC"), in particular by layer transfer techniques. These polishing steps and the deposition of thin m-SiC films are known techniques and are not part of the present invention.

[0087] According to an essential technical feature of the present invention, a blank (raw blank or intermediate blank) is subjected to a specific heat treatment. This heat treatment, as previously identified as the "second step" of the process according to the present invention, will be described in detail below. This specific heat treatment results in specific changes in grain size and crystal orientation, which are only observed when the raw or intermediate p-SiC blank has specific crystallographic characteristics. More specifically, this heat treatment is carried out at a temperature range of between 1800°C and 2300°C, preferably between 1850°C and 2200°C, more preferably between 1900°C and 2150°C, and most preferably between 1950°C and 2150°C. The heat treatment duration is preferably at least 10 minutes, preferably between about 1 hour and about 12 hours, and more preferably between about 2 hours and about 9 hours. A longer duration may cause undesirable recrystallization, while a shorter duration may result in ineffective heat treatment. Typically, this heat treatment is carried out by placing the blank in a room or tepid oven, heating the oven to a predetermined temperature, maintaining this temperature, and finally allowing it to cool before removing it from the oven at room or tepid. The treatment times given here are for the temperature ranges indicated, not the total duration of the thermal cycle.

[0088] This particular heat treatment makes it possible to obtain green or intermediate blanks of heat-treated β-type p-SiC with good crystallographic properties. More precisely, the green or intermediate blanks of heat-treated p-SiC have preferential crystallographic directions in each plane that have the following characteristics: (i) its texture coefficient C 422 is less than 40% (ii) its texture coefficient C 220 +C 200 +C 400 is more than 50%, preferably more than 80%.

[0089] Preferably, C 200 +C 400 The contribution of C is more than 1%, more preferably more than 2%, and even more preferably more than 5%. 200 +C 400 The contribution of C is very dominant in the crystallographic direction. 220 The texture is characterized, which is produced by the heat treatment that the green blank undergoes in the second step.

[0090] Advantageously, after this heat treatment, referred to herein as the "second step", said green or intermediate blank has a texture coefficient C of less than 20%, preferably less than 15%, and even more preferably less than 10% on each of its two sides. 422 For example, it may be a green blank from which at least 100 μm of material thickness has been removed, at least on the side that was in contact with the growth substrate, before or after said heat treatment.

[0091] Generally, the above heat treatments do not result in the appearance of the α phase. While not intending to be bound by this hypothesis, the inventors believe that in the case of doped SiC, the presence of the doping element inhibits the transformation from β-type polycrystalline SiC to α-type polycrystalline SiC.

[0092] Applicant believes that the above heat treatment results in a green blank having these favorable crystallographic properties on both sides if the green or intermediate blank before the heat treatment has at least one surface that exhibits: (i) a texture coefficient C 422 is less than 30%, and (ii) the texture coefficient C 220 It was pointed out that the present invention is limited to cases where the ratio of the total number of particles is 60% or more, preferably 80% or more.

[0093] During heat treatment of such blanks, crystallographic defects first rearrange at grain boundaries (relieving residual stress at the grain boundaries), followed by recrystallization via nucleation at the grain boundaries and subsequent growth of these grains. Therefore, the initial grain size influences the microstructure obtained at the end of the heat treatment. However, the inventors discovered that this phenomenon alone cannot explain the difference in behavior between samples whose physical properties and flatness improve during heat treatment and those whose properties do not show significant improvement. The nature of the crystallographic defects is also crucial. To promote effective stress-relieving recrystallization, fine grains must be bordered by high-angle grain boundaries (HAGBs). These highly misoriented grain boundaries contain particularly large stored energy and are more mobile than low-misoriented grain boundaries. This internal energy is the driving force behind defect rearrangement at the grain boundaries. In the process of the present invention, the special texture of the blank undergoing heat treatment ensures the presence of such highly misoriented grain boundaries.

[0094] Empirically, the average diameter of the grains (measured in a plane perpendicular to the z-axis, e.g., by EBSD) can be 5 μm or more, particularly 10 μm or more, and in some cases 20 μm or even 50 μm or more, depending on the supporting substrate 20. In particular, grains with (200) and (400) orientations can reach average diameters of 5 μm or more, particularly 10 μm or more, and in some cases 20 μm or even 50 μm, due to fusion and recrystallization of the specific oriented grains (220) as a result of heat treatment.

[0095] When measuring the average grain diameter, different crystals that form one or more twins are considered to constitute the same grain, not separate grains. Thus, during heat treatment, the grains tend to increase in size, and their average diameter can increase by at least a factor of two, frequently five, and even ten or fifty times, depending on the conditions and duration of the heat treatment. This is especially evident for grains with a (220) orientation, which appear to have a stronger tendency to coalescence and recrystallization compared to (422) grains. Therefore, the microstructural texture coefficient C 422 is less than 40% and the texture coefficient C 220 +C200 +C 400 It has been found that green discs having a sum of more than 50% are particularly sensitive to heat treatment. However, an increase in grain size during heat treatment correlates with an increase in thermal conductivity, thus making it possible to achieve high thermal conductivity values, preferably greater than 250 W / (mK), more preferably greater than 260 W / (mK), and even more preferably greater than 270 W / (mK).

[0096] The fusion of adjacent grains also significantly alters their morphology. This can be seen in Figure 7, where CVD growth tends to be highly oriented along the thickness of the green disk, with the grains prior to heat treatment primarily elongating along the Z axis. As seen in Figure 8, heat treatment results in grains with significantly different morphologies. In particular, the green disk or supporting substrate contains grains with an aspect ratio, defined as the ratio of the grain's length along the Z axis in the numerator to its diameter in a direction perpendicular to the Z axis in the denominator, of 10 or less, particularly 5 or less, and especially 3 or less. In particular, at least 5% of the grains have such an aspect ratio.

[0097] The heat-treated raw blank is then ground to obtain an intermediate blank, which is the subject of the third step mentioned above. This grinding has two goals: first, it is an essential step to polish the surface, which prepares it for the deposition of the m-SiC layer, which can be carried out in particular by layer transfer techniques; second, grinding (which usually proceeds by successively removing material from both sides of the blank) makes it possible to obtain p-SiC slices with high flatness at their final thickness.

[0098] The intermediate blank advantageously has a thickness close to the final target thickness of a p-SiC wafer (such polished wafers are commonly referred to as "wafers") ready to receive an m-SiC layer, allowing it to be used as a substrate for depositing microelectronic circuits on this m-SiC surface in accordance with conventional manufacturing techniques in the field.

[0099] More precisely, the thickness of said intermediate blank is advantageously less than 550 μm, preferably less than 500 μm, more preferably less than 450 μm, and even more preferably in the range from 355 μm to 420 μm.

[0100] Such intermediate blanks, and similarly polished wafers, have all the crystallographic properties indicated above, i.e., preferential crystal orientations on each of their faces that are characterized by: (i) its texture coefficient C 422 is less than 40%, and (ii) its texture coefficient C 220 +C 200 +C 400 is more than 50%, preferably more than 80%.

[0101] Preferably, contribution C 200 +C 400 is greater than 1%, more preferably greater than 2%, and even more preferably greater than 5%.

[0102] Advantageously, the polished wafer has a texture coefficient C of less than 20%, preferably less than 15% and even more preferably less than 10% on each side of the plate. 422 It has.

[0103] According to one aspect of the invention, the method according to the invention makes it possible to obtain polycrystalline SiC plates having an electrical resistivity of less than 10 mΩ·cm, preferably less than 5 mΩ·cm, and even more preferably less than 3 mΩ·cm.

[0104] According to another aspect of the invention, the method of the invention can be used to obtain a nitrogen content of 5×10 as measured by secondary ion mass spectrometry. 19 atoms / cm 3 More than 1 x 10 20 atoms / cm 3 More preferably, it exceeds 1.5 × 10 20 atoms / cm 3 It is possible to obtain a polycrystalline SiC plate doped with nitrogen exceeding 1000 kJ / cm.

[0105] While not intending to be bound by this theory, the inventors believe that heat treating the plate, among other things, promotes the diffusion of the nitrogen dopant, making the incorporation of nitrogen atoms into the crystal structure lattice more electronically efficient.

[0106] In a first advantageous embodiment, such p-SiC plates, which may typically be intermediate blanks or polished wafers, have a diameter between 140 mm and 165 mm, a thickness between 350 μm and 450 μm, and deformation characteristics of less than 50 μm, preferably less than 40 μm, and even more preferably less than 30 μm. Preferably, the thickness of such plates is between 350 μm and 400 μm.

[0107] In a second advantageous embodiment, such p-SiC plates, which may typically be intermediate blanks or polished wafers, have a diameter between 185 mm and 210 mm, a thickness between 500 μm and 650 μm, and deformation characteristics with a warpage of less than 70 μm, preferably less than 50 μm, and even more preferably less than 40 μm. Preferably, the thickness of such plates is between 500 μm and 600 μm.

[0108] Example

[0109] Examples 1 through 3 illustrate certain aspects of the present invention and are not intended to limit the scope of the invention.

[0110] In these examples, diffraction peaks were collected using a PANalytical X'Pert PRO MPD X-ray diffractometer in the angle range of 10° to 135° (2θ scale) using the θ-2θ method. In this angle range, 10 diffraction peaks were considered for SiC3C, as shown in Table 1, and classified according to increasing Miller indices (hkl). These diffraction peaks are characteristic of β-type SiC.

[0111] [Table 1]

[0112] Texture coefficient C hkl (N=10 peaks) is the peak intensity I proportional to the peak area of ​​the sample. hkl and the theoretical intensity I of the powder obtained from the theoretical value % published by ICDD (International Center for Diffraction Data) 0 hkl It is calculated from C hkl =(I hkl / I 0 hkl ) / (1 / NxΣ(I hkl / I 0 hkl ))

[0113] The texture coefficient in this case varies from 0 to 10 and can also be expressed as a percentage (%), quantifying the average preferred orientation of the crystalline structure of the deposited layer relative to the normal to the sample surface.

[0114] In these examples, the carbon and silicon sources were the same molecule, namely methyltrichlorosilane (abbreviated as MTCS). The nitrogen source doping gas was NH3. By adjusting the main parameters of the CVD process (temperature, partial pressure of the precursors, % concentration of the doping gas), it is possible to change the orientation of the deposited layer and its texture. This can affect the internal stress gradient of the deposit, resulting in a tailored warpage of the green blank.

[0115] Example 1: A coarse grain texture (422) in the main direction and a fine grain texture (220) in the sub-direction are mixed.

[0116] The intermediate p-SiC blank was prepared by grinding and polishing a green blank obtained by a CVD process outside the present invention, in which an 800 μm layer was deposited on a graphite substrate operating at a temperature of 1600 K, a MTCS partial pressure of 16 mbar, and an NH3 mole fraction of 6%.

[0117] Figures 3 and 4 show two images of backscattered electrons observed with a scanning electron microscope on a cross section before (Figure 3) and after (Figure 4) heat treatment at 2000°C. In each figure, the white bar indicates a length of 100 μm.

[0118] Before the heat treatment according to the invention (during which the blank is held flat on a flat surface), the intermediate blank has a dominant texture coefficient C 422 and exhibits very large grains (crystal grains) oriented according to the texture coefficients collected below.

[0119] C 111 +C 222 +C 511 =20%;C 220 =7%;C 422 =54%

[0120] In Figure 3, very large, cone-shaped grains up to 100 μm in diameter are observed, oriented primarily in the (422) direction, with a small amount in the (111) direction. Small grains (220) less than 10 μm are very few. A continuous increase in grain diameter over the first 500 μm is observed in Figure 3. This increase in grain size can be assessed for each ordinate of the mark by counting the number of times the grain boundary intersects with the horizontal line of the stationary ordinate on the EBSD image.

[0121] With the blank held flat on a flat surface, no significant changes in microstructure and grain orientation are observed after heat treatment according to the invention.

[0122] In the raw blank before heat treatment, the resulting deposited layer had a nitrogen concentration of 6.8 × 10 measured by SIMS (Secondary Ion Mass Spectroscopy). 20 nitrogen atoms / cm 3The electrical resistivity measured by the four-point method was 0.9 mΩ·cm, well below the target upper limit. The distortion measured in the unprocessed wafer was very high, with a warpage of 580 μm. The thermal conductivity of the layer was estimated from thermal diffusivity measurements using the laser flash method, yielding a value of 130 W / m / K, below the target value. After the heat treatment, the warpage and internal stress remain high, while the electrical resistivity and thermal conductivity remain virtually unchanged.

[0123] In this example, the initial texture of the blank before heat treatment is C 422 This indicates that when texture is dominant, the heat treatment according to the present invention does not result in improvements in the crystallographic and physical properties. A large number of plates were produced according to this example. A total of 16 disks were produced, with an average deformation of 630 μm and a standard deviation of 153 μm. It is concluded that it is not possible to produce p-SiC wafers by grinding from raw disks less than 1000 μm thick.

[0124] After several depositions under these conditions, the observed texture remains preferentially oriented in the (422) direction, and the texture coefficient C 422 exceeds 50%, and C 111 +C 222 +C 511 exceeds 15%, and C 220 was less than 10%.

[0125] Example 2 An intermediate p-SiC blank was prepared by grinding and polishing a green blank obtained by a CVD process outside the present invention, in which a p-SiC layer approximately 800 μm thick was deposited on a flat graphite substrate in a CVD reactor operated at a temperature of 1530 K, a partial pressure of 12 mbar MTCS, and a mole fraction of 5% NH.

[0126] Figures 5 and 6 show two images of a cross section taken with a backscattered electron scanning electron microscope before (see Figure 5) and after (see Figure 6) heat treatment at 2000°C in accordance with the present invention. The blank was held flat on a flat surface during the heat treatment. In each figure, the white bar indicates a length of 100 μm.

[0127] A preferentially oriented (220) texture was observed, with a texture coefficient of C 111 +C 222 +C 511 =2%. C 220 =90%. C 422 =3%.

[0128] This layer has a nitrogen concentration of 2.7 × 10 measured by SIMS. 20 nitrogen atoms / cm 3 The electrical resistivity measured by the four-point method was 10 mΩ·cm. The thermal conductivity estimated from thermal diffusivity measurements using the laser flash method was 130 W / m / K. This value is below the target value, and the woody texture no longer appears to promote good thermal conductivity, being barely visible in the lower part of the cross section.

[0129] The deformation measured on unprocessed blanks that had not been heat-treated was small. The average deformation of the 16 plates produced was 160 μm, with a standard deviation of 85 μm. This makes it possible to produce p-SiC wafers at reasonable cost from disk-shaped raw material with a thickness of less than 1,000 μm.

[0130] However, at the start of growth, the texture is inhomogeneous across the depth, as explained by the fact that the face of the plate that was in contact with the graphite surface of the growth substrate was characterized by X-ray diffraction during successive grinding steps. The side of the substrate is predominantly (111) + (222) + (511) oriented to a great depth, so that the inhomogeneous region across the depth cannot be removed by grinding under reasonable economic conditions.

[0131] After heat treatment of an intermediate blank with a thickness of approximately 400 μm (see Figure 6), significant grain size growth was observed even in the upper part of the preferred orientation plane (220). On the other hand, the lower part, which constitutes the substrate surface, always showed the preferred orientation (111) + (222) + (511), and no change in grain size was observed due to heat treatment.

[0132] This observed grain size non-uniformity is extremely detrimental: it has been observed that the warpage of this intermediate blank deteriorates in most cases when it exceeds 250 μm, making it impossible to obtain wafers with warpage that meets the target.

[0133] Example 3: Oriented fine particle texture (220) An intermediate p-SiC blank was prepared by grinding and polishing a green blank obtained by the CVD process according to the present invention. To prepare the blank, an 800 μm layer was deposited on a graphite substrate, operating at a temperature of 1550 K, an MTCS partial pressure of 15 mbar, and an NH3 mole fraction of 4%. The orientation observed before the heat treatment was a texture with a preferred (220) orientation, with the following texture coefficients:

[0134] C 111 +C 222 +C 511 =2%, C 220 =91%, C 422 =4%.

[0135] C 200 +C 400 The contribution rate of is zero.

[0136] The nitrogen concentration in this layer was measured by SIMS and was found to be 1.8 × 10 20 atom / cm 3 The electrical resistivity was measured at 10 mΩ·cm using a four-point method. The thermal conductivity was estimated from thermal diffusivity measurements using the laser flash method. The obtained value was 240 W / m / K, exceeding the target value. Despite the fine grain structure, the dendritic structure appears to promote good thermal conductivity even under high doping conditions.

[0137] The deformation measured on the unannealed green blanks was also very good. For a total of 16 disks produced, the average deformation was 210 μm with a standard deviation of 82 μm. This makes it possible to produce p-SiC wafers by grinding from green disks with thicknesses of less than 1000 μm at a reasonable cost.

[0138] After several depositions under these conditions, the observed texture is a highly oriented (220) texture, with a texture coefficient C 220 >90% and C 422 showed <10%.

[0139] The intermediate p-SiC blank was prepared by grinding and polishing a green blank obtained by the CVD process according to the present invention. Figures 7 and 8 show backscattered electron scanning electron microscopy images of the cross section of the green blank before (see Figure 7) and after (see Figure 8) heat treatment at 2000 °C. In each figure, the white bar indicates a length of 100 μm.

[0140] C for raw blanks 220 The texture coefficient was dominant, and the (111) component was prominent near the interface with the graphite surface on which the blank was deposited. 111 The thickness of this texture-rich raw blank was removed.

[0141] After the heat treatment according to the invention, a significant change in the microtexture and grain orientation was observed when the blank was held flat on a flat surface. That is, the fine grains with (220) orientation tend to merge, resulting in a mixed orientation (111) + (220) + (200). The fine grains with (111) orientation are hardly observed. After the heat treatment, C 200 +C 400 The contribution of SiO2 appears and becomes 5% after heat treatment.

[0142] The heat treatment reduces warpage and makes the grain size distribution through the thickness of the intermediate blank more uniform and within specification. The electrical resistivity decreases to 1.2 mΩ·cm and the thermal conductivity increases to 270 W / m / K. This example complies with the present invention.

[0143] Example 4: Verification of the crystal structure The crystalline structure of a plate designated BJ2-22-19-3G was compared before and after heat treatment according to the present invention (in this example at about 2000° C. for a period of about 1 hour to about 10 hours). This plate corresponds to Example 3.

[0144] [Figure 9] shows the diffractogram before heat treatment, and [Figure 10] shows the diffractogram after heat treatment. In both figures, the diffractogram is first shown in full width (see [Figure 9a] and [Figure 10a]), and then displayed in 2θ intervals using a scale of intensity factors that vary for each peak. This intensity factor may vary for each 2θ interval. The vertical axis represents the index of each peak.

[0145] Before heat treatment, the plate exhibited two low-intensity peaks indicative of stacking faults in the 3C polymorph. These peaks (approximately 33.5° to 33.9°—see [Figure 9b], and two satellite peaks at 65.3° and 64.6° and 65.9°—see [Figure 9d]) disappeared after heat treatment. No peaks characteristic of α-SiC were observed either before or after heat treatment.

Claims

1. A β-type polycrystalline SiC plate having a preferred crystallographic orientation, said plate having, on each face thereof: (i) its texture coefficient C ４２２ is less than 40%, and (ii) its texture coefficient C ２２０ +C ２００ +C ４００ is more than 50%, preferably more than 80%; A polycrystalline SiC plate characterized by:

2. 2. Polycrystalline SiC plate according to claim 1, characterized in that the plate has an electrical resistivity of less than 10 mΩ·cm, preferably less than 5 mΩ·cm, and more preferably less than 3 mΩ·cm.

3. Nitrogen levels measured by secondary ion mass spectrometry were 5 x 10 １９ atom / cm ３ More than 1×10 ２０ atom / cm ３ more preferably greater than 1.5 × 10 ２０ atom / cm ３ 3. The polycrystalline SiC plate according to claim 1, wherein the polycrystalline SiC plate is doped with more than 100% nitrogen.

4. On each side of the plate, its texture coefficient C ４２２ 4. Polycrystalline SiC plate according to claim 1, characterized in that the tensile strength is less than 20%, preferably less than 15%, and more preferably less than 10%.

5. Nitrogen levels measured by secondary ion mass spectrometry were 5 x 10 １９ atoms / cm ３ a plate doped with more than 10 ... The plate has, on each of its two surfaces, (i) Texture coefficient C ４２２ is less than 20%; (ii) Texture coefficient C ２２０ +C ２００ +C ４００ is more than 60%, preferably more than 80%; 5. The polycrystalline SiC plate according to claim 1, characterized in that

6. 6. A polycrystalline SiC plate according to any one of claims 1 to 5, which is a green blank obtained from a vapor phase deposition process that has undergone at least one heat treatment step at a temperature between 1800°C and 2300°C, preferably between 1850°C and 2200°C, more preferably between 1900°C and 2150°C, even more preferably between 1950°C and 2150°C, characterized in that before or after said heat treatment a material thickness of at least 100 μm has been removed from the green blank, at least on the side that was in contact with the growth substrate, and preferably the plate is held flat on a flat surface during this heat treatment.

7. 7. The polycrystalline SiC plate according to claim 1, which is an intermediate blank for wafer production obtained by grinding the raw material blank according to claim 6.

8. 8. Polycrystalline SiC plate according to claim 7, characterized in that the plate has a thickness of less than 550 μm, preferably less than 500 μm, more preferably less than 450 μm, even more preferably between 355 μm and 420 μm.

9. 9. Polycrystalline SiC plate according to any one of claims 1 to 8, characterized by a diameter between 140 mm and 165 mm, a thickness between 350 μm and 450 μm, and a deformation with a warpage of less than 100 μm, preferably less than 50 μm, and even more preferably less than 30 μm.

10. 10. The polycrystalline SiC plate according to claim 9, wherein the thickness of the plate is between 350 μm and 400 μm.

11. characterized in that the diameter of said plate is between 185 mm and 210 mm and the thickness is between 500 μm and 650 μm, preferably between 500 μm and 600 μm; 8. Polycrystalline SiC plate according to any one of claims 1 to 7, exhibiting a deformation characteristic of a warpage of less than 70 μm, preferably less than 50 μm, more preferably less than 40 μm.

12. C ２００ +C ４００ contribution is greater than 1%, More preferably, it is greater than 2%.

12. Polycrystalline SiC plate according to any one of claims 1 to 11, characterized in that it is more preferably greater than 5%.

13. 13. Polycrystalline SiC plate according to any one of claims 1 to 12, characterized in that the thermal conductivity of the plate is greater than 250 W / (m·K), preferably greater than 260 W / (m·K), and even more preferably greater than 270 W / (m·K).

14. 14. Polycrystalline SiC plate according to any one of claims 1 to 13, characterized in that it is obtained by a CVD process.

15. an electrical resistivity of less than 5 mΩ cm, preferably less than 3 mΩ cm; - Doping level measured by SIMS method is 1 × 10 ２０ atom / cm ３ more than 1.5 × 10 ２０ atom / cm ３ To exceed - on each of the two sides of the plate, C ２２０ +C ２００ +C ４００ The texture coefficient of the above is more than 60%. - texture coefficient C on each of the two faces of said plate ４２２ is less than 15% preferably less than 10%; - on each of the two sides of the plate, C ２００ +C ４００ contribution of 2% or more, Preferably, it is 5% or more; and a thermal conductivity of at least 260 W / (m·K), preferably greater than 270 W / (m·K); 15. The polycrystalline SiC plate according to claim 1, wherein

16. an electrical resistivity of less than 5 mOhm cm, preferably less than 3 mOhm cm; - Doping concentration measured by SIMS method is 1 × 10 ２０ atom / cm ３ more preferably greater than 1.5 × 10 ２０ atom / cm ３ To exceed - on each side of the plate, the texture coefficient at 80% is C ２２０ +C ２００ +C ４００ To exceed - texture coefficient C on each of the two faces of said plate ４２２ is less than 15%, preferably less than 10%; - on each of the two sides of the plate, C ２００ +C ４００ contribution exceeds 5%; a thermal conductivity greater than 260 W / (m·K), preferably greater than 270 W / (m·K); 16. The polycrystalline SiC plate according to claim 1, wherein

17. The method includes the steps of chemical vapor deposition of a polycrystalline SiC plate onto a graphite surface of a substrate (12) having a graphite surface, the method comprising introducing a gas mixture into a heated vessel (2), at least one gaseous silicon and / or carbon precursor, at least one doping gas containing at least one nitrogen atom, - carrier gas, producing a gas phase having 17. The method for producing a polycrystalline SiC plate according to claim 1, wherein the gas mixture decomposes on the surface of the graphite substrate (12) to form a polycrystalline SiC layer on the graphite surface of the substrate, the temperature in said heated vessel (2) is between 1450 K and 1650 K and the total partial pressure of said gaseous precursor is less than 350 mbar, preferably less than 300 mbar; said step of chemical vapor deposition is followed by at least one step of heat treating said polycrystalline layer at a temperature between 1800°C and 2300°C, preferably between 1850°C and 2200°C, more preferably between 1900°C and 2150°C, even more preferably between 1950°C and 2150°C, during which heat treatment the green blank is preferably held flat on a flat surface; A method for manufacturing a polycrystalline SiC plate.

18. 18. The method of claim 17, wherein the total partial pressure of the gaseous precursor in the heated vessel is less than 300 mbar.

19. the total partial pressure of the gaseous precursor in the vessel is less than 300 mbar; - said heat treatment step is carried out at a temperature between 1900°C and 2150°C; 19. The method according to claim 17 or 18.

20. 20. A method according to any of claims 17 to 19, characterized in that the heat treatment is carried out at a temperature between 1950°C and 2150°C.

21. The doping gas is NH ３ , N ２ H ４ , N ２ , and H ２ NCH ３ 21. The method according to any of claims 17 to 20, characterized in that the compound is selected from the group consisting of:

22. The doping gas is placed in the heated vessel with a nitrogen or phosphorus level of 5×10 as measured by secondary ion mass spectrometry. １９ atoms / cm ３ More than 1×10 ２０ atoms / cm ３ more preferably greater than 1.5 × 10 ２０ atoms / cm ３ 22. The method of any of claims 17 to 21, characterized in that the compound is present at a concentration selected to exceed

23. 23. The method of any of claims 1 to 22, characterized in that the plate is held flat on a flat surface during the heat treatment.

24. 24. The method according to claim 1, wherein the plate is cleared before or after the heat treatment, at least on the side that was in contact with the growth substrate, so that the material thickness is at least 100 μm.

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