Conformal and selective SiN deposition

Abstract

The present disclosure generally relates to a method for forming a silicon nitride film layer on a substrate. In an embodiment, the method includes positioning a substrate having at least one feature thereon in a process chamber, depositing a first silicon film layer on a non-oxidized silicon surface of the substrate for a time period of about 1 minute to about 4 minutes, nitriding the first silicon film layer to form a first silicon nitride film layer on the substrate, selectively depositing a second silicon film layer on the first silicon nitride film layer, and nitriding the second silicon film layer to form a second silicon nitride film layer disposed directly on the first silicon nitride film layer.

Description

[Technical Field]

[0001]

[0001] Embodiments of the present disclosure relate generally to the fabrication of semiconductor components and devices. More specifically, embodiments described herein provide methods for forming silicon nitride film layers on semiconductor surfaces. [Background technology]

[0002]

[0002] Silicon nitride is widely employed in the semiconductor and microelectronics industries. Silicon nitride films exhibit high-temperature durability, high electrical resistivity, high conformality, and excellent etch resistance. Silicon nitride thin films deposited by plasma-enhanced chemical vapor deposition (PECVD) or conventional chemical vapor deposition (CVD) processes serve multiple functions, including serving as charge storage layers, stress liners, masking layers, dielectric layers, and passivation layers.

[0003]

[0003] Selective deposition of silicon nitride can be achieved through the use of temporary mask structures. The temporary mask can be removed by either wet or dry processing, but the use of wet chemistries is becoming less attractive due to particle control concerns and other challenges. Removal of the mask using dry processes can alter the underlying layer, cause charge-induced damage, and contaminate the underlying layer. Therefore, the microelectronics and semiconductor industries need a selective silicon nitride deposition method that avoids the use of temporary mask structures. Summary of the Invention

[0004]

[0004] Embodiments described herein generally relate to a method for selectively depositing a conformal silicon nitride film on a surface of a substrate, the method including providing a substrate including a silicon oxide surface and a non-oxide silicon surface, depositing a first silicon film layer on the non-oxide silicon surface of the substrate for a time period from about 1 minute to about 4 minutes, and nitriding the first silicon film layer to form the first silicon nitride film layer.

[0005] In another embodiment, a method for selectively depositing a multilayer conformal silicon nitride film on a surface of a substrate is provided, the method including: providing a substrate including a silicon oxide surface and a non-oxide silicon surface; selectively depositing a first silicon film layer on the non-oxide silicon surface of the substrate for a time period from about 1 minute to about 4 minutes; nitriding the first silicon film layer to form the first silicon nitride film layer; selectively depositing a subsequent silicon film layer on the first silicon nitride film layer; and nitriding the subsequent silicon film layer to form a multilayer conformal silicon nitride film disposed directly on the non-oxide silicon surface of the substrate.

[0006] In yet another embodiment, a method for selectively depositing a bulk conformal silicon nitride film on a surface of a substrate is provided, the method including: providing a substrate including a silicon oxide surface and a non-oxide silicon surface; performing a selective thermal CVD process for a time period of about 1 minute to about 4 minutes to selectively deposit a silicon film layer on the non-oxide silicon surface of the substrate; performing a plasma nitridation treatment of the silicon film layer to form a silicon nitride film layer; performing the selective thermal CVD process to selectively deposit a silicon film layer on the silicon nitride film layer; performing a plasma nitridation treatment of the silicon film layer to form a silicon nitride film layer; and repeating the selective thermal CVD process and the plasma nitridation process 10 to 1000 times to obtain a bulk conformal silicon nitride film.

[0007]

[0007] In order that the above-mentioned features of the present disclosure may be understood in detail, the above-summarized embodiments will be more particularly described with reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings merely illustrate typical embodiments of the present disclosure and therefore should not be considered as limiting the scope of the present disclosure, which may also admit of other equally effective embodiments. [Brief explanation of the drawings]

[0008] [Figure 1]3 is a schematic diagram of a processing system that can be used to implement the method shown in FIG. 2, according to certain embodiments of the present disclosure. [Figure 2] FIG. 1 is a flow diagram illustrating a method for selectively depositing a conformal silicon nitride film on a surface of a substrate, in accordance with certain embodiments of the present disclosure. [Figure 3A] 3 is a cross-sectional view illustrating a conformal silicon nitride film being formed by the method of FIG. 2 in accordance with certain embodiments of the present disclosure. [Figure 3B] 3 is a cross-sectional view illustrating a conformal silicon nitride film being formed by the method of FIG. 2 in accordance with certain embodiments of the present disclosure. [Figure 3C] 3 is a cross-sectional view illustrating a conformal silicon nitride film being formed by the method of FIG. 2 in accordance with certain embodiments of the present disclosure. [Figure 3D] 3 is a cross-sectional view illustrating a conformal silicon nitride film being formed by the method of FIG. 2 in accordance with certain embodiments of the present disclosure. [Figure 3E] 3 is a cross-sectional view illustrating a conformal silicon nitride film being formed by the method of FIG. 2 in accordance with certain embodiments of the present disclosure. [Figure 3F] 3 is a cross-sectional view illustrating a conformal silicon nitride film being formed by the method of FIG. 2 in accordance with certain embodiments of the present disclosure. [Figure 4] 1 is a graph showing deposition incubation delay for amorphous silicon deposition on an oxidized silicon surface. DETAILED DESCRIPTION OF THE INVENTION

[0009]

[0012] To facilitate understanding, wherever possible, the same reference numerals have been used to designate identical elements common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

[0010]

[0013] Embodiments of the present disclosure generally relate to an apparatus and method for depositing thin films for forming structures on a substrate. To enable a thorough understanding of the various embodiments of the present disclosure, specific details are set forth in the following description and in FIGS. 1-4. Other details describing well-known methods and systems often associated with thin film deposition are not set forth in the following disclosure so as to avoid unnecessarily obscuring the description of the various embodiments.

[0011]

[0014] Many of the details, components, and other features described herein are merely illustrative of particular embodiments. Thus, other embodiments may have other details, components, and features without departing from the spirit or scope of the present disclosure. Additionally, further embodiments of the present disclosure may be implemented without some of the details described below.

[0012]

[0015] The embodiments described herein will be explained below with reference to a PECVD process that can be implemented using any suitable thin film deposition system. Examples of suitable systems include the Precision™ system commercially available from Applied Materials, Inc. of Santa Clara, California. Other tools capable of performing the PECVD process can also be adapted to benefit from the embodiments described herein. Additionally, any system enabling the PECVD process described herein can be advantageously used. The description of the apparatus herein is illustrative and should not be regarded or construed as limiting the scope of the embodiments described herein.

[0013]

[0016] 1 is a schematic diagram of an exemplary substrate processing system 132 suitable for performing a deposition process in accordance with at least one embodiment. A suitable chamber is available from Applied Materials, Inc., located in Santa Clara, California. It should be understood that the system described below is an exemplary processing chamber, and that other chambers, including chambers from other manufacturers, may be used or modified to accomplish embodiments of the present disclosure (e.g., method 200 described below). In some embodiments, the substrate processing system 132 may be configured to deposit thin films on a substrate using a chemical vapor deposition process.

[0014]

[0017] The substrate processing system 132 includes a process chamber 100 coupled to a gas panel 130 and a controller 110. The process chamber 100 generally includes a top wall 124, a sidewall 101, and a bottom wall 122 that define a processing region 126. A substrate support assembly 146 is disposed in the processing region 126 of the process chamber 100. The substrate support assembly 146 generally includes an electrostatic chuck 150 supported by a stem 160. The electrostatic chuck 150 may typically be fabricated from aluminum, ceramic, and other suitable materials. The electrostatic chuck 150 may be vertically moved within the process chamber 100 using a displacement mechanism (not shown).

[0015]

[0018] A vacuum pump 102 is connected to a port formed in the bottom wall 122 of the process chamber 100. The vacuum pump 102 is used to maintain a desired gas pressure within the process chamber 100. The vacuum pump 102 also evacuates post-process gases and by-products from the process chamber 100.

[0016]

[0019] The substrate processing system 132 may further include additional equipment for controlling the chamber pressure, such as valves (e.g., throttle valves and shut-off valves) positioned between the process chamber 100 and the vacuum pump 102 to control the chamber pressure.

[0017]

[0020] A gas distribution assembly 120 having a plurality of apertures 128 is disposed at the top of the process chamber 100 above the electrostatic chuck 150. The apertures 128 of the gas distribution assembly 120 are used to introduce process gases into the process chamber 100. The apertures 128 may have different sizes, numbers, distributions, shapes, designs, and diameters to facilitate the flow of various process gases for different process requirements. The gas distribution assembly 120 is coupled to a gas panel 130, which allows various gases to be supplied to the processing region 126 during processing. A plasma is formed from the process gas mixture exiting the gas distribution assembly 120 to promote decomposition of the process gases, resulting in material deposition on the surface 191 of the substrate 190. In some embodiments, the gas distribution assembly 120 is a concave or dome-shaped gas plate with a plurality of apertures 128 formed therethrough.

[0018]

[0021] In one embodiment, the gas panel 130 contains precursor gases, such as silicon-containing gases, for forming films on substrates 190 supported on the substrate support assembly 146. In some embodiments, the silicon-containing gas is silane (SiH), disilane (SiH), trisilane (SiH), or other higher silanes, such as tetrasilane (SiH). 10 ) or combinations thereof, but are not limited to: tetrasilane (SiH 10 Higher silanes such as silanes (e.g., methylsilanes), which may be in liquid form rather than gaseous form, can be delivered to the process chamber 100 using a carrier gas such as argon gas or nitrogen gas.

[0019]

[0022] The gas distribution assembly 120 may be coupled to a remote plasma source (not shown). The remote plasma source may be a capacitively coupled plasma source or an inductively coupled plasma source. The remote plasma source may also be coupled to a cleaning gas source for supplying cleaning gas to a processing region 126 formed within the process chamber 100. In one embodiment, the cleaning gas is supplied through a central conduit formed axially through the top wall 124 of the process chamber 100. In another embodiment, the cleaning gas is supplied through the same plurality of apertures 128 that direct the flow of precursor gases. Exemplary cleaning gases include oxygen-containing gases, such as oxygen and / or ozone, and fluorine-containing gases, such as NF3, or combinations thereof.

[0020]

[0023] In addition to or as an alternative to a remote plasma source, the gas distribution assembly 120 is also coupled to a first or upper radio frequency (RF) power source 140. In other words, the gas distribution assembly 120 and the electrostatic chuck 150 may form a pair of spaced-apart electrodes within the processing region 126. One or more RF power sources supply a bias potential to the gas distribution assembly 120 through an optional matching network 138 to facilitate the generation of a plasma between the gas distribution assembly 120 and the electrostatic chuck 150. Alternatively, the RF power source 140 and the matching network 138 may be coupled to the gas distribution assembly 120, the electrostatic chuck 150, or both the gas distribution assembly 120 and the electrostatic chuck 150, or may be coupled to an antenna (not shown) located outside the process chamber 100. The first RF power source 140 facilitates the maintenance or generation of a plasma, such as a plasma generated from a cleaning gas. In one embodiment, the remote plasma source is omitted, and the cleaning gas may be ionized in situ into a plasma via the first RF power source 140. The substrate support assembly 146 may be coupled to a second or lower RF power source (not shown). In some embodiments, the RF power source may generate power at a frequency of 350 KHz, 2 MHz, 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, 100 MHz, or 120 MHz. For example, the first RF power source 140 may generate power at a frequency of about 13.56 MHz to about 120 MHz, and the second RF power source may be a low-frequency (e.g., about 2 MHz to about 13.56 MHz) RF power source. Note that other frequencies are also contemplated. In some embodiments, the second RF power source may be a mixed-frequency RF power source that provides both high-frequency and low-frequency power. Using a dual-frequency RF power source, particularly the second RF power source, improves film deposition. In some embodiments, a second RF power source is used to provide dual frequency power, where a first frequency, e.g., from about 2 MHz to about 13.56 MHz, improves species implantation into the deposited film, and a second frequency, e.g., from about 13.56 MHz to about 120 MHz, increases ionization and deposition rates.

[0021]

[0024] One or both of the first RF power source 140 and the second RF power source can be utilized to generate or maintain a plasma within the processing region 126. For example, the second RF power source can be used during a silicon nitridation process, and the first RF power source 140 can be used during a cleaning process (alone or in combination with a remote plasma source). In some nitridation processes, the first RF power source 140 is used in combination with the second RF power source. During the nitridation process, one or both of the first RF power source 140 and the second RF power source can provide power, for example, from about 100 watts (W) to about 20,000 W, within the processing region 126 to promote ionization of the precursor gas. In some embodiments, at least one of the first RF power source 140 and the second RF power source is pulsed.

[0022]

[0025] The substrate support assembly 146 may include a heater element 170, such as a resistive element, embedded therein. The heater element 170 is coupled to a power supply 106, which is regulated by the controller 110 to control the heat generated by the heater element 170. The heater element 170 may be disposed within the substrate support assembly 146 and may be used to controllably heat a substrate 190 positioned on an upper surface of the substrate support assembly 146 and the electrostatic chuck 150 to a predetermined temperature, for example, between about 50° C. and about 600° C. A temperature sensor 172, such as a thermocouple, may be embedded in the electrostatic chuck 150 to monitor the temperature of the electrostatic chuck 150 in a conventional manner. The measured temperature is used by the controller 110 to control the power supplied to the heater element 170 to maintain the substrate at a desired temperature.

[0023]

[0026] The controller 110 includes a central processing unit (CPU) 112, memory 116, and support circuits 114 used to control process sequences and regulate gas flow from the gas panel 130. The CPU 112 may be any form of general-purpose computer processor that may be used in an industrial environment. Software routines may be stored in the memory 116, such as random access memory, read-only memory, floppy or hard disk drive, or other form of digital storage. The support circuits 114 are conventionally coupled to the CPU 112 and may include cache, clock circuits, input / output systems, power supplies, etc. Bidirectional communication between the controller 110 and the various components of the substrate processing system 132 is handled through a number of signal cables collectively referred to as a signal bus 118, some of which are illustrated in FIG. 1 .

[0024]

[0027] Other deposition chambers can also benefit from the present disclosure, and the above parameters can vary depending on the particular deposition chamber used to form the amorphous silicon and conformal silicon nitride films. For example, other deposition chambers may have larger or smaller areas and may employ gas flow rates greater or less than those described for deposition chambers available from Applied Materials, Inc. Additionally, while a PECVD chamber is described above, it is contemplated that a thermal CVD chamber can be used in embodiments of the present disclosure.

[0025]

[0028] 2 is a flow diagram of an exemplary method 200 for forming a conformal silicon nitride film on a substrate using the process chamber 100 shown in FIG. 1 , according to certain embodiments described herein. In an embodiment, the method 200 begins in step 202 by positioning a substrate, such as the substrate 302 shown in FIG. 3 , in the interior processing region 126 of the process chamber 100 for processing. In an embodiment, the substrate, e.g., the substrate 302, is transferred onto the substrate support assembly 146 within the process chamber 100 by any suitable means, such as a substrate transfer port (not shown) on the sidewall 101. The substrate support assembly 146 may be adjusted to a processing position by a lift actuator (not shown). The substrate 190 may be secured to the substrate support assembly 146 by an electrostatic chuck 150.

[0026]

[0029] In the example shown in Figure 3A, the substrate 302 has a silicon oxide surface 306 and a non-silicon oxide surface (e.g., feature) 304. Examples of non-silicon oxide surfaces include, but are not limited to, silicon, silicon nitride, and carbon. In step 204, a first deposition process is performed on the substrate 302 in the process chamber 100 to selectively deposit a first amorphous silicon layer 310 on the non-silicon oxide surface 304 of the substrate, as shown in Figure 3B.

[0027]

[0030] In an embodiment, the process chamber 100 may be a plasma-enhanced chemical vapor deposition (PECVD) chamber, as shown in FIG. 1 . The first amorphous silicon layer 310 may be deposited on the non-oxide silicon surface 304 of the substrate using a thermal CVD process, for example, in a thermal CVD chamber or a PECVD chamber. Note that performing the thermal process in a PECVD chamber allows subsequent plasma-based processes to be performed on the substrate without the need to transfer the substrate to another chamber, thereby improving throughput. The thermal CVD process for depositing the first amorphous silicon layer 310 includes flowing a silicon-containing precursor gas from the gas panel 130 into the interior processing region 126 of the process chamber 100. In an embodiment, the silicon-containing precursor gas for forming the first amorphous silicon layer 310 may include silane, disilane, trisilane, tetrasilane, higher silanes, or any combination thereof. In an embodiment, the thermal CVD process is performed for about 1 minute to about 4 minutes, and about 2 minutes to about 3 minutes. The source-containing precursor gas is supplied to the processing region 126 through, for example, a plurality of apertures 128 such that the source-containing precursor gas is uniformly distributed in the processing region 126 .

[0028]

[0031] The source-containing precursor gas can then be pyrolyzed in the internal processing region 126 to deposit a first amorphous silicon layer 310 on the non-oxidized silicon surface 304 of the substrate. The first amorphous silicon layer 310 is selectively deposited on the non-oxidized silicon surface 304 of the substrate over the silicon oxide surface 306 of the substrate. This method takes advantage of the difference in silicon deposition nucleation time required for various surface compositions. Comparing the various nucleation rates of silicon on non-oxidized silicon surfaces with those on silicon oxide surfaces, it has been found that deposition using a silane precursor gas requires a longer nucleation time for silicon to begin growing on the silicon oxide surface than on the non-oxidized silicon surface. By using a substrate that includes both silicon oxide and non-oxidized silicon surfaces, the difference in silicon deposition nucleation time can be exploited to selectively deposit amorphous silicon on the non-oxidized silicon surface.

[0029]

[0032] In depositing the first amorphous silicon layer 310, the temperature of the substrate support assembly 146 in the process chamber 100 can be set at about 50° C. to about 600° C., for example, about 50° C. to about 60° C. when tetrasilane is used as the source-containing precursor gas, or about 400° C. to about 600° C. when a lower silane is used as the source-containing precursor gas, and the pressure in the chamber can be about 10 mTorr to about 760 Torr, for example, about 300 Torr, during the thermal deposition process. The flow rate of the source-containing precursor gas is about 3 sccm to about 3000 sccm. The as-deposited amorphous silicon layer may have a thickness of about 2 Å to about 5000 Å, e.g., about 2 Å to about 4000 Å, or about 2 Å to about 3000 Å, or about 2 Å to about 2000 Å, or about 2 Å to about 1000 Å, or about 2 Å to about 500 Å, or about 2 Å to about 250 Å, or about 5 Å to about 100 Å, or about 5 Å to about 50 Å, or about 5 Å to about 25 Å, or about 5 Å to about 10 Å.

[0030]

[0033] In step 206, an amorphous silicon nitridation process is performed on the substrate 302 in the process chamber 100 to treat the first amorphous silicon layer 310 and convert it to a first silicon nitride layer 314. The nitridation process is achieved by a plasma-based nitridation process. In an embodiment, the plasma-based nitridation process includes performing radical nitridation within the processing region 126 of the process chamber 100 using a plasma source (not shown). The silicon nitridation performed using a plasma process can treat the amorphous silicon layer to form a conformal silicon nitride layer having a thickness of about 5 Å to about 60 Å. The thickness of the amorphous silicon layer is selected to achieve a predetermined conversion to the nitride layer, for example, greater than 99% nitridation. Controlled deposition of the amorphous silicon layer within the limits of the silicon nitridation process results in optimal conversion of the amorphous silicon layer entirely to a conformal silicon nitride layer. If the thickness of the amorphous silicon layer exceeds the limit of the silicon nitridation process, the amorphous silicon layer that exceeds the limit will remain as amorphous silicon and a silicon nitride layer will be placed on top.

[0031]

[0034] The plasma-based nitridation process includes flowing a nitrogen-containing process gas, including, but not limited to, N2, NH3, hydrazine (N2H4), or combinations thereof, into the processing region 126 to generate a plasma. In some embodiments, the nitrogen-containing process gas can be combined with argon or other inert gases. In other embodiments, the nitrogen-containing process gas further includes hydrogen gas (H2). The plasma can be generated by introducing the process gas into the processing region 126 and applying a voltage to the process gas to ignite the plasma. Typically, the RF power generated to ignite or sustain the plasma can be from about 50 W to about 10 kW when processing a 300 mm substrate, although other power levels are also contemplated, such as from about 50 W to about 100 W, or from about 1 kW to about 1.5 kW, or from about 1 kW to about 3 kW, or from about 1 kW to about 5 kW, or from about 2 kW to about 6 kW, or from about 3 kW to about 8 kW, or from about 5 kW to about 10 kW.

[0032]

[0035] When the plasma is ignited, radical nitrogen-containing species formed from the nitrogen-containing process gas flow around the processing region 126 and react with the first amorphous silicon layer 310. Such radical nitrogen-containing species may include N and / or NH, e.g., N· and / or NH·. During the nitridation process, the radical nitrogen-containing species saturate at the surface of the first amorphous silicon layer 310. The radical nitrogen-containing species react with silicon atoms in the first amorphous silicon layer 310, converting them to silicon nitride (SiN). The reaction of the radical nitrogen-containing species with the silicon atoms in the first amorphous silicon layer 310 forms a first silicon nitride layer 314, as shown in FIG. 3C.

[0033]

[0036] In step 206, the temperature of the substrate 190 is about 100° C. to about 650° C., e.g., about 150° C. to about 650° C., and / or the pressure is about 0.025 Torr (25 milliTorr (mTorr)) to about 5 Torr, e.g., about 0.050 Torr (50 mTorr) to about 2 Torr. However, other temperatures and pressures are contemplated. The RF power can be controlled between about 100 Watts and about 800 Watts, e.g., about 400 Watts. A plasma-forming gas, e.g., N2 gas, is supplied at about 1000 sccm to about 5000 sccm, e.g., about 2000 sccm. In another embodiment, NH3 plasma-forming gas can be supplied at about 500 sccm to about 2000 sccm, e.g., about 1000 sccm.

[0034]

[0037] In step 208, steps 204 and 206 are repeatedly performed on the substrate 302 in the process chamber 100 to selectively deposit a second amorphous silicon layer 316 on the first silicon nitride layer 314, as shown in FIG. 3D . The second amorphous silicon deposition process can be performed using the same conditions outlined above for the deposition of the first amorphous silicon layer 310, by selectively depositing the second amorphous silicon on the non-oxidized silicon surface, i.e., the resulting first silicon nitride layer 314. In some embodiments, the deposition conditions for the second amorphous silicon layer, including but not limited to the temperature and pressure in the deposition chamber, can be different from the conditions used to deposit the first amorphous silicon layer 310. A second amorphous silicon nitridation process is performed to treat the second amorphous silicon layer 316 and convert it into a second silicon nitride layer 318. The second amorphous silicon nitride process can be carried out using the same conditions as outlined above for forming the first amorphous silicon nitride layer. In some embodiments, the conditions for forming the second amorphous silicon nitride layer, including but not limited to, temperature, pressure, RF power, and flow rate, can be different from the conditions used to form the first amorphous silicon nitride layer.

[0035]

[0038] Deposition of an amorphous silicon layer and subsequent nitridation of the amorphous silicon layer can be repeated to obtain multiple silicon nitride layers. In some embodiments, each silicon nitride layer is fused to the subsequent layer to form a single silicon nitride layer. In other embodiments, multiple silicon nitride layers are arranged in a stacked manner, as shown in FIG. 3E. In some embodiments, each cycle of deposition of an amorphous silicon layer and subsequent nitridation results in a silicon nitride layer having a thickness of about 10 angstroms. The deposition of an amorphous silicon layer and subsequent nitridation of the amorphous silicon layer can be repeated until the desired silicon nitride layer thickness is achieved. Deposition of an amorphous silicon layer and subsequent nitridation of the amorphous silicon layer to form the final nitride layer 340 of FIG. 3F. Any of the following numbers of repetitions may be performed: 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 110, 120, 130, 140, 150, 160, 170, 180, 190, 200, 300, 400, 500, 600, 700, 800, 900, and 1000 times, or fewer or more repetitions may be performed.

[0036]

[0039] Figure 4 illustrates the difference in silicon deposition nucleation rate between oxidized silicon surfaces and non-oxidized silicon surfaces, e.g., silicon surfaces. The initial nucleation deposition rate of amorphous silica on oxidized silicon surfaces is zero, and this zero deposition rate increases after about 4 minutes. In contrast, the initial nucleation deposition rate of amorphous silicon on silicon surfaces (i.e., non-oxidized silicon surfaces) is greater than zero. While amorphous silicon deposition occurs on non-oxidized silicon surfaces, its deposition on oxidized silicon surfaces is delayed. The difference in initial nucleation deposition rate can be exploited to selectively deposit amorphous silicon on non-oxidized silicon surfaces, e.g., silicon surfaces.

[0037]

[0040] In summary, several advantages of some embodiments of the present disclosure provide a method for achieving selective deposition of a conformal silicon nitride film. The conformal silicon nitride film can include a single silicon nitride layer or multiple silicon nitride layers. Using aspects described herein, it has been discovered that, in certain embodiments, a conformal silicon nitride layer can be formed on the surface of a substrate by using the amorphous silicon deposition and subsequent silicon nitridation processes disclosed herein. In embodiments, the silicon deposition and subsequent silicon nitridation processes disclosed herein can be performed in situ within the same process chamber 100, eliminating the need for substrate transfer and the use of expensive cluster systems. Furthermore, because the deposition processes employed herein use low-cost silicon precursor gases, such as silane and disilane, and low-cost nitrogen gases, such as nitrogen and ammonia, the total cost of silicon nitride deposition is lower than other deposition methods that use higher-cost materials.

[0038]

[0041] When introducing elements of the disclosure or exemplary aspects or embodiment(s) thereof, the articles "a," "an," "the," and "said" are intended to mean that there are one or more of the element.

[0039]

[0042] The terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements other than the listed elements.

[0040]

[0043] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure may be devised without departing from the basic scope thereof as determined by the following claims.

Claims

1. 1. A method for selectively depositing a conformal silicon nitride film on a surface of a substrate, comprising: providing a substrate comprising a silicon oxide surface and a non-silicon oxide surface; depositing a first silicon film layer on the non-oxidized silicon surface of the substrate for a time period of about 1 minute to about 4 minutes; nitriding the first silicon film layer to form a first silicon nitride film layer; A method comprising:

2. The method of claim 1 further comprising depositing a second silicon film layer on the first silicon nitride film layer.

3. 3. The method of claim 2, further comprising nitriding the second silicon film layer to form a second silicon nitride film layer.

4. The method of claim 1 , wherein depositing the first silicon film layer comprises depositing the first silicon film layer by a CVD process.

5. 5. The method of claim 4, wherein the CVD process uses silane gas as a silicon source.

6. The silane gas is SiH ４ , Si ２ H ６ , Si ３ H ８ , Si ４ H １０ or a combination thereof.

7. 2. The method of claim 1, wherein the time period is between 2 and 3 minutes.

8. The nitriding of the first silicon film layer includes ２ , N.H. ３ , N ２ H ４ 10. The method of claim 1, further comprising treating the first silicon film layer with a nitrogen plasma comprising:

9. The method of claim 1 , wherein the non-oxidized silicon surface is selected from the group consisting of silicon, silicon nitride, and carbon.

10. 1. A method for selectively depositing a multilayer conformal silicon nitride film on a surface of a substrate, comprising: providing a substrate comprising a silicon oxide surface and a non-silicon oxide surface; selectively depositing a first silicon film layer on the non-oxidized silicon surface of the substrate for a time period of about 1 minute to about 4 minutes; nitriding the first silicon film layer to form a first silicon nitride film layer; Selectively depositing a subsequent silicon film layer on the first silicon nitride film layer; nitriding the subsequent silicon film layer to form a multilayer conformal silicon nitride film disposed directly on the non-oxidized silicon surface of the substrate; A method comprising:

11. The method of claim 10 , wherein depositing the first silicon film layer comprises depositing the first silicon film layer by a CVD process.

12. The method of claim 11 , wherein the CVD process uses silane gas as a silicon source.

13. The silane gas is SiH ４ , Si ２ H ６ , Si ３ H ８ , Si ４ H １０ or a combination thereof.

14. 11. The method of claim 10, wherein nitriding the first silicon film layer comprises treating the first silicon film layer with a nitrogen plasma.

15. The nitrogen plasma includes a source gas, and the source gas is N ２ , N.H. ３ , N ２ H ４ or a combination thereof.

16. 11. The method of claim 10, wherein the non-oxidized silicon surface is selected from the group consisting of silicon, silicon nitride, and carbon.

17. 1. A method for selectively depositing a bulk conformal silicon nitride film on a surface of a substrate, comprising: providing a substrate comprising a silicon oxide surface and a non-silicon oxide surface; conducting a selective thermal CVD process for a time period of about 1 minute to about 4 minutes to selectively deposit a silicon film layer on the non-oxidized silicon surface of the substrate; performing a plasma nitridation treatment of the silicon membrane layer to form a silicon nitride membrane layer; performing a selective thermal CVD process to selectively deposit a silicon film layer on the silicon nitride film layer; performing a plasma nitridation treatment of the silicon membrane layer to form a silicon nitride membrane layer; Repeating the selective thermal CVD process and plasma nitridation process 10 to 1000 times to obtain a bulk conformal silicon nitride film. A method comprising:

18. The selective CVD process uses SiH as the silicon source. ４ , Si ２ H ６ , Si ３ H ８ , Si ４ H １０ 18. The method of claim 17, wherein a silane gas selected from the group consisting of:

19. The plasma nitridation process is ２ , N.H. ３ , N ２ H ４ 18. The method of claim 17, wherein the nitrogen source gas is selected from the group consisting of:

20. 18. The method of claim 17, wherein the non-oxidized silicon surface is selected from the group consisting of silicon, silicon nitride, and carbon.

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