Semiconductor device manufacturing method and substrate processing apparatus

Abstract

To provide a semiconductor device manufacturing method and a substrate processing apparatus capable of performing etching while maintaining the film formation temperature when a silicon film is deposited in a concave portion by repeating film formation and etching.SOLUTION: A semiconductor device manufacturing method includes the steps of supplying a silicon-containing gas to a substrate provided with a recess on its surface at a predetermined film formation temperature to form a silicon film in the recess, supplying chlorine and hydrogen to the substrate while maintaining the predetermined film formation temperature to etch the silicon film deposited in the recess to widen the opening width of the silicon film, and supplying the silicon-containing gas to the substrate while maintaining the predetermined substrate temperature to further deposit a silicon film on the silicon film in the recess.SELECTED DRAWING: Figure 10

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a semiconductor device and a substrate processing apparatus. [Background technology]

[0002] Conventionally, a method for manufacturing a semiconductor device has been known in which the steps of supplying a film-forming gas containing silicon to a workpiece having a recess formed on its surface to form a silicon film in the recess, supplying a process gas containing a halogen gas for etching the silicon film and a roughness suppressing gas for suppressing roughness of the surface of the silicon film after etching with the halogen gas to the workpiece, and further providing a ground energy to the process gas to activate it and perform etching, thereby widening the opening width of the recess, are repeated to fill the recess with a silicon film (see, for example, Patent Document 1). This filling method is called a Deposition Etch Deposition (DED) process, since deposition and etching are repeated. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2017-228580 A Summary of the Invention [Problem to be solved by the invention]

[0004] Provided is a manufacturing method for a semiconductor device and a substrate processing apparatus that, when depositing a silicon film in a recess by repeating film formation and etching, can perform etching while maintaining the film formation temperature. [Means for solving the problem]

[0005] In order to achieve the above object, a method for manufacturing a semiconductor device according to one aspect of the present disclosure includes the steps of: supplying a silicon-containing gas to a substrate having a recess on a surface thereof at a predetermined film formation temperature to form a silicon film in the recess; The substrate is then heated to a temperature of 1000.degree. gas and hydrogen gas and etching the silicon film deposited in the recess to widen an opening width of the silicon film. supplying the silicon-containing gas to the substrate while maintaining the predetermined substrate temperature, and depositing a silicon film on the silicon film in the recess. death, In the step of widening the opening width of the silicon film, the chlorine gas and the hydrogen gas are supplied to the substrate so that the ratio of the flow rate of the hydrogen gas to the flow rate of the chlorine gas is 1 / 10 or more. . Effect of the Invention

[0006] According to the present invention, in the DED process, etching can be performed without lowering the film formation temperature. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 illustrates a substrate processing apparatus according to an embodiment of the present disclosure. [Diagram 2] 3A to 3C are diagrams showing examples of shapes of recesses formed on the surface of a wafer W. [Diagram 3] FIG. 1 illustrates an example of a typical conventional DED process. [Figure 4] 1A to 1C are diagrams for explaining problems that arise when embedding a pattern in a general DED process. [Diagram 5] 5 is a diagram showing a temperature change in the processing chamber when the DED process shown in FIG. 4 is performed. [Figure 6] 1A to 1C are diagrams illustrating an example of a DED process in a manufacturing method for a semiconductor device according to an embodiment of the present disclosure. [Figure 7] 1A to 1C are diagrams illustrating a specific implementation method of the semiconductor device manufacturing method according to the present embodiment. [Figure 8]FIG. 1 is a diagram for explaining the reason why the etching rate decreases by adding hydrogen to chlorine. [Figure 9] FIG. 11 is a diagram for explaining a second reason why the etching rate decreases by adding hydrogen to chlorine. [Figure 10] 1A to 1C are diagrams showing a series of processes in a method for manufacturing a semiconductor device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0009] FIG. 1 is a diagram showing a substrate processing apparatus according to an embodiment of the present disclosure. In this embodiment, an example in which the substrate processing apparatus is configured as a vertical heat processing apparatus will be described. Note that the substrate processing apparatus according to the present disclosure is not limited to a vertical heat processing apparatus, and can be applied to various substrate processing apparatuses capable of alternately performing film formation and etching. Applicable substrate processing apparatuses include single-wafer substrate processing apparatuses and semi-batch substrate processing apparatuses. In this embodiment, an example in which the substrate processing apparatus is configured as a vertical heat processing apparatus will be described.

[0010] The vertical thermal processing apparatus performs a DED process to form logic elements of a semiconductor device on a substrate, a wafer W. In other words, a film formation process and an etching process are performed on the wafer W. The film formation process is a process using thermal CVD (Chemical Vapor Deposition), and the etching process is a reactive gas etching process performed by supplying thermal energy to an etching gas.

[0011] The logic elements to be manufactured include, in addition to conventionally manufactured logic elements, logic elements using FinFETs, which are the next generation transistors after MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), for example.

[0012] The vertical heat treatment apparatus includes a reaction tube 11, which is a substantially cylindrical vacuum vessel with its longitudinal direction oriented vertically. The reaction tube 11 has a double-tube structure consisting of an inner tube 12 and an outer tube 13 with a ceiling that covers the inner tube 12 and is formed to have a certain distance from the inner tube 12. The inner tube 12 and the outer tube 13 are made of a heat-resistant material, for example, quartz. The reaction tube 11 may be called a processing chamber because it forms a closed space in which substrates are processed.

[0013] A cylindrical manifold 14 made of stainless steel (SUS) is disposed below the outer tube 13. The manifold 14 is airtightly connected to the lower end of the outer tube 13. The inner tube 12 protrudes from the inner wall of the manifold 14 and is supported by a support ring 15 formed integrally with the manifold 14.

[0014] A lid 16 is disposed below the manifold 14, and the lid 16 can be raised and lowered between an upper position and a lower position by the boat elevator 10. FIG. 1 shows the lid 16 in the upper position, and in this upper position, the lid 16 closes an opening 17 of the reaction tube 11 below the manifold 14, making the inside of the reaction tube 11 airtight. A wafer boat 3 made of, for example, quartz is placed on the lid 16. The wafer boat 3 is configured to hold a number of wafers W to be processed as substrates horizontally at a predetermined interval in the vertical direction. A heat insulator 18 is provided around the reaction tube 11 so as to surround the reaction tube 11, and a heater 19 made of, for example, a resistance heating element, which is a heating unit, is provided on the inner wall surface of the heat insulator 18, which can heat the inside of the reaction tube 11.

[0015] In the manifold 14, a process gas introduction pipe 21 and a purge gas introduction pipe 31 are inserted below the support ring 15, and the downstream ends of the gas introduction pipes 21 and 31 are arranged so as to supply gas to the wafer W in the inner pipe 12. For example, the upstream side of the process gas introduction pipe 21 branches to form branch paths 22A to 22E, and the upstream ends of the branch paths 22A to 22E are connected to a diisopropylaminosilane (DIPAS) gas supply source 23A, a disilane (Si2H6) gas supply source 23B, a monoaminosilane (SiH4) gas supply source 23C, a chlorine (Cl2) gas supply source 23D, and a hydrogen (H2) gas supply source 23E. Gas supply mechanisms 24A to 24E are respectively provided in the branch paths 22A to 22E. The gas supply mechanisms 24A to 24E each include a valve and a mass flow controller, and are configured to be able to control the flow rate of the process gas supplied to the process gas introduction pipe 21 from the gas supply sources 23A to 23E, respectively.

[0016] The DIPAS gas is a seed layer formation gas for forming a first seed layer on the surface of a silicon oxide film formed on the surface of the wafer W, and the gas supply source 23A and the gas supply mechanism 24A constitute a DIPAS gas supply unit.

[0017] The Si2H6 gas is a seed layer forming gas for forming a second seed layer on the surface of the first seed layer, and the gas supply source 23B and the gas supply mechanism 24B constitute a Si2H6 (disilane) gas supply unit.

[0018] The DIPAS gas supply unit and the disilane gas supply unit are gas supply units for forming a seed layer, and therefore may be called a seed layer forming gas supply unit.

[0019] In this embodiment, an example is described in which two types of gases for forming a seed layer are used, but any one of the gases for forming a seed layer may be used. In addition, when forming a film on a wafer W on which a seed layer has already been formed, the seed layer forming gas supply unit may not be required. Furthermore, even when the seed layer forming gas supply unit is used, gases other than DIPAS gas and Si2H6 gas may be used. In this way, the DIPAS gas supply unit and disilane gas supply unit, which are given as examples, and the seed layer forming gas supply unit may be provided as necessary.

[0020] The SiH4 gas is a film-forming gas for forming a silicon (Si) film on the wafer W, and the gas supply source 23C and the gas supply mechanism 24C constitute a silicon-containing gas supply unit. Since the silicon-containing gas is a gas used in film formation, the silicon-containing gas supply unit may be called a film-forming gas supply unit.

[0021] Cl2 gas is an etching gas for etching the Si film, and the gas supply source 23D and the gas supply mechanism 24D constitute a chlorine gas supply unit. H2 gas is an additive gas for weakening the etching power of the etching gas, and the gas supply source 23E and the gas supply mechanism 24E constitute a hydrogen gas supply unit. Since chlorine gas and hydrogen gas are supplied simultaneously as etching gas, the chlorine gas supply unit and the hydrogen gas supply unit may be collectively called an etching gas supply unit.

[0022] The upstream side of the purge gas introduction pipe 31 is connected to a supply source 32 of nitrogen (N2) gas, which is a purge gas. A gas supply mechanism 33 is provided in the purge gas introduction pipe 31. The gas supply mechanism 33 is configured similarly to the gas supply mechanisms 24A to 24E, and controls the flow rate of the purge gas to the downstream side of the introduction pipe 31.

[0023] Further, the manifold 14 has an exhaust port 25 opening on a side surface above the support ring 15, and exhaust gas generated in the inner tube 12 is exhausted to the exhaust port 25 through a space formed between the inner tube 12 and the outer tube 13. An exhaust pipe 26 is airtightly connected to the exhaust port 25. A valve 27 and a vacuum pump 28 are installed in the exhaust pipe 26 from its upstream side in this order. By adjusting the opening of the valve 27, the pressure inside the reaction tube 11 is controlled to a desired pressure.

[0024] The vertical heat treatment apparatus is provided with a control unit 30 configured by a computer, and the control unit 30 is provided with a program. This program is structured with a group of steps so that a series of processing operations described below can be performed on the wafer W by outputting control signals to each part of the vertical heat treatment apparatus 1 to control the operation of each part. Specifically, control signals are output so that the boat elevator 10 raises and lowers the lid 16, the output of the heater 19 (i.e., the temperature of the wafer W), the opening of the valve 27, the supply flow rate of each gas into the reaction tube 11 by the gas supply mechanisms 24A to 24C and 33, and the like are controlled. This program is stored in the control unit 30 in a state of being stored in a storage medium such as a hard disk, a flexible disk, a compact disk, a magnet optical disk (MO), or a memory card.

[0025] Fig. 2 is a diagram showing an example of the shape of a recess formed on the surface of a wafer W. As shown in Fig. 2, a silicon (Si) layer 41 is provided on the surface of the wafer W. The surface of the Si layer 41 is oxidized to form a silicon oxide film 43. A recess 42 having a depth D and an opening width S is also formed. The recess 42 is formed as, for example, a trench or a through hole, but any shape is acceptable as long as it is a recessed shape.

[0026] 2, the aspect ratio of the recess 42 is D / S. The aspect ratio of the recess is, for example, 2 or more.

[0027] First, a general method for filling a silicon film into a recess 42 as shown in FIG. 2 by applying a DED process will be described.

[0028] FIG. 3 is a diagram showing an example of a typical conventional DED process.

[0029] 3(a) is a diagram showing a seed layer formation process for forming a seed layer 44 on the surface of a wafer W having a recess 42 on the surface. In the seed layer formation process, a thin silicon film is formed as the seed layer 44 on the surface of a silicon oxide film 43 on the surface. To form the seed layer 44, for example, Si2H6 is used as a film formation gas.

[0030] 3(b) is a diagram showing the first film formation process. In the first film formation process, for example, SiH4 gas is used as a film formation gas, and a silicon film 45 is formed on the surface of the wafer W and deposited in the recess 42.

[0031] 3(c) is a diagram showing an example of an etching process. In the etching process, the formed silicon film 45 is etched to widen the opening width so that the upper end is not blocked. Then, a V-shaped cross section is formed in the silicon film 45.

[0032] 3(d) shows the second film formation process. In the second film formation process, a new silicon film 45a is deposited on the V-shaped silicon film 45, and the entire recess 42 is filled with the silicon films 45, 45a.

[0033] Such a filling method is a DED process, which can fill the recess 42 with silicon films 45, 45a without creating voids, even in the recess 42 with a high aspect ratio.

[0034] However, when recesses 42 having different aspect ratios are formed on the surface of the wafer W, the DED process must be repeated many times, which makes the process time-consuming.

[0035] 4 is a diagram for explaining a problem that occurs when filling a pattern in which recesses 42 having a plurality of aspect ratios are formed by a general DED process. Note that the silicon oxide film 43 is omitted in FIG.

[0036] FIG. 4(a) is a diagram showing a state in which a seed layer 44 is formed on the surface of a wafer W in which recesses 42 having a plurality of aspect ratios are formed.

[0037] 4(b) is a diagram showing the filling of the recess 42 with the highest aspect ratio by the DED process. As shown in FIG. 4(b), first, the silicon film 45 is filled from the recess 42 with the highest aspect ratio. This is because etching is dominant in the recess 42 with a small aspect ratio, and it is difficult to fill the recess 42 simply by repeating DED. In other words, it is necessary to go through a process of adjusting the etching rate and film formation conditions and filling from the recess 42 with the highest aspect ratio, which is easier to fill.

[0038] 4(c) is a diagram showing the filling of the recess 42 with the second highest aspect ratio. After the recess 42 with the highest aspect ratio is filled, the recess 42 with the next highest aspect ratio is filled with a silicon film 45. That is, as shown in FIGS. 4(b) and 4(c), if there are recesses 42 with different aspect ratios, it is necessary to fill the recesses 42 in order starting from the recess 42 with the highest aspect ratio.

[0039] 4(d) is a diagram showing the state where the filling is completed. In this way, it is possible to finally fill all of the recesses 42 having different aspect ratios with the silicon film 45, but this process requires a very large number of repetitions of DED.

[0040] Fig. 5 is a diagram showing the temperature change in the processing chamber when the DED process shown in Fig. 4 is performed. As shown in Fig. 5, the process temperatures are different between the film formation process and the etching process, and the film formation temperature is higher than the etching temperature. Since it is necessary to form a high-quality silicon film 45, the temperature in the film formation process is set to the optimum film formation conditions.

[0041] On the other hand, if etching is performed at the same temperature as in the film formation process, the etching capacity will be too strong and the amount of etching will become uncontrollable. Therefore, during etching, it is necessary to control the amount of etching by lowering the temperature in the processing chamber.

[0042] This causes fluctuations in temperature setting between the film formation process and the etching process, resulting in a significant loss of time in stabilizing the temperature within the processing chamber.

[0043] In Fig. 5, five film formation steps and four etching steps are shown, resulting in eight temperature fluctuations.

[0044] 6 is a diagram showing an example of a DED process according to a semiconductor device manufacturing method according to an embodiment of the present disclosure. In the semiconductor device manufacturing method according to this embodiment, the DED process is performed at a constant temperature, that is, etching temperature. This makes it unnecessary to raise and lower the temperature eight times as shown in FIG. 5, and eliminates the time required to raise and lower the temperature. As a result, even if the same number of DED repetitions are required, the time required to raise and lower the temperature in the processing chamber and the time required to stabilize the temperature are not required, and the process time can be significantly shortened and productivity can be improved.

[0045] Fig. 6 shows that the time required for increasing and decreasing the temperature is eliminated, and the process time is significantly shortened compared to Fig. 5. In this manner, in the manufacturing method of a semiconductor device according to the present disclosure, the DED process is performed at the same temperature, i.e., the film formation temperature, and the process time is significantly shortened while maintaining high quality film formation, thereby improving productivity.

[0046] 7 is a diagram for explaining how to carry out the method for manufacturing a semiconductor device according to this embodiment. In the method for manufacturing a semiconductor device according to this embodiment, etching is performed by adding hydrogen to chlorine in the etching process. This makes it possible to reduce the etching ability and perform etching at the same temperature as the film formation temperature. In other words, the controllability of etching at high temperatures can be significantly improved.

[0047] The film formation temperature for normal SiH4 gas is 440 to 530°C, and the etching temperature for chlorine is 300 to 400°C, so there is no overlapping range between the two. In other words, if etching is performed at the film formation temperature, the etching rate will be too high and the etching will become uncontrollable.

[0048] In FIG. 7, the horizontal axis indicates the etching temperature (° C.) of chlorine, and the vertical axis indicates the etching rate (nm / min).

[0049] In FIG. 7, point A indicates the etching state of chlorine alone. In this case, the etching rate is about 1.7 (nm / min) at 400°C. However, by adding hydrogen at 500 sccm, the etching rate drops to about 0.7 (nm / min), as shown by point B, a decrease of 44%.

[0050] As the temperature is raised to 420°C, 440°C, and 460°C, the etching rate increases, but even at 460°C it is still lower than 1.6 (nm / min). By changing the furnace to a vertical furnace, the etching rate drops to 1.4 (nm / min). When the amount of hydrogen added is doubled to 1000sccm, the etching rate drops to around 1.2.

[0051] This etching rate of less than 1.6 (nm / min) is a controllable etching rate, and falls within a range in which etching can be controlled by adjusting the time, etc.

[0052] Therefore, by adding hydrogen to chlorine and carrying out etching, the etching rate can be reduced and etching can be carried out at the same temperature as the film formation temperature.

[0053] Fig. 8 is a diagram for explaining the reason why the etching rate decreases by adding hydrogen to chlorine. Fig. 8(a) shows the state where etching is performed using chlorine alone, and Fig. 8(b) shows the state where etching is performed with the addition of hydrogen to chlorine.

[0054] As shown in FIG. 8(a), in the case of only chlorine, all of the chlorine functions as an etching gas.

[0055] On the other hand, FIG. 8(b) shows that some of the chlorine has been converted to HCl by the addition of hydrogen, resulting in a decrease in the number of chlorine molecules.

[0056] Specifically, when hydrogen is added to chlorine, the following reaction (2) is thought to occur.

[0057] H2+Cl2→2HCl (2)

[0058] Here, HCl (hydrochloric acid, hydrogen chloride) cannot etch silicon film at 400°C. In other words, chlorine etches silicon film in the temperature range of 300 to 400°C, but hydrogen chloride does not etch silicon film at 400°C. Therefore, it is considered that by adding hydrogen to chlorine, part of the chlorine changes to hydrogen chloride, the amount of chlorine decreases, and the etching ability decreases. In addition, since the amount of chlorine decreases, the partial pressure of chlorine also decreases, and the etching power of chlorine is considered to decrease relatively.

[0059] In this way, it is thought that by adding hydrogen to chlorine, a part of the chlorine is converted into hydrogen chloride, which has no etching ability, and the overall etching ability is reduced.

[0060] 9A and 9B are diagrams for explaining the second reason why the etching rate decreases when hydrogen is added to chlorine. Fig. 9(a) shows the state where etching is performed using only chlorine, and Fig. 9(b) shows the state where etching is performed with the addition of hydrogen to chlorine.

[0061] As shown in FIG. 9(a), when chlorine is supplied as an etching gas, Si--Cl bonds are generated and etching proceeds.

[0062] As shown in Figure 9(b), when hydrogen is added to chlorine, a Si-H bond is generated. It is believed that the reaction of formula (3) occurs after the Si-H bond is generated.

[0063] Si-H+Cl2 →Si-Cl+HCl (3)

[0064] In other words, the Si-Cl bond, which is the goal of etching, does not form immediately, and instead Si-H bonds are formed first, so it takes longer for SiCl4 to form, which is thought to slow down the etching reaction. Also, when Si-Cl bonds form, HCl is generated and Cl2 is consumed.

[0065] The reaction models in Figures 8 and 9 are inferences and have not been rigorously confirmed. However, in light of the results in Figure 7, it is considered highly likely that one or both of the models in Figures 8 and 9 have occurred.

[0066] Next, an embodiment in which the semiconductor device manufacturing method according to this embodiment is carried out using the substrate processing apparatus shown in FIG. 1 will be described.

[0067] 10 is a diagram showing a series of processes in the method for manufacturing a semiconductor device according to this embodiment. The method for manufacturing a semiconductor device according to this embodiment will be described with reference to FIGS.

[0068] First, the wafers W described in FIG. 2 are transferred to the wafer boat 3 by a transfer mechanism (not shown) and held thereon. Then, the wafer boat 3 is placed on the lid 16 located at the lowered position. Then, the lid 16 is raised to the raised position, the wafer boat 3 is carried into the reaction tube 11, the opening 17 of the reaction tube 11 is closed by the lid 16, and the reaction tube 11 is made airtight. Next, a purge gas is supplied into the reaction tube 11, and the reaction tube 11 is evacuated to a vacuum atmosphere of a predetermined pressure, and the wafers W are heated to a predetermined temperature by the heater 19. The temperature at this time is set to a predetermined film formation temperature suitable for depositing a silicon film on the wafers W. The temperature of the heater 19 may be controlled by the control unit 30.

[0069] For example, when SiH4 gas is used as the film forming gas, the temperature is set to a predetermined temperature within the range of 440 to 530° C., which is controllable with an etching gas in which hydrogen is added to chlorine.

[0070] FIG. 10(a) illustrates an example of a seed layer formation step.

[0071] After the wafer W is heated, the supply of the purge gas is stopped, and the DIPAS gas is supplied into the reaction tube 11. The DIPAS gas is deposited on the surface of the silicon oxide film 43 of the wafer W, and a seed layer 44 is formed so as to cover the silicon oxide film 43 (see FIG. 10(a)).

[0072] FIG. 10(b) is a diagram showing an example of the first film forming step.

[0073] Thereafter, the supply of DIPAS gas is stopped, a purge gas is supplied into the reaction tube 11, the DIPAS gas is purged from the reaction tube 11, and then Si2H6 gas is supplied into the reaction tube 11. This Si2H6 gas is deposited on the first seed layer, and a second seed layer is formed so as to cover the first seed layer. Thereafter, the supply of Si2H6 gas is stopped, a purge gas is supplied into the reaction tube 11, and the Si2H6 gas is purged from the reaction tube 11.

[0074] Thereafter, the supply of the purge gas is stopped, and SiH4 gas is supplied into the reaction tube 11. As shown in FIG. 10(b), the SiH4 gas is deposited on the second seed layer, and a Si film 44 is formed on the entire surface of the wafer W so as to cover the second seed layer. Then, the deposition of the SiH4 gas continues, and the Si film 45 grows. That is, the thickness of the Si film 45 increases. Then, as shown in FIG. 10(b), for example, the supply of the SiH4 gas is stopped before the upper side of the recess 42 is blocked by the Si film 45. Note that the seed layer 44 is not shown in each figure including FIG. 10(b) because its thickness is very small.

[0075] After the supply of the SiH4 gas is stopped, a purge gas is supplied into the reaction tube 11, and the SiH4 gas is purged from the reaction tube 11.

[0076] Fig. 10(c) is a diagram showing an example of an etching process. In the etching process, Cl2 gas is supplied from a gas supply source 23D to the processing gas introduction pipe 21, and H2 gas is supplied from a gas supply source 23E to the processing gas introduction pipe 21, mixed in the processing gas introduction pipe 21, and supplied to the wafer W in the reaction tube 11 (Fig. 10(c)). In order to reliably obtain both the etching effect of Cl2 gas and the suppression effect of etching ability of H2 gas, which will be described later, the gases are supplied so that the flow rate of H2 gas / the flow rate of Cl2 gas is 1 / 10 or more. More specifically, for example, Cl2 gas is supplied at 300 sccm, and H2 gas is supplied at 30 sccm to 1000 sccm into the reaction tube 11 (Fig. 4).

[0077] During etching, the set temperature of the heater 19 is not changed, and the film formation temperature set in the first film formation step is maintained. For example, once the temperature inside the reaction tube 11 is set to a predetermined temperature within the range of 440 to 530°C, the etching step is carried out at that film formation temperature. This eliminates the need to set aside time for increasing and decreasing the temperature, and can significantly improve productivity.

[0078] In the case of a substrate processing apparatus in which the heater 19 is provided below the substrate, for example, below the susceptor in a single-wafer or semi-batch processing apparatus, the substrate temperature is set rather than the temperature inside the processing chamber. In any case, etching is performed without changing the set temperature of the heater 19 that heats the processing chamber or the substrate from the film formation temperature.

[0079] The Cl2 gas is an etching gas for the Si film 45, and generates active species such as Cl radicals by being heated in the reaction tube 11 and supplied with thermal energy. Since the active species has a relatively high reactivity with Si, it reacts with Si outside the recess 42 and on the upper side of the recess 42 before reaching the lower part of the recess 42 of the wafer W to generate SiCl4 (silicon tetrachloride), and the Si film 45 is etched. Therefore, etching is performed so that the decrease in the thickness of the Si film 45 on the upper side of the recess 42 is greater than the decrease in the thickness of the Si film 45 on the lower side of the recess 42, and the opening width on the upper side of the recess 42 is enlarged. In addition, 2 moles of Cl radicals are generated from 1 mole of Cl2. In other words, since a relatively large number of active species are generated, the enlargement of the opening width can proceed at a relatively high speed.

[0080] However, if etching is performed with this Cl2 gas at the film formation temperature, the etching becomes uncontrollable, so H2 gas is added to reduce the etching capacity and etching is performed within a controllable range.

[0081] H2 gas is a process gas for reducing the etching ability of Cl2 gas and improving etching controllability at high temperatures. As described in Figures 8 and 9, the generation of HCl or Si-H bonds reduces the etching ability of Cl2 and improves etching controllability.

[0082] Thereafter, the supply of Cl2 gas and H2 gas into the reaction tube 11 is stopped to terminate the etching process (FIG. 10(c)). As described above, the etching of the Si film 45 is suppressed at the lower side of the recess 42 during the etching process, so that at the end of the etching process, the Si film 45 remains in the recess 42 as shown in FIG. 10(c).

[0083] A purge gas is supplied to remove the mixed gas from the reaction tube 11. Then, after a predetermined time has elapsed, the supply of the purge gas is stopped.

[0084] 10(d) is a diagram showing an example of the second film formation process. In the second film formation process, SiH4 gas is supplied into the reaction tube 11, and the SiH4 gas is deposited on the Si film 45, so that the Si film 45 grows.

[0085] Thereafter, the supply of SiH4 gas into the reaction tube 11 is stopped, and the film formation process is completed. Then, a purge gas is supplied to remove the SiH4 gas from the reaction tube 11.

[0086] 10 shows a state in which the silicon film 45 is filled in the recess 42 by one DED process for convenience, but if the recess 42 is not filled in by one DED process, the etching step shown in Fig. 10(c) and the film forming step shown in Fig. 10(d) are alternately repeated. Then, the silicon film 45 is filled in the recess 42.

[0087] 4, when there are a plurality of recesses 42 with different aspect ratios, the silicon film 45 is filled in the recesses 42 in order starting from the recesses 42 with the highest aspect ratio. Therefore, the DED process shown in FIG. 10 is repeated until the silicon film 45 is filled in all of the recesses 42 with various aspect ratios formed on the surface of the wafer W. Filling one recess 42 involves repeating the etching step of FIG. 10(c) and the film forming step of FIG. 10(d), and the number of repetitions varies depending on the aspect ratio.

[0088] After filling all the recesses 42, the temperature inside the reaction tube 11 is lowered. During the process, a constant film formation temperature is maintained, but after the process is completed, the temperature inside the reaction tube 11 is lowered in order to remove the wafer W. This causes the temperature of the wafer W to drop.

[0089] Subsequently, the lid 16 is lowered to unload the wafer boat 3 from the reaction tube 11, and then the wafers W are removed from the wafer boat 3 by a transfer mechanism (not shown), completing the processing of one batch of wafers W. Since the processing temperature can be kept constant during the processing, the embedding process can be completed in a short time.

[0090] In this embodiment, an example has been described in which a vertical heat treatment apparatus is used as a substrate processing apparatus, but it is also possible to configure the substrate processing apparatus as a single-wafer type film formation apparatus or a semi-batch type film formation apparatus that uses a rotating table to perform ALD (Atomic Layer Deposition) on approximately 5 to 6 wafers W.

[0091] The same principle can also be applied to a substrate processing apparatus that uses plasma. That is, the semiconductor device manufacturing method and substrate processing apparatus according to the present embodiment can be widely applied to a process and substrate processing apparatus that fills a recess with a silicon film by using a DED process.

[0092] Although the preferred embodiments of the present invention have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the present invention. [Explanation of symbols]

[0093] 11 Reaction tube 19 Heater 21, 31 Gas inlet pipe 23A~23E, 32 Gas supply source 24A~24E, 33 Gas supply mechanism 27 Valve 30 Control section 42 Recess 43 Silicon oxide film 44 Seed Layer 45, 45a Silicone membrane W wafer

Claims

1. supplying a silicon-containing gas to a substrate having a recess on its surface at a predetermined film formation temperature to form a silicon film in the recess; supplying chlorine gas and hydrogen gas to the substrate while maintaining the predetermined film formation temperature, and etching the silicon film deposited in the recess to widen an opening width of the silicon film; supplying the silicon-containing gas to the substrate while maintaining the predetermined substrate temperature, and depositing a silicon film on the silicon film in the recess; supplying the chlorine gas and the hydrogen gas to the substrate so that a ratio of a flow rate of the hydrogen gas to a flow rate of the chlorine gas is 1 / 10 or more in the step of widening the opening width of the silicon film; A method for manufacturing a semiconductor device.

2. 2. The method for manufacturing a semiconductor device according to claim 1, further comprising alternately repeating a step of widening the opening width of the silicon film and a step of depositing a further silicon film on the silicon film.

3. A method for manufacturing a semiconductor device as described in claim 2, wherein the process of widening the opening width of the silicon film and the process of depositing further silicon film on the silicon film are repeated until the recess is filled with the silicon film.

4. a plurality of the recesses having different aspect ratios are provided on the surface of the substrate; 4. The method for manufacturing a semiconductor device according to claim 3, wherein the silicon film is filled into the recesses in order from the recesses with the highest aspect ratio.

5. 5. The method for manufacturing a semiconductor device according to claim 1, wherein the predetermined film formation temperature is within a range of 440 to 530.degree.

6. The silicon-containing gas is SiH ４ The method for manufacturing a semiconductor device according to any one of claims 1 to 5, wherein

7. 7. The method for manufacturing a semiconductor device according to claim 1, wherein the hydrogen gas is added to the chlorine gas before supply.

8. A processing chamber; a substrate holder for holding a substrate having a recessed portion on a surface thereof in the processing chamber; a heater for heating and maintaining the interior of the processing chamber or the substrate at a predetermined film formation temperature; a silicon-containing gas supply unit that supplies a silicon-containing gas to the substrate and deposits a silicon film in the recess; an etching gas supply unit that supplies chlorine gas and hydrogen gas to the substrate to widen an opening width of the silicon film deposited in the recess; a control unit that controls the silicon-containing gas supply unit and the etching gas supply unit so that the supply of the silicon-containing gas to the substrate and the supply of the chlorine gas and the hydrogen gas to the substrate are alternately performed, the control unit controls the etching gas supply unit so that the ratio of the flow rate of the hydrogen gas to the flow rate of the chlorine gas is 1 / 10 or more when the chlorine gas and the hydrogen gas are supplied to the substrate. Substrate processing equipment.

9. The substrate processing apparatus according to claim 8 , wherein the control unit controls the alternating operations of the silicon-containing gas supply unit and the etching gas supply unit until the silicon film is filled in the recess.

Images