Semiconductor Device

Abstract

To provide a semiconductor device with reduced area.SOLUTION: A semiconductor device includes a substrate having a first surface, an insulator, a first element, and a first conductor. The insulator surrounds a first region along the first surface in a region in contact with the first surface in the substrate. The first element is provided in the first region, including a gate electrode that is provided above the first surface of the substrate and that has a first resistivity. The first conductor is provided above the first surface of the substrate in the first region, including the same material as that included in the gate electrode and having a second resistivity different from the first resistivity.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] A semiconductor device includes transistors and resistor elements that constitute a circuit. The transistors and resistor elements are formed in element regions. Each element region is surrounded by an element isolation insulator. In general, each element is formed in a separate element region. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6383325 Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention aims to provide a semiconductor device with a reduced area. [Means for solving the problem]

[0005] A semiconductor device according to one embodiment includes a substrate having a first surface, an insulator, a first element, and a first conductor. The insulator surrounds a first region along the first surface in a region of the substrate that contacts the first surface. The first element includes a gate electrode disposed in the first region and above the first surface of the substrate, the gate electrode having a first resistivity. The first conductor is disposed above the first surface of the substrate in the first region, includes a material that is the same as a material included in the gate electrode, and has a second resistivity different from the first resistivity. and extending along the first surface so as to surround the gate electrode continuously or with a gap therebetween. do. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 shows a planar structure of a semiconductor device according to the first embodiment. [Diagram 2] FIG. 2 shows a planar structure of components in an element region of the semiconductor device of the first embodiment. [Diagram 3] FIG. 3 shows a cross section of a portion of the semiconductor device of the first embodiment. [Figure 4] FIG. 4 shows a cross section of a portion of the semiconductor device of the first embodiment. [Diagram 5] FIG. 5 shows a cross section of a portion of the semiconductor device of the first embodiment. [Figure 6] FIG. 6 shows a planar structure of components in an element region of a semiconductor device according to a modified example of the first embodiment. [Figure 7] FIG. 7 shows a planar structure of components in an element region of a semiconductor device according to a modified example of the first embodiment. [Figure 8] FIG. 8 shows a planar structure of components in an element region of a semiconductor device according to a modified example of the first embodiment. [Figure 9] FIG. 9 shows a planar structure of the semiconductor device according to the second embodiment. [Figure 10] FIG. 10 shows a planar structure of an element region of a semiconductor device according to the second embodiment. [Figure 11] FIG. 11 shows a cross section of a portion of the semiconductor device of the second embodiment. [Figure 12] FIG. 12 shows a planar structure of components in an element region of a semiconductor device according to a modification of the second embodiment. [Figure 13] FIG. 13 shows a planar structure of components in an element region of a semiconductor device according to a modification of the second embodiment. [Figure 14] FIG. 14 shows a planar structure of an element region of a semiconductor device according to the third embodiment. [Figure 15] FIG. 15 shows a cross section of an element region of a semiconductor device according to the third embodiment. [Figure 16] FIG. 16 shows a planar structure of components in an element region of a semiconductor device according to a modification of the third embodiment. [Figure 17] FIG. 17 shows a planar structure of components in an element region of a semiconductor device according to a modification of the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] The embodiments are described below with reference to the drawings. In the following description, components having substantially the same functions and configurations are given the same reference numerals, and repeated description may be omitted. In order to distinguish a plurality of components having substantially the same functions and configurations from each other, an additional number or letter may be added to the end of the reference numeral. Components having substantially the same functions and configurations in a certain embodiment and a subsequent embodiment are also distinguished from the components in the preceding embodiment by adding an additional number or letter to the end of the reference numeral of the component in the subsequent embodiment. For example, a certain specific component A in the second embodiment may be referred to as a component Ab. With respect to points other than those described for a certain component, all points described for the components having substantially the same functions and configurations in the preceding embodiment are applied.

[0008] Each embodiment is an example of an apparatus or method for embodying the technical idea of ​​the embodiment, and the technical idea of ​​the embodiment does not specify the materials, shapes, structures, arrangements, etc. of the components described below.

[0009] The drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio of each layer, etc. may differ from the actual ones. Furthermore, the drawings may include parts in which the relationship and ratio of dimensions differ from each other.

[0010] Hereinafter, the embodiment will be described using an xyz Cartesian coordinate system.

[0011] 1. First embodiment 1.1.Structure (composition) 1 shows a planar structure of a semiconductor device according to a first embodiment, and shows a structure along an xy plane when observed from above along the z axis. The semiconductor device 1 is, for example, a rectangular semiconductor chip, and is formed on a semiconductor substrate 21 (not shown). The semiconductor device 1 includes an element region 3. The element region 3 has, for example, a rectangular shape. The element region 3 is surrounded by an element isolation insulator 4.

[0012] The element isolation insulator 4 is formed in the substrate by STI (Shallow Trench Isolation). The element isolation insulator 4 is provided in a region including the surface of the substrate 21. The element isolation insulator 4 has the same cross-sectional structure as an insulator 31 shown in FIG. 5 and described later.

[0013] An element 5 and a conductor 7 are formed in the element region 3. The element 5 may be any element formed on a semiconductor chip. An example of the element 5 includes a Metal Oxide Semiconductor Field Effect Transistor (MOSFET).

[0014] The conductor 7 faces the edge of the element region 3 and extends along the edge of the element region 3. That is, the conductor 7 has four straight line portions that extend along the four sides of the element region 3.

[0015] Fig. 2 shows an example of a planar structure of components in the element region 3 of the semiconductor device 1 of the first embodiment. Fig. 2 shows the structure along the xy plane when observed from above along the z axis. Fig. 2 shows an example in which the element 5 is a MOSFET. Hereinafter, the element 5 may be referred to as a transistor 5. Fig. 2 shows only some of the components of the element region 3.

[0016] 2, the semiconductor device 1 includes a conductor 7 and a conductor 11. The conductor 11 constitutes a part of the transistor 5 and functions as a gate electrode of the transistor 5. An example of the structure of the transistor 5 will be described further below. The conductor 11 may be referred to as a gate electrode 11 hereinafter.

[0017] The conductor 11 has a lattice shape along the xy plane. That is, it includes a plurality of portions 11A and two portions 11B. The portions 11A have a linear shape, extend along the y axis, and are spaced apart along the x axis. The portions 11B extend along the x axis. One portion 11B is connected to the upper end of each of the portions 11A. The other portion 11B is connected to the lower end of each of the portions 11A. The conductor 11 includes, for example, polysilicon having conductivity due to the introduction of carriers, or is substantially made of such polysilicon. In this specification and the claims, the description that a certain component is "substantially made of" or "substantially composed of" a certain material is used to mean that the component is allowed to contain unintentional impurities.

[0018] The conductor 11 may include a silicide (metal silicide) in its entirety or in a region along the z-axis including its upper surface.

[0019] The conductor 7 extends along the edge of the element region 3 and surrounds the conductor 11. More specifically, the conductor 7 includes four portions 7A. One portion 7A extends along the x-axis and is along the lower end of the element region 3. One portion 7A extends along the x-axis and is along the upper end of the element region 3. One portion 7A extends along the y-axis and is along the right end of the element region 3. One portion 7A extends along the y-axis and is along the left end of the element region 3. Two portions 7A along two adjacent sides of the element region 3 are connected to each other. Alternatively, two portions 7A along two adjacent sides of the element region 3 may be connected by a portion 7B of the conductor 7. FIG. 1 shows such an example. Each portion 7B is located in a region including a corner of the element region 3 and connects one portion 7A extending along the x-axis and one portion 7A extending along the y-axis. Portion 7B, for example, intersects the x-axis and the y-axis and has an angle of, for example, 45 degrees with respect to the x-axis.

[0020] Conductor 7 is located at the boundary between a region where portion 11A of conductor 11 is provided and a region outside of that where conductor 11 (particularly portion 11A) is not provided. Conductor 7 is provided for the following purpose. That is, there is a large difference between the density of portions 11A in the region where portions 11A of conductor 11 are densely packed and the density of portions 11A outside element region 3. This difference affects the process for forming portions 11A at the boundary between the two regions. This can cause the shape of the outermost portion 11A to be significantly different from the shapes of the other portions 11A. Conductor 7 can alleviate this possibility that the shapes of multiple portions 11A may be significantly different from one another.

[0021] Conductor 7 is derived from the same material as conductor 11, and is derived from a portion of a certain material. That is, conductor 7 and conductor 11 are formed based on a material formed by partial removal of a certain material. Based on the example in which conductor 11 includes or consists essentially of polysilicon, conductor 7 includes or consists essentially of polysilicon.

[0022] On the other hand, conductor 7 has a resistance different from the resistivity (or conductivity) of conductor 11. In this specification and claims, the "resistivity" of a certain component may be the average resistivity of this component, or the resistivity of a certain part of the component.

[0023] The conductor 7 has a resistivity different from that of the conductor 11, and therefore contains a different type of carriers from the type of carriers (impurities) contained in the conductor 11. In addition (or), the conductor 7 has a resistivity different from that of the conductor 11, and therefore contains a different amount of carriers from the amount of carriers contained in the conductor 11. For example, the concentration of a certain carrier contained in the conductor 7 is lower than the concentration of the same carrier contained in the conductor 11. The concentration of carriers of a certain component may be the average concentration of this component, or may be the concentration in a certain portion. In addition (or), the conductor 7 has a resistivity different from that of the conductor 11, and therefore contains silicide at a ratio different from the ratio of silicide in the conductor 11. For example, the ratio of silicide in the conductor 7 is lower than the ratio of silicide in the conductor 11, and is, for example, zero. The ratio of silicide in a certain component may be the average concentration of this component, or may be the concentration in a certain portion.

[0024] Conductor 7 can be used as a resistor (resistance element or resistive element). For that purpose, conductor 7 has a resistivity adjusted to have a different resistivity than conductor 11. Specifically, conductor 7 contains an amount and / or type of carriers and / or a proportion of silicide that allows conductor 7 to have a resistance of a desired magnitude in a circuit in which conductor 7 is used as a resistor. Hereinafter, conductor 7 may be referred to as resistor 7.

[0025] The resistor 7 can be used as any resistor used in the semiconductor device 1. For example, the resistor 7 can be used as a resistor that configures a circuit together with the transistor 5 and is connected to a node near the transistor 5. An example of the form of use of such a resistor is a resistor in a case where the transistor 5 and the resistor 7 configure a part of an ESD (ElectroStatic Discharge) protection circuit. Specifically, the resistor 7 can be used as a resistor connected between the gate and source of the transistor 5. Or, the resistor 7 can be used as a resistor for pulling down the transistor 5. Specifically, the resistor 7 can be connected between the source of the transistor 5 and ground.

[0026] As shown in Fig. 3, in order to be used as a resistor, the conductor 7 is in contact with two conductors that are independent of each other at at least two points. Fig. 3 shows a cross section of a part of the semiconductor device of the first embodiment. Fig. 3 shows an example in which the conductor 7 is in contact with two contact plugs CP1 and CP2 on the upper surface. At least a portion of the conductor 7 between the contact plugs CP1 and CP2 can function as a resistor.

[0027] Fig. 4 is a schematic cross-sectional view of a portion of the semiconductor device of the first embodiment, taken along line IV-IV in Fig. 2. In Fig. 4, some components, including those inside the substrate 21, are omitted in order to avoid unnecessarily complicating the drawing. As shown in Fig. 4, a conductor 11 (a portion 11A of the conductor 11) and a resistor 7 (a portion 7A of the resistor 7) are provided above the upper surface (top surface) on the z-axis of, for example, a silicon substrate 21. Fig. 4 shows an example in which a part (upper portion) including the top surface of the gate electrode 11 contains silicide 12, and the resistor 7 does not contain silicide.

[0028] FIG. 5 shows a cross section of a part of the semiconductor device of the first embodiment, and shows a cross section along the line VV in FIG. 2. FIG. 2 is based on an example in which the element 5 is a transistor, and as described with reference to FIG. 2, the transistor 5 may have any structure as long as it is a MOSFET. Examples of such a transistor 5 include a double diffused metal oxide semiconductor field effect transistor (DMOS), a laterally disused metal oxide semiconductor field effect transistor (LDMOS), a drain extended metal oxide semiconductor field effect transistor (DEMOS), and an extended drain metal oxide semiconductor field effect transistor (EDMOS). FIG. 5 shows, as an example, a case in which the transistor 5 is an LDMOS.

[0029] 5, the semiconductor device 1 includes a substrate 21 of a semiconductor such as silicon. The substrate 21 has a p-type. The p-type components and regions include p-type carriers. When the p-type components or regions include both n-type and p-type impurities, they have a higher concentration of p-type impurities than the concentration of n-type impurities.

[0030] An n-type deep well or impurity region (deep n-well) 22 is formed in a region including the upper surface of a substrate 21. A p-type well or impurity region (p-well) 23 is provided in a region including the upper surface of the deep n-well 22. The n-type components and regions contain n-type carriers. When an n-type component or region contains both n-type and p-type impurities, it has a higher concentration of n-type impurities than the concentration of p-type impurities.

[0031] An n-type drift region (impurity region) 24 is provided in a region including the upper surface of the deep n-well 22. The n-type drift region 24 may be in contact with the p-well 23.

[0032] An n-type well (impurity region) 25 is provided in a region including the upper surface of the deep n-well 22. The n-well 25 is located farther from the p-well 23 than the n-type drift region 24. The n-well 25 contacts the n-type drift region 24.

[0033] An insulator (insulator layer) 31 is provided in a region including the upper surface of the deep n-well 22. A part of the insulator 31 is located in a region including the upper surface of the n-well 25.

[0034] A region including the surface of the p-well 23 functions as a body region of the transistor 5. A region of the body region including the upper surface functions as a channel region. The channel region is a region where a channel is formed while the transistor 5 is on.

[0035] In a region including the upper surface of the p-well 23, + A n-type source region 34 is provided. The superscripts "+" and "-" on the conductivity type "n" or "p" indicate the relative carrier concentrations. For example, p + A n-type region has a higher carrier concentration than a p-type region. When a region with a given carrier concentration contains both p-type and n-type impurities, the carrier concentration refers to the concentration of the p-type impurity excluding the amount of p-type impurity offset by the n-type impurity. The same is true for n-type, and descriptions of p-type impurities with "n" replaced with "p" also apply to n-type. n + A silicide 19 is provided on the surface of the source region 34 .

[0036] An insulator 36 is provided in a region including the upper surfaces of the n-type drift region 24 and the n-well 25. The insulator 36 extends across the n-type drift region 24 and the n-well 25. The bottom surface of the insulator 36 does not overlap with the bottom surface of the n-type drift region 24, and therefore a part of the n-type drift region 24 is located below the insulator 36. Of the two edges of the insulator 36 aligned along the x-axis, the edge farther from the n-well 25 does not overlap with the edge of the n-type drift region 24 farther from the n-well 25.

[0037] In a region including the upper surface of the n-well 25, + A type drain region 37 is provided. + A silicide 19 is provided on the surface of the type drain region 37 .

[0038] An insulator 38 is provided on the upper surface of the substrate 21, i.e., on the upper surface of the deep n-well 22. The insulator 38 is located on the upper surfaces of the p-well 23, the n-type drift region 24, and the n-well 25. A portion of the insulator 38 functions as a gate insulator for the transistor 5.

[0039] A gate electrode 11 is provided on a portion of the upper surface of the insulator 38. The gate electrode 11 extends along the x-axis and is provided continuously at least over a region above the p-well 23 and a region above the insulator 36. An upper portion of the gate electrode 11 includes a silicide 12. A portion of the insulator 38 below the gate electrode 11 functions as a gate insulator for the transistor 5.

[0040] Two side surfaces of the gate electrode 11 aligned along the x-axis are covered with a sidewall insulator 42. A part of the sidewall insulator 42 is located above the p-well 23.

[0041] 1.2. Advantages (Effects) According to the first embodiment, as described below, it is possible to provide a semiconductor device 1 in which the required area is suppressed.

[0042] A semiconductor device 100 for reference and comparison will be briefly described. Like the semiconductor device 1, the semiconductor device 100 requires resistors to realize a circuit. The resistors are formed in an element region separate from the element region 3. Each element region needs to be surrounded by an element isolation insulator. For this reason, the formation of the element region requires not only the area of ​​the element region but also an area for forming the element isolation insulator, and a large number of element regions requires a large area for the element region and the area for the element isolation insulator.

[0043] The semiconductor device 100 includes a dummy gate electrode 101 instead of the conductor 7 of the semiconductor device 1 of the first embodiment. The dummy gate electrode 101 has the same structure as the conductor 7, and like the conductor 7, suppresses the variation in shape when the gate electrode 11 is formed. Meanwhile, unlike the conductor 7, the dummy gate electrode 101 has the same resistivity as the gate electrode 11. That is, the dummy gate electrode 101 is not given a property different from that of the gate electrode 11. Therefore, the dummy gate electrode 101 functions only during the manufacture of the semiconductor device 100, and does not function after the semiconductor device 100 is completed. Therefore, there is a room for utilizing the dummy gate electrode 101.

[0044] The semiconductor device 1 of the first embodiment includes a conductor 7. The conductor 7 is provided during the manufacture of the semiconductor device 1 with the purpose of suppressing the variation in the shape of the gate electrode 11 during the formation of the gate electrode 11, and has no function after the formation of the gate electrode 11, and does not affect the function and characteristics of the transistor 5. Meanwhile, the conductor 7 is adjusted in resistivity so as to have a different resistivity from that of the gate electrode 11, unlike the dummy gate electrode 101. By adjusting the resistivity, the conductor 7 can have a resistance of a desired magnitude. Therefore, the conductor 7 can be used as a resistor of a circuit in the semiconductor device 1. A component that plays a role only during the manufacture of the semiconductor device 1 is used even after the semiconductor device 1 is completed, so that a resistor can be formed in the element region 3 without affecting the formation and characteristics of the transistor 5. This means that the transistor 5 and the resistor are integrated into one element region 3, and the area required for forming the resistor is reduced in the area of ​​the semiconductor device 1 compared to the case where a resistor is formed in an element region other than the element region 3 as in the semiconductor device 100.

[0045] 1.3. Variations The conductor 7 does not have to extend over the entire edge of the element region 3. Furthermore, the conductor 7 may include a plurality of independent portions. Figures 6 to 8 show such an example, and show an example of the planar structure of components in the element region 3 of the semiconductor device 1 according to the modification of the first embodiment. Figures 6 to 8 show the same region as Figure 2.

[0046] As shown in FIG. 6, a conductor 7b is provided instead of the conductor 7. Like the conductor 7, the conductor 7b extends along the edge of the element region 3 and surrounds the transistor 5. The conductor 7b is made up of a portion 7C and a portion 7D. The portion 7C is the same as the conductor 7 except for its shape. That is, like the conductor 7, the resistivity of the portion 7C is adjusted to have a different resistivity from that of the conductor 11. That is, the resistivity of the conductor 7 is partially adjusted to have a different resistivity from that of the conductor 11. Like the conductor 7, the portion 7C includes a type and / or concentration of carriers that allows it to have a desired resistance, and / or has a proportion of silicide. Like the conductor 7, the portion 7C can be used as a resistor.

[0047] On the other hand, portion 7D has substantially the same resistivity as conductor 11, i.e., the resistivity is not adjusted. Thus, portion 7D includes, for example, the same type and substantially the same concentration of carriers as conductor 11 and / or includes silicide at the top. In this specification and claims, "substantially the same" means that it is intended to be the same, but allows for differences that inevitably occur due to manufacturing variations and the like.

[0048] The portion 7C can occupy any portion of the conductor 7b. That is, the portion 7C has a size that allows the portion 7C to have a required resistance. FIG. 6 shows an example in which each portion 7C occupies a part of four straight line portions along the edge of the element region 3 of the conductor 7. That is, one portion 7C is located in a portion including the center of the straight line portion along the right side of the element region 3 of the conductor 7. One portion 7C is located in a portion including the center of the straight line portion along the left side of the element region 3 of the conductor 7. One portion 7C is located in a portion including the center of the straight line portion along the upper side of the element region 3 of the conductor 7. One portion 7C is located in a portion including the center of the straight line portion along the lower side of the element region 3 of the conductor 7. Each portion 7D is located in a region including a corner of the element region 3.

[0049] Through adjustment of the size of portion 7C, the amount of resistance provided by portion 7C can be adjusted.

[0050] FIG. 6 shows an example in which the portion 7C is provided at a position along all sides of the edge of the element region 3. The modified example is not limited to this form. For example, the portion 7C can be located in only one, two, or three of the four straight line portions. The portion 7C may be located in any of the four straight line portions. For example, the portion 7C can be located only in the upper straight line portion and the lower straight line portion along the y axis. Or, the portion 7C can be located only in the left straight line portion and the right straight line portion along the y axis.

[0051] As shown in FIG. 7, portion 7D may not be provided.

[0052] 8, the portion 7C and the portion 7D may be independent. For example, the portion 7D has a linear shape, extends along the y-axis, and is located between the left side of the element region 3 and the transistor 5, and / or between the right side of the element region 3 and the transistor 5. The portion 7C extends along the x-axis, and is located between the top side of the element region 3 and the transistor 5, and / or between the bottom side of the element region 3 and the transistor 5.

[0053] 2. Second embodiment The second embodiment differs from the first embodiment in the structure of the conductor that functions as a resistor.

[0054] 2.1.Structure (composition) 9 shows a planar structure of the semiconductor device of the second embodiment, and shows the structure along the xy plane when observed from above along the z axis. The semiconductor device 1b of the second embodiment includes a conductor 15. Like the conductor 7, the conductor 15 faces the edge of the element region 3 and extends along the edge of the element region 3.

[0055] The semiconductor device 1b further includes a capacitor 8. The capacitor 8 is formed in an element region different from the element region 3 in which the transistor 5 is formed. The capacitor 8 is not necessarily limited to a capacitor, and may be provided as a separate element having, for example, two layers of conductors (e.g., polysilicon) and may be mixed and mounted in the semiconductor device 1b.

[0056] Fig. 10 shows an example of a planar structure of components in the element region 3 of the semiconductor device 1b of the second embodiment. Fig. 10 shows the structure along the xy plane when observed from above along the z axis. Fig. 10 shows only some of the components of the element region 3.

[0057] As shown in FIG. 10, the conductor 13 has the same structure as the conductor 7 of the first embodiment. That is, the conductor 13 includes four portions 13A and four portions 13B. The portions 13A and 13B have the same structure as the portions 7A and 7B of the conductor 7, respectively, and are arranged in the same manner as the portions 7A and 7B of the conductor 7. Like the conductor 7, the conductor 13 can mitigate the fact that the shape of the outermost portion 11A of the portion 11A of the conductor 11 may be significantly different from the shape of the other portions 11A. That is, the conductor 13 can function as a dummy gate electrode. The conductor 13 is, for example, electrically floating, is not electrically connected to a component to which a potential is applied in the semiconductor device 1, and is not applied with a potential during the operation of the semiconductor device 1. Hereinafter, the conductor 13 may be referred to as a dummy gate electrode 13.

[0058] The dummy gate electrode 13 is derived from the same material as the conductor 11, and is derived from a part of a certain material. That is, the dummy gate electrode 13 and the conductor 11 are formed based on a material formed by partially removing a certain material. Based on an example in which the conductor 11 includes polysilicon or is substantially made of polysilicon, the dummy gate electrode 13 includes polysilicon or is substantially made of polysilicon. Also, the dummy gate electrode 13 includes substantially the same type and / or amount of carriers as the carriers included in the conductor 11. Also, like the conductor 11, the dummy gate electrode 13 may or may not include silicide. When the dummy gate electrode 13 includes silicide, the proportion of silicide in the dummy gate electrode 13 may be substantially the same as the proportion of silicide in the conductor 11.

[0059] The conductor 15 extends along the edge of the element region 3, extends along the outer edge of the dummy gate electrode 13, and surrounds the dummy gate electrode 13. More specifically, the conductor 15 includes four portions 15A and four portions 15B. One portion 15A extends along the x-axis and is along the lower end of the element region 3. One portion 15A extends along the x-axis and is along the upper end of the element region 3. One portion 15A extends along the y-axis and is along the right end of the element region 3. One portion 15A extends along the y-axis and is along the left end of the element region 3. Each portion 15B is located in a region including a corner of the element region 3, and is connected to one portion 15A extending along the x-axis and one portion 15A extending along the y-axis. The portion 15B intersects with the x-axis and y-axis, for example, and has an angle of 45 degrees with respect to the x-axis. The conductor 15 is located, in part, on the upper surface of the dummy gate electrode 13. The structure and position of the conductor 15 will be further described later.

[0060] The conductor 15 can be used as a resistor (resistance element or resistive component). When used as a resistor, the conductor 15 is connected to contact plugs CP1 and CP2 on the upper surface, like the conductor 7. Hereinafter, the conductor 15 may be referred to as a resistor 15. The resistor 15 can be used as any resistor used in the semiconductor device 1. The resistor 15 can be used for the same purpose as the resistor 7 of the first embodiment.

[0061] Fig. 11 shows a schematic cross section of a portion of the semiconductor device of the second embodiment, taken along line XI-XI in Fig. 10. Fig. 11 also shows a cross section of a capacitor 8. As shown in Fig. 11, a gate electrode 11 (a portion 11A of the gate electrode 11) and a dummy gate electrode 13 (a portion 13A of the dummy gate electrode 13) are provided above the upper surface (top surface) of a substrate 21 on the z axis. In Fig. 11, some components including components inside the substrate 4 and the silicide 12 are omitted for the purpose of avoiding unnecessary complication of the figure.

[0062] The capacitor 8 includes a conductor 45, an insulator 46, and a conductor 47. The conductor 45 is located on or above the upper surface of the substrate 21. The conductor 45, the gate electrode 11, and the dummy gate electrode 13 originate from the same conductor and are made of a part of a certain conductor. That is, the conductor 45, the gate electrode 11, and the dummy gate electrode 13 are formed by partial removal of a certain conductor. Thus, the conductor 45 includes, for example, polysilicon or is substantially made of polysilicon. The insulator 46 is located on the upper surface of the conductor 45. The conductor 47 is located on the upper surface of the insulator 46.

[0063] An insulator 51 is provided continuously from a part of the region on the upper surface of the dummy gate electrode 13 to a part of the region above the upper surface of the substrate 21. The insulator 51 extends along the outer edge of the dummy gate electrode 13 in the xy plane and surrounds the dummy gate electrode 13. An inner end of the insulator 51 is located on the upper surface of the dummy gate electrode 13. The insulator 51 and the insulator 46 are derived from the same insulator and are made of a part of a certain insulator. That is, the insulator 46 and the insulator 51 are formed by partial removal of a certain insulator.

[0064] The conductor 15 is provided on the upper surface of the insulator 51, and for example covers the upper surface of the insulator 51. The conductor 15 and the conductor 47 originate from the same conductor and consist of a part of a certain conductor. That is, the conductor 15 and the conductor 47 are formed by partial removal of a certain conductor. The conductor 15 and the conductor 47 include, for example, polysilicon or consist essentially of polysilicon. On the other hand, the conductor 15 is used as a resistor, and therefore, in order to have a desired resistance, the resistivity of the conductor 15 can be adjusted to have a different resistivity from that of the conductor 47. Specifically, the conductor 15 includes a type and / or concentration of carriers that enable the conductor 15 to have a desired resistance in a circuit in which the conductor 15 is used as a resistor.

[0065] With the above-described structure, the transistor 5 is mounted together with the capacitor 8 including the first layer conductor 45 and the second layer conductor 47 with the insulator 46 sandwiched therebetween in one semiconductor device 1b.

[0066] 2.2.Advantages The semiconductor device 1b of the second embodiment includes a conductor 15 extending from above the upper surface of the dummy gate electrode 13 to above the upper surface of the substrate 21. The conductor 15 is used as a resistor. The dummy gate electrode 13 is provided for one purpose of suppressing the variation in shape when the gate electrode 11 is formed, and has no function after the gate electrode 11 is formed, so that it does not affect the function and characteristics of the transistor 5. The conductor 15 is provided by effectively utilizing the area around such a dummy gate electrode 13, and the conductor 15 is used as a resistor. Therefore, it is possible to form a resistor in the element region 3 without affecting the formation and characteristics of the transistor 5. This means that the transistor 5 and the resistor are integrated into one element region 3. Therefore, the same advantages as those of the first embodiment can be obtained.

[0067] Furthermore, according to the first embodiment, the insulator 51 is formed from the same insulator as the insulator 46 of the capacitor 8, and the conductor 15 is formed from the same conductor as the conductor 47 of the capacitor 8. The molding of the insulator 51 and the conductor 47 can be performed by the process for molding the insulator 46 and the conductor 47 of the capacitor 8, which are formed regardless of whether the insulator 51 and the conductor 47 are formed or not. Therefore, except for the process for introducing the carrier of the conductor 15, no additional process for forming the insulator 51 and the conductor 47 is required, and the insulator 51 and the conductor 47 can be easily formed. 2.3. Modifications The conductor 15 does not have to extend over the entire edge of the element region 3. Furthermore, the conductor 15 may include a plurality of independent portions. Figures 12 and 13 show such an example, and show an example of the planar structure of components in the element region 3 of the semiconductor device 1b according to a modification of the second embodiment. Figures 12 and 13 show the same region as Figure 10.

[0068] As shown in FIG. 12, a conductor 15b is provided instead of the conductor 15. Like the conductor 15, the conductor 15b extends along the edge of the element region 3 and surrounds the transistor 5. The conductor 15b is made up of a portion 15C and a portion 15D. The portion 15C is the same as the conductor 15 except for its shape. That is, like the conductor 15, the portion 15C includes a type and / or concentration of carriers and / or a proportion of silicide that allows the portion 15C to have a desired resistance. Like the conductor 15, the portion 15C can be used as a resistor.

[0069] On the other hand, portion 15D has substantially the same resistivity as conductor 11, i.e., it is not resistivity adjusted, so that portion 15D, for example, contains the same type and substantially the same concentration of carriers as conductor 11 and / or contains a silicide at the top.

[0070] The portion 15C can occupy any portion of the conductor 15b. That is, the portion 15C has a size that allows the portion 15C to have a required resistance. FIG. 12 shows an example in which each portion 15C occupies a part of four straight line portions along the edge of the element region 3 of the conductor 15. That is, one portion 15C is located in a portion including the center of the straight line portion along the right side of the element region 3 of the conductor 15. One portion 15C is located in a portion including the center of the straight line portion along the left side of the element region 3 of the conductor 15. One portion 15C is located in a portion including the center of the straight line portion along the upper side of the element region 3 of the conductor 15. One portion 15C is located in a portion including the center of the straight line portion along the lower side of the element region 3 of the conductor 15. Each portion 15D is located in a region including a corner of the element region 3.

[0071] Through adjustment of the size of portion 15C of electrical conductor 15, the amount of resistance provided by portion 15C can be adjusted.

[0072] FIG. 12 shows an example in which the portion 15C is provided at a position along all sides of the edge of the element region 3. The modified example is not limited to this form. For example, the portion 15C can be located in only one, two, or three of the four straight line portions. The portion 15C can be located in any of the four straight line portions. For example, the portion 15C can be located only in the upper straight line portion and the lower straight line portion along the y axis. Or, the portion 15C can be located only in the left straight line portion and the right straight line portion along the y axis.

[0073] As shown in FIG. 13, the portion 15D does not have to be provided.

[0074] 3. Third embodiment The third embodiment differs from the second embodiment in the position of the conductor that functions as a resistor.

[0075] 3.1.Structure (composition) 14 shows a planar structure of the semiconductor device of the third embodiment, and shows the structure along the xy plane when observed from above along the z axis. The semiconductor device 1c of the third embodiment is similar to the semiconductor device 1b of the second embodiment, but does not include a dummy gate electrode 13, unlike the semiconductor device 1b of the second embodiment.

[0076] The conductor 15 is disposed along the outer edge of the gate electrode 11, instead of around the dummy gate electrode 13 in the second embodiment.

[0077] Fig. 15 is a schematic cross-sectional view of a portion of the semiconductor device of the third embodiment, taken along line XV-XV in Fig. 14. In Fig. 15, some components including components inside the substrate 4 and the silicide 12 are omitted in order to avoid unnecessarily complicating the drawing.

[0078] 15, the insulator 51 extends from the outer edge of the gate electrode 11, i.e., from part of the region on the upper surface of the outermost portion 11A to a part of the region above the upper surface of the substrate 21. The insulator 51 surrounds the gate electrode 11. An inner end of the insulator 51 is located on the upper surface of the outermost portion 11A of the gate electrode 11. The conductor 15 is provided on the upper surface of the insulator 51 and, for example, covers the upper surface of the insulator 51.

[0079] 3.2.Advantages The semiconductor device 1c of the third embodiment includes a conductor 15 extending from above the upper surface of the outer edge portion of the gate electrode 11 to above the upper surface of the substrate 21. The conductor 15 is used as a resistor. Therefore, even if a dummy gate electrode 13 is not provided, the conductor 15 can be provided. Therefore, the same advantages as those of the second embodiment can be obtained.

[0080] 3.3. Modifications The conductor 15 does not have to extend over the entire edge of the element region 3. Furthermore, the conductor 15 may include a plurality of independent portions. Figures 16 and 17 show such an example, and show an example of the planar structure of components in the element region 3 of the semiconductor device 1b according to a modification of the second embodiment. Figures 16 and 17 show the same region as Figure 14.

[0081] 16, a conductor 15b is provided instead of the conductor 15. Like the conductor 15, the conductor 15b extends along the edge of the element region 3 and surrounds the transistor 5. The conductor 15b is made up of a portion 15C and a portion 15D.

[0082] The portion 15C can occupy any portion of the conductor 15b. That is, the portion 15C has a size that allows the portion 15C to have a required resistance. FIG. 16 shows an example in which each portion 15C occupies a part of four straight line portions along the outer edge of the gate electrode 11 of the conductor 15. That is, one portion 15C is located in a portion including the center of a straight line portion along the right side of the gate electrode 11 of the conductor 15. One portion 15C is located in a portion including the center of a straight line portion along the left side of the gate electrode 11 of the conductor 15. One portion 15C is located in a portion including the center of a straight line portion along the upper side of the gate electrode 11 of the conductor 15. One portion 15C is located in a portion including the center of a straight line portion along the lower side of the gate electrode 11 of the conductor 15.

[0083] 16, the portion 15C can be located in only one, two, or three of the four linear segments. The portion 15C can be located in any of the four linear segments. For example, the portion 15C can be located only in the upper linear segment and the lower linear segment along the y-axis. Or, the portion 15C can be located only in the left linear segment and the right linear segment along the y-axis.

[0084] As shown in FIG. 17, the portion 15D does not have to be provided.

[0085] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope of the invention and its equivalents described in the claims, as well as in the scope and spirit of the invention.

[0086] The embodiment may take the following aspects. [1] a substrate having a first surface; an insulator surrounding a first region along the first surface in a region of the substrate that contacts the first surface; a first element disposed in the first region and including a gate electrode disposed above the first surface of the substrate and having a first resistivity; a first conductor disposed above the first surface of the substrate in the first region, the first conductor comprising a material that is the same as a material contained in the gate electrode and having a second resistivity different from the first resistivity; A semiconductor device comprising: [2] the first conductor is located between an edge of the first region and the first element when viewed from above the first surface. The semiconductor device according to [1]. [3] The gate electrode and the first conductor are at least partially extended in the same direction. The semiconductor device according to [1] or [2]. [4] The first conductor surrounds the first element. The semiconductor device according to any one of [1] to [3]. [5] the first conductor contains an impurity different from the impurity contained in the gate electrode, or contains an impurity at a concentration different from the impurity contained in the gate electrode; The semiconductor device according to any one of [1] to [4]. [6] the gate electrode comprises a first proportion of a silicide; the first conductor comprises a second proportion of silicide that is lower than the first proportion; The semiconductor device according to any one of [1] to [5]. [7] a substrate having a first surface; an insulator surrounding a first region along the first surface in a region of the substrate that contacts the first surface; a first element disposed in the first region and including a gate electrode disposed above the first surface of the substrate and having a first resistivity; a first conductor disposed above the first surface of the substrate in the first region, the first conductor including the same material as the gate electrode and surrounding the first element; a first insulator on a top surface of the first conductor; a second conductor on the first insulator; and A semiconductor device comprising: [8] the first insulator and the second conductor surround the first element; The semiconductor device according to [7]. [9] the gate electrode and the first conductor contain the same type or substantially the same concentration of impurities; the second conductor contains an impurity of a different type or concentration from the gate electrode or the first conductor; The semiconductor device according to [7] or [8].

[10] a substrate having a first surface; a first element disposed in the first region and including a gate electrode disposed above the first surface of the substrate and having a first resistivity; a first insulator on an upper surface of an outer edge portion of the gate electrode; a second conductor disposed on the first insulator and having a second resistivity different from the first resistivity; A semiconductor device comprising:

[11] the gate electrode includes a plurality of first portions arranged at intervals and a second portion connecting the plurality of first portions; the portion of the outer edge of the gate electrode is an outermost first portion of the plurality of first portions or the second portion; The semiconductor device according to

[10] .

[12] a third conductor disposed above the substrate in a second region outside the first region, the third conductor comprising the same material as the gate electrode; a fourth conductor disposed above the third conductor and containing the same material as the second conductor; and a second element including the first element and the second element are mounted on the semiconductor device; The semiconductor device according to any one of [7] to

[11] .

[13] the second element is a capacitor and further comprises a second insulator on the third conductor; The fourth conductor is provided on the second insulator. The semiconductor device according to

[12] .

[14] The second conductor contains an impurity of a different type or concentration from that of the fourth conductor. The semiconductor device according to

[12] . [Explanation of symbols]

[0087] 1...semiconductor device, 3...element region, 4...element isolation insulator, 5...element (transistor), 7...conductor (resistor), 8...capacitor, 11...conductor (gate electrode), 12...silicide, 13...conductor (dummy gate electrode), 15...conductor (resistor), 19...silicide, 21...substrate, 22...deep n-well, 23...p-well, 24...n-type drift region, 25...n-well, 31...insulator, 34...n + type source region, 36...insulator, 37...n + Type drain region, 38...insulator, 42...sidewall insulator, 45...conductor, 46...insulator, 47...conductor, 51...insulator.

Claims

1. a substrate having a first surface; an insulator surrounding a first region along the first surface in a region of the substrate that contacts the first surface; a first element disposed in the first region and including a gate electrode disposed above the first surface of the substrate and having a first resistivity; a first conductor provided above the first surface of the substrate in the first region, containing the same material as that contained in the gate electrode and having a second resistivity different from the first resistivity, and extending along the first surface to surround the gate electrode continuously or with intervals; A semiconductor device comprising:

2. the first conductor is located between an edge of the first region and the first element when viewed from above the first surface. The semiconductor device according to claim 1 .

3. The gate electrode and the first conductor are at least partially extended in the same direction. The semiconductor device according to claim 1 or 2.

4. the first conductor contains an impurity different from the impurity contained in the gate electrode, or contains an impurity having a concentration different from the concentration of the impurity contained in the gate electrode; The semiconductor device according to claim 1 .

5. the gate electrode comprises a first proportion of silicide; the first conductor comprises a second percentage of silicide that is lower than the first percentage; The semiconductor device according to claim 1 .

6. a substrate having a first surface; an insulator surrounding a first region along the first surface in a region of the substrate that contacts the first surface; a first element disposed in the first region and including a gate electrode disposed above the first surface of the substrate and having a first resistivity; a first conductor disposed above the first surface of the substrate in the first region, the first conductor including the same material as the gate electrode and surrounding the first element; a first insulator on a top surface of the first conductor; a second conductor on the first insulator; and A semiconductor device comprising:

7. the first insulator and the second conductor surround the first element; The semiconductor device according to claim 6.

8. a third conductor disposed above the substrate in a second region outside the first region, the third conductor comprising the same material as the gate electrode; a fourth conductor provided above the third conductor and containing the same material as the second conductor; and a second element including the first element and the second element are mounted on the semiconductor device; The semiconductor device according to claim 6 or 7.

9. The second conductor contains an impurity of a different type or concentration from that of the fourth conductor. The semiconductor device according to claim 8.

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