Wiring Board
Patent Information
- Application Number
- JP2021156852
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-09-27
- Publication Date
- 2025-01-15
- Estimated Expiration
- 2041-09-27
AI Technical Summary
【0005】 本開示は、以下の形態として実現することが可能である。 (1)本開示の一形態によれば、配線基板が提供される。この配線基板は、絶縁材料によって構成される絶縁部と、導体配線とを備える第1絶縁基板と、前記第1絶縁基板の上面に設けられた複数の薄膜キャパシタと、半導体素子と、半導体素子を搭載した第2絶縁基板と、のうちの少なくとも一方である複数の電子部品と、を備え、前記複数の電子部品は、1以上の前記電子部品によって構成されるグループごとに、前記複数の薄膜キャパシタのうちのいずれかにおいて、該薄膜キャパシタにおける前記第1絶縁基板と対向する面の裏面上に搭載されており、前記複数の薄膜キャパシタの各々は、該薄膜キャパシタ上に配置された前記電子部品と、前記第1絶縁基板の前記導体配線と、を電気的に接続する回路中に配置されており、前記複数の薄膜キャパシタのうちの少なくとも1つの薄膜キャパシタの静電容量は、前記複数の薄膜キャパシタのうちの他の薄膜キャパシタの静電容量とは異なり、前記複数の薄膜キャパシタの各々が備える誘電体層は、同種の誘電体により構成されており、前記複数の薄膜キャパシタのうちの前記少なくとも1つの薄膜キャパシタは、前記他の薄膜キャパシタに比べて、前記誘電体層の面積が前記第1絶縁基板の上面視で異なる。 この形態の配線基板によれば、複数の薄膜キャパシタの各々が備える誘電体層は、同種の誘電体により構成されており、複数の薄膜キャパシタのうちの記少なくとも1つの薄膜キャパシタは、他の薄膜キャパシタに比べて、誘電体層の面積が第1絶縁基板の上面視で異なると共に、静電容量が異なっている。そのため、配線基板が複数の電子部品を搭載する際に、各電子部品のノイズ低減に適した静電容量を有する薄膜キャパシタ上に電子部品を搭載することが可能になる。そして、薄膜キャパシタ上に搭載した電子部品のノイズ除去に必要な静電容量を、各薄膜キャパシタの面積により確保することが可能になる。このとき、ノイズ除去のためにキャパシタに望まれる静電容量が比較的小さい電子部品は、静電容量が比較的小さく上面視したときの面積が比較的小さい薄膜キャパシタ上に搭載すればよい。そのため、配線基板が備える複数の薄膜キャパシタ30の面積の合計を抑えることができる。その結果、配線基板全体の小型化が可能になる。 さらに、配線基板が備える複数の薄膜キャパシタの各々が備える誘電体層を同種の誘電体により構成するため、例えば、上記複数の薄膜キャパシタのうちで同じ厚みの誘電体層を備える薄膜キャパシタについては、大きさの異なる薄膜キャパシタを一体でまとめて形成した後に個々の薄膜キャパシタに分割して作製することができる。そのため、配線基板の製造工程を簡素化することができる。 (2)上記形態の配線基板において、 前記薄膜キャパシタ内には、前記回路を構成する貫通ビアが形成されていることとしてもよい。このような構成とすれば、薄膜キャパシタ内において回路構成を簡素化して回路長を短くし、薄膜キャパシタによるノイズ低減の効果を高めることができる。 (3)上記形態の配線基板において、前記配線基板を、前記第1絶縁基板と前記薄膜キャパシタとの積層方向から見たときに、前記複数の薄膜キャパシタが、前記第1絶縁基板の外周の内側に配置されていることとしてもよい。このような構成とすれば、第1絶縁基板における薄膜キャパシタが配置される面を有効利用しつつ、配線基板に搭載された薄膜キャパシタによって、配線基板を実装する動作が妨げられることを抑えることができる。 (4)上記形態の配線基板において、前記第1絶縁基板と、前記薄膜キャパシタとは、互いに樹脂を含む絶縁性の接着層を介して接合されていることとしてもよい。このような構成は、例えば、第1絶縁基板と薄膜キャパシタとを予め別体で作製した後に、第1絶縁基板と薄膜キャパシタとの間に上記接着層を介在させて、第1絶縁基板と薄膜キャパシタとを接合することで得られる。このような構成とするならば、例えば第1絶縁基板のような基板内に薄膜キャパシタを内蔵する場合とは異なり、配線基板にキャパシタを設けることに起因して絶縁基板の構内部造が複雑化することがないため、配線基板全体の製造工程を簡素化することができる。また、薄膜キャパシタを第1絶縁基板上に搭載するのに先だって、例えば薄膜キャパシタの回路を検査することができ、検査に合格した薄膜キャパシタのみを用いて配線基板を組み立てることができる。その結果、配線基板を製造する際の歩留まりを向上させることができる。 本開示は、上記以外の種々の形態で実現可能であり、例えば、配線基板の製造方法などの形態で実現することが可能である。
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a wiring board. [Background technology]
[0002] In recent years, there has been an increasing demand for miniaturization and integration of electronic components, and wiring boards on which multiple semiconductor chips (elements) are mounted are widely used. In addition, a technique related to wiring boards is known in which a capacitor is mounted to reduce noise. Examples of capacitors known include chip capacitors and thin film capacitors. Thin film capacitors in particular are more advantageous in miniaturizing wiring boards than chip capacitors (see, for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 4-211191 [Patent Document 2] JP 2020-136513 A Summary of the Invention [Problem to be solved by the invention]
[0004] In the case of a wiring board as described above on which a plurality of elements are mounted and which uses a thin film capacitor to reduce noise, it has been desired to simplify the manufacturing process while preventing the wiring board from becoming large in overall size. [Means for solving the problem]
[0005] The present disclosure can be realized in the following forms. (1) According to one embodiment of the present disclosure, there is provided a wiring board comprising: a first insulating substrate including an insulating portion made of an insulating material and a conductor wiring; a plurality of thin film capacitors provided on an upper surface of the first insulating substrate; a semiconductor element; and a second insulating substrate having the semiconductor element mounted thereon; the plurality of electronic components are mounted on a rear surface of the surface of the thin film capacitor facing the first insulating substrate in each group of one or more of the electronic components, each of the plurality of thin film capacitors is disposed in a circuit electrically connecting the electronic component disposed on the thin film capacitor and the conductor wiring of the first insulating substrate; a capacitance of at least one thin film capacitor of the plurality of thin film capacitors is different from a capacitance of the other thin film capacitors of the plurality of thin film capacitors; a dielectric layer of each of the plurality of thin film capacitors is made of the same type of dielectric; and an area of the dielectric layer of the at least one thin film capacitor of the plurality of thin film capacitors is different from that of the other thin film capacitors when viewed from above on the first insulating substrate. According to the wiring board of this embodiment, the dielectric layer of each of the thin film capacitors is made of the same type of dielectric, and at least one of the thin film capacitors has a different area of the dielectric layer in a top view of the first insulating substrate and a different capacitance compared to the other thin film capacitors. Therefore, when the wiring board is mounted with a plurality of electronic components, it is possible to mount the electronic components on the thin film capacitors having a capacitance suitable for noise reduction of each electronic component. Then, it is possible to ensure the capacitance required for noise elimination of the electronic components mounted on the thin film capacitors by the area of each thin film capacitor. At this time, an electronic component having a relatively small capacitance desired for the capacitor to eliminate noise may be mounted on a thin film capacitor having a relatively small capacitance and a relatively small area when viewed from above. Therefore, the total area of the thin film capacitors 30 provided on the wiring board can be suppressed. As a result, it is possible to miniaturize the entire wiring board. Furthermore, since the dielectric layers of the multiple thin film capacitors on the wiring board are made of the same type of dielectric, for example, thin film capacitors having dielectric layers of the same thickness among the multiple thin film capacitors can be manufactured by forming thin film capacitors of different sizes together as a single unit and then dividing them into individual thin film capacitors, thereby simplifying the manufacturing process of the wiring board. (2) In the wiring board of the above embodiment, a through via that constitutes the circuit may be formed in the thin film capacitor. With such a configuration, the circuit configuration in the thin film capacitor can be simplified to shorten the circuit length, thereby enhancing the effect of noise reduction by the thin film capacitor. (3) In the wiring board of the above embodiment, when the wiring board is viewed from a lamination direction of the first insulating substrate and the thin film capacitors, the thin film capacitors may be arranged inside the outer periphery of the first insulating substrate. With this configuration, it is possible to effectively utilize the surface of the first insulating substrate on which the thin film capacitors are arranged, while preventing the thin film capacitors mounted on the wiring board from interfering with the operation of mounting the wiring board. (4) In the wiring board of the above embodiment, the first insulating substrate and the thin film capacitor may be bonded to each other via an insulating adhesive layer containing a resin. This configuration can be obtained, for example, by fabricating the first insulating substrate and the thin film capacitor separately in advance, and then bonding the first insulating substrate and the thin film capacitor by interposing the adhesive layer between the first insulating substrate and the thin film capacitor. With this configuration, unlike the case where a thin film capacitor is built into a substrate such as the first insulating substrate, the structure of the insulating substrate is not complicated due to the provision of a capacitor in the wiring substrate, and the manufacturing process of the entire wiring substrate can be simplified. In addition, prior to mounting the thin film capacitor on the first insulating substrate, for example, the circuit of the thin film capacitor can be inspected, and the wiring substrate can be assembled using only the thin film capacitors that have passed the inspection. As a result, the yield rate when manufacturing the wiring substrate can be improved. The present disclosure can be realized in various forms other than those described above, and can be realized in the form of, for example, a method for manufacturing a wiring board. [Brief description of the drawings]
[0006] [Figure 1] FIG. 1 is a cross-sectional view illustrating a schematic configuration of a wiring board. [Diagram 2] FIG. 1 is a perspective view that typically illustrates the appearance of a wiring board in the process of being manufactured. [Diagram 3] FIG. 1 is a perspective view that typically illustrates the appearance of a wiring board in the process of being manufactured. [Figure 4] 4 is a flowchart showing a method for manufacturing a wiring board. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0007] A. Wiring board configuration: FIG. 1 is a cross-sectional view that shows a schematic configuration of a wiring board 10 according to a first embodiment of the present disclosure. In addition, FIG. 2 and FIG. 3 are perspective views that show a schematic appearance of the wiring board 10 during manufacture. In FIG. 3, the position of the cross section in FIG. 1 is shown as a II cross section. In FIG. 1 to FIG. 3, mutually orthogonal XYZ axes are shown to specify the direction. The X axis, Y axis, and Z axis shown in each figure each indicate the same direction. In this specification, the Z axis indicates the vertical direction and is also called the "stacking direction". The +Z side is also called the upper side, and the -Z side is also called the lower side. The X axis and the Y axis indicate the horizontal direction. In addition, the vertical direction and the horizontal direction described above are specified for the convenience of explaining the configuration of the wiring board 10, and may not coincide with the direction in which the wiring board 10 is installed. Note that FIG. 1 to FIG. 3 show the layout of each part in a schematic manner, and do not accurately show the ratio of the dimensions of each part.
[0008] The wiring board 10 of this embodiment includes a first insulating substrate 20, a plurality of thin-film capacitors 30, and an electronic component 40 mounted on the thin-film capacitor 30. The wiring substrate 10 can form, for example, an LSI package. In this case, the wiring substrate 10, which has a semiconductor element or the like mounted on its upper surface, is connected to a motherboard or the like on its lower surface. FIG. 1 shows a state in which the first insulating substrate 20, the thin-film capacitor 30, and the electronic component 40 are separated from each other, and FIG. 1 shows a portion including one thin-film capacitor 30 in a cross section II of the wiring substrate 10. FIG. 2 shows the appearance of the first insulating substrate 20, and FIG. 3 shows a state in which a plurality of thin-film capacitors 30 (two in FIG. 3) are arranged on the first insulating substrate 20.
[0009] The first insulating substrate 20 is a rectangular plate-like member in top view, and includes an insulating portion made of an insulating material and conductive wiring. The first insulating substrate 20 includes a first layer 22 and a second layer 24, which are laminated from bottom to top in this order. The first layer 22 is formed using ceramics as an insulating material, such as alumina (Al 2 O 3 The second layer 24 may be a ceramic layer mainly composed of quartz, glass ceramics, beryllia (BeO), or aluminum nitride (AlN). In the present specification, the phrase "mainly composed of" a specific component means that the content of the specific component is 50% by volume or more. The second layer 24 is formed using a resin as an insulating material, and may be a resin layer mainly composed of, for example, polyimide resin (PI), epoxy resin (EP), bismaleimide-triazine resin (BT), polyethylene terephthalate resin (PET), or polyphenylene ether resin (PPE). The thickness of the first insulating substrate 20 may be, for example, 1.55 to 7.5 mm, the thickness of the first layer 22 may be, for example, 1.5 to 7.0 mm, and the thickness of the second layer 24 may be, for example, 0.05 to 0.5 mm.
[0010] A plurality of first electrode pads 26 are provided on the lower surface of the first layer 22, and a plurality of second electrode pads 28 are provided on the upper surface of the second layer 24. Conductive wiring composed of a conductor layer (conductor pattern), a through-hole conductor, a via-hole conductor, etc. is formed inside each of the first layer 22 and the second layer 24. The first electrode pads 26 formed on the lower surface of the first layer 22 and the second electrode pads 28 formed on the upper surface of the second layer 24 are electrically connected by this conductor wiring, and a part of an electric circuit related to the operation of a semiconductor element mounted on the wiring board 10 is formed. However, in FIG. 1, the conductor wiring formed inside the first layer 22 and the second layer 24 is omitted. The first electrode pads 26 are used to connect the wiring board 10 to a motherboard, and at least a part of the second electrode pads 28 are used to connect to a thin-film capacitor 30, as described later.
[0011] In Fig. 2, mounting areas AR1 to AR5 arranged on the upper surface of the second layer 24 are surrounded by a dashed line. The mounting areas AR1 to AR5 are regions where semiconductor elements or thin film capacitors 30 are arranged, and each of the mounting areas is provided with a plurality of second electrode pads 28. Fig. 3 shows how the thin film capacitor 30 is mounted on mounting area AR1 and mounting area AR3 of the mounting areas AR1 to AR5. The number of mounting areas may be any number other than five, as long as the thin film capacitor 30 is mounted on each of at least two or more mounting areas.
[0012] As described above, the thin film capacitor 30 is disposed in any one of the mounting areas AR1 to AR5 on the upper surface of the first insulating substrate 20. As shown in Fig. 1, the thin film capacitor 30 has a structure in which a lower insulating layer 31, a lower electrode layer 32, a dielectric layer 33, an upper electrode layer 34, and an upper insulating layer 35 are laminated in this order from bottom to top. The thin film capacitor 30 further includes a plurality of through vias 36 and a plurality of third electrode pads 37. The thin film capacitor 30 may have a thickness of, for example, 0.05 to 0.15 mm.
[0013] The dielectric layer 33 is made of an insulating material, and can be made of, for example, titanate (barium titanate, strontium titanate, lead titanate, etc.), tantalum oxide, titanium oxide, etc. In this embodiment, the dielectric layer 33 of each of the thin film capacitors 30 included in the wiring board 10 is made of the same type of dielectric.
[0014] The lower electrode layer 32 and the upper electrode layer 34 are formed of a conductive material, and may be formed of, for example, nickel, copper, or an alloy containing these. The conductive materials constituting the lower electrode layer 32 and the upper electrode layer 34 may be the same or different. The lower electrode layer 32 and the upper electrode layer 34 are formed on each surface of the dielectric layer 33 to have a predetermined shape (pattern).
[0015] The lower insulating layer 31 and the upper insulating layer 35 are made of an insulating material and can be made of, for example, the same insulating material as the first layer 22 and the second layer 24 of the first insulating substrate 20. From the viewpoint of ease of manufacture, it is desirable to make them of the same resin material as the second layer 24. The insulating materials making up the lower insulating layer 31 and the upper insulating layer 35 may be the same or different.
[0016] The through vias 36 are provided so as to penetrate the thin film capacitor 30 in the thickness direction (Z-axis direction). The through vias 36 are made of a conductive material, and can be formed of, for example, copper (Cu), silver (Ag), or an alloy mainly composed of these metals. Each of the multiple through vias 36 provided in the thin film capacitor 30 is provided at a position that overlaps with one of the multiple second electrode pads 28 provided in the corresponding mounting area in the Z-axis direction when the thin film capacitor 30 is placed in the corresponding mounting area on the upper surface of the second layer 24 of the first insulating substrate 20. The third electrode pad 37 is provided on the upper surface of the upper insulating layer 35 so as to cover the exposed end portion of each through via 36 and to be electrically connected to each through via 36. Therefore, when the thin film capacitor 30 is mounted on the first insulating plate 20, a specific first electrode pad 26 provided on the lower surface of the first insulating substrate 20 and a specific third electrode pad 37 provided on the upper surface of the thin film capacitor 30 are electrically connected via the conductive wiring and the through vias 36 within the first insulating substrate 20.
[0017] 1 shows three through vias 36 connected to electronic components 40 arranged on the thin film capacitor 30, specifically, three through vias 36 constituting wiring connected to a power terminal, a ground terminal, and a signal terminal of the electronic components 40. When a plurality of electronic components 40 are mounted on one thin film capacitor 30, the thin film capacitor 30 may be provided with through vias 36 in a number corresponding to the number of connection terminals of the mounted electronic components 40 so that each of the mounted electronic components 40 is connected to the above-mentioned set of wiring.
[0018] The electronic component 40 is a semiconductor element or an insulating substrate (hereinafter also referred to as a second insulating substrate) on which a semiconductor element is mounted, and the wiring substrate 10 of the present embodiment has a plurality of electronic components 40, which are at least one of a semiconductor element and a second insulating substrate on which a semiconductor element is mounted, mounted on the thin-film capacitor 30. More specifically, the plurality of electronic components 40 are mounted on the back surface of the surface of the thin-film capacitor 30 facing the first insulating substrate 20 (on the upper surface of the thin-film capacitor 30) in any one of the thin-film capacitors 30 for each group formed of one or more electronic components 40. Here, the second insulating substrate may be formed of, for example, a ceramic substrate similar to the first layer 22, or may be formed of a resin substrate similar to the second layer.
[0019] Some of all the electronic components 40 included in the wiring board 10 may be mounted on a mounting area on the second layer 24 where no thin-film capacitor is disposed, without being disposed on the thin-film capacitor 30. FIG. 1 illustrates a state in which a second insulating substrate 44 having a plurality of semiconductor elements 42 mounted thereon is disposed as the electronic components 40 on the thin-film capacitor 30. The thickness of the second insulating substrate 44 excluding the semiconductor elements 42 may be, for example, 0.02 to 0.5 mm. By mounting the electronic components 40 on the thin-film capacitor 30, ends (such as bumps) of the wiring structure constituting the circuit in the electronic components 40 are connected to third electrode pads 37 on the upper surface of the thin-film capacitor 30.
[0020] As described above, each of the thin film capacitors 30 is disposed in a circuit that electrically connects the electronic components 40 disposed on the thin film capacitor 30 to the conductor wiring of the first insulating substrate 20. The through vias 36 in the thin film capacitor 30 form part of the above-mentioned circuit.
[0021] B. Capacitance of thin film capacitors: In this embodiment, the capacitance of at least one thin film capacitor 30 among the plurality of thin film capacitors 30 provided on the wiring board 10 is different from the capacitance of the other thin film capacitors 30 among the plurality of thin film capacitors 30 provided on the wiring board 10. In this embodiment, the at least one thin film capacitor 30 and the other thin film capacitors 30 are made of the same type of dielectric. The capacitance is made different between the at least one thin film capacitor 30 and the other thin film capacitors 30 by making the area of the dielectric layer 33 different when viewed from above the first insulating substrate 20. In addition, the thickness of the dielectric layer 33 may be made different between the at least one thin film capacitor 30 and the other thin film capacitors 30, but in this embodiment, the thickness is also the same.
[0022] The thin film capacitor 30 functions as a decoupling capacitor that absorbs current changes and suppresses fluctuations in the power supply voltage and the generation of noise. For example, the faster the signal transmission speed (communication speed, etc.) of the semiconductor element (semiconductor element 42 on the second insulating substrate 44 when the electronic component 40 is the second insulating substrate 44 on which the semiconductor element 42 is mounted) mounted on the thin film capacitor 30 is, or the larger the power consumption of the semiconductor element mounted on the thin film capacitor 30 is, the larger the capacitance of the dielectric layer 33 of the thin film capacitor 30 is desirable. In addition, the capacitance desired to be secured in the thin film capacitor 30 differs depending on the operating frequency of the semiconductor element mounted on the thin film capacitor 30. In this embodiment, the capacitance desired to be secured in the thin film capacitor 30 according to the semiconductor element mounted is secured by appropriately setting the area of the dielectric layer 33. Therefore, in the multiple thin film capacitors 30 provided in the wiring board 10, the area of the dielectric layer 33 differs between at least one thin film capacitor 30 and the other thin film capacitors 30 when viewed from above on the first insulating substrate 20, and the capacitances are different.
[0023] Furthermore, in the wiring board 10 of the present embodiment, when a plurality of electronic components 40 are mounted via the thin film capacitors 30, the plurality of electronic components 40 are classified so that electronic components 40 having relatively similar capacitances desired to be secured by the thin film capacitors 30 are grouped together. Then, for each group, the electronic components 40 are mounted on a common thin film capacitor 30 in which the area of the dielectric layer 33 is appropriately set. For example, the area of the thin film capacitor 30 on which the electronic components 40 of the same group are mounted may be determined so as to satisfy the largest capacitance among the capacitances required for noise removal by each of the electronic components 40 included in the same group.
[0024] Normally, each electronic component 40 has a connection terminal formed over the entire back surface, and therefore, when the thin film capacitor 30 is viewed from above, each electronic component 40 is disposed inside the outer periphery of the thin film capacitor 30. In addition, in this embodiment, each of the thin film capacitors 30 provided on the wiring board 10 is disposed inside the outer periphery of the first insulating substrate 20 when viewed from above (when the wiring board 10 is viewed from the stacking direction of the first insulating substrate 20 and the thin film capacitors 30). Therefore, the surface of the first insulating substrate 20 on which the thin film capacitors 30 are disposed can be effectively utilized, while preventing the thin film capacitors 30 mounted on the wiring board 10 from interfering with the operation of mounting the wiring board 10.
[0025] C. Manufacturing method of wiring board: FIG. 4 is a flow chart showing an example of a method for manufacturing the wiring board 10. When manufacturing the wiring board 10, first, the first insulating substrate 20 is produced (step T100). Here, a plurality of ceramic green sheets that are materials for each layer constituting the first insulating substrate 20 are prepared, and holes are formed in the prepared green sheets at predetermined positions by punching or laser processing. Then, the formed holes are filled with conductive paste by screen printing or the like to form unfired vias. In addition, an unfired conductor layer having a pattern for forming a part of the conductor wiring is formed by screen printing a conductor paste on a specific green sheet. These green sheets are stacked in a specific order, and heated and pressed to obtain a laminate (hereinafter referred to as a first insulating substrate laminate). The obtained first insulating substrate laminate is degreased and fired to obtain the first insulating substrate 20.
[0026] Next, the thin film capacitor 30 is fabricated (step T110). As described above, the thin film capacitors 30 provided on the wiring board 10 each have a dielectric layer 33 made of the same type of dielectric. Some of the thin film capacitors 30 may have a different thickness of the dielectric layer 33 compared to the other thin film capacitors 30, but here, an example of a manufacturing method in which the dielectric layers 33 of the thin film capacitors 30 provided on the wiring board 10 have the same thickness is shown. If the type of dielectric constituting the dielectric layer 33 and the thickness of the dielectric layer 33 are the same, these thin film capacitors 30 can be manufactured at the same time.
[0027] Specifically, a dielectric sheet having a size large enough to produce the thin-film capacitors 30 is prepared, and metal foil formed into a predetermined pattern to form the lower electrode layer 32 or the upper electrode layer 34 is placed on each side of the dielectric sheet. Alternatively, the lower electrode layer 32 and the upper electrode layer 34 may be formed on the dielectric sheet by a different method, such as a film formation method such as a sputtering method, a CVD method, or a PVD method. The lower electrode layer 32 and the upper electrode layer 34 may be formed by patterning the obtained conductor layer by etching or the like. Naturally, patterning may be performed on the lower electrode layer 32, the dielectric layer 33, and the upper electrode layer 34 integrated together.
[0028] Thereafter, an insulating layer (e.g., a resin layer) is provided so as to cover each of the lower electrode layer 32 and the upper electrode layer 34, and the lower insulating layer 31 and the upper insulating layer 35 are formed to fabricate a laminate (hereinafter referred to as a capacitor laminate sheet) including the lower insulating layer 31, the lower electrode layer 32, the dielectric layer 33, the upper electrode layer 34, and the upper insulating layer 35. Holes are formed at predetermined positions of the obtained capacitor laminate sheet by punching or laser processing, and the formed holes are filled with a conductive paste by screen printing or the like to form through vias 36. Then, on the upper surface of the upper insulating layer 35, a pattern of a conductive coating is provided by screen printing or the like so as to cover the exposed end portions of the through vias 36, to form a plurality of third electrode pads 37. Thereafter, the capacitor laminate sheet is diced into a plurality of predetermined sizes, and cut into pieces of a size corresponding to each of the plurality of types of thin film capacitors 30 provided on the wiring board 10. As a result, a plurality of types of thin film capacitors 30 provided on the wiring board 10 are obtained.
[0029] Also, the electronic component 40 to be mounted on the wiring board 10 is prepared (step T120). That is, a semiconductor element as the electronic component 40, or a second insulating substrate with a semiconductor element mounted thereon is prepared. Then, the first insulating substrate 20, the thin film capacitor 30, and the electronic component 40 are bonded together (step T130) to complete the wiring board 10. The thin film capacitor 30 is bonded to the first insulating substrate 20 by, for example, TCB (Thermal Compression Bonding) or lamination pressing using equipment such as a flip chip bonder (FC bonder). The bonding between the first insulating substrate 20 and the thin film capacitor 30 can be performed, for example, by interposing an insulating adhesive layer containing a resin between the first insulating substrate 20 and the thin film capacitor 30. The resin contained in the adhesive layer bonding the first insulating substrate 20 and the thin film capacitor 30 to each other can be, for example, the same type of resin as the resin constituting the second layer 24 of the first insulating substrate 20 or the resin constituting the lower insulating layer 31 of the thin film capacitor 30. Furthermore, electronic components 40 such as semiconductor elements are bonded onto the thin film capacitors 30 bonded onto the first insulating substrate 20 by, for example, thermal compression bonding (TCB) using equipment such as an FC bonder.
[0030] According to the wiring board 10 of the present embodiment configured as described above, the dielectric layer 33 of each of the thin-film capacitors 30 is made of the same type of dielectric, and at least one of the thin-film capacitors 30 has a different area of the dielectric layer 33 as viewed from above the first insulating substrate 20 and a different capacitance compared to the other thin-film capacitors 30. With this configuration, when the wiring board 10 is mounted with a plurality of electronic components 40 having different properties, it is possible to mount the electronic components 40 on the thin-film capacitors 30 having a capacitance suitable for reducing noise of each electronic component 40. Then, it is possible to ensure the capacitance required for noise removal of the electronic components 40 mounted on the thin-film capacitors 30 by the area of each thin-film capacitor 30.
[0031] In this case, since the electronic component 40 having a relatively small capacitance desired for the thin film capacitor 30 for noise removal can be mounted on the thin film capacitor 30 having a relatively small capacitance and a relatively small area when viewed from above, the total area of the thin film capacitors 30 provided on the wiring board 10 can be reduced. As a result, the wiring board 10 can be reduced in size as a whole. That is, as described above, since each electronic component 40 usually has a connection terminal (bump) formed on the entire back surface, when the thin film capacitor 30 is viewed from above, the area of the thin film capacitor 30 is equal to or larger than the total area of the mounted electronic components 40. However, according to this embodiment, the area of the thin film capacitor 30 can be reduced to a necessary range from the viewpoint of the size and capacitance of the electronic components 40, thereby simplifying the configuration of the wiring board 10.
[0032] In order to miniaturize the entire wiring board 10, an example of a method for determining on what thin-film capacitor 30 each of the multiple electronic components 40 mounted on the wiring board 10 is to be placed is shown below. First, the size of the largest thin-film capacitor 30 is set according to the electronic component 40 that requires the thin-film capacitor 30 to have the largest capacitance for noise reduction among the multiple electronic components 40 mounted on the wiring board 10. Then, among the electronic components 40 that can reduce noise by the thin-film capacitor 30 other than the electronic component 40 that requires the largest capacitance, the electronic component 40 to be mounted on the thin-film capacitor 30 together with the electronic component 40 that requires the largest capacitance is determined within the range allowed by the area of the thin-film capacitor 30. After that, the size of the second largest thin-film capacitor 30 is set according to the electronic component 40 that requires the thin-film capacitor 30 to have the largest capacitance for noise reduction among the remaining electronic components 40. Then, from among the remaining electronic components 40 and the electronic components 40 capable of reducing noise by the second largest thin-film capacitor 30, an electronic component 40 to be mounted on the second largest thin-film capacitor 30 is determined, and the same operation is repeated. At this time, the arrangement of the entire wiring board 10 may be adjusted taking into consideration the combination of electronic components 40 to be arranged nearby.
[0033] Furthermore, in this embodiment, by making each of the dielectric layers 33 made of the same type of dielectric have the same thickness, the dielectric constant of each thin-film capacitor 30 can be adjusted only by the area of the dielectric layer 33. Then, a plurality of thin-film capacitors 30 having dielectric layers 33 with different areas can be integrally formed and then divided into individual thin-film capacitors, which simplifies the manufacturing process. However, some of the dielectric layers 33 of each thin-film capacitor 30 may have a different thickness from the other dielectric layers 33. In this case, each thin-film capacitor 30 having a dielectric layer 33 of the same thickness can be formed integrally and then divided. When some of the dielectric layers 33 of each thin-film capacitor 30 have different thicknesses, the total area of the dielectric layers 33 of each thin-film capacitor 30 can be reduced, and the wiring board 10 can be further miniaturized.
[0034] Furthermore, according to this embodiment, the thin film capacitor 30 is not built into a substrate such as the first insulating substrate 20, but is fabricated separately from the first insulating substrate 20 and then mounted on the first insulating substrate 20. Therefore, before mounting the thin film capacitor 30 on the first insulating substrate 20, for example, the circuit of the thin film capacitor 30 can be inspected, and if there is a defect in the thin film capacitor 30, the wiring substrate 10 can be assembled using only the thin film capacitors 30 that have passed the inspection, without using the defective thin film capacitor 30. As a result, it is possible to prevent the entire insulating substrate from becoming defective, and to improve the yield when manufacturing the wiring substrate 10.
[0035] Furthermore, according to this embodiment, since the thin film capacitor 30 is fabricated in advance separately from the first insulating substrate 20 as described above, unlike the case where a thin film capacitor is built into a substrate such as the first insulating substrate 20, the structure of the insulating substrate is not complicated due to the provision of a capacitor in the wiring substrate. The first insulating substrate 20 and the thin film capacitor 30, which are fabricated in advance separately, can be easily bonded together by, for example, interposing an insulating adhesive layer containing a resin, and can be bonded together by a general bonding process such as thermocompression bonding. This simplifies the manufacturing process of the entire wiring substrate.
[0036] Furthermore, according to this embodiment, since the multiple thin film capacitors 30 are arranged side by side on the upper surface of the first insulating substrate 20, mutual interference between the multiple thin film capacitors 30 can be suppressed, and the noise reduction effect can be enhanced. Furthermore, since the multiple electronic components 40 provided on the wiring substrate 10 are divided into groups and arranged on any of the thin film capacitors 30, signal congestion between the electronic components 40 and mutual interference between the signals can be suppressed, and the noise reduction effect can be enhanced.
[0037] In particular, according to this embodiment, the electronic component 40 is placed on the thin film capacitor 30, and the thin film capacitor 30 is placed directly below the electronic component 40 that is the target of noise removal. This shortens the circuit length, making it easier to suppress the fluctuation range of the charge in each semiconductor element, and enables efficient removal of signal noise.
[0038] Furthermore, according to this embodiment, in each thin-film capacitor 30, through-vias 36 are formed to form part of a circuit that electrically connects electronic components 40 arranged on the thin-film capacitor 30 to the conductor wiring of the first insulating substrate 20, and therefore the circuit configuration can be simplified, the circuit length can be shortened, and the effect of noise reduction can be enhanced. However, as long as the influence of the circuit length is within an allowable range, the conductor portion that forms the above circuit in the thin-film capacitor 30 may have a portion that is routed in a horizontal direction perpendicular to the stacking direction (Z-axis direction), for example.
[0039] C. Other embodiments: In the above embodiment, the first insulating substrate 20 includes the first layer 22 and the second layer 24, but may have a different configuration. For example, the first insulating substrate 20 may be made of only a ceramic substrate similar to the first layer 22, or may be made of only a resin substrate similar to the second layer.
[0040] In the above-described embodiment, the first insulating substrate 20 and the thin film capacitor 30 are bonded by interposing an insulating adhesive layer containing a resin between the first insulating substrate 20 and the thin film capacitor 30, but the bond may also be achieved by interposing solder between the first insulating substrate 20 and the thin film capacitor 30.
[0041] The present disclosure is not limited to the above-mentioned embodiments, etc., and can be realized in various configurations without departing from the spirit of the present disclosure. For example, the technical features in the embodiments corresponding to the technical features in each form described in the Summary of the Invention column can be appropriately replaced or combined in order to solve some or all of the above-mentioned problems or to achieve some or all of the above-mentioned effects. Furthermore, if a technical feature is not described as essential in this specification, it can be appropriately deleted. [Explanation of symbols]
[0042] 10...Wiring board 20...First insulating substrate 22…1st layer 24...Second layer 26…First electrode pad 28…Second electrode pad 30...Thin film capacitor 31...Lower insulating layer 32...Lower electrode layer 33...Dielectric layer 34...Top electrode layer 35…Upper insulating layer 36…Through via 37…Third electrode pad 40...Electronic components 42...Semiconductor element 44...Second insulating substrate
Claims
1. A wiring board, A first insulating substrate including an insulating portion made of an insulating material and a conductor wiring; a plurality of thin film capacitors provided on an upper surface of the first insulating substrate; A plurality of electronic components, which are at least one of a semiconductor element and a second insulating substrate having a semiconductor element mounted thereon; Equipped with the plurality of electronic components are mounted on a back surface of a surface of the thin film capacitor facing the first insulating substrate in any one of the plurality of thin film capacitors for each group constituted by one or more of the electronic components; each of the plurality of thin film capacitors is disposed in a circuit that electrically connects the electronic component disposed on the thin film capacitor and the conductor wiring of the first insulating substrate; a capacitance of at least one thin film capacitor among the plurality of thin film capacitors is different from a capacitance of another thin film capacitor among the plurality of thin film capacitors; the dielectric layers of each of the thin film capacitors are made of the same type of dielectric; At least one of the plurality of thin film capacitors has a dielectric layer having a different area from the other thin film capacitors when viewed from above on the first insulating substrate. Wiring board.
2. 2. The wiring board according to claim 1, The thin film capacitor is characterized in that a through via that constitutes the circuit is formed in the thin film capacitor. Wiring board.
3. 3. The wiring board according to claim 1, When the wiring board is viewed from a lamination direction of the first insulating substrate and the thin film capacitors, the thin film capacitors are disposed inside the outer periphery of the first insulating substrate. Wiring board.
4. 4. The wiring board according to claim 1, The first insulating substrate and the thin film capacitor are bonded to each other via an insulating adhesive layer containing a resin. Wiring board.
Citation Information
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