Single crystal silicon substrate with nitride semiconductor layer and method for manufacturing single crystal silicon substrate with nitride semiconductor layer
By epitaxially growing a 3C-SiC film on a single crystal silicon substrate with controlled dislocations, the method addresses deformation and cracking issues, enabling large-diameter nitride semiconductor layer production without warping or cracking, thus ensuring reliable manufacturing and device compatibility.
Patent Information
- Application Number
- JP2022147942
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-09-16
- Publication Date
- 2025-01-22
- Estimated Expiration
- 2042-09-16
Smart Images

Figure 0007619349000001 
Figure 0007619349000002 
Figure 0007619349000003
Abstract
Description
[Technical field]
[0001] The present invention relates to a single crystal silicon substrate with a nitride semiconductor layer and a method for manufacturing the single crystal silicon substrate with a nitride semiconductor layer, more particularly to a single crystal silicon substrate with a nitride semiconductor layer having a large diameter of 200 mm, 300 mm or more and a method for manufacturing the single crystal silicon substrate with a nitride semiconductor layer. [Background technology]
[0002] Nitride semiconductor materials, such as GaN, are capable of extremely high-speed operation due to a two-dimensional electron gas layer caused by self-polarization, and are therefore widely used in high-speed switches, high-frequency devices, and power devices, as well as light-emitting devices such as LEDs.
[0003] With this background, nitride semiconductors (e.g., GaN) have been researched for a very long time, and in addition to free-standing substrates, there are also heteroepi in which a nitride semiconductor layer is epitaxially grown on a substrate such as sapphire. Among these, "single crystal silicon substrate with nitride semiconductor layer," in which a nitride semiconductor layer is formed on a single crystal silicon substrate, is highly promising because it uses versatile single crystal silicon (Si) as a substrate, is inexpensive, and has high affinity with silicon (Si) device processes. In order to take advantage of these characteristics, research into growing a nitride semiconductor layer on a large diameter single crystal silicon (Si) substrate of 300 mm is very attractive and is being actively researched.
[0004] When a nitride semiconductor layer such as GaN is grown on a single crystal silicon (Si) substrate, a nitride semiconductor layer such as AlN is usually used as a buffer layer. In this case, a problem occurs in which Al or Ga melts back from the nitride semiconductor layer into the single crystal silicon (Si) substrate, causing defects. As a method for preventing this, a method for growing SiC on a single crystal silicon (Si) substrate, in particular, a method for growing 3C-SiC on a single crystal silicon (Si) substrate in consideration of the ease of growth on the single crystal silicon (Si) substrate, has been disclosed (see Patent Documents 1 to 4).
[0005] Furthermore, when manufacturing large-diameter single-crystal silicon substrates with nitride semiconductor layers, a problem occurs with the deformation and cracking of the single-crystal silicon substrate (wafer) caused by the difference in the linear expansion coefficient between Si and GaN. GaN growth requires a high growth temperature of over 1000°C, but this linear expansion coefficient has a large effect during the cooling process from that growth temperature to room temperature, causing deformation and cracking. If it were only deformation such as warping, there would still be a solution. However, if a large-diameter 300mm single-crystal silicon substrate (wafer) cracks, there is no solution and the problem is enormous. Even if there are no cracks immediately after the nitride semiconductor layer is grown, it may be damaged by stress during transportation of the single crystal silicon substrate (wafer) or stress during the device fabrication process, such as repeatedly chucking the single crystal silicon substrate (wafer) to the stage, causing problems such as not being able to fabricate devices with a good yield. Furthermore, wafer damage can cause contamination and damage to process equipment, so it is not just a problem for the wafer itself.
[0006] To address the problem of warping and cracking, a known solution is to use a Si substrate with a thickness of 1 mm or 1.5 mm. Although it is certainly possible to alleviate warping and cracking by increasing the thickness, this does not provide a fundamental solution, as there are problems such as the inability to use the wafer in device processes due to the increased thickness, and the problem of kerf loss caused by the final thinning of the Si substrate by grinding and polishing. [Prior art documents] [Patent documents]
[0007] [Patent Document 1] Patent No. 5693946 [Patent Document 2] Patent No. 6450282 [Patent Document 3] Patent No. 6781095 [Patent Document 4] Patent No. 6266490 [Non-patent literature]
[0008] [Non-Patent Document 1] TI Technical White Paper, “Achieving GaN Products with Lifetime Reliability” (2021). Summary of the Invention [Problem to be solved by the invention]
[0009] The present invention has been made to solve the above problems, and has an object to provide a single crystal silicon substrate with a nitride semiconductor layer having a large diameter of, for example, 200 mm or 300 mm, which is reduced in warp and is particularly free of cracks, using a Si substrate of normal thickness, and a method for manufacturing the single crystal silicon substrate with a nitride semiconductor layer. [Means for solving the problem]
[0010] The present invention has been made to achieve the above-mentioned object, and provides a single crystal silicon substrate with a nitride semiconductor layer, the single crystal silicon substrate having a 3C-SiC single crystal film epitaxially grown on the single crystal silicon substrate, and a nitride semiconductor layer epitaxially grown on the 3C-SiC single crystal film, wherein dislocations are formed throughout the single crystal silicon substrate, the length (dislocation length) of the dislocations when projected onto the single crystal silicon substrate is 1 mm or more, and the density of the dislocations is 10 / cm 2 The present invention provides a single crystal silicon substrate with a nitride semiconductor layer, characterized by the above.
[0011] According to such a single crystal silicon substrate with a nitride semiconductor layer, a Si substrate of normal thickness can be used to obtain a single crystal silicon substrate with a nitride semiconductor layer having a large diameter of, for example, 200 mm or 300 mm, with reduced warping and no cracks.
[0012] In this case, the thickness of the 3C-SiC single crystal film can be set to be not less than 50 nm and not more than 200 nm.
[0013] This makes it possible to more reliably produce single crystal silicon substrates with nitride semiconductor layers having large diameters, such as 200 mm or 300 mm, with reduced warping and no cracks, using Si substrates of normal thickness, and also makes it possible to sufficiently prevent meltback of Al or Ga.
[0014] At this time, the nitride semiconductor layer is Al x In y Ga 1-x-y N(0≦x+y≦1) can be the principal component.
[0015] As a result, a single crystal silicon substrate having a nitride semiconductor layer that is useful for a large diameter of, for example, 200 mm or 300 mm can be obtained using a Si substrate of normal thickness with reduced warping and no cracks in particular.
[0016] The present invention has been made to achieve the above object, and provides a method for manufacturing a single crystal silicon substrate with a nitride semiconductor layer, comprising the steps of epitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, and epitaxially growing a nitride semiconductor layer on the 3C-SiC single crystal film, wherein in the step of epitaxially growing the 3C-SiC single crystal film on the single crystal silicon substrate, the thickness of the 3C-SiC single crystal film is set to 200 nm or less, and by carrying out the step of epitaxially growing the nitride semiconductor layer on the 3C-SiC single crystal film, dislocations are formed throughout the entire single crystal silicon substrate, the length (dislocation length) of the dislocations when projected onto the single crystal silicon substrate is set to 1 mm or more, and the density of the dislocations is set to 10 / cm 2 The present invention provides a method for producing a single crystal silicon substrate with a nitride semiconductor layer, characterized as described above.
[0017] According to this method for producing a single crystal silicon substrate with a nitride semiconductor layer, it is possible to produce a single crystal silicon substrate with a nitride semiconductor layer having a large diameter of, for example, 200 mm or 300 mm, with reduced warping and no cracks, using a Si substrate of normal thickness. Effect of the Invention
[0018] As described above, according to the single crystal silicon substrate with a nitride semiconductor layer of the present invention, a Si substrate of normal thickness can be used to obtain a single crystal silicon substrate with a nitride semiconductor layer having a large diameter of, for example, 200 mm or 300 mm, which has reduced warping and is particularly free of cracks. According to the method for producing a single crystal silicon substrate with a nitride semiconductor layer of the present invention, it is possible to produce a single crystal silicon substrate with a nitride semiconductor layer having a large diameter of, for example, 200 mm or 300 mm, which has reduced warping and is particularly free of cracks, using a Si substrate of normal thickness. [Brief description of the drawings]
[0019] [Figure 1] 1 is a cross-sectional view showing an example of a single crystal silicon substrate with a nitride semiconductor layer. [Diagram 2] 1 is a schematic flow diagram showing an example of a method for producing a single crystal silicon substrate with a nitride semiconductor layer. [Diagram 3] This is an example of a cross-sectional structure when 3C-SiC is grown. [Figure 4] 1 shows the results of XRT measurement of the substrate in Example 1. [Diagram 5] 1 shows the results of XRT measurement of the substrate of Comparative Example 1. [Figure 6] 1 shows the results of XRT measurement of the substrate of Comparative Example 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0020] The present invention will be described in detail below, but the present invention is not limited thereto.
[0021] As described above, there has been a demand for a single crystal silicon substrate with a nitride semiconductor layer having a large diameter of, for example, 200 mm or 300 mm, which is reduced in warp and is particularly free of cracks, using a Si substrate of normal thickness, and a method for manufacturing the single crystal silicon substrate with a nitride semiconductor layer.
[0022] As a result of intensive research into the above-mentioned problems, the present inventors have discovered a single crystal silicon substrate with a nitride semiconductor layer, the single crystal silicon substrate having a 3C-SiC single crystal film epitaxially grown on the single crystal silicon substrate, and a nitride semiconductor layer epitaxially grown on the 3C-SiC single crystal film, wherein dislocations are formed throughout the single crystal silicon substrate, the length (dislocation length) of the dislocations when projected onto the single crystal silicon substrate is 1 mm or more, and the density of the dislocations is 10 / cm 2 The inventors have found that by using the single crystal silicon substrate with a nitride semiconductor layer characterized by the above, it is possible to provide a single crystal silicon substrate with a nitride semiconductor layer having a large diameter of, for example, 200 mm or 300 mm, which has reduced warping and is particularly free of cracks, using a Si substrate of normal thickness, and have completed the present invention.
[0023] The structure of growing SiC on a Si substrate has already been disclosed in Patent Documents 1 to 4, and Patent Document 4 in particular discloses in paragraphs
[0030] and
[0031] that the thickness of the SiC is 2 nm to 3.5 μm, but makes no mention of dislocation density. Also, the original idea behind using a thick Si substrate is to use the Si substrate to absorb stress and prevent deformation, but this method, on the other hand, introduces dislocations uniformly into the Si substrate to alleviate deformation of the wafer, and is a completely new concept and method that has never been seen before. GaN devices form and utilize a two-dimensional electron gas layer, and therefore have a large saturated drift velocity and electron mobility, making them a lateral device with a planar structure of a heterojunction field effect transistor (HFET) that can pass a large current density. Therefore, as described in Non-Patent Document 1, even if a large number of dislocations exist in the Si substrate, there is no problem as long as there are no dislocations in the GaN layer.
[0024] Hereinafter, a description will be given of a single crystal silicon substrate with a nitride semiconductor layer and a method for manufacturing the single crystal silicon substrate with a nitride semiconductor layer according to an embodiment of the present invention.
[0025] (Single crystal silicon substrate with nitride semiconductor layer) FIG. 1 is a cross-sectional view showing an example of a single-crystalline silicon substrate with a nitride semiconductor layer. As shown in FIG. 1, the single-crystalline silicon substrate 1 with a nitride semiconductor layer includes a single-crystalline silicon substrate 10, a SiC single-crystalline film 11, and a nitride semiconductor layer 31.
[0026] (Single-crystalline silicon substrate) The diameter and thickness of the single-crystalline silicon substrate 10 are not particularly limited. For example, the diameter can be 50 mm to 300 mm or more. In particular, large-diameter ones such as 200 mm and 300 mm are preferable. The thickness is set to be 750 μm or more and 800 μm or less based on the normal thickness of 775 μm. By using the single-crystalline silicon substrate 10 with a thickness of 750 μm or more and 800 μm or less, no special processing is required, and there is no need to worry about various problems caused by inserting wafers with different thicknesses when using the single-crystalline silicon substrate 1 with a nitride semiconductor layer in the device process.
[0027] The plane orientation of the single-crystalline silicon substrate 10 is not particularly limited. For example, the plane orientation can be any of (100), (111), and (110). In particular, the plane orientation of the single-crystalline silicon substrate 10 is preferably (111). This is because the (111) substrate has fewer slip planes (sliding directions of dislocations) compared to, for example, the (100) substrate and is stronger against wafer deformation.
[0028] (3C-SiC single-crystalline film) The thickness of the 3C-SiC single-crystalline film 11 is preferably 50 nm or more and 200 nm or less. If it is 50 nm or more, the melt-back of Al or Ga during the growth of the subsequent GaN or Al x Ga 1-x N(0 < x ≦ 1) layer can be sufficiently prevented. Also, if it is 200 nm or less, the subsequent GaN or Al x Ga 1-xDuring the growth of the N(0 < x ≤ 1) layer, dislocations can be introduced throughout the entire wafer surface. Also, the dislocations caused by the growth of 3C-SiC do not spread and make the wafer prone to cracking. It is preferably about 100 nm.
[0029] (Nitride semiconductor layer 31) The nitride semiconductor layer 31 has an intermediate layer 12 and a device layer 21. The device layer 21 is made of GaN or Al x Ga 1-x and has an N(0 < x ≤ 1) layer 13 and an electron supply layer 14. The structure of the nitride semiconductor layer 31 is merely an example and is not limited to this structure.
[0030] As the nitride semiconductor constituting the nitride semiconductor layer 31, for example, GaN, AlN, InN, AlGaN, InGaN, AlInN, AlScN, etc. can be used. The nitride semiconductor layer 31 contains Al x In y Ga 1-x-y and is preferably mainly composed of N(0 ≤ x + y ≤ 1). For example, GaN when x = 0, y = 0; AlN when x = 1, y = 0; InN when x = 0, y = 1; and Al 0.5 In 0.5 N as the main component when x = 0.5, y = 0.5. The thickness of the nitride semiconductor layer 31 is 0.1 - 10 μm and can be designed according to the device.
[0031] (Intermediate layer 12) The intermediate layer 12 acts as a buffer layer inserted to improve the crystallinity of the device layer 21 and control stress. The intermediate layer 12 is made of a nitride semiconductor. This allows the intermediate layer 12 to be fabricated using the same equipment as the device layer 21.
[0032] (Device layer 21) For improving device characteristics, a crystal with few crystal defects and few impurities such as carbon and oxygen is desirable for the device layer 21. The high-mobility transistor (HEMT) structure is composed of a device layer 21 made of GaN or Al x Ga 1-x N (0 < x ≤ 1) layer 13 and an electron supply layer 14 made of AlGaN formed thereon.
[0033] (GaN or Al x Ga 1-x N (0 < x ≤ 1) layer 13) GaN or Al x Ga 1-x Since the N (0 < x ≤ 1) layer 13 is a nitride semiconductor, the GaN or Al x Ga 1-x N (0 < x ≤ 1) layer 13 can be fabricated using the same equipment as the electron supply layer 14 and the intermediate layer 12.
[0034] (electron supply layer 14) Since the electron supply layer 14 is also a nitride semiconductor, the electron supply layer 14 can be fabricated using the same equipment as the GaN or Al x Ga 1-x N (0 < x ≤ 1) layer 13 and the intermediate layer 12.
[0035] The single-crystalline silicon substrate 1 with a nitride semiconductor layer having the above configuration forms dislocations throughout the entire single-crystalline silicon substrate 10, and the length (dislocation length) when the dislocations are projected onto the plane of the single-crystalline silicon substrate 10 is 1 mm or more, and the density of the dislocations is 10 / cm 2 or more. By forming dislocations at a high density such that dislocations with a length of 1 mm or more are formed on the entire surface of the Si substrate at a density of 10 / cm 2 or more, it becomes possible to reduce the wafer warpage due to the difference in the linear expansion coefficients of GaN and Si. Since the GaN device forms and utilizes a two-dimensional electron gas layer, it is a planar lateral device of a heterojunction field-effect transistor (HFET: Hetero Field Effect Transistor) that can pass a large current density due to a large saturation drift velocity and electron mobility. Therefore, as described in Non-Patent Document 1, if there are no dislocations in the GaN layer even though there are a large number of dislocations in the Si substrate, there is no problem. This makes it possible to provide a single crystal silicon substrate with a nitride semiconductor layer having a large diameter of, for example, 200 mm or 300 mm, which is free of warping and, in particular, cracks, using a Si substrate of normal thickness.
[0036] (Method of manufacturing a single crystal silicon substrate with a nitride semiconductor layer) FIG. 2 is a schematic flow diagram showing an example of a method for producing a single crystal silicon substrate with a nitride semiconductor layer. As shown in FIG. 2, a method for manufacturing a single crystal silicon substrate 1 with a nitride semiconductor layer according to an embodiment of the present invention includes a step of epitaxially growing a 3C-SiC single crystal film 11 on a single crystal silicon substrate 10 (hereinafter, referred to as step 1), and a step of epitaxially growing a nitride semiconductor layer 31 on the 3C-SiC single crystal film 11 (hereinafter, referred to as step 2).
[0037] (1st step) (Preparation of single crystal silicon substrate) First, a single crystal silicon substrate 10 is prepared. For example, thickness 775 μm, surface orientation <111> Prepare the following items.
[0038] (Oxide film removal) A single crystal silicon substrate 10 is placed in a reduced pressure (RP)-CVD apparatus, and the native oxide film on the surface is removed by hydrogen baking (H2 annealing). If the oxide film remains, nuclei of SiC cannot be formed on the single crystal silicon substrate 10. The H2 annealing temperature at this time is preferably between 1000°C and 1200°C. If the temperature is lower than 1000°C, the processing time must be long to prevent the native oxide film from remaining, and if the temperature is higher than 1200°C, there is a concern that slip may occur starting from the wafer support of the RP-CVD device, which is not preferable. There are no particular restrictions on the pressure and time of the H2 annealing as long as the native oxide film can be removed.
[0039] (SiC nucleation and 3C-SiC single crystal film formation) FIG. 3 shows an example of the cross-sectional structure of a grown 3C-SiC single crystal film. While introducing a carbonized gas such as propane gas as a raw material gas, the temperature is gradually increased from a temperature in the range of 300°C or higher and 950°C or lower to a temperature in the range of 1000°C or higher and less than 1200°C. Thereby, nucleation of SiC is performed on the surface of the single-crystal silicon substrate 10, and subsequently, a 3C-SiC single-crystal film 11 is formed. The heating rate during growth shall be in the range of 0.5 to 5°C / min. It is preferably about 1°C / min. Next, as a step of forming a 3C-SiC single-crystal film, the temperature of the single-crystal silicon substrate is heated to a temperature of 800°C or higher and less than 1200°C, and monomethylsilane or trimethylsilane is introduced as a raw material gas for SiC. Thereby, the 3C-SiC single-crystal film 11 is formed. At this time, after the temperature is raised to a predetermined temperature, growth may be stopped there, or growth may be continued until a predetermined film thickness is reached. Alternatively, if a predetermined film thickness is reached during the temperature increase, growth may be stopped there. By growing while changing the temperature and growing while continuously changing the growth mode, it becomes possible to gradually increase the film formation rate.
[0040] The thickness of the 3C-SiC single-crystal film 11 at this time shall be 50 nm or more and 200 nm or less. By setting it to 50 nm or more, it is possible to sufficiently prevent the melt-back of Al or Ga during the growth of the subsequent GaN or Al x Ga 1-x N(0 < x ≤ 1) layer. Also, by setting it to 200 nm or less, it is possible to introduce dislocations over the entire wafer surface during the growth of the subsequent GaN or Al x Ga 1-x N(0 < x ≤ 1) layer. Also, the dislocations due to 3C-SiC growth do not spread and become prone to cracking. It is preferably about 100 nm.
[0041] (Second step) The second step is a step of producing a nitride semiconductor layer 31 by vapor phase growth on the 3C-SiC single-crystal film 11. In the first step, the thickness of the 3C-SiC single crystal film 11 is set to 200 nm or less, and by carrying out the second step, dislocations are formed throughout the entire single crystal silicon substrate 10, the length (dislocation length) of the dislocations projected onto the single crystal silicon substrate 10 is set to 1 mm or more, and the dislocation density is set to 10 / cm 2 That is all.
[0042] A method for growing the nitride semiconductor layer 31 suitable for implementing the present invention will be described below.
[0043] [1] Introduction into the reactor The single crystal silicon substrate 10 on which the 3C-SiC single crystal film 11 has been grown is cleaned with chemicals and then introduced into the reaction furnace of the MOVPE apparatus. Next, the inside of the furnace is filled with a high-purity inert gas such as nitrogen, and the atmosphere inside the furnace is replaced with the high-purity inert gas.
[0044] [2] The process of cleaning the substrate surface in a furnace The single crystal silicon substrate 10 on which the 3C-SiC single crystal film 11 has been grown is heated in a furnace to clean the surface of the substrate. The pressure in the furnace is reduced to 50 mbar before cleaning is carried out. The pressure inside the furnace can be set between 200 mbar and 30 mbar. Cleaning is performed for 10 minutes with hydrogen or nitrogen supplied into the furnace. The cleaning temperature can be determined as the temperature of the substrate surface between 1000° C. and 1200° C., but cleaning at 1050° C. in particular can provide a clean surface.
[0045] [3] Step of growing intermediate layer 12 In this process, AlN or Al is deposited on the substrate by introducing gases that are the raw materials Al, Ga, and N at a specified furnace pressure and substrate temperature. x Ga 1-x The intermediate layer 12 made of N (0≦x<1) is epitaxially grown. In this step, growth is performed, for example, at a furnace pressure of 50 mbar and a substrate temperature of 1120°C. As the Al source, trimethylaluminum (TMAl) is used; as the Ga source, trimethylgallium (TMGa) is used; and as the N source, ammonia (NH3) is used. Further, in order to obtain a mixed crystal with a desired Al composition, considering the material efficiency of the source gases, the flow rates of the raw materials TMAl and TMGa are set so that the Al / Ga ratio incorporated into the thin film becomes the set ratio. In this step, the growth of AlN is carried out with the flow rate of TMAl being 0.24 L / min (240 sccm) and the flow rate of NH3 being 2 L / min (2000 sccm) under standard conditions. As the carrier gases for TMAl, TMGa, and NH3, for example, hydrogen can be used. These conditions are just examples and are not particularly limited.
[0046] On the intermediate layer 12, a device layer 21 made of a thin film of a nitride semiconductor is fabricated by vapor growth such as MOVPE or sputtering. The device layer 21 is fabricated at 900°C to 1350°C using, for example, the MOVPE method.
[0047] [4]GaN or Al x Ga 1-x Step of growing a Ga In this step, at a specified furnace pressure and substrate temperature, by introducing the gases that are the raw materials and the sources of Ga and N, a GaN or Al x Ga 1-x GaN layer 13 with 0 < x ≤ 1 is epitaxially grown on the intermediate layer 12. In this step, for example, the growth is carried out at a furnace pressure of 200 mbar and a substrate temperature of 1120°C. As the Ga source, trimethylgallium (TMGa) is used; as the N source, ammonia (NH3) is used. Further, in order to obtain a mixed crystal with a desired Al composition, considering the material efficiency of the source gases, the flow rates of the raw materials TMAl and TMGa are set so that the Al / Ga ratio incorporated into the thin film becomes the set ratio. As the carrier gases for TMAl, TMGa, and NH3, for example, hydrogen can be used. These conditions are just examples and are not particularly limited.
[0048] [5] Step of growing the electron supply layer 14 In this step, at a specified furnace internal pressure and substrate temperature, by introducing gases that are the raw materials Al, Ga, and N sources, GaN or Al x Ga 1-x On the N(0 < x ≤ 1) layer 13, an electron supply layer 14 made of Al x Ga 1-x N(0 < x ≤ 1) is epitaxially grown. In this step, for example, the growth is carried out at a furnace internal pressure of 150 mbar and a substrate temperature of 1120°C. As the Al source, trimethylaluminum (TMAl) is used, as the Ga source, trimethylgallium (TMGa) is used, and as the N source, ammonia (NH3) is used. Also, in order to obtain a mixed crystal with a desired Al composition, considering the material efficiency of the raw material gases, the flow rates of the raw materials TMAl and TMGa are set so that the Al / Ga ratio incorporated into the thin film becomes the set ratio. For the carrier gases of TMAl, TMGa, and NH3, for example, hydrogen can be used. These conditions are just an example and are not particularly limited.
[0049] By the above steps, it is possible to generate dislocations throughout the entire single-crystalline silicon substrate 10 without cracking. Also, when the dislocations are projected onto the plane of the single-crystalline silicon substrate 10, the length (dislocation length) is 1 mm or more, and the density of the dislocations is 10 / cm 2 or more. After the step of forming the 3C-SiC single-crystalline film with a thickness of 200 nm or less and then growing AlN and GaN, dislocations with a length of 1 mm or more can be formed on the entire surface of this Si substrate at a density of 10 / cm2 or more. By forming dislocations at a high density in this way, it becomes possible to reduce the wafer warping due to the difference in the linear expansion coefficients of GaN and Si.
Example
[0050] Hereinafter, the present invention will be specifically described with examples, but this does not limit the present invention.
[0051] (Example 1) First, a 300 mm diameter (111) boron-doped single crystal silicon substrate of normal resistance (resistivity: 10 Ω·cm, thickness: 775 μm) was prepared. Next, the wafer was placed on a susceptor in a reactor of an RP-CVD apparatus and subjected to H2 annealing at 1080°C for 1 minute. Next, the temperature inside the furnace was lowered to 300°C, and then the temperature was raised to 1130°C at a rate of 1°C / sec while trimethylsilane gas was introduced to carry out the SiC nucleation process and the subsequent formation of a 3C-SiC single crystal film. The growth pressure at this time was uniformly set to 100 Torr. After reaching 1130°C, the temperature was held for 10 minutes to grow a 3C-SiC single crystal film (film thickness: 100 nm).
[0052] Next, the substrate on which the 3C-SiC single crystal film had been grown was placed in the reaction chamber of the MOCVD apparatus, and the atmosphere was replaced with nitrogen to remove oxygen and moisture from the air. Next, the pressure inside the furnace was reduced to 50 mbar, and the temperature was raised to 1050° C. and the surface was cleaned by maintaining the chamber in a hydrogen atmosphere for 10 minutes.
[0053] Next, to deposit an intermediate layer that would serve as a buffer layer, the pressure inside the furnace was kept at 50 mbar, the substrate temperature at 1,020°C, and trimethylaluminum as the Al source, trimethylgallium as the Ga source, and ammonia as the nitrogen source were introduced into the furnace to deposit AlN to a thickness of 180 nm and AlGaN to a thickness of 580 nm.
[0054] Next, in order to grow a gallium nitride layer, the pressure inside the furnace was kept at 200 mbar and the substrate temperature at 1120° C., trimethylgallium and ammonia were introduced into the furnace, and a GaN film was grown to a thickness of 900 nm.
[0055] Next, AlGaN was grown as the charge supply layer. 0.25 Ga 0.75 N was grown to 25 nm. As a result, the following structure was obtained: single crystal silicon substrate (775 μm) / 3C-SiC single crystal film (100 nm) / AlN (180 nm) / AlGaN (580 nm) / GaN (900 nm) / Al0.25 Ga 0.75 A substrate for Example 1 made of N (25 nm) was prepared. FIG. 4 shows the results of XRT measurement of the substrate of Example 1. From FIG. 4, it can be seen that dislocations are formed throughout the single crystal silicon substrate, the length (dislocation length) of the dislocations when projected onto the single crystal silicon substrate is 1 mm or more, and the density of the dislocations is 10 / cm 2 It turned out that this was all true.
[0056] Comparative Example 1 A substrate for Comparative Example 1 was produced in the same manner as in Example 1, except that the thickness of the single crystal silicon substrate was set to 1.5 mm, and GaN was grown without growing 3C-SiC. In other words, single crystal silicon substrate (1.5 mm) / AlN (180 nm) / AlGaN (580 nm) / GaN (900 nm) / Al 0.25 Ga 0.75 A comparative example 1 substrate made of N (25 nm) was prepared. FIG. 5 shows the results of XRT measurement of the substrate of Comparative Example 1. From FIG. 5, it was found that the wafer was cracked and dislocations were specifically generated in the portion of the single crystal silicon substrate that abutted against the susceptor of the device.
[0057] Comparative Example 2 A substrate for Comparative Example 2 was fabricated in the same manner as in Example 1, except that the thickness of the single crystal silicon substrate was set to 1.5 mm, 3C-SiC was grown to a thickness of 300 nm, and GaN was grown. In other words, single crystal silicon substrate (1.5 mm) / 3C-SiC single crystal film (300 nm) / AlN (180 nm) / AlGaN (580 nm) / GaN (900 nm) / Al 0.25 Ga 0.75 A comparative example 2 substrate made of N (25 nm) was prepared. FIG. 6 shows the results of XRT measurement of the comparative example 2 substrate. From FIG. 6, it was found that the wafer was cracked and dislocations were specifically generated in the portion of the single crystal silicon substrate that abutted against the susceptor of the device.
[0058] Comparative Example 3 A substrate for Comparative Example 3 was produced in the same manner as in Example 1, except that GaN was grown without growing 3C-SiC. In other words, single crystal silicon substrate (775 μm) / AlN (180 nm) / AlGaN (580 nm) / GaN (900 nm) / Al 0.25 Ga 0.75 A substrate for Comparative Example 3 made of N (25 nm) was prepared. The wafer was broken during the GaN process.
[0059] As described above, according to the examples of the present invention, a large-diameter single crystal silicon substrate with a nitride semiconductor layer having reduced warping and no cracks in particular could be manufactured using a Si substrate of normal thickness.
[0060] The present invention is not limited to the above-described embodiment. The above-described embodiment is merely an example, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and exhibits similar effects is included in the technical scope of the present invention. [Explanation of symbols]
[0061] 1...single crystal silicon substrate with nitride semiconductor layer, 10...single crystal silicon substrate, 11...3C-SiC single crystal film, 12...intermediate layer, 13...GaN or Al x Ga 1-x N(0
Claims
1. A single crystal silicon substrate with a nitride semiconductor layer, the single crystal silicon substrate having a diameter of 300 mm and a thickness of 750 μm or more and 800 μm or less, a 3C-SiC single crystal film epitaxially grown on the single crystal silicon substrate, and a nitride semiconductor layer epitaxially grown on the 3C-SiC single crystal film, wherein dislocations are formed uniformly or evenly throughout the entire single crystal silicon substrate, the length (dislocation length) of the dislocations when projected onto the single crystal silicon substrate by XRT measurement is 1 mm or more, and the density of dislocations having a dislocation length of 1 mm or more is 10 / cm within the measurement range of the XRT measurement. 2 A single crystal silicon substrate with a nitride semiconductor layer, characterized in that said substrate is formed of a nitride semiconductor layer.
2. 2. The single crystal silicon substrate with a nitride semiconductor layer according to claim 1, wherein the thickness of the 3C-SiC single crystal film is 50 nm or more and 200 nm or less.
3. The nitride semiconductor layer is Al x In y G 1-x-y 3. The single crystal silicon substrate with a nitride semiconductor layer according to claim 1, characterized in that the substrate is mainly composed of N (0≦x+y≦1).
4. A method for manufacturing a single crystal silicon substrate with a nitride semiconductor layer, comprising the steps of epitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate having a diameter of 300 mm and a thickness of 750 μm to 800 μm, and epitaxially growing a nitride semiconductor layer on the 3C-SiC single crystal film, wherein the step of epitaxially growing the 3C-SiC single crystal film on the single crystal silicon substrate includes forming nuclei of SiC on a surface of the single crystal silicon substrate and subsequently growing the nitride semiconductor layer on the 3C-SiC single crystal film. a step of forming a 3C-SiC single crystal film having a thickness of 50 nm or more and 200 nm or less, and epitaxially growing the nitride semiconductor layer on the 3C-SiC single crystal film, thereby forming dislocations uniformly or evenly throughout the entire single crystal silicon substrate, making the length (dislocation length) of the dislocations when projected onto the single crystal silicon substrate by XRT measurement 1 mm or more, and making the density of dislocations having a dislocation length of 1 mm or more 10 / cm within the measurement range of the XRT measurement 2 The method for producing a single crystal silicon substrate with a nitride semiconductor layer, characterized by the above-mentioned.
Citation Information
Patent Citations
Silicon base covariant underlay with the ultrathin carbon silicon middle layer and its preparing method
CN101017864A
Device for mounting outer wall panel
JP1981093946A
System for instructing processing object track number
JP1987066490A
Data compression system
JP1989050282A
Method and device for evaluating defect of semiconductor sample
JP2006147848A