Display panel, display device, and method for manufacturing the same

Abstract

A display panel and a display device including the same are provided, the display panel and the display device including the same include a display substrate having a display region and a pad region disposed around the display region, connection wiring disposed on the pad region of the display substrate, signal wiring disposed on the connection wiring, and a supporter disposed between the display substrate and the connection wiring, the connection wiring being in direct contact with the supporter.

Description

[Technical field]

[0001] The present invention relates to a display device and a method for manufacturing a display device including the same. [Background technology]

[0002] A display device is a device that visually displays data. Such a display device includes a substrate that is divided into a display area DA and a non-display area NDA. In the display area DA, pixels are arranged on the substrate, and in the non-display area NDA, pads, etc. are arranged on the substrate. Driving circuits, etc. are attached to the pads to transmit driving signals to the pixels.

[0003] The driving circuit includes a plurality of bumps, each of which can be bonded to a pad separated from the others. Summary of the Invention [Problem to be solved by the invention]

[0004] SUMMARY OF THE PRESENT EMBODIMENT An object of the present invention is to provide a display device capable of improving the bonding reliability between pads and bumps.

[0005] The object of the present invention is not limited to the technical objects mentioned above, and other technical objects not mentioned therein can be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0006] According to one embodiment of the present invention, a display panel includes a display substrate having a display area and a pad area disposed around the display area, a connecting wire disposed on the pad area of ​​the display substrate, a signal wire disposed on the connecting wire, and a supporter disposed between the display substrate and the connecting wire, the connecting wire being in direct contact with the supporter.

[0007] The size of the connecting wire on a plane may be larger than the size of the supporter on a plane, and the connecting wire may cover the supporter.

[0008] The signal wiring may have a planar size larger than the connecting wiring, and the signal wiring may be in direct contact with the connecting wiring.

[0009] The display device may further include an insulating layer disposed between the display substrate and the signal lines, the insulating layer covering side surfaces of the connecting lines and exposing upper surfaces of the connecting lines.

[0010] The signal wiring may be in direct contact with the upper surface of the insulating layer.

[0011] The cross-sectional shape of the supporter may include at least one of a trapezoid, a triangle, a pentagon, a semicircle, a semi-ellipse, and a rectangle.

[0012] The supporter may include a pattern extending along a long side direction of the signal wiring, the supporter may have a plurality of patterns, and the plurality of supporter patterns may be spaced apart along a short side direction of the signal wiring.

[0013] The supporter may include a pattern extending along a short side direction of the signal wiring, the supporter may have a plurality of patterns, and the plurality of supporter patterns may be spaced apart along a long side direction of the signal wiring.

[0014] The supporter may have a lattice shape extending along the long side and short side directions of the signal wiring on a plane.

[0015] The supporter may have a plurality of island shapes spaced apart along the long side and short side directions of the signal wiring on a plane.

[0016] The connecting wires may be a plurality of wires, and the connecting wires may further include a non-conductive film or a non-conductive binder disposed between the plurality of connecting wires.

[0017] A display panel according to another embodiment for solving the above problem includes a display substrate defining a display region and a pad region disposed around the display region, a first connecting wire disposed on the pad region of the display substrate, and a signal wire disposed on the first connecting wire, the first connecting wire including a first portion, a second portion disposed on one side of the first portion, and a third portion disposed on the other side of the first portion, and a surface height of the first portion is greater than a surface height of the second portion and a surface height of the third portion.

[0018] The first connecting wiring may include a fourth portion overlapping with the first portion of the signal wiring, a fifth portion overlapping with the second portion of the signal wiring, and a sixth portion overlapping with the third portion of the signal wiring, and a thickness of the fourth portion may be greater than thicknesses of the fifth portion and the sixth portion.

[0019] The semiconductor device may further include a second connecting wire disposed between the first connecting wire and the signal wire, the size of the second connecting wire in a plane being smaller than the sizes of the first connecting wire and the signal wire in a plane, and the second connecting wire may be disposed to overlap the first portion of the signal wire in a thickness direction.

[0020] According to one embodiment of the present invention, a display device for solving the above problem includes a display panel including a display substrate defining a display region and a pad region disposed around the display region, a connecting wire disposed on the pad region of the display substrate, a signal wire disposed on the connecting wire, and a supporter disposed between the display substrate and the connecting wire, and a driving integrated circuit including a bump attached to the pad region of the display substrate and connected to the signal wire, and the connecting wire is in direct contact with the supporter.

[0021] The size of the connecting wire on a plane may be larger than the size of the supporter on a plane, and the connecting wire may cover the supporter.

[0022] The signal wiring may have a planar size larger than the connecting wiring, and the signal wiring may be in direct contact with the connecting wiring.

[0023] The display device may further include an insulating layer disposed between the display substrate and the signal lines, the insulating layer covering side surfaces of the connecting lines and exposing upper surfaces of the connecting lines.

[0024] The signal wiring may be in direct contact with the upper surface of the insulating layer.

[0025] The signal wiring may include a first portion overlapping the supporter, a second portion not overlapping the supporter and located on one side of the first portion, and a third portion not overlapping the supporter and located on the other side of the first portion, and an upper surface of the first portion may protrude in a thickness direction beyond an upper surface of the second portion and an upper surface of the third portion.

[0026] The driving integrated circuit may further include a driving substrate and driving wiring disposed on the driving substrate, and the bump may be disposed on the driving wiring and connected to the driving wiring.

[0027] The bump may include a first portion, a second portion disposed on one side of the first portion, and a third portion disposed on the other side of the first portion, and a surface of the first portion may be recessed in a thickness direction more than a surface of the second portion and a surface of the third portion.

[0028] A first portion of the signal wiring can be connected to a first portion of the bump, a second portion of the signal wiring can be connected to a second portion of the bump, and a third portion of the signal wiring can be connected to a third portion of the bump.

[0029] The bump may be directly connected to the signal wiring.

[0030] The bump may be ultrasonically connected to the signal wiring.

[0031] A manufacturing method of a display device according to one embodiment for solving the above problem includes forming a supporter on a base substrate, forming a connecting wire on the supporter, and forming a signal wire on the connecting wire, covering the connecting wire and electrically connected to the connecting wire, wherein the connecting wire covers the supporter and is in direct contact with the supporter.

[0032] The step of forming the supporter on the base substrate may further include forming the supporter by a photolithography process, an inkjet process, or a squeezing process.

[0033] The method may further include mounting a driving integrated circuit on the signal wiring after forming the signal wiring.

[0034] Attaching the driving integrated circuit may include directly connecting bumps to the signal traces.

[0035] The signal wiring may include a first portion overlapping the supporter, a second portion not overlapping the supporter and located on one side of the first portion, and a third portion not overlapping the supporter and located on the other side of the first portion, and an upper surface of the first portion may protrude in a thickness direction beyond an upper surface of the second portion and an upper surface of the third portion.

[0036] The bump may include a first portion, a second portion disposed on one side of the first portion, and a third portion disposed on the other side of the first portion, and a surface of the first portion may be recessed in a thickness direction more than a surface of the second portion and a surface of the third portion.

[0037] A first portion of the signal wiring may be connected to a first portion of the bump, a second portion of the signal wiring may be connected to a second portion of the bump, and a third portion of the signal wiring may be connected to a third portion of the bump. Effect of the Invention

[0038] According to the embodiment of the present invention, a display device having high bonding reliability can be provided.

[0039] The effects of the present invention are not limited to the above-mentioned examples, and more diverse effects are included in the present specification. [Brief description of the drawings]

[0040] [Figure 1] 1 is a plan view showing a layout of a display device according to an embodiment; [Diagram 2] 1 is a schematic partial cross-sectional view of a display device according to an embodiment when bent; [Diagram 3] FIG. 2 is a cross-sectional view of a pixel and a pad area according to one embodiment. [Figure 4] 1 is a plan view of a pad area of ​​a display panel according to an embodiment; [Diagram 5] FIG. 2 is a plan view of a driving integrated circuit according to an embodiment. [Figure 6] FIG. 2 is a plan view of a pad area of ​​a display panel to which a driving integrated circuit is attached. [Figure 7] FIG. 7 is a partially enlarged view of FIG. [Figure 8] 8 is a cross-sectional view taken along line VIII-VIII' in FIG. 7. [Figure 9] 9 is a cross-sectional view taken along line IX-IX' in FIG. 7. [Figure 10] 1 is a flowchart of a method for manufacturing a display device according to an embodiment. [Figure 11] 2A to 2C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 12] 2A to 2C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 13] 5A to 5C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to another embodiment. [Figure 14] 5A to 5C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to another embodiment. [Figure 15]5A to 5C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to another embodiment. [Figure 16] 5A to 5C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to another embodiment. [Figure 17] 5A to 5C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to another embodiment. [Figure 18] 2A to 2C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 19] 11 is a cross-sectional view of a pad area of ​​a display device according to another embodiment. [Figure 20] 11 is a cross-sectional view of a pad area of ​​a display device according to still another embodiment. [Figure 21] 11 is a cross-sectional view of a pad area of ​​a display device according to still another embodiment. [Figure 22] 11 is a cross-sectional view of a pad area of ​​a display device according to still another embodiment. [Diagram 23] 11 is a cross-sectional view of a pad area of ​​a display device according to still another embodiment. [Figure 24] FIG. 11 is a plan view of a pad area of ​​a display panel having a driving integrated circuit mounted thereon according to another embodiment. [Diagram 25] 13 is a plan view illustrating a pad area of ​​a display panel having a driving integrated circuit mounted thereon according to still another embodiment. [Figure 26] 13 is a plan view illustrating a pad area of ​​a display panel having a driving integrated circuit mounted thereon according to still another embodiment. [Figure 27] 13 is a plan view illustrating a pad area of ​​a display panel having a driving integrated circuit mounted thereon according to still another embodiment. [Figure 28] FIG. 13 is a diagram showing a modified example of a supporter according to an embodiment. [Figure 29] 13 is a plan view illustrating a pad area of ​​a display panel having a driving integrated circuit mounted thereon according to still another embodiment. [Diagram 30] 11 is a cross-sectional view of a pad area of ​​a display device according to still another embodiment. [Diagram 31]13 is a plan view illustrating a pad area of ​​a display panel having a driving integrated circuit mounted thereon according to still another embodiment. [Diagram 32] 11 is a cross-sectional view of a pad area of ​​a display device according to still another embodiment. [Diagram 33] 33A to 33C are cross-sectional views illustrating steps of the interconnection process according to FIGS. 31 and 32. [Diagram 34] 33A to 33C are cross-sectional views illustrating steps of the interconnection process according to FIGS. 31 and 32. [Diagram 35] 33A to 33C are cross-sectional views illustrating steps of the interconnection process according to FIGS. 31 and 32. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0041] A display device is a device that displays moving images and still images. Display devices are used to realize display screens for a variety of products, including portable electronic devices such as mobile phones, smartphones, tablet PCs (Personal Computers), smart watches, watch phones, mobile communication terminals, electronic organizers, e-books, PMPs (Portable Multimedia Players), navigation systems, and UMPCs (Ultra Mobile PCs), as well as televisions, notebooks, monitors, signs, and the Internet of Things.

[0042] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0043] FIG. 1 is a plan layout diagram of a display device according to an embodiment, and FIG. 2 is a schematic partial cross-sectional view of the display device according to the embodiment.

[0044] 1 and 2, the display device 1 includes a display area DA for displaying an image, and a non-display area NDA arranged around the display area DA. The display area DA may be a rectangular shape with vertical corners or a rectangular shape with rounded corners in a plan view. The planar shape of the display area DA is not limited to a rectangle, and may be a circle, an ellipse, or various other shapes. The display area DA includes a plurality of pixels. A specific cross-sectional structure of the pixel will be described later.

[0045] The non-display area NDA is disposed around the display area DA. The non-display area NDA is disposed adjacent to both short sides of the display area DA. Furthermore, the non-display area NDA may be disposed adjacent to not only both short sides of the display area DA but also both long sides, and can surround all sides of the display area DA. In other words, the non-display area NDA can constitute the edge of the display area DA.

[0046] The display device may include a display panel 100 that displays a screen and a driving integrated circuit 300 that is attached to the display panel 100 and drives pixel circuits of the display panel 100. The driving integrated circuit 300 is applied to a driving chip (IC) and can be realized as a chip on plastic (COP) directly mounted on the display panel 100.

[0047] For example, an organic light emitting display panel may be applied as the display panel 100. In the following embodiment, an organic light emitting display panel is applied as the display panel 100, but the display panel is not limited thereto, and different types of display panels such as a liquid crystal display (LCD) panel, a field emission display (FED) panel, an electrophoretic device, etc. may be applied.

[0048] In one embodiment, the display panel 100 may include a main area MA and a bending area BA. The main area MA may be flat. A part of the display area DA and the non-display area NDA of the display panel 100 is disposed in the main area MA.

[0049] The bending area BA is disposed on at least one side of the main area MA. Although the drawings show an example in which one bending area BA is disposed adjacent to the bottom side of the main area MA, the bending area BA may be disposed adjacent to other sides of the main area MA, such as the left, right, or top side. In addition, the bending area BA may be disposed on two or more sides of the main area MA.

[0050] The bending area BA is bent in the opposite direction to the display direction (in the case of a front emission type, in the rear direction). When at least a part of the non-display area NDA is bent in the opposite direction to the display direction in this manner, the bezel of the display device can be reduced.

[0051] The display device 1 may further include a sub-area SA extending from the bending area BA. The sub-area SA is parallel to the main area MA. The sub-area SA may overlap the main area MA in the thickness direction. The bending area BA and the sub-area SA may be non-display areas NDA, but are not limited thereto.

[0052] The display panel 100 may include a pad area PA disposed in the non-display area NDA. The pad area PA is located in the sub-area SA as illustrated in the drawings. However, the present invention is not limited thereto, and the pad area PA may be located in the main area MA or the bending area BA. A driving integrated circuit 300 may be attached on the pad area PA of the display panel 100.

[0053] A plurality of signal wirings are arranged in the pad area PA of the non-display area NDA. The plurality of signal wirings are connected to at least one thin film transistor of a pixel in the display area DA via a connecting wiring electrically connected to the thin film transistor. The connecting wiring is arranged across the display area DA and the non-display area NDA. Bumps of the driving integrated circuit 300 may be connected onto the plurality of signal wirings.

[0054] The display device may further include a printed circuit board 500 attached to the display panel 100. The printed circuit board 500 may be attached outside the pad area PA of the display panel 100 in the non-display area NDA. That is, the pad area PA where the driving integrated circuit 300 is attached is disposed between the display area DA and the area where the printed circuit board 500 is attached. The printed circuit board 500 may be attached to an end of the lower surface of the sub-area SA. The printed circuit board 500 may be a flexible circuit board (FPCB). However, the present invention is not limited thereto, and the printed circuit board 500 may be connected to the display panel 100 via a flexible film.

[0055] FIG. 3 is a cross-sectional view of one pixel and pad area according to one embodiment.

[0056] Referring to FIG. 3, the display device 1 further includes a panel lower sheet 200 disposed under the display panel 100. The panel lower sheet 200 may be attached to the rear surface of the display panel 100. The panel lower sheet 200 includes at least one functional layer. The functional layer may be a layer having a heat dissipation function, an electromagnetic wave shielding function, a grounding function, a buffer function, a strength reinforcement function, a gripping function, and / or a digitizing function. The functional layer may be a sheet layer made of a sheet, a film layer made of a film, a thin film layer, a coating layer, a panel, a plate, or the like. One functional layer may be a single layer, or may be composed of a plurality of laminated thin films or coating layers. The functional layer may be, for example, a support substrate, a heat dissipation layer, an electromagnetic wave shielding layer, an impact absorbing layer, a digitizer, or the like.

[0057] The display panel 100 may include a display substrate 101, a plurality of conductive layers, a plurality of insulating layers for insulating the conductive layers, and an organic layer EL.

[0058] The display substrate 101 is disposed across the display area DA and the non-display area NDA. The display substrate 101 functions to support a number of elements disposed thereon. In one embodiment, the display substrate 101 may be a rigid substrate including a rigid material such as soft glass or quartz. However, without being limited thereto, the display substrate 101 may be a flexible substrate including a flexible material such as polyimide (PI).

[0059] The buffer layer 102 is disposed on the display substrate 101. The buffer layer 102 can prevent the penetration of moisture and oxygen from the outside through the display substrate 101. The buffer layer 102 may include any one of a silicon nitride (SiNx) film, a silicon oxide (SiO2) film, and a silicon oxynitride (SiOxNy) film.

[0060] A semiconductor layer 105 is disposed on the buffer layer 102. The semiconductor layer 105 forms a channel of a thin film transistor. The semiconductor layer 105 is disposed in each pixel of the display area DA, and may also be disposed in the non-display area NDA in some cases. The semiconductor layer 105 may include source / drain regions and an active region. The semiconductor layer 105 may include polycrystalline silicon.

[0061] A first insulating layer 111 is disposed on the semiconductor layer 105. The first insulating layer 111 is disposed over the entire surface of the display substrate 101. The first insulating layer 111 may be a gate insulating film having a gate insulating function. The first insulating layer 111 may include a silicon compound, a metal oxide, etc. For example, the first insulating layer 111 may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide, etc. These may be used alone or in combination with each other.

[0062] A supporter SM is disposed on the first insulating layer 111. The supporter SM is disposed directly on the upper surface of the first insulating layer 111. The supporter SM is disposed below the connecting wiring GSL described below, and can protrude the connecting wiring GSL in the thickness direction. Due to the protruding connecting wiring GSL, the signal wiring PAD also protrudes in the thickness direction, facilitating bonding with the bumps of the driving integrated circuit 300. The supporter SM includes an organic or inorganic material.

[0063] The cross-sectional shape of the supporter SM may be a trapezoid.

[0064] A first conductive layer 120 is disposed on the first insulating layer 111 and the supporter SM. The first conductive layer 120 may include a gate electrode GE of a thin film transistor (TFT), a first electrode CE1 of a storage capacitor (Cst), and a connecting line GSL. The connecting line GSL is disposed passing through the display area DA and the pad area PA. The first conductive layer 120 may include one or more metals selected from molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The first conductive layer 120 may be a single film or a laminated film made of the above-mentioned materials.

[0065] The connecting wire GSL may cover the surface of the supporter SM and may be in direct contact with the surface of the supporter SM. The portion of the connecting wire GSL that overlaps with the supporter SM in the thickness direction may protrude in the thickness direction.

[0066] The second insulating layers 112a and 112b are disposed on the first conductive layer 120. The second insulating layers 112a and 112b may insulate the first conductive layer 120 from the second conductive layer 130. The second insulating layer 112a is generally disposed in the display area DA, and the second insulating layer 112b is generally disposed in the pad area PA. The second insulating layers 112a and 112b may be selected from the materials exemplified for the first insulating layer 111. In the pad area PA, the second insulating layer 112b partially exposes the connecting line GSL. The second insulating layer 112b may partially cover the side surface of the connecting line GSL and expose a part of the remaining side surface and the top surface.

[0067] A second conductive layer 130 is disposed on the second insulating layers 112a and 112b. The second conductive layer 130 may include a second electrode CE2 of the storage capacitor (Cst). The material of the second conductive layer 130 may be selected from the materials exemplified for the first conductive layer 120 described above. The first electrode CE1 of the storage capacitor (Cst) and the second electrode CE2 of the storage capacitor (Cst) may form a capacitor via the second insulating layers 112a and 112b.

[0068] A third insulating layer 113 is disposed on the second conductive layer 130. The third insulating layer 113 may include at least one of the exemplary materials of the first insulating layer 111 described above. In some embodiments, the third insulating layer 113 includes an organic insulating material. The organic insulating material may be selected from the exemplary materials of the first via layer VIA1 described below.

[0069] A third conductive layer 140 is disposed on the third insulating layer 113, the second insulating layer 112b, and the connecting wiring GSL. The third conductive layer 140 may include a source electrode SE, a drain electrode DE, a high potential voltage electrode ELVDDE, and a signal wiring PAD. The third conductive layer 140 may include at least one of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The third conductive layer 140 may be a single film made of the above-mentioned material. Without being limited thereto, the third conductive layer 140 may be a laminated film. For example, the third conductive layer 140 may be formed of a stacked structure such as Ti / Al / Ti, Mo / Al / Mo, Mo / AlGe / Mo, Ti / Cu, etc. In one embodiment, the third conductive layer 140 comprises Ti / Al / Ti.

[0070] The signal wiring PAD of the third conductive layer 140 may be disposed to overlap the connecting wiring GSL of the first conductive layer 120 in the thickness direction, and may be electrically connected to the connecting wiring GSL via an exposed portion of the second insulating layer 112b. The size of the signal wiring PAD on a plane may be larger than the size of the connecting wiring GSL on a plane. The signal wiring PAD may cover the connecting wiring GSL on a plane, and a side surface of the signal wiring PAD may extend outward beyond the side surface of the connecting wiring GSL.

[0071] The first via layer VIA1 is disposed on the third conductive layer 140. The first via layer VIA1 may include an organic insulating material. The organic insulating material may include at least one of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene resin, a polyphenylenesulfide resin, or a benzocyclobutene (BCB).

[0072] Meanwhile, the upper structure of the third insulating layer 113 and the third conductive layer 140 may be removed or omitted from a portion of the signal wiring PAD on the pad area PA, so that the omitted or removed structure may expose the signal wiring PAD arranged in the pad area PA.

[0073] The driving integrated circuit 300 may include a driving substrate 310, a driving wiring 330 disposed on the driving substrate 310, and a bump disposed on the driving wiring 330. The bump may include a first bump 350 disposed on a surface of the driving wiring 330, and a second bump 370 disposed on a surface of the first bump 350.

[0074] The driving substrate 310 may include at least one of the materials exemplified for the display substrate 101. The driving substrate 310 may serve to support the lower structure of the driving integrated circuit 300.

[0075] The driving wiring 330 may include at least one of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The driving wiring 330 may be a single film made of the above-mentioned materials. However, without being limited thereto, the driving wiring 330 may be a laminated film.

[0076] The bump is bonded to a signal wiring PAD of the display panel 100. The first bump 350 may include at least one of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The first bump 350 may be a single film made of the above-mentioned materials. Without being limited thereto, the first bump 350 may be a multi-layer film.

[0077] The second bump 370 may include at least one of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The second bump 370 may be a single film made of the above-mentioned materials. Without being limited thereto, the second bump 370 may be a multi-layer film.

[0078] Meanwhile, a non-conductive member NCM is disposed around the signal wiring PAD and the bump. The non-conductive member NCM is disposed between the adjacent signal wiring PAD and the adjacent bump. The non-conductive member NCM is disposed between the driving substrate 310 and the second insulating layer 112b. Before the ultrasonic bonding process described later is performed, the non-conductive member NCM is disposed between the adjacent signal wiring PAD and the adjacent bump and between the signal wiring PAD and the bump, and during the ultrasonic bonding process, the non-conductive member NCM positioned between the signal wiring PAD and the bump is pushed out to a region not overlapping with the signal wiring PAD and the bump, and can fill the gap between the adjacent signal wiring PAD and the adjacent bump together with the non-conductive member NCM positioned between the adjacent signal wiring PAD and the adjacent bump.

[0079] The non-conductive member NCM comprises a material that is not conductive or has little conductivity, for example, a non-conductive film (NCF) or a non-conductive paste (NCP).

[0080] In one embodiment, the bump is directly connected to the exposed signal wiring PAD. For example, the bump is ultrasonically bonded to the signal wiring PAD. Further, the second bump 370 may be directly connected to the signal wiring PAD and ultrasonically bonded.

[0081] Meanwhile, the ultrasonic bonding is performed by an ultrasonic device 700. The ultrasonic device 700 may include a vibration generating unit 710, a vibrating unit 720 connected to the vibration generating unit 710, a pressurizing unit 730 for amplifying the vibration amplitude of the vibrating unit 720, and a vibration transmitting unit 740 connected to the vibrating unit 720.

[0082] The vibration generating unit 710 converts electrical energy into vibration energy. The vibration unit 720 vibrates with the vibration energy converted by the vibration generating unit 710. The vibration unit 720 vibrates with a certain vibration direction and a predetermined amplitude. The vibration unit 720 may have the amplitude amplified in a direction parallel to the vibration direction via the pressure unit 730 connected to the vibration unit 720. The vibration transmitting unit 740 transmits the vibration of the vibration unit 720 to the object to be ultrasonically bonded. The support unit 550 fixes the upper and lower surfaces of the vibration unit 720, and can suppress the vibration unit 720 and the vibration transmitting unit 740 from moving up and down due to the vibration.

[0083] In one embodiment, the ultrasonic device 700 contacts the other surface of the driving integrated circuit 300 and maintains a constant pressure state at the bottom, so that the vibration transmission unit 740 efficiently transmits the vibration to the driving integrated circuit 300. At this time, the vibration transmission unit 740 of the ultrasonic device 700 may be ultrasonically bonded to overlap the entire area of ​​the driving integrated circuit 300 arranged at the bottom, as shown in FIG.

[0084] The ultrasonic device 700 vibrates the bump in a predetermined vibration direction while vibrating in the vibration direction. In this case, the signal wiring PAD may vibrate slightly in the vibration direction due to the vibration transmitted through the bump, but the amplitude of the vibration is small. Therefore, the vibration amplitude of the vibration transmitting unit 740 in the vibration direction can be considered to be substantially the same as the distance the bump moves in the vibration direction on the signal wiring PAD. In one embodiment, the vibration direction may be a second direction DR2. That is, the vibration direction may be a direction in which the signal wiring PAD and the long side of the bump extend.

[0085] When the bump is ultrasonically vibrated on one side of the signal wiring PAD, a certain frictional force is generated at the interface between one side of the signal wiring PAD and one side of the bump, and frictional heat may be generated by the frictional force. If the frictional heat is sufficient to melt the material of the signal wiring PAD and the bump, the pad melting area PADb adjacent to the bump of the signal wiring PAD and the bump melting area 370b adjacent to the signal wiring PAD of the bump may melt. That is, the signal wiring PAD may include a pad non-melt area PADa and a pad melting area PADb. Also, the bump may include a bump non-melt area 370a and a bump melting area 370b.

[0086] The pad non-melt area PADa may be an area containing only the material contained in the signal wiring PAD, and the bump non-melt area 370a may be an area containing only the material contained in the bump.

[0087] The pad melt region PADb is a region where the material contained in the bump diffuses and the material of the signal wiring PAD mixes with the material of the bump, and the bump melt region 370b may be a region where the material contained in the signal wiring PAD diffuses and the material of the bump mixes with the material of the signal wiring PAD.

[0088] The signal wiring PAD and the bump are bonded by solidification in the pad melting area PADb and the bump melting area 370b. The interface between the signal wiring PAD and the bump, i.e., the interface between the pad melting area PADb and the bump melting area 370b, may have a non-flat shape.

[0089] Meanwhile, when bonding the signal wiring pad and the bump, the vibration transmitting unit 740 of the ultrasonic device 700 applies vibration along the second direction DR2 by pressing the upper surface of the print base film 310 of the driving integrated circuit 300 in the third direction DR3 as described above, and thus the bump arranged on the print base film 310 is bonded to the signal wiring pad as described above. After the ultrasonic bonding process, the vibration transmitting unit 740 of the ultrasonic device 700 is separated from the print base film 310 in the thickness direction DR3, but the bonding force between the signal wiring pad and the bump is greater than the bonding force between the bump and the print base film 310, and peeling may occur between the bump and the print base film 310. This may cause cracks in the bump. The display device 1 according to an embodiment can prevent peeling between the bump and the print base film 310 by disposing a first hardening pattern (IRP) between the adjacent bumps as described below.

[0090] A fourth conductive layer 150 is disposed on the first via layer VIA1. The fourth conductive layer 150 may include a data line DL, a connecting electrode CNE, and a high-potential voltage wiring ELVDDL. The data line DL may be electrically connected to a source electrode SE of the thin film transistor (TFT) through a contact hole penetrating the first via layer VIA1. The connecting electrode CNE may be electrically connected to a drain electrode DE of the thin film transistor (TFT) through a contact hole penetrating the first via layer VIA1. The high-potential voltage wiring ELVDDL may be electrically connected to a high-potential voltage electrode ELVDDE through a contact hole penetrating the first via layer VIA1. The fourth conductive layer 150 may include a material selected from the exemplary materials of the third conductive layer 140.

[0091] The second via layer VIA2 is disposed on the fourth conductive layer 150. The second via layer VIA2 may include at least one of the materials exemplified for the first via layer VIA1 described above.

[0092] An anode electrode ANO is disposed on the second via layer VIA2. The anode electrode ANO is electrically connected to the connecting electrode CNE through a contact hole that penetrates the second via layer VIA2.

[0093] A bank layer BANK is disposed on the anode electrode ANO. The bank layer BANK may include a contact hole exposing the anode electrode ANO. The bank layer BANK is made of an organic insulating material or an inorganic insulating material. For example, the bank layer BANK includes at least one of a photoresist, a polyimide resin, an acrylic resin, a silicon compound, and a polyacrylic resin.

[0094] An organic layer EL is disposed on the upper surface of the anode electrode ANO and within the opening of the bank layer BANK. A cathode electrode CAT is disposed on the organic layer EL and the bank layer BANK. The cathode electrode CAT may be a common electrode disposed across a plurality of pixels.

[0095] A thin-film encapsulation layer 170 is disposed on the cathode electrode CAT. The thin-film encapsulation layer 170 covers the organic light-emitting element (OLED). The thin-film encapsulation layer 170 may be a laminated film in which inorganic films and organic films are alternately laminated. For example, the thin-film encapsulation layer 170 may include a first sealing inorganic film 171, a sealing organic film 172, and a second sealing inorganic film 173, which are sequentially laminated.

[0096] FIG. 4 is a planar layout diagram of a pad area of ​​a display panel according to one embodiment, FIG. 5 is a planar layout diagram of a driving integrated circuit according to one embodiment, FIG. 6 is a planar layout diagram of a pad area of ​​a display panel to which a driving integrated circuit is attached, FIG. 7 is a partially enlarged view of FIG. 6, FIG. 8 is a cross-sectional view taken along line VIII-VIII' in FIG. 7, and FIG. 9 is a cross-sectional view taken along line IX-IX' in FIG. 7.

[0097] 4 to 9, a plurality of signal wiring PADs are arranged along a first direction DR1. The signal wiring PADs may include, for example, power supply pads, data pads, and panel dummy pads.

[0098] Furthermore, the bumps 350 and 370 of the driving integrated circuit 300 may be multiple and are arranged along the first direction DR1.

[0099] The planar shapes of the signal wiring PAD and the bumps 350, 370 may each be a rectangle. That is, the signal wiring PAD and the bumps 350, 370 may include a long side extending along the second direction DR2 and a short side extending along the first direction DR1. The angle where the long side meets the short side forms a right angle. However, the planar shapes of the signal wiring PAD and the bumps 350, 370 are not limited thereto, and may of course be a square, a circle, an ellipse, or other polygonal shapes.

[0100] The planar sizes of the signal wiring PAD and the bumps 350 and 370 are substantially the same, but are not limited thereto, and the planar size of the signal wiring PAD may be larger than the planar size of the bumps 350 and 370, or vice versa.

[0101] Referring to FIG. 7, the connecting wiring GSL may be disposed from the display area DA to the pad area PA, and may have a shape in which the width increases in a first direction DR1 in a region overlapping with the signal wiring PAD in the pad area PA.

[0102] As described above, the size of the signal wiring PAD in a plane may be larger than the size of the connecting wiring GSL and the supporter SM in a plane. The signal wiring PAD is arranged to overlap the connecting wiring GSL and the supporter SM in the thickness direction. The size of the supporter SM in a plane may be smaller than the size of the connecting wiring GSL in a plane. The planar shape of the supporter SM may be a rectangle, but is not limited thereto, and the planar shape of the supporter SM may be a square, a circle, an ellipse, or other polygonal shape.

[0103] The driving wiring 330 is disposed to extend from a lower end in the second direction DR2 of the flat display panel 100 to the pad area PA. The driving wiring 330 may have a shape whose width is expanded in the first direction DR1 in a region where the driving wiring 330 overlaps with the signal wiring PAD and the bumps 350 and 370 in the thickness direction. The planar shape of the driving wiring 330 in the region where the driving wiring 330 overlaps with the signal wiring PAD and the bumps 350 and 370 in the thickness direction may be rectangular. That is, in the region, the driving wiring 330 may include a short side extending along the first direction DR1 and a long side extending along the second direction DR2, and the corner where the short side and the long side meet may be angular. However, the planar shape of the driving wiring 330 is not limited thereto, and may be a square, a circle, an ellipse, or any other polygonal shape.

[0104] The planar size of the driving wiring 330 is substantially the same as the planar size of the above-mentioned connecting wiring GSL, but is not limited thereto, and the planar size of the driving wiring 330 may be smaller or larger than the planar size of the connecting wiring GSL.

[0105] The bumps 350 and 370 are arranged to overlap the signal wiring PAD and the drive wiring 330 in the thickness direction. The size of the bumps 350 and 370 on a plane is substantially the same as the size of the signal wiring PAD on a plane. The size of the bumps 350 and 370 on a plane may be larger than the size of the drive wiring 330 on a plane.

[0106] 8 and 9, the supporter SM is covered with a connecting wire GSL disposed on the upper part. When the supporter SM is applied to a trapezoid shape as in Fig. 9, the supporter SM may include an upper surface, a lower surface, and a side surface. The connecting wire GSL is disposed on the upper surface and the side surface of the supporter SM.

[0107] The lower surface of the supporter SM is in direct contact with the first insulating layer 111. The upper surface and side surface of the supporter SM are covered by and in direct contact with the connecting wire GSL. The connecting wire GSL may be formed along the surface of the supporter SM in accordance with the shape of the supporter SM. The thickness of the connecting wire GSL is generally uniform. That is, the thickness of the portion of the connecting wire GSL arranged on the upper surface of the supporter SM and the thickness of the portion of the connecting wire GSL arranged on the side surface of the supporter SM are substantially uniform.

[0108] The surface of the connecting wire GSL may include an inner surface and an outer surface. The outer surface of the connecting wire GSL may include an upper surface GSLa1 and outer surfaces GSLa2 and GSLa3, and the inner surface of the connecting wire GSL may include a lower surface GSLb1 and inner surfaces GSLb2 and GSLb3. The lower surface GSLb1 of the connecting wire GSL is in direct contact with the upper surface of the supporter SM. The inner surfaces GSLb2 and GSLb3 of the connecting wire GSL are in direct contact with the side surfaces of the supporter SM, respectively.

[0109] A second insulating layer 112b is further disposed on the side surface of the connecting wiring GSL. The second insulating layer 112b is in direct contact with the supporter SM and the upper surface of the first insulating layer 111 where the connecting wiring GSL is exposed. The second insulating layer 112b is disposed on the outer surfaces GSLa2 and GSLa3 of the connecting wiring GSL. The second insulating layer 112b exposes the upper ends of the outer surfaces GSLa2 and GSLa3 of the connecting wiring GSL and covers the lower ends. The second insulating layer 112b is in direct contact with the lower ends of the outer surfaces GSLa2 and GSLa3 of the connecting wiring GSL.

[0110] A signal wiring PAD is disposed on the second insulating layer 112b and the connecting wiring GSL. The signal wiring PAD is disposed on the upper surface and side surface of the connecting wiring GSL. The thickness of the signal wiring PAD is generally the same. That is, the thickness of the portion of the signal wiring PAD disposed on the upper surface of the connecting wiring GSL and the thickness of the portion of the signal wiring PAD disposed on the side surface of the connecting wiring GSL are substantially the same.

[0111] The surface of the signal wiring PAD may include an inner surface and an outer surface. The inner surface of the signal wiring PAD may include a first upper surface PADa1, a second upper surface PADa3, and an outer surface PADa2 arranged between and connecting the first upper surface PADa1 and the second upper surface PADa3, and the outer surface of the signal wiring PAD may include a first lower surface PADb1, a second lower surface PADb3, and an inner surface PADb2 arranged between and connecting the first lower surface PADb1 and the second lower surface PADb3. The second upper surface PADa3 and the outer surface PADa2 may be further positioned in a symmetrical opposite direction with respect to the first upper surface PADa1. Similarly, the second lower surface PADb3 and the inner surface PADb2 may be further positioned in a symmetrical opposite direction with respect to the first lower surface PADb1.

[0112] The first bottom surface PADb1 of the signal wiring PAD is located so as to protrude upward in the thickness direction from the second bottom surface PADb3, and the first top surface PADa1 of the signal wiring PAD is located so as to protrude upward in the thickness direction from the second top surface PADa3.

[0113] A first lower surface PADb1 of the signal wiring PAD is in direct contact with an upper surface PADb1 of the connecting wiring GSL, an inner side surface PADb2 of the signal wiring PAD is in contact with an upper end of an outer side surface GSLa2 of the connecting wiring GSL where the second insulating layer 112b is exposed, and a second lower surface PADb3 of the signal wiring PAD is in direct contact with the upper surface of the second insulating layer 112b.

[0114] The first upper surface PADa1, the second upper surface PADa3, and the outer surface PADa2 of the signal wiring PAD are in contact with the bump. The surface of the second bump 370 may include an outer surface facing the signal wiring PAD. The outer surface of the second bump 370 may include a first lower surface 370a1, a second lower surface 370a3, and an outer surface 370a2 disposed between the first lower surface 370a1 and the second lower surface 370a3 and physically connecting them. The second lower surface 370a3 and the outer surface 370a2 may be further located in symmetrical opposite directions with respect to the first lower surface 370a1.

[0115] The first lower surface 370a1 of the second bump 370 is positioned to be recessed upward in the thickness direction from the second lower surface 370a3.

[0116] The first lower surface 370a1 of the second bump 370 directly contacts the first upper surface PADa1 of the signal wiring PAD, the second lower surface 370a3 of the second bump 370 directly contacts the second upper surface PADa3 of the signal wiring PAD, and the outer surface 370a2 of the second bump 370 directly contacts the outer surface PADa2 of the signal wiring PAD. The first lower surface 370a1 and the first upper surface PADa1, the second lower surface 370a3 and the second upper surface PADa3, and the outer surface 370a2 and the outer surface PADa2 may be directly connected as described above. The first lower surface 370a1 and the first upper surface PADa1, the second lower surface 370a3 and the second upper surface PADa3, and the outer surface 370a2 and the outer surface PADa2 may be ultrasonically connected or ultrasonically bonded to each other.

[0117] The surface of the signal wiring PAD may be protruded in the thickness direction by disposing a supporter SM between the first insulating layer 111 and the connecting wiring GSL, and the surface of the central portion of the signal wiring PAD disposed along the surface of the connecting wiring GSL may be protruded in the thickness direction. The signal wiring PAD having a shape in which the surface of the central portion protrudes in the thickness direction is engaged with the shape of the second bump 370 of the driving integrated circuit 300. That is, the signal wiring PAD may include a first portion (central portion) having a first surface height and a second portion (edge ​​portion) disposed on one side and the other side of the first portion in a first direction DR1 and having a second surface height smaller than the first surface height, and the second bump 370 may include a first portion (central portion) having a third surface height and a second portion (edge ​​portion) disposed on one side and the other side of the first portion in a first direction DR1 and having a fourth surface height larger than the third surface height. The first protruding portion of the signal wiring PAD is coupled to the first indented portion of the second bump 370, and the second indented portion of the signal wiring PAD is coupled to the second protruding portion of the second bump 370. This increases the contact area between the signal wiring PAD and the second bump 370, thereby improving bonding reliability and reducing resistance between the second bump 370 and the signal wiring PAD.

[0118] Furthermore, by directly contacting the signal wiring PAD with the first portion (center portion) of the second bump 370, there is no room for the non-conductive material NCM to remain in the first portion (center portion), and it is possible to prevent an open between the signal wiring PAD and the second bump 370 due to the non-conductive material NCM.

[0119] A method for manufacturing the above-mentioned display device will be described below. In the following embodiments, the same components as those in the embodiments already described will be given the same reference numerals, and descriptions thereof will be omitted or simplified.

[0120] FIG. 10 is a flowchart of a method for manufacturing a display device according to one embodiment, FIGS. 11 and 12 are cross-sectional views of process steps of the method for manufacturing a display device according to one embodiment, FIG. 13 is a cross-sectional view of process steps of a method for manufacturing a display device according to another embodiment, FIGS. 14 and 15 are cross-sectional views of process steps of a method for manufacturing a display device according to yet another embodiment, FIGS. 16 and 17 are cross-sectional views of process steps of the method for manufacturing a display device according to yet another embodiment, and FIG. 18 is cross-sectional views of process steps of the method for manufacturing a display device according to one embodiment.

[0121] 10 and 11, a supporter is formed on a display substrate 101 or a base substrate (S10).

[0122] The supporter SM is disposed on the first insulating layer 111. The supporter SM is disposed directly on the upper surface of the first insulating layer 111. The supporter SM is disposed below the above-mentioned connecting wiring GSL and can protrude the connecting wiring GSL in the thickness direction. Due to the protruding connecting wiring GSL, the signal wiring PAD also protrudes in the thickness direction, facilitating bonding with the bumps of the driving integrated circuit 300. The supporter SM includes an organic or inorganic material.

[0123] The cross-sectional shape of the supporter SM may be a trapezoid.

[0124] 12 to 17, various methods of forming the supporter SM will be described.

[0125] 12 and 13, the step of forming a supporter on the display substrate 101 or the base substrate (S10) may further include a step of forming a supporter SM by a photolithography process.

[0126] The step of forming the supporter SM by a photolithography process may further include the steps of applying a supporter material SMa on the first insulating layer 111, irradiating the supporter material SMa applied on the first insulating layer 111 with an ultraviolet (UV) laser, and developing the supporter material SMa irradiated with the ultraviolet laser to form the supporter SM. The step of irradiating the supporter material SMa applied on the first insulating layer 111 with an ultraviolet (UV) laser may further include the steps of placing a mask MASK shown in FIG. 13 in an area other than the supporter SM formation area and irradiating the supporter material with an ultraviolet laser.

[0127] 14 and 15, the step of forming a supporter on the display substrate 101 or the base substrate (S10) may further include a step of forming a supporter SM by a squeezing process.

[0128] The step of forming the supporter SM by the squeezing process may further include the steps of placing a masking pattern MK on the first insulating layer 111 in an area other than the supporter placement area, pressing the supporter material SMb with a squeezing device to fill the supporter material SMb on the first insulating layer 111 where the masking pattern MK is exposed, and removing the masking pattern MK from the first insulating layer 111 and hardening the supporter material SMb formed on the upper surface of the first insulating layer 111.

[0129] 16 and 17, the step of forming a supporter on the display substrate 101 or the base substrate (S10) may further include a step of forming a supporter SM by an inkjet process.

[0130] The step of forming the supporter SM by the inkjet process may include a step of applying a supporter material SMc1 onto the first insulating layer 111 by an inkjet device, and a step of curing the supporter material SMc1 applied onto the first insulating layer 111 to form the supporter SM.

[0131] 18, a connecting wire GSL is formed on the supporter SM (S20). The connecting wire GSL may include one or more metals selected from molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The connecting wire GSL may be a single film or a multilayer film made of the above-mentioned materials.

[0132] The connecting wire GSL is formed so as to cover the surface of the supporter SM and to be in direct contact with the surface of the supporter SM. The portion of the connecting wire GSL that overlaps with the supporter SM in the thickness direction protrudes in the thickness direction.

[0133] Thereafter, a signal wiring PAD is formed on the connecting wiring GSL to cover the connecting wiring GSL and to be electrically connected to the connecting wiring GSL (S30).

[0134] FIG. 19 is a cross-sectional view of a pad area of ​​a display device according to another embodiment, FIG. 20 is a cross-sectional view of a pad area of ​​a display device according to yet another embodiment, FIG. 21 is a cross-sectional view of a pad area of ​​a display device according to yet another embodiment, FIG. 22 is a cross-sectional view of a pad area of ​​a display device according to yet another embodiment, and FIG. 23 is a cross-sectional view of a pad area of ​​a display device according to yet another embodiment.

[0135] 19 to 23 illustrate various cross-sectional shapes of the supporter SM.

[0136] Referring to FIG. 19, it is illustrated that the cross-sectional shape of the supporter SM_1 can be triangular.

[0137] The rest of the description has been given above with reference to FIG. 9, so duplicated description will be omitted.

[0138] Referring to FIG. 20, it is illustrated that the cross-sectional shape of the supporter SM_2 can be a pentagon.

[0139] The rest of the description has been given above with reference to FIG. 9, so duplicated description will be omitted.

[0140] Referring to FIG. 21, it is illustrated that the cross-sectional shape of the supporter SM_3 can be a semicircle.

[0141] The rest of the description has been given above with reference to FIG. 9, so duplicated description will be omitted.

[0142] Referring to FIG. 22, it is illustrated that the cross-sectional shape of the supporter SM_4 can be a semi-ellipse.

[0143] The rest of the description has been given above with reference to FIG. 9, so duplicated description will be omitted.

[0144] Referring to FIG. 23, it is illustrated that the cross-sectional shape of the supporter SM_5 can be rectangular.

[0145] The rest of the description has been given above with reference to FIG. 9, so duplicated description will be omitted.

[0146] FIG. 24 is a plan layout diagram of a pad area of ​​a display panel to which a driving integrated circuit is attached according to another embodiment.

[0147] 24, the supporter SM_6 according to the present embodiment has a line shape extending along the longer side direction of the signal wiring PAD, and differs from the supporter SM according to FIG. 7 in that the line-shaped supporter SM_6 may include a plurality of patterns.

[0148] More specifically, the supporter SM_6 according to this embodiment has a line shape extending along the long side direction or column direction of the signal wiring PAD, and the line-shaped supporter SM_6 may include a plurality of patterns.

[0149] The line-shaped patterns are spaced apart from each other along the short side of the signal wiring PAD. Although three patterns are shown in FIG. 24, the number of line-shaped patterns is not limited thereto, and two or four or more line-shaped patterns may be used.

[0150] The rest of the description has been given above with reference to FIG. 7, so duplicated description will be omitted below.

[0151] FIG. 25 is a plan layout diagram of a pad area of ​​a display panel to which a driving integrated circuit is attached according to still another embodiment.

[0152] Referring to Figure 25, the supporter SM_7 according to this embodiment has a line shape extending along the short side direction or row direction of the signal wiring PAD, and differs from the supporter SM according to Figure 7 in that the line-shaped supporter SM_7 may include multiple patterns.

[0153] More specifically, the supporter SM_7 according to the present embodiment has a line shape extending along the short side direction of the signal wiring PAD, and the line-shaped supporter SM_7 may include a plurality of patterns.

[0154] The line-shaped patterns are spaced apart from each other along the long side of the signal wiring PAD. Although six patterns are shown in FIG. 25, the number of line-shaped patterns is not limited thereto, and may be two, three, four, five, seven or more.

[0155] The rest of the description has been given above with reference to FIG. 7, so duplicated description will be omitted below.

[0156] FIG. 26 is a plan layout diagram of a pad area of ​​a display panel to which a driving integrated circuit is attached according to still another embodiment.

[0157] 26, the supporter SM_8 according to the present embodiment differs from the supporter SM according to FIG. 7 in that it has a lattice shape extending along the long side and short side directions of the signal wiring PAD.

[0158] More specifically, the supporter SM_8 according to this embodiment can have a lattice shape extending along the long side and short side directions of the signal wiring PAD.

[0159] The rest of the description has been given above with reference to FIG. 7, so duplicated description will be omitted below.

[0160] FIG. 27 is a plan layout diagram of a pad area of ​​a display panel to which a driving integrated circuit is attached according to still another embodiment.

[0161] 27, the supporter SM_9 according to this embodiment differs from the supporter SM according to FIG. 7 in that the supporter SM_9 includes a plurality of patterns having islands or island shapes.

[0162] More specifically, the supporter SM_9 according to this embodiment may include islands or a plurality of patterns having island shapes.

[0163] The island-shaped patterns are arranged along the long and short sides of the signal wiring PAD, and adjacent patterns are spaced apart from each other. In Fig. 27, the patterns are arranged in three columns along the long side of the signal wiring PAD and six rows along the short side of the signal wiring PAD, but the arrangement is not limited thereto.

[0164] The island-shaped pattern has a cross-sectional shape of a trapezoid as shown in FIG. 9, and a hexahedral shape having a trapezoidal cross-sectional shape is applied.

[0165] FIG. 28 is a diagram showing a modified example of a supporter according to an embodiment.

[0166] As shown in FIG. 28a, the supporter SM_9a according to this embodiment can be applied in the form of a rectangular parallelepiped SM_9a having a rectangular cross-sectional shape.

[0167] As shown in FIG. 28b, the supporter SM_9b according to this embodiment can be applied in a cone shape with a triangular cross section.

[0168] As shown in FIG. 28c, the supporter SM_9c according to this embodiment can be applied in a quadrangular pyramid shape with a square base and triangular sides.

[0169] As shown in FIG. 28d, the supporter SM_9d according to this embodiment can be applied in a pentagonal pyramid shape with a pentagonal base and triangular sides.

[0170] As shown in FIG. 28e, the supporter SM_9e according to this embodiment has circular bottom and top surfaces, and may be applied in a truncated cone shape in which the area of ​​the bottom surface is larger than the area of ​​the top surface.

[0171] As shown in FIG. 28f, the supporter SM_9f according to this embodiment has a pentagonal bottom and top surface, and can be applied in the shape of a pentagonal pyramid in which the area of ​​the bottom surface is greater than the area of ​​the top surface.

[0172] As shown in FIG. 28g, the supporter SM_9g according to this embodiment has circular bottom and top surfaces, and can be applied in a cylindrical shape with the area of ​​the bottom surface being equal to the area of ​​the top surface.

[0173] As shown in FIG. 28h, the supporter SM_9h according to this embodiment can be applied in a dish shape.

[0174] As shown in FIG. 28i, the supporter SM_9i according to this embodiment can be applied in a hemispherical shape.

[0175] As shown in FIG. 28j, the supporter SM_9j according to this embodiment can be applied in a bell shape.

[0176] FIG. 29 is a plan view of a pad area of ​​a display panel to which a driving integrated circuit is attached according to still another embodiment, and FIG. 30 is a cross-sectional view of a pad area of ​​a display device according to still another embodiment.

[0177] 29 and 30, this embodiment differs from the embodiment of FIGS. 7 and 9 in that a second connecting wire GSL2 is further disposed between the connecting wire GSL_1 and the signal wire PAD and the supporter SM is omitted.

[0178] More specifically, the size of the second connecting line GSL2 in a plane may be smaller than the size of the connecting line GSL_1 in a plane. The second connecting line GSL2 may have a rectangular shape in a plane, but is not limited thereto.

[0179] The second connecting line GSL2 is disposed directly on the upper surface of the connecting line GSL_1. The signal line PAD is disposed directly on and in contact with the second insulating layer 112b, the second connecting line GSL2, and the upper surface of the connecting line GSL_1 where the second connecting line GSL2 and the second insulating layer 112b are exposed.

[0180] The second connecting wire GSL2 is disposed in the same layer as the second conductive layer 130 described above in FIG 3. The second connecting wire GSL2 includes at least one of the materials exemplified for the second conductive layer 130.

[0181] FIG. 31 is a plan view of a pad area of ​​a display panel to which a driving integrated circuit is attached according to still another embodiment, and FIG. 32 is a cross-sectional view of a pad area of ​​a display device according to still another embodiment.

[0182] 31 and 32, this embodiment differs from the embodiment of FIGS. 7 and 9 in that the supporter SM is omitted and the connecting wire GSL_2 includes portions having different thicknesses.

[0183] The connecting wiring GSL_2 may include a first portion or a center portion having a first thickness, a second portion having a second thickness smaller than the first thickness, and a third portion. The second portion and the third portion are located on one side and the other side of the first portion in a first direction DR1, respectively. A surface of the first portion of the connecting wiring GSL_2 protrudes in the thickness direction from a surface of the second portion and a surface of the third portion. A central portion of the signal wiring PAD overlapping the first portion of the connecting wiring GSL_2 protrudes in the thickness direction.

[0184] 33 to 35 are cross-sectional views showing the steps of the process for forming the interconnect wiring shown in FIGS. 31 and 32. FIG.

[0185] 33, an interconnect material GSLa is deposited on the first insulating layer 111. The interconnect material GSLa may include at least one of the materials exemplified for the interconnect GSL described above with reference to FIG.

[0186] 34, a mask MASK is disposed on the interconnect material GSLa in a region where the interconnect GSL_2 is to be formed, and the interconnect material GSLa not overlapping with the mask MASK is etched. The step of etching the interconnect material GSLa not overlapping with the mask MASK may include a step of dry-etching the interconnect material GSLa not overlapping with the mask MASK or a step of wet-etching the interconnect material GSLa not overlapping with the mask MASK.

[0187] Next, referring to FIG. 35, a mask MASK is placed on the first portion of the connecting wiring GSL_2 and an area not overlapping with the connecting wiring GSL_2, and the area where the mask MASK is exposed is etched to form the first portion to the third portion of the connecting wiring GSL_2.

[0188] Although the present invention has been described above with reference to the preferred embodiment, this is merely illustrative and does not limit the present invention. A person skilled in the art will appreciate that various modifications and applications not exemplified above are possible within the scope of the essential characteristics of the present invention. For example, each component specifically illustrated in the preferred embodiment of the present invention may be modified and implemented. Differences related to such modifications and applications should be interpreted as being included in the scope of the present invention as defined in the appended claims. [Explanation of symbols]

[0189] 100: display panel, 300: driving integrated circuit, 500: printed circuit board, PAD: signal wiring, GSL: connecting wiring, 310: driving board, 330: driving wiring, 350: first bump, 370: second bump

Claims

1. a display substrate defining a display area and a pad area disposed around the display area; a connecting wire disposed on the pad region of the display substrate; A signal wiring arranged on the connecting wiring; a first insulating layer disposed between the display substrate and the signal wiring; a supporter disposed between the display substrate and the connecting wire, the supporter including an organic material; the supporter is disposed directly on an upper surface of a second insulating layer disposed on the display substrate; The connecting wire is in direct contact with the supporter, the first insulating layer partially covers a side surface of the connecting line and exposes a remaining part of the side surface and a top surface of the connecting line.

2. 2. The display panel of claim 1, wherein the connecting wire has a planar size larger than a planar size of the supporter, and the connecting wire covers the supporter.

3. 3. The display panel of claim 2, wherein the signal wiring has a planar size larger than that of the connecting wiring, and the signal wiring is in direct contact with the connecting wiring.

4. The display panel according to claim 1 , wherein the signal wiring is in direct contact with an upper surface of the first insulating layer.

5. The display panel according to claim 1 , wherein the cross-sectional shape of the supporter includes at least one of a trapezoid, a triangle, a pentagon, a semicircle, a semi-ellipse, and a rectangle.

6. 2. The display panel of claim 1, wherein the supporter includes a pattern extending along a long side direction of the signal wiring, the supporter pattern is multiple, and the multiple supporter patterns are arranged at a distance from each other along a short side direction of the signal wiring.

7. the supporter includes a pattern extending along a short side direction of the signal wiring, The supporter has a plurality of patterns, The display panel according to claim 1 , wherein the supporter patterns are spaced apart from each other along a longer side of the signal wiring.

8. 2. The display panel according to claim 1, wherein the supporter has a lattice shape extending along the long side and short side directions of the signal wiring on a plane.

9. 2. The display panel according to claim 1, wherein the supporter has a plurality of island shapes spaced apart from each other along longer and shorter sides of the signal wiring on a plane.

10. The display panel of claim 1 , wherein the connecting wires are a plurality of wires, and further comprising a non-conductive film or a non-conductive binder disposed between the plurality of connecting wires.

11. a display substrate having a display area and a pad area disposed around the display area, the display substrate including a first insulating layer; a first connection wiring disposed on the pad region of the display substrate and in contact with a supporter including an organic material disposed directly on an upper surface of the first insulating layer; a signal wiring disposed on the first connecting wiring; a second insulating layer disposed between the display substrate and the signal wiring; the first connection wire includes a first portion, a second portion disposed on one side of the first portion, and a third portion disposed on the other side of the first portion; a surface height of the first portion is greater than a surface height of the second portion and a surface height of the third portion; the second insulating layer partially covers a side surface of the first connecting line and exposes a remaining part of the side surface and a top surface of the first connecting line.

12. the first connecting line includes a fourth portion overlapping the first portion of the signal line, a fifth portion overlapping the second portion of the signal line, and a sixth portion overlapping the third portion of the signal line; The display panel of claim 11 , wherein the fourth portion has a thickness greater than the fifth and sixth portions.

13. a second connection wiring disposed between the first connection wiring and the signal wiring, the second connecting wiring has a planar size smaller than the first connecting wiring and the signal wiring; The display panel of claim 11 , wherein the second connection line overlaps with the first portion of the signal line in a thickness direction.

14. a display substrate defining a display area and a pad area disposed around the display area; a connecting wire disposed on the pad region of the display substrate; a signal wiring disposed on the connecting wiring; a first insulating layer disposed between the display substrate and the signal wiring; and a display panel including a supporter that is disposed between the display substrate and the connecting wire and that includes an organic material; and a driving integrated circuit including bumps attached on the pad region of the display substrate and connected to the signal wiring; the supporter is disposed directly on an upper surface of a second insulating layer disposed on the display substrate; The connecting wire is in direct contact with the supporter, The first insulating layer partially covers the side surfaces of the connecting lines and exposes the remaining side surfaces and a top surface of the connecting lines.

15. The display device of claim 14 , wherein the connecting wire has a size on a plane that is larger than a size on a plane of the supporter, and the connecting wire covers the supporter.

16. The display device of claim 14 , wherein the signal wiring has a planar size larger than the connecting wiring, and the signal wiring is in direct contact with the connecting wiring.

17. The display device according to claim 14 , wherein the signal wiring is in direct contact with an upper surface of the first insulating layer.

18. 17. The display device of claim 16, wherein the signal wiring includes a first portion overlapping the supporter, a second portion not overlapping the supporter and positioned on one side of the first portion, and a third portion not overlapping the supporter and positioned on the other side of the first portion, and an upper surface of the first portion protrudes in a thickness direction beyond an upper surface of the second portion and an upper surface of the third portion.

19. The display device of claim 18 , wherein the driving integrated circuit further comprises a driving substrate and a driving wiring disposed on the driving substrate, the bump being disposed on the driving wiring and connected to the driving wiring.

20. 20. The display device of claim 19, wherein the bump includes a first portion, a second portion disposed on one side of the first portion, and a third portion disposed on the other side of the first portion, and a surface of the first portion is recessed in a thickness direction more than a surface of the second portion and a surface of the third portion.

21. 21. The display device of claim 20, wherein a first portion of the signal wiring is connected to a first portion of the bump, a second portion of the signal wiring is connected to a second portion of the bump, and a third portion of the signal wiring is connected to a third portion of the bump.

22. The display device according to claim 19 , wherein the bump is directly connected to the signal wiring.

23. The display device according to claim 22 , wherein the bumps are ultrasonically connected to the signal wiring.

24. forming a supporter including an organic substance on a base substrate; forming a connecting wire on the supporter; forming a first insulating layer on the base substrate, the first insulating layer partially covering a side surface of the interconnection line and exposing a remaining part of the side surface and a top surface of the interconnection line; forming a signal line on the connecting line to cover the connecting line and electrically connect the signal line to the connecting line; the supporter is disposed directly on an upper surface of a second insulating layer disposed on the base substrate; The connecting wire covers and directly contacts the supporter.

25. The method of claim 24, wherein forming the supporter on the base substrate further comprises forming the supporter by a photolithography process, an inkjet process, or a squeezing process.

26. The method of claim 24, further comprising the step of attaching a driving integrated circuit onto the signal wiring after forming the signal wiring.

27. 27. The method of claim 26, wherein the step of attaching the driving integrated circuit comprises directly connecting bumps to the signal wiring.

28. 28. The method for manufacturing a display device of claim 27, wherein the signal wiring includes a first portion overlapping the supporter, a second portion not overlapping the supporter and located on one side of the first portion, and a third portion not overlapping the supporter and located on the other side of the first portion, and an upper surface of the first portion protrudes in a thickness direction beyond an upper surface of the second portion and an upper surface of the third portion.

29. 29. The method for manufacturing a display device of claim 28, wherein the bump includes a first portion, a second portion disposed on one side of the first portion, and a third portion disposed on the other side of the first portion, and a surface of the first portion is recessed in a thickness direction more than a surface of the second portion and a surface of the third portion.

30. a first portion of the signal wiring is connected to a first portion of the bump; a second portion of the signal wiring is connected to a second portion of the bump; The method for manufacturing a display device according to claim 29 , wherein the third portion of the signal wiring is connected to the third portion of the bump.

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