Semiconductor Device

Abstract

To prevent loss of confidentiality and authenticity due to security attacks on the back or sides.SOLUTION: In a semiconductor device with a circuit board 1 having a first surface on which electronic circuits are formed and a second surface that is the back side of the first surface, the circuit board 1 is equipped with a wiring conductor 13a with a first strip conductor formed on the second surface, a dummy wiring conductor 13b with a second strip conductor formed on the second surface, and a detection circuit 41 to detect a short between the wiring conductor 13a and dummy wiring conductor 13b.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a semiconductor device for detecting evasion attacks of a backside exposure detection circuit. [Background technology]

[0002] Currently, a variety of semiconductor devices containing integrated electronic circuits are used to process signals.

[0003] In some types of signal processing (e.g., encryption and decryption), confidentiality and / or authenticity of the signals being processed may be required. In such cases, it is required that signals containing confidential information are not transmitted over signal lines that are directly accessible from the outside. It is also required that circuits that process signals containing confidential information do not leak the contents of the signals in the form of unwanted radio waves, power supply noise, etc.

[0004] For example, Patent Document 1 discloses a technology for a back-surface buried wiring structure that prevents security attacks such as noise observation and fault injection via the back silicon substrate of an IC chip, and detects physical attacks from the back side, i.e., exposure attacks. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2019-110293 A Summary of the Invention [Problem to be solved by the invention]

[0006] However, in the case of the above-mentioned Patent Document 1, when flip-chip mounting is performed in which the electronic circuit side of the IC chip is mounted on a wiring board with the side facing down, the back surface is exposed, which makes it possible for the IC chip to be subject to advanced attacks such as bypass attacks that provide a bypass circuit for the wiring on the back surface, laser irradiation to the side surface, and probing to the side surface.

[0007] The present invention has been made to solve the problems (issues) of the conventional technology described above, and aims to provide a semiconductor device that can prevent a decrease in confidentiality and authenticity due to security attacks on the back or sides. [Means for solving the problem]

[0008] In order to solve the above problems and achieve the object, the present invention provides a semiconductor device including a circuit board having a first surface on which an electronic circuit is formed and a second surface that is a reverse surface of the first surface, the circuit board including a wiring conductor having a first strip conductor formed on the second surface; a second strip conductor disposed adjacent to the first strip conductor on the second surface on which the wiring conductor is formed, Second strip conductor Consists of The semiconductor device is characterized by comprising a dummy wiring conductor and a detection circuit for detecting a short circuit between the wiring conductor and the dummy wiring conductor.

[0009] In the present invention, the wiring conductor is formed in a meandering shape, a stripe shape, or a mesh shape.

[0010] In the present invention, when the wiring conductors are formed in a meandering shape, the dummy wiring conductors are also formed in the meandering shape.

[0011] In the above-mentioned invention, when the wiring conductors are formed in a stripe pattern, the dummy wiring conductors are formed in the stripe pattern.

[0012] In the above-mentioned invention, when the wiring conductors are formed in a mesh shape, the dummy wiring conductors are also formed in the mesh shape.

[0013] The present invention also provides a semiconductor device including a circuit board having a first surface on which an electronic circuit is formed and a second surface that is a reverse surface of the first surface, the circuit board including a wiring conductor having a first strip conductor formed on the second surface; The device has an analog-to-digital converter, a logic circuit, and a variable resistance element, and the logic circuit changes the resistance value of the variable resistance element to variably set an intermediate potential of the wiring conductor, while the analog-to-digital converter digitizes the voltage of the wiring conductor and the logic circuit digitizes the voltage of the wiring conductor. and a monitoring circuit for monitoring a bias voltage of the wiring conductor.

[0014] The present invention also provides a semiconductor device including a circuit board having a first surface on which an electronic circuit is formed and a second surface that is a reverse surface of the first surface, the circuit board including a wiring conductor having a first strip conductor formed on the second surface; a second strip conductor disposed adjacent to the first strip conductor on the second surface on which the wiring conductor is formed, Second strip conductor Consists of The capacitance change detection circuit includes a capacitance wiring conductor and a detection circuit for detecting a change in capacitance of the capacitance wiring conductor.

[0015] The present invention also relates to a semiconductor device comprising a circuit board having a first surface on which an electronic circuit is formed and a second surface which is the reverse surface of the first surface, wherein the circuit board comprises a wiring conductor having a first strip conductor formed on the second surface, a multilayer wiring conductor having a second strip conductor formed on the first surface, a via conductor connecting the wiring conductor and the multilayer wiring conductor, and a detection circuit which detects disconnection of the wiring conductor, the multilayer wiring conductor, and the via conductor. Effect of the Invention

[0016] According to the present invention, it is possible to provide a semiconductor device capable of preventing a decrease in confidentiality and authenticity due to security attacks on the back surface or side surfaces. [Brief description of the drawings]

[0017] [Figure 1] FIG. 1 is a perspective view showing a configuration of a semiconductor device according to the first embodiment. [Diagram 2] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Diagram 3] FIG. 3 is a diagram showing a second side of the circuit board of FIG. [Figure 4] FIG. 4 is a circuit diagram showing a configuration of the detection circuit of the semiconductor device according to the first embodiment. [Diagram 5] FIG. 5 is a timing chart showing the operation of the detection circuit of FIG. 4, in particular, the normal operation and the operation when the semiconductor device is under attack. [Figure 6]FIG. 6 is a diagram showing a second surface of the circuit board of the semiconductor device according to the second embodiment. [Figure 7] FIG. 7 is a circuit diagram showing a configuration of a detection circuit with a voltage monitoring circuit of a semiconductor device according to the second embodiment. [Figure 8] FIG. 8 is a timing chart showing the operation of the voltage monitoring circuit of FIG. [Figure 9] FIG. 9 is a diagram showing a second surface of the semiconductor circuit board according to the third embodiment. [Figure 10] FIG. 10 is a block diagram showing a configuration of a capacitance sensor circuit of a semiconductor device according to the third embodiment. [Figure 11] FIG. 11 is a diagram showing the second surface of the circuit board of the semiconductor device according to the fourth embodiment. [Figure 12] FIG. 12 is a perspective view of a side surface of a circuit board of the semiconductor device according to the fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a semiconductor device according to the present invention will be described in detail with reference to the drawings.

[0019] [Embodiment 1] First, an overview of the semiconductor device according to the present embodiment 1 will be described. In the present embodiment 1, a semiconductor device provided with a dummy wiring conductor 13b will be described in order to detect a bypass attack that avoids detection of the attack by bypassing the embedded wiring conductor 13 arranged on the back surface of the circuit board 1.

[0020] Fig. 1 is a perspective view showing a configuration of a semiconductor device according to embodiment 1. The semiconductor device shown in Fig. 1 includes a circuit board 1, a wiring board 2, a wiring conductor 3, and an embedded wiring conductor 13. The circuit board 1 has two surfaces parallel to the XY plane of Fig. 1. Here, the surface on which the electronic circuit 15 is provided is referred to as the "first surface", and the surface opposite to the first surface is referred to as the "second surface".

[0021] The circuit board 1 includes a semiconductor substrate 11 and a plurality of wiring layers 12a formed parallel to the XY plane on the semiconductor substrate 11. For example, the semiconductor substrate 11 is made of silicon, and the wiring layers 12a are made of copper. An electronic circuit 15 is formed on the circuit board 1.

[0022] The electronic circuit 15 includes a detection circuit 41 that detects cutting attacks, bypass attacks, and the like on the semiconductor device. A first surface of the circuit board 1 is formed with a plurality of pad conductors 12ac for supplying power to the electronic circuit 15 and inputting and outputting signals. The circuit board 1 is flip-chip mounted on the first surface to the wiring board 2 by, for example, bump conductors. Such flip-chip mounting is a mounting technique in which bare chips obtained by cutting out a semiconductor into chips are flipped (inverted) and mounted.

[0023] The wiring board 2 is a substrate for connecting multiple semiconductor devices and applying a power supply voltage from the outside, and is made of resin or ceramic. The wiring conductor 3 is a wiring for applying a power supply voltage to the semiconductor device and transmitting signals. The buried wiring conductor 13 will be described later.

[0024] Next, a configuration of the semiconductor device according to the first embodiment will be described. Fig. 2 is a cross-sectional view of the semiconductor device taken along line AA in Fig. 1. As shown in Fig. 2, the circuit board 1 includes a semiconductor substrate 11, a multilayer wiring conductor 12, a buried wiring conductor 13, a via conductor 14, and an electronic circuit 15.

[0025] The semiconductor substrate 11 has a multilayer wiring conductor 12 including a plurality of wiring layers 12a on a first surface, and has a buried wiring conductor 13 on a second surface. In the example of FIG. 2, the multilayer wiring conductor 12 includes six wiring layers 12a. Each wiring layer 12a is patterned by any semiconductor process technology. In this way, an electronic circuit 15 is formed in the multilayer wiring conductor 12. The electronic circuit 15 includes a plurality of circuit elements 15a such as transistors, diodes, capacitors, resistors, and inductors.

[0026] The electronic circuit 15 can be formed by a CMOS process technology or other process technology. A part of the wiring layer 12a is formed as a pad conductor 12ac. The buried wiring conductor 13 is formed by digging a groove in the semiconductor substrate 11 by etching and burying a metal therein to form wiring, and is formed on the second surface of the semiconductor substrate 11 as another wiring conductor 13a of the circuit board 1. The via conductor 14 is formed penetrating the semiconductor substrate 11 in the Z direction (thickness direction). At least one via conductor 14 is electrically connected to the multilayer wiring conductor 12, and at least one via conductor 14 is electrically connected to the buried wiring conductor 13. The wiring substrate 2 has already been described, and therefore a detailed description thereof will be omitted here.

[0027] Next, the pattern of the second surface of the circuit board 1 of the semiconductor device according to the first embodiment will be described. Fig. 3 is a diagram showing the second surface of the circuit board 1 of Fig. 1. As shown in Fig. 3, the wiring conductor 13a includes, for example, a plurality of strip conductors connected to each other on a straight line, and is formed in a meandering shape from node N1 to node N2 so as to substantially cover the entire second surface of the circuit board 1. On the other hand, the dummy wiring conductor 13b includes a plurality of strip conductors connected to each other on a straight line, similar to the wiring conductor 13a, is disposed close to the wiring conductor 13a, and is formed in a meandering shape so as to substantially cover the entire second surface of the circuit board 1.

[0028] Nodes N1 and N2 are connected to a detection circuit 41 in the electronic circuit 15 through the via conductor 14 in Fig. 2. Also, node N3 of the dummy wiring conductor 13b is connected to a high voltage (e.g., a power supply voltage) in the electronic circuit 15 through the via conductor 14 in Fig. 2. With this structure, when an attacker makes contact with a probe in a bypass attack, the wiring conductor 13a and the dummy wiring conductor 13b are short-circuited. The semiconductor device can detect the fact that it has been subjected to a bypass attack by detecting the short-circuit between the wiring conductor 13a and the dummy wiring conductor 13b using the detection circuit 41 in the electronic circuit 15.

[0029] The wiring conductors 13a and dummy wiring conductors 13b provided on the second surface of the circuit board 1 may be formed as regions of any shape other than meandering, as long as they can cover substantially the entire second surface of the circuit board 1. If the wiring conductors 13a and the dummy wiring conductors 13b are arranged close to each other, they can be formed, for example, as stripe-shaped or mesh-shaped regions including a plurality of linear strip conductors arranged at a predetermined interval from each other without being connected to each other. The intervals between the strip conductors are in accordance with the design criteria for wiring in the semiconductor process technology for forming the electronic circuit 15. When the wiring conductors 13a are stripe-shaped, it is desirable that the dummy wiring conductors 13b are also stripe-shaped, and when the wiring conductors 13a are mesh-shaped, it is desirable that the dummy wiring conductors 13b are also mesh-shaped.

[0030] Nodes at both ends of each strip conductor of wiring conductor 13a are connected to detection circuit 41 in electronic circuit 15 through via conductor 14 in Fig. 2. One of the nodes of each strip conductor of dummy wiring conductor 13b is connected to a power supply in electronic circuit 15 through via conductor 14 in Fig. 2. The semiconductor device can detect a bypass attack by detecting a short circuit between each wiring conductor 13a and dummy wiring conductor 13b using detection circuit 41 in electronic circuit 15.

[0031] Next, the configuration of the detection circuit 41 will be described. Fig. 4 is a circuit diagram showing the configuration of the detection circuit 41 of the semiconductor device according to the first embodiment. As shown in Fig. 4, the detection circuit 41 includes switching elements 21 to 23 and a latch circuit 24. The detection circuit 41 is provided inside the electronic circuit 15, and is connected to the nodes N1, N2, and N3 in Fig. 3 through the via conductor 14 in Fig. 2. The detection circuit 41 receives an input of a reset signal and a constant voltage from another part of the electronic circuit 15, and generates a detection signal.

[0032] Next, the operation of the detection circuit 41 will be described. Fig. 5 is a timing chart showing the normal operation of the detection circuit 41 in Fig. 4 and the operation when the semiconductor device is attacked. Normally, the voltage of the node N1 is equal to the voltage of the node N2 (ground voltage), and the detection signal remains at a low level. In contrast, when the semiconductor device is attacked by a bypass and the wiring conductor 13a and the dummy wiring conductor 13b are short-circuited, the dummy wiring conductor 13b is connected to a high voltage (for example, a power supply voltage), so that the voltage of the node N1 becomes a high voltage. As a result, the detection signal transitions from a low level to a high level.

[0033] When the detection signal transitions from a low level to a high level, the operation of the electronic circuit 15 is stopped, thereby making it possible to protect the signals processed inside the semiconductor device from an attacker.

[0034] As described above, in the present embodiment 1, the semiconductor device is provided with the wiring conductors 13a, the dummy wiring conductors 13b, and the detection circuit 41 in the electronic circuit 15, thereby making it possible to detect the occurrence of a bypass attack. The semiconductor device according to the present embodiment 1 can prevent a decrease in confidentiality and authenticity due to a security attack by stopping the operation of the electronic circuit 15 when it detects the occurrence of a bypass attack.

[0035] In the first embodiment, the wiring conductor 13a has an electromagnetic shielding effect because it is connected to the ground voltage, and therefore when the electronic circuit 15 processes a signal including confidential information, it is possible to reduce signal leakage (signal leakage as unwanted radio waves or power supply noise) above the semiconductor device.

[0036] [Embodiment 2] Incidentally, in the above-mentioned embodiment 1, it is necessary to provide the wiring conductor 13a and the dummy wiring conductor 13b in order to detect a bypass attack, but this complicates the structure of the embedded wiring conductor 13. Therefore, in the present embodiment 2, a semiconductor device that detects a bypass attack without providing the dummy wiring conductor 13b will be described.

[0037] First, the second surface of the circuit board 1 of the semiconductor device according to the second embodiment will be described. Fig. 6 is a diagram showing the second surface of the circuit board 1 of the semiconductor device according to the second embodiment. The wiring conductor 15b includes a plurality of linear strip conductors connected to each other, and is formed in a meandering shape from the node N21 to the node N22 so as to cover substantially the entire second surface of the circuit board 1. The nodes N21 and N22 are connected to the detection circuit 42 with a voltage monitoring circuit in the electronic circuit 15 through the via conductor 14 in Fig. 2.

[0038] The meandering wiring conductor 15b is set to an intermediate voltage by the voltage monitoring circuit 43. As a result, when a bypass attack is made on at least one strip conductor of the meandering wiring conductor 15b, a change occurs in the voltage of the wiring conductor 15b. Therefore, the semiconductor device can detect the fact that a bypass attack has been made by detecting the voltage change with the voltage monitoring circuit 43 in the electronic circuit 15.

[0039] The wiring conductor 15b on the second surface of the circuit board 1 is not limited to a meandering shape and may be formed as an area of ​​any other shape as long as it can cover substantially the entire second surface of the circuit board 1. The wiring conductor 15b may be formed, for example, as a stripe-shaped or mesh-shaped area including a plurality of linear strip conductors arranged at a predetermined interval from each other without being connected to each other, as long as they are arranged close to each other. The interval between the strip conductors is in accordance with the design standard of wiring in the semiconductor process technology for forming the electronic circuit 15.

[0040] Next, the operation of the voltage monitoring circuit 43 of the detection circuit with voltage monitoring circuit 42 will be described. Fig. 7 is a circuit diagram showing the configuration of the detection circuit with voltage monitoring circuit 42 of the semiconductor device according to embodiment 2. The detection circuit 44 is made up of switching elements 25, 26, 27 and a latch circuit 28. The voltage monitoring circuit 43 also includes a variable resistance element 30, a control / detection logic circuit 31 and an analog-to-digital converter 32.

[0041] The detection circuit 42 with voltage monitoring circuit is provided inside the electronic circuit 15, and is connected to the node N21 and the node N22 in FIG. 7 through the via conductor 14 in FIG. 2 (not shown in FIG. 7). The detection circuit 44 receives a reset signal and a constant voltage from another part of the electronic circuit 15, and generates a detection signal. Meanwhile, the voltage monitoring circuit 43 first sets the voltage of the wiring conductor 15b installed on the second surface of the circuit board 1 by changing the resistance value of the variable resistance element 30 using the control and detection logic circuit 31. Then, when the voltage monitoring circuit 43 receives a bypass attack from the outside, the voltage of the node N21 drops. After that, the voltage monitoring circuit 43 digitizes the voltage change with the analog-digital converter 32, and detects the change with the control and detection logic circuit 31, so that the semiconductor device can detect the fact of the bypass attack.

[0042] Next, the operation of the voltage monitoring circuit 43 will be described. FIG. 8 is a timing chart showing the operation of the voltage monitoring circuit 43 of FIG. 7. As shown in FIG. 8, the voltage monitoring circuit 43 constantly monitors the voltage of the node N21, digitizes the voltage by the analog-digital converter 32, and monitors the change in the voltage by the control and detection logic circuit 31. The wiring conductor 15b is set to an intermediate voltage set by the control and detection logic circuit 31 by changing the resistance value of the variable resistance element 30. When a bypass attack is performed on the wiring conductor 15b (t1), the voltage of the node N21 drops, and the output signal D of the analog-digital converter 32 OUT This change is detected by the control and detection logic circuit 31.

[0043] If the control and detection logic circuit 31 detects a bypass attack, the electronic circuit 15 may, for example, stop its operation. This makes it possible to protect signals processed inside the semiconductor device from attackers.

[0044] In this way, the semiconductor device according to the second embodiment can detect the occurrence of a bypass attack by including the wiring conductor 15b and the detection circuit 42 with a voltage monitoring circuit in the electronic circuit 15. When the semiconductor device according to the second embodiment detects the occurrence of a bypass attack, it can prevent a decrease in confidentiality and authenticity due to the security attack by, for example, stopping the operation of the electronic circuit 15.

[0045] [Embodiment 3] Incidentally, in the above-mentioned embodiments 1 and 2, it is possible to detect the fact of a bypass attack, but it is not possible to detect the approach of a probe or the like before a bypass attack is launched. Therefore, in the present embodiment 3, a semiconductor device that detects the approach of a probe or the like before a bypass attack is performed will be described.

[0046] First, the second surface of the circuit board 1 of the semiconductor device according to the third embodiment will be described. Fig. 9 is a diagram showing the second surface of the circuit board 1 of the semiconductor according to the third embodiment. As shown in Fig. 9, the wiring conductor 16a and the wiring conductor 16b include a plurality of linear strip conductors connected to each other and are formed in a comb shape. The node N31 and the node N32 are connected to the capacitance sensor circuit 45 in the electronic circuit 15 through the via conductor 14 of Fig. 2.

[0047] The wiring conductors 16a and 16b arranged in this comb shape form a capacitive wiring conductor, and a capacitance change occurs when a probe for bypass attack approaches. The semiconductor device detects this capacitance change with the capacitance sensor circuit 45 in the electronic circuit 15, and can detect the approach of the probe. Note that the wiring conductors 16a and 16b on the second surface of the circuit board 1 do not have to be arranged in a comb shape as long as they can form a capacitive wiring conductor, and may be formed as an area of ​​any other shape.

[0048] The wiring conductor 16c includes, for example, a plurality of linear strip conductors connected to each other, and is formed in a meandering shape from the node N33 to the node N34 so as to cover the entire portion of the second surface of the circuit board 1 except for the wiring conductors 16a and 16b arranged in the comb shape. The nodes N33 and N34 are connected to the detection circuit 42 with a voltage monitoring circuit in the electronic circuit 15 through the via conductor 14 in FIG. 2, as in the second embodiment. When a bypass attack is made on the wiring conductor 16c formed in a meandering shape, the fact of the bypass attack can be detected by the voltage monitoring circuit 43.

[0049] Next, a configuration of the capacitance sensor circuit 45 of the semiconductor device according to the embodiment 3 will be described. Fig. 10 is a block diagram showing the configuration of the capacitance sensor circuit 45 of the semiconductor device according to the embodiment 3. The capacitance sensor circuit 45 includes a capacitance-voltage conversion circuit 33, an analog-digital converter 34, a detection logic circuit 35, and a pulse generation circuit 36. The capacitance sensor circuit 45 is provided inside the electronic circuit 15, and is connected to the nodes N31 and N32 in Fig. 9 through the via conductors 14 in Fig. 2 (not shown in Fig. 10).

[0050] When a probe performing a bypass attack approaches the capacitance wiring conductor formed by the wiring conductors 16a and 16b, the capacitance value of the capacitance sensor circuit 45 decreases. The capacitance-voltage conversion circuit 33 of the capacitance sensor circuit 45 reduces its output voltage in accordance with the reduction in capacitance value due to the approach of the probe, so that the detection logic circuit 35 can detect the approach of the probe.

[0051] In the third embodiment, the capacitance wiring conductor is a mutual capacitance circuit, but may be a self-capacitance circuit. In this case, the capacitance sensor circuit 45 increases its capacitance value when a probe that performs a bypass attack approaches the self-capacitance circuit, so that the capacitance sensor circuit 45 can detect the approach of the probe.

[0052] In this way, the semiconductor device according to the third embodiment can detect the approach of a probe for performing a bypass attack by including the capacitance wiring conductor made of the wiring conductors 16a and 16b and the capacitance sensor circuit 45 in the electronic circuit 15. If the semiconductor device according to the third embodiment detects the approach of a probe for performing a bypass attack, it can prevent deterioration of confidentiality and authenticity due to a security attack by, for example, stopping the operation of the electronic circuit 15.

[0053] [Embodiment 4] However, the above-mentioned first to third embodiments cannot prevent probing attacks and laser injection attacks from the side of the circuit board 1. Therefore, in a fourth embodiment, a semiconductor device that can prevent probing attacks and laser injection attacks from the side will be described.

[0054] First, the second surface of the circuit board 1 of the semiconductor device according to the fourth embodiment will be described. Fig. 11 is a diagram showing the second surface of the circuit board 1 of the semiconductor device according to the fourth embodiment. The wiring conductor 17a has the same role as the wiring conductor 15b of the second embodiment, and therefore a description thereof will be omitted. The wiring conductor 17b formed on the second surface of the circuit board 1 is connected to the wiring layer 12a formed on the first surface of the circuit board 1 through a via conductor 51.

[0055] Next, the wiring layer 12a is connected to a wiring conductor 17b formed on the second surface of the circuit board 1 through a via conductor 51, and the wiring conductor 17b and the wiring layer 12a are connected through a via conductor 14. This forms meandering wiring in the XZ plane and the YZ plane perpendicular to the XY plane of the circuit board 1. The nodes N43 and N44 are connected to the detection circuit 41 in the electronic circuit 15 through the via conductor 51.

[0056] Fig. 12 is a perspective view of a side surface of a circuit board 1 of a semiconductor device according to embodiment 4. As shown in Fig. 12, wiring is connected in the XZ plane of the circuit board 1 in the order of via conductor 51, wiring layer 12a, via conductor 51, wiring conductor 17b, and via conductor 51, and the semiconductor device according to embodiment 4 includes meandering wiring when viewed from the XZ plane.

[0057] The meandering wiring in the XZ plane and the YZ plane is connected to the detection circuit 41 in the electronic circuit 15 through the via conductor 51. As a result, the voltage of the meandering wiring becomes the ground voltage, and has an electromagnetic shielding effect. Therefore, when the electronic circuit 15 processes a signal including confidential information, it is possible to reduce signal leakage to the side of the semiconductor device (signal leakage as unwanted radio waves or power supply noise). Furthermore, if the pattern of the meandering wiring is cut by a laser injection attack from the side of the circuit board 1, the detection circuit 41 can detect the attack.

[0058] In this way, the semiconductor device according to the fourth embodiment can be made resistant to probing attacks by including meandering wiring in the XZ plane and the YZ plane that connects the wiring conductor 17b, the via conductor 51, and the wiring layer 12a, and the detection circuit 41 in the electronic circuit 15. Furthermore, if the semiconductor device according to the fourth embodiment detects a laser injection attack, it can prevent a decrease in confidentiality and authenticity due to a security attack on the side by, for example, stopping the operation of the electronic circuit 15.

[0059] The configurations illustrated in the above embodiments are merely functional schematics, and are not necessarily physically configured as illustrated. In other words, the form of distribution and integration of each device is not limited to that illustrated, and all or part of the devices can be functionally or physically distributed and integrated in any unit according to various loads, usage conditions, etc. [Industrial Applicability]

[0060] The semiconductor device according to the present invention is suitable for providing a semiconductor device capable of preventing deterioration of secrecy and authenticity due to security attacks on the back surface or side surfaces. [Explanation of symbols]

[0061] 1 Circuit Board 2. Wiring board 3. Wiring conductor 11 Semiconductor substrate 12 Multilayer wiring conductor 12a wiring layer 12ac Pad Conductor 13 Buried wiring conductor 13a, 15b, 16a, 16b, 16c, 17a, 17b Wiring conductor 13b Dummy wiring conductor 14, 51 Via conductor 15 Electronic circuits 15a Circuit elements 21, 22, 23, 25, 26, 27 Switching elements 24, 28 Latch circuit 30 Variable resistance element 31 Control and detection logic circuit 32 Analog-to-Digital Converter (ADC) 33 Capacitance-to-voltage conversion circuit 34 Analog-to-Digital Converter (ADC) 35 Detection logic circuit 36 Pulse Generator Circuit 41, 44 Detection circuit 42 Detection circuit with voltage monitoring circuit 43 Voltage monitoring circuit 45 Capacitive Sensor Circuit

Claims

1. A semiconductor device including a circuit board having a first surface on which an electronic circuit is formed and a second surface that is a reverse surface of the first surface, The circuit board includes: a wiring conductor having a first strip conductor formed on the second surface; a dummy wiring conductor comprising a second strip conductor disposed adjacent to the first strip conductor and nested on the second surface on which the wiring conductor is formed; a detection circuit for detecting a short circuit between the wiring conductor and the dummy wiring conductor; A semiconductor device comprising:

2. The wiring conductor is 2. The semiconductor device according to claim 1, wherein the electrodes are formed in a meandering, stripe or mesh shape.

3. 3. The semiconductor device according to claim 2, wherein when the wiring conductor is formed in a meandering shape, the dummy wiring conductor is formed in the meandering shape.

4. 3. The semiconductor device according to claim 2, wherein when the wiring conductors are formed in a stripe pattern, the dummy wiring conductors are formed in the stripe pattern.

5. 3. The semiconductor device according to claim 2, wherein, when the wiring conductors are formed in a mesh shape, the dummy wiring conductors are formed in the mesh shape.

6. A semiconductor device including a circuit board having a first surface on which an electronic circuit is formed and a second surface that is a reverse surface of the first surface, The circuit board includes: a wiring conductor having a first strip conductor formed on the second surface; a monitoring circuit having an analog-to-digital converter, a logic circuit, and a variable resistance element, the logic circuit changing a resistance value of the variable resistance element to variably set an intermediate potential of the wiring conductor, the analog-to-digital converter digitizing a voltage of the wiring conductor, and the logic circuit monitoring a bias voltage of the wiring conductor; A semiconductor device comprising:

7. A semiconductor device including a circuit board having a first surface on which an electronic circuit is formed and a second surface that is a reverse surface of the first surface, The circuit board includes: a wiring conductor having a first strip conductor formed on the second surface; a capacitance wiring conductor including a second strip conductor disposed adjacent to the first strip conductor and nested on the second surface on which the wiring conductor is formed; a detection circuit for detecting a change in capacitance of the capacitance wiring conductor; A semiconductor device comprising:

8. A semiconductor device including a circuit board having a first surface on which an electronic circuit is formed and a second surface that is a reverse surface of the first surface, The circuit board includes: a wiring conductor having a first strip conductor formed on the second surface; a multilayer wiring conductor having a second strip conductor formed on the first surface; a via conductor connecting the wiring conductor and the multilayer wiring conductor; a detection circuit that detects disconnection of the wiring conductor, the multilayer wiring conductor, and the via conductor; A semiconductor device comprising:

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