Graphic design method for balancing copper thickness of impedance line

Abstract

The invention discloses a graphic design method for balancing the copper thickness of an impedance line. The graphic design method comprises the following steps: S1, determining a first residual copper rate of a graphic area of an impedance strip layer on a circuit board; s2, acquiring a second residual copper rate of an impedance strip area of an impedance strip layer on the circuit board; s3, the absolute value m of the difference between the second residual copper rate and the first residual copper rate is calculated; s4, m is compared with 5%, and if m is larger than 5%, the step S41 is executed; if m is less than or equal to 5%, executing the step S42; s41, adjusting the width of the auxiliary copper sheet on the two sides of the impedance line in the impedance strip area, and returning to execute the step S2, the step S3 and the step S4 after the adjustment is completed until m is less than or equal to 5%; and S42, simulating a circuit of the pattern area on the auxiliary copper sheet to carry out dummy impedance line distribution in the impedance strip. According to the method, the difference between the copper plating thickness of the impedance strip coupon impedance line of an FCBGA product and the copper plating thickness of an actual graphic circuit can be reduced, and it is guaranteed that the impedance value simulated by the coupon impedance line of the impedance strip has reference significance.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor packaging, and in particular to a graphic design method for balancing the copper thickness of an impedance line. Background Art

[0002] In the production process of FCBGA package substrate, copper electroplating is a process to achieve signal connection between substrate layers and the formation of each layer of graphic circuit. In some products, there is an impedance coupon design, and the impedance value of the impedance coupon can be measured as a reference value for the impedance of the graphic circuit. In the actual production process, the copper thickness of the impedance line in the impedance coupon is often too different from the copper thickness of the graphic circuit due to unreasonable graphic design, so that the impedance value simulated by the impedance coupon loses its original reference value.

[0003] Therefore, there is an urgent need for a graphic design for balancing the copper thickness of the impedance line to balance the copper thickness of the impedance line and ensure stable circuit performance. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems in the above-mentioned technology to a certain extent. To this end, the purpose of the present invention is to propose a graphic design method for balancing the copper thickness of an impedance line, which can reduce the difference between the copper plating thickness of the impedance line of the impedance strip coupon of the FCBGA product and the copper plating thickness of the actual graphic line, and ensure that the impedance value simulated by the impedance strip coupon impedance line has a reference significance.

[0005] To achieve the above object, the first aspect of the present invention provides a graphic design method for balancing the copper thickness of an impedance line, which comprises the following steps:

[0006] S1. confirming the first residual copper rate of the graphic area of ​​the impedance strip layer on the circuit board;

[0007] S2, obtaining a second residual copper rate of an impedance strip area of ​​the impedance strip layer on the circuit board;

[0008] S3, calculating the absolute value m of the difference between the second residual copper rate and the first residual copper rate;

[0009] S4, compare m and 5%, if m>5%, execute step S41; if m≤5%, execute step S42;

[0010] S41, adjusting the auxiliary copper width on both sides of the impedance line of the impedance strip area, and after the adjustment is completed, returning to execute steps S2, S3 and S4 until m≤5%;

[0011] S42, simulating the circuit of the graphic area on the auxiliary copper foil to distribute the virtual impedance lines within the impedance strip.

[0012] According to a graphic design method for balancing the copper thickness of an impedance line of the present invention, the method adjusts the auxiliary copper width of the impedance line of the impedance strip area according to the phase difference between the first residual copper rate and the second residual copper rate, thereby changing the second residual copper rate so that the second residual copper rate is close to the first residual copper rate, thereby optimizing the copper thickness of the impedance strip area during the electroplating of the entire plate, so that the copper thickness of the impedance line of the impedance strip area is maintained at the same level as the copper thickness of the line of the graphic area, reducing the difference, and ensuring that the impedance value simulated by the impedance strip coupon impedance line has a reference significance.

[0013] In addition, the graphic design method for balancing the copper thickness of impedance lines proposed in the present invention may also have the following additional technical features:

[0014] Optionally, in step S41, the method of adjusting the width of the auxiliary copper foil on both sides of the impedance line of the impedance strip area is:

[0015] Lay full dummy pad in the impedance strip area;

[0016] The auxiliary copper sheets on both sides of the impedance line are extended and widened toward the boundary line of the impedance strip area, and when the widened auxiliary copper sheets contact the dummy pad, the contact area of ​​the dummy pad is deleted and a gap is left between the auxiliary copper sheets and the dummy pad.

[0017] Optionally, the dummy pad is square, with a size of 450×450 μm, a center distance between two adjacent dummy pads is 500 μm, and a side distance between two adjacent dummy pads is 50 μm.

[0018] Optionally, a gap between the dummy pad and the auxiliary copper skin is 100 μm.

[0019] Optionally, the auxiliary copper sheets on both sides of the impedance line are extended toward the boundary line of the impedance strip area by 100 μm each time, and when the second residual copper rate is close to the first residual copper rate, the size of the widening of the auxiliary copper sheets is reduced.

[0020] Optionally, the distance between the edge of the auxiliary copper sheet and the boundary line of the impedance strip area is no more than 50 μm, and the width of a single side of the auxiliary copper sheet is no more than 1900 μm.

[0021] Optionally, in step S42, the virtual impedance lines in the impedance strip are distributed in the following manner:

[0022] Copy the true impedance line and paste it in the auxiliary copper sheet at intervals along the width direction of the auxiliary copper sheet. If the true impedance line has a bent design, delete the impedance line of the bent part and keep the impedance line of the pasted straight line part.

[0023] Furthermore, the spacing between the copy and paste was 10 μm.

[0024] Furthermore, the distance between the virtual impedance line on the edge of the auxiliary copper skin and the boundary line of the impedance strip area is the same as the distance between the edge of the auxiliary copper skin and the boundary line of the impedance strip area.

[0025] To achieve the above object, the second aspect of the present invention provides an impedance strip designed using the above-mentioned graphic design method for balancing the copper thickness of an impedance line.

[0026] According to the impedance strip of the present invention, the copper thickness of the impedance line in the impedance strip area is kept at the same level as the copper thickness of the line in the pattern area, reducing the difference and ensuring that the impedance value simulated by the impedance line of the impedance strip coupon has reference significance. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A schematic diagram of a process for graphic design of balanced impedance line copper thickness according to an embodiment of the present invention;

[0028] Figure 2 It is a partial schematic diagram of the impedance strip area of ​​Example 1 of the present invention;

[0029] Figure 3 It is a partial schematic diagram of the impedance strip area after the auxiliary copper sheet width is adjusted in Example 1 of the present invention;

[0030] Figure 4 It is a partial schematic diagram of the impedance strip area after virtual impedance lines are distributed in Example 1 of the present invention;

[0031] Figure 5 It is a partial schematic diagram of the impedance strip area of ​​Example 2 of the present invention;

[0032] Figure 6 It is a partial schematic diagram of the impedance strip area after auxiliary copper sheet width adjustment in implementation 2 of the present invention;

[0033] Figure 7 It is a local schematic diagram of the impedance strip area after the virtual impedance line distribution in Example 2 of the present invention. DETAILED DESCRIPTION

[0034] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0035] In order to better understand the above technical solution, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments described herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0036] Please refer to Figure 1 The present application provides a graphic design method for balancing the copper thickness of an impedance line, comprising the following steps:

[0037] S1. Confirm the first residual copper rate of the graphic area of ​​the impedance strip layer on the circuit board; that is, by querying the residual copper rate of the current layer array of the product with the impedance strip layer, the first residual copper rate can be confirmed.

[0038] S2, obtaining a second residual copper rate of the impedance strip area of ​​the impedance strip layer on the circuit board; this step can use the incampro software to pull the residual copper rate of the coupon area of ​​the current layer with the impedance strip layer, and calculate the residual copper rate of the coupon area through the incampro program, that is, obtain the second residual copper rate.

[0039] S3, calculating the absolute value m of the difference between the second residual copper rate and the first residual copper rate;

[0040] S4, compare m and 5%, if m>5%, execute step S41; if m≤5%, execute step S42;

[0041] S41, adjusting the auxiliary copper width on both sides of the impedance line of the impedance strip area, and after the adjustment is completed, returning to execute steps S2, S3 and S4 until m≤5%; that is, by continuously adjusting the auxiliary copper width, the residual copper rate of the coupon area can be changed, so that the residual copper rate of the coupon area is close to the residual copper rate of the array.

[0042] S42, simulating the circuit of the graphic area on the auxiliary copper foil to distribute the virtual impedance line in the impedance strip. This step can reduce the difference between the impedance strip and the circuit of the graphic area by simulating the circuit of the graphic area.

[0043] Therefore, it can be known that the method adjusts the auxiliary copper foil width of the impedance line in the impedance strip area according to the phase difference between the first residual copper rate and the second residual copper rate, thereby changing the second residual copper rate, that is, by adjusting the impedance auxiliary copper foil width of the impedance strip coupon to change the residual copper rate of the impedance strip, the second residual copper rate is close to the first residual copper rate, so that the copper thickness of the impedance strip coupon area can be optimized during the electroplating of the entire plate, so that the copper thickness of the impedance line in the impedance strip area is kept at the same level as the copper thickness of the line in the graphic area, reducing the difference, and the copper thickness of the impedance strip can be controlled to change the impedance value of the impedance strip, thereby ensuring that the impedance value simulated by the impedance line of the impedance strip coupon has a reference significance.

[0044] Example 1

[0045] The following combination Figures 2 to 4 The graphic design method of the copper thickness of the balanced impedance line is further introduced, including:

[0046] First, please refer to Figure 2 , execute step S1 to confirm the first residual copper rate of the graphic area of ​​the impedance strip layer on the circuit board. Specifically, query the residual copper rate of the product layer, for example, the residual copper rate of model WBNGSN-layer 1 is 77% (first residual copper rate). Then, execute step S2 to pull the residual copper rate of the coupon area of ​​model WBNGSN-layer 1, and calculate the coupon residual copper rate of 9% (second residual copper rate) through the incampro program.

[0047] Next, step S3 is executed to calculate the absolute value of the difference between the second residual copper rate and the first residual copper rate, which is 68%.

[0048] Then, step S4 is executed to compare m and 5%, and it is known that m>5%, then step S41 is executed; S41, the auxiliary copper foil width on both sides of the impedance line of the impedance strip area is adjusted. Specifically, Figure 2 As shown, adjust Figure 2 The copper foil at the marked position is extended outward by 100μm each time to widen the copper foil; that is, the auxiliary copper foils on both sides of the impedance line are extended and widened toward the boundary line of the impedance strip area; and a square dummy pad is laid, the size of the square dummy pad is 450×450μm, the center spacing between two adjacent dummy pads is 500μm, the side spacing between two adjacent dummy pads is 50μm (the pad side spacing is 50μm from the pad side), and it is extended and widened to both sides of the coupon. After the copper foil is widened, the dummy pad touched by the copper foil is handled as follows: the contacted area of ​​the dummy pad is deleted, and the area 100μm away from the copper foil is left blank after deletion (that is, the gap between the dummy pad and the auxiliary copper foil is 100μm). The copper foil and the supplementary square pad are shown in the figure. Figure 3After stretching and widening, re-pull the residual copper rate of the coupon area. When the difference between the residual copper rate of the coupon area (the second residual copper rate) and the array residual copper rate of the product layer (the second residual copper rate) is ≤5%, the adjustment is completed; if it does not meet the above conditions, continue to widen or reduce the copper skin. When the second residual copper rate is close to the first residual copper rate and it is impossible to extend outward by 100μm (extending the copper skin beyond the size of the coupon area), make a final fine-tuning of the copper skin width (extending to 50μm from the border of the coupon area). See the picture of adjusting the copper skin width and filling the square pad. Figure 3 .

[0049] Among them, Figure 3 As shown, before adjusting the auxiliary copper width on both sides of the impedance line of the impedance strip area, the maximum copper width needs to be specified to control the adjustment limit. The maximum width requirement of the auxiliary copper is: no more than 50μm from the boundary line of the coupon area, and the maximum width of the single-side copper is no more than 1900μm.

[0050] After adjusting the width, Figure 4 As shown, execute step S42, simulate the circuit of the graphic area on the auxiliary copper foil to distribute the virtual impedance line in the impedance strip. Specifically, after the width of the auxiliary copper foil is adjusted in step S41, the planning process is carried out again, the real impedance line in the coupon is copied, and it is pasted once every 10μm along the width direction of the auxiliary copper foil to form a virtual impedance line. If the real impedance line has a curved line design, it is deleted, and only the long straight line part is retained. The middle interval part is hollowed out, and this design is repeated until it is pasted to the outermost side of the copper foil. In other words, the distance requirement of the virtual impedance line from the coupon boundary line is the same as the distance requirement of the copper foil from the coupon boundary line, that is, the distance of the virtual impedance line on the edge of the auxiliary copper foil to the boundary line of the impedance strip area is the same as the distance of the auxiliary copper foil from the boundary line of the impedance strip area. After the above processing is completed, the program measurement tool is called to measure the line width of the real impedance line. After confirming that the line width of the real impedance line is correct, the adjustment action ends, as shown in FIG. Figure 4 .

[0051] In this way, the graphic design of the impedance strip of WBNGSN-layer 1 is obtained, and the difference between the copper thickness of the impedance strip and the copper thickness of the line in the graphic area is small, which can ensure that the impedance value simulated by the coupon impedance line of the impedance strip can be used as a reference value for the impedance of the graphic line.

[0052] Example 2

[0053] The following combination Figures 5 to 7 The graphic design method of the copper thickness of the balanced impedance line is further introduced, including:

[0054] First, please refer to Figure 5, execute step S1 to confirm the first residual copper rate of the graphic area of ​​the impedance strip layer on the circuit board. Specifically, query the residual copper rate of the current layer of the product, for example, the residual copper rate of model ZDBNGSN-layer 4 is 75% (first residual copper rate). Then, execute step S2 to pull the residual copper rate of the coupon area of ​​ZDBNGSN-layer 4, and calculate the coupon residual copper rate of 13% (second residual copper rate) through the incampro program.

[0055] Next, step S3 is performed to calculate the absolute value of the difference between the second residual copper rate and the first residual copper rate, which is 62%.

[0056] Then, step S4 is executed to compare m and 5%, and it is known that m>5%, then step S41 is executed; S41, the auxiliary copper foil width on both sides of the impedance line of the impedance strip area is adjusted. Specifically, Figure 5 As shown, adjust Figure 5 The copper foil at the marked position is extended outward by 100μm each time to widen the copper foil; that is, the auxiliary copper foils on both sides of the impedance line are extended and widened toward the boundary line of the impedance strip area; and a square dummy pad is laid, the size of the square dummy pad is 450×450μm, the center spacing between two adjacent dummy pads is 500μm, the side spacing between two adjacent dummy pads is 50μm (the pad side spacing is 50μm from the pad side), and it is extended and widened to both sides of the coupon. After the copper foil is widened, the dummy pad touched by the copper foil is handled as follows: the contacted area of ​​the dummy pad is deleted, and the area 100μm away from the copper foil is left blank after deletion (that is, the gap between the dummy pad and the auxiliary copper foil is 100μm). The copper foil and the supplementary square pad are shown in the figure. Figure 6 After stretching and widening, re-pull the residual copper rate of the coupon area. When the difference between the residual copper rate of the coupon area (the second residual copper rate) and the array residual copper rate of the product layer (the second residual copper rate) is ≤5%, the adjustment is completed; if it does not meet the above conditions, continue to widen or reduce the copper skin. When the second residual copper rate is close to the first residual copper rate and it is impossible to extend outward by 100μm (extending the copper skin beyond the size of the coupon area), make a final fine-tuning of the copper skin width (extending to 50um from the border of the coupon area). See the picture of adjusting the copper skin width and filling the square pad. Figure 6 .

[0057] Among them, Figure 6 As shown, before adjusting the auxiliary copper width on both sides of the impedance line of the impedance strip area, the maximum copper width needs to be specified to control the adjustment limit. The maximum width requirement of the auxiliary copper is: no more than 50μm from the boundary line of the coupon area, and the maximum width of the single-side copper is no more than 1900μm.

[0058] After adjusting the width, Figure 7 As shown, execute step S42, simulate the circuit of the graphic area on the auxiliary copper foil to divide the virtual impedance line in the impedance strip. Specifically, after the width of the auxiliary copper foil is adjusted in step S41, the planning process is carried out again, the real impedance line in the coupon is copied, and it is pasted once every 10μm along the width direction of the auxiliary copper foil to form a virtual impedance line. If the real impedance line has a curved line design, it is deleted, and only the long straight line part is retained. The middle interval part is hollowed out, and this design is repeated until it is pasted to the outermost side of the copper foil. In other words, the distance requirement of the virtual impedance line from the coupon boundary line is the same as the distance requirement of the copper foil from the coupon boundary line, that is, the distance between the virtual impedance line on the edge of the auxiliary copper foil and the boundary line of the impedance strip area is the same as the distance between the edge of the auxiliary copper foil and the boundary line of the impedance strip area. After the above processing is completed, call the program measurement tool to measure the line width of the real impedance line. After confirming that the line width of the real impedance line is correct, the adjustment action ends. Figure 7 .

[0059] In this way, the graphic design of the impedance strip of ZDBNGSN-layer 4 is obtained, and the difference between the copper thickness of the impedance strip and the copper thickness of the line in the graphic area is small, which can ensure that the impedance value simulated by the coupon impedance line of the impedance strip can be used as a reference value for the impedance of the graphic line.

[0060] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0061] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0062] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0063] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0064] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms should not be understood as necessarily being directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.

[0065] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A graphic design method for balancing the copper thickness of an impedance line, characterized in that: The following steps are involved: S1. confirming the first residual copper rate of the graphic area of ​​the impedance strip layer on the circuit board; S2, obtaining a second residual copper rate of an impedance strip area of ​​the impedance strip layer on the circuit board; S3, calculating the absolute value m of the difference between the second residual copper rate and the first residual copper rate; S4, compare m and 5%, if m>5%, execute step S41; If m≤5%, execute step S42; S41, adjusting the auxiliary copper width on both sides of the impedance line of the impedance strip area, and after the adjustment is completed, returning to execute steps S2, S3 and S4 until m≤5%; S42, simulating the circuit of the graphic area on the auxiliary copper foil to distribute the virtual impedance lines within the impedance strip.

2. The graphic design method according to claim 1, characterized in that: In step S41, the method of adjusting the width of the auxiliary copper foil on both sides of the impedance line of the impedance strip area is: Lay full dummy pad in the impedance strip area; The auxiliary copper sheets on both sides of the impedance line are extended and widened toward the boundary line of the impedance strip area, and when the widened auxiliary copper sheets contact the dummy pad, the contact area of ​​the dummy pad is deleted and a gap is left between the auxiliary copper sheets and the dummy pad.

3. The graphic design method according to claim 2, characterized in that: The dummy pad is square, with a size of 450×450 μm, a center distance between two adjacent dummy pads of 500 μm, and a side distance between two adjacent dummy pads of 50 μm.

4. The graphic design method according to claim 2, characterized in that: The gap between the dummy pad and the auxiliary copper sheet is 100 μm.

5. The graphic design method according to claim 2, characterized in that: Each time, the auxiliary copper foils on both sides of the impedance line are extended toward the boundary line of the impedance strip area by 100 μm. When the second residual copper rate is close to the first residual copper rate, the width of the auxiliary copper foil is reduced.

6. The graphic design method according to claim 2, characterized in that: The distance between the edge of the auxiliary copper sheet and the boundary line of the impedance strip area is no more than 50 μm, and the width of the auxiliary copper sheet on one side is no more than 1900 μm.

7. The graphic design method according to claim 1, characterized in that: In step S42, the distribution of the virtual impedance lines in the impedance strip is performed as follows: Copy the true impedance line and paste it in the auxiliary copper sheet at intervals along the width direction of the auxiliary copper sheet. If the true impedance line has a bent design, delete the impedance line of the bent part and keep the impedance line of the pasted straight line part.

8. The graphic design method according to claim 7, characterized in that: The spacing between the copy and paste was 10 μm.

9. The graphic design method according to claim 7, characterized in that: The distance between the virtual impedance line on the edge of the auxiliary copper skin and the boundary line of the impedance strip area is the same as the distance between the edge of the auxiliary copper skin and the boundary line of the impedance strip area.

10. An impedance strip, characterized in that: The design is carried out by using the graphic design method for balancing the copper thickness of the impedance line as described in any one of claims 1 to 9.

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