Method for manufacturing a semiconductor-on-insulator substrate for high frequency applications - Patents.com

Abstract

The present invention relates to a method for manufacturing a semiconductor-on-insulator substrate for high frequency applications, comprising the steps of providing a p-doped semiconductor donor substrate (1), forming a sacrificial layer (13) on the donor substrate, implanting atomic nuclear species through the sacrificial layer (13) to form a weakened region (11) in the donor substrate (1), which defines a thin semiconductor layer (12) to be transferred, removing the sacrificial layer (13) from the donor substrate (1), providing a semiconductor carrier substrate (2) having an electrical resistivity of 500 Ω cm or greater, forming an electrically insulating layer (20) on the carrier substrate (2), bonding the donor substrate (1) to the carrier substrate (2), and separating the donor substrate (1) along the weakened region (11) to transfer the thin semiconductor layer (12) from the donor substrate (1) to the carrier substrate (2).

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a semiconductor-on-insulator substrate for high frequency applications. [Background technology]

[0002] High frequency electronic components formed in or on semiconductor substrates are particularly sensitive to attenuation phenomena due to the properties of the substrate.

[0003] For this reason, semiconductor substrates, particularly bulk silicon substrates, having a high electrical resistivity, ie, an electrical resistivity of more than 500 Ωcm, are usually used.

[0004] Furthermore, FDSOI (acronym of the term "fully depleted semiconductor on insulator") semiconductor-on-insulator substrates appear to be a beneficial alternative to bulk semiconductor substrates. FDSOI substrates in turn comprise a carrier substrate, an electrically insulating layer and a thin semiconductor layer in which or on which electronic components can be manufactured. In FDSOI substrates, the thickness of the semiconductor layer is thin enough to allow a full depletion of the conductive channels of the transistors formed in said layer. Such a layer is typically a few tens of nanometers in thickness. The electrically insulating layer, generally made of oxide, is also commonly called BOX (acronym of the term "buried oxide"). The method for manufacturing FDSOI substrates aims to achieve high precision with regard to the thickness of the semiconductor layer and the electrically insulating layer, as well as high uniformity of these thicknesses both within a substrate and between substrates within the same manufacturing batch.

[0005] Therefore, for high frequency applications, it may be beneficial to form an FDSOI substrate using a carrier substrate made of a semiconductor material with high electrical resistivity.

[0006] A method for manufacturing a FDSOI substrate is illustrated diagrammatically in Figures 1A-1C. The method performs a layer transfer from a donor substrate to a carrier substrate, also known by the process name Smart Cut™.

[0007] Referring to FIG. 1A, a donor substrate 1, for example made of silicon, covered with an electrically insulating layer 10, for example made of silicon oxide (SiO2), is provided.

[0008] As indicated diagrammatically by the arrows, ion species implantation, for example with hydrogen and / or helium ions, is performed through the electrically insulating layer 10 to form a weakened region 11 in the donor substrate 1. Said weakened region 11 defines a thin layer 12 to be transferred.

[0009] With reference to Fig. 1B, the donor substrate 1 thus implanted is bonded to a carrier substrate 2 via an electrically insulating layer 10, which performs the function of a bonding layer. The carrier substrate 2 may advantageously be a semiconductor substrate, for example made of silicon, with high electrical resistivity. The bonding may be supplemented by a heat treatment.

[0010] 1C, the donor substrate 1 is separated along the weakened region 11, resulting in the transfer of the thin layer 12 to the carrier substrate 2. The separation can be initiated by a heat treatment.

[0011] The transferred layer is then subjected to a finishing process to correct any implant-related defects and to smooth the free surface of the layer.

[0012] In this manner, a semiconductor-on-insulator substrate is obtained.

[0013] For FDSOI substrates, the target thickness of the transferred semiconductor layer is 4 nm to 100 nm, with a maximum variation of ±5 Å within each substrate and between different substrates produced using the process. Such uniformity and very low roughness of the transferred layer can be achieved using a finishing process called "batch annealing", which is a long high-temperature smoothing process advantageously carried out in a furnace to process multiple substrates simultaneously. Such "batch anneals" are typically carried out at temperatures of 1150-1200° C. for a few minutes, generally for durations of more than 15 minutes. This smoothing allows the transferred semiconductor layer to have a level of surface roughness compatible with subsequent transistor fabrication.

[0014] However, this process is detrimental for high frequency applications, especially for very high frequency applications, i.e. in the frequency range of 30-300 GHz, also known as "millimeter wave" (mmWave).

[0015] In particular, the carrier substrate has a high electrical resistivity and is therefore lightly doped, and is therefore generally substantially less doped (e.g., boron doped) than the donor substrate, which in turn is less doped than the transferred thin layer.

[0016] However, due to this difference in doping levels between the transferred thin layer and the carrier substrate, under the influence of the high thermal budget of finishing processing of the FDSOI substrate, and to a lesser extent, under the influence of the thermal budget of bonding and / or separation, boron atoms will diffuse through the electrical insulation layer into the carrier substrate, resulting in a decrease in the electrical resistivity of the surface portion extending from the electrical insulation layer.

[0017] Now, even if this surface portion only extends to a depth of a few micrometers into the carrier substrate, the drop in electrical resistivity in this region results in significant electrical losses for millimeter waves. Summary of the Invention

[0018] One object of the present invention is to define a method for manufacturing FDSOI semiconductor-on-insulator substrates suitable for high frequency applications, making it possible to maintain a high resistivity of the carrier substrate even close to the electrically insulating layer.

[0019] For this purpose, the present invention comprises the following steps: Providing a p-doped semiconductor donor substrate; forming a sacrificial layer on a donor substrate; implanting nuclear species through said sacrificial layer to form a weakened region in the donor substrate defining a thin semiconductor layer to be transferred; removing the sacrificial layer from the donor substrate after said implantation; Providing a semiconductor carrier substrate having an electrical resistivity of 500 Ω cm or greater; forming an electrically insulating layer on a carrier substrate; Bonding the donor substrate to a carrier substrate, the semiconductor thin layer and the electrically insulating layer being at the bonding interface; Separating the donor substrate along the weakened region to transfer the semiconductor thin layer from the donor substrate to a carrier substrate; A method is proposed for manufacturing a semiconductor-on-insulator substrate for high frequency applications, including

[0020] Therefore, by using a bonding layer formed on the carrier substrate rather than on the donor substrate, and by removing the sacrificial layer from the donor substrate prior to bonding, dopant atoms contained in the bonding layer are prevented from diffusing into the carrier substrate and from decreasing the electrical resistivity of the carrier substrate, despite differences in doping levels between the transferred thin layer and the carrier substrate.

[0021] Furthermore, the steps of producing the FDSOI substrate subsequent to bonding remain intact, making the method compatible with existing industrial manufacturing lines.

[0022] In some embodiments, forming the sacrificial layer comprises oxidizing a material of the donor substrate.

[0023] In some embodiments, removing the sacrificial layer comprises wet etching said layer.

[0024] Optionally, removing the sacrificial layer may further comprise removing a surface portion of the thin layer to be transferred from the donor substrate.

[0025] In some embodiments, the donor substrate is boron doped.

[0026] In some embodiments, forming the electrically insulating layer comprises depositing an oxide on the carrier substrate.

[0027] In another embodiment, the electrically insulating layer is formed by oxidizing the carrier substrate.

[0028] In some embodiments, the electrically insulating layer has a thickness of 10 to 150 nm.

[0029] In some embodiments, the transferred semiconductor layer has a thickness of between 4 and 100 nm.

[0030] Further features and advantages will become apparent from the following detailed description, taken in conjunction with the accompanying drawings. [Brief description of the drawings]

[0031] [Figure 1A] 1 is a schematic cross-sectional view of the implantation of atomic species through an electrically insulating layer disposed on a donor substrate. [Figure 1B] FIG. 1B is a schematic cross-sectional view of bonding of the implanted donor substrate in FIG. 1A to a carrier substrate. [Figure 1C] FIG. 1C is a schematic cross-sectional view of the transfer of a thin layer from the donor substrate of FIG. 1B to a carrier substrate. [Diagram 2] 1A-1C are schematic cross-sectional views of the formation of a sacrificial layer on a donor substrate. [Diagram 3] FIG. 3 is a schematic cross-sectional view of the implantation of atomic species into the donor substrate of FIG. 2 through a sacrificial layer. [Figure 4] FIG. 4 is a schematic cross-sectional view of the removal of the sacrificial layer from the donor substrate after implantation of FIG. [Diagram 5] 1A-1C are schematic cross-sectional views of the formation of an electrically insulating layer on a carrier substrate. [Figure 6] 6 is a schematic cross-sectional view of the bonding of the donor substrate of FIG. 4 with the carrier substrate of FIG. 5. [Figure 7] 1A-1C are schematic cross-sectional views of the transfer of a thin layer from a donor substrate to a carrier substrate to form a FDSOI substrate. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0032] For greater clarity in the drawings, the various layers are not necessarily shown to scale.

[0033] Reference numbers that are the same from one figure to the next represent similar elements or elements that perform at least the same function.

[0034] The method for manufacturing a FDSOI substrate is modified to bond the donor substrate to the carrier substrate via an electrically insulating layer formed on the carrier substrate rather than on the donor substrate. Unlike the donor substrate, the carrier substrate is undoped or at least one E 13at / cm 3 The electrically insulating layer therefore does not contain a significant concentration of dopants that tend to diffuse into the carrier substrate during subsequent thermal processing.

[0035] The electrically insulating layer remains useful on the surface of the donor substrate to reduce the effects of direct tunneling of atomic species during implantation (a phenomenon known by the term "channeling"), however this layer is sacrificial in that it is removed after implantation and before bonding.

[0036] FIG. 2 illustrates the formation of such a sacrificial layer 13 on a donor substrate 1 .

[0037] The donor substrate is a single crystal semiconductor substrate, for example made of silicon. Typically, the donor substrate is lightly p-doped. For example, the donor substrate may be E 15at / cm 3 It contains boron atoms in the following concentrations: Donor substrates doped in this way are in particular cheaper and more standard than undoped donor substrates.

[0038] The sacrificial layer 13 is a conductive layer, in particular consisting of an oxide of the material of the donor substrate 1. The sacrificial layer 13 is advantageously formed by thermal oxidation of the donor substrate 1. Such thermal oxidation consumes a surface portion of the material of the donor substrate. In order to prevent channeling phenomena, the sacrificial layer advantageously has a thickness of 4 to 150 nm, preferably 10 to 40 nm.

[0039] Referring to FIG. 3, ionic species are implanted into the donor substrate 1 through the sacrificial layer (schematically indicated by the arrows).

[0040] The implanted species typically include hydrogen and / or helium.

[0041] The dose and energy of the implanted species are selected to form a weakened region 11 in the donor substrate 1 at a predetermined depth so as to define the thin layer 12 to be transferred between the sacrificial layer 13 and the weakened region 11.

[0042] 3, the sacrificial layer 13 is then removed. Thus, even though the sacrificial layer contains dopants from the donor substrate, it is not present during the subsequent bonding.

[0043] The sacrificial layer can be removed, for example, by wet etching. A person skilled in the art can select an appropriate etching solution. This etching makes the surface of the donor substrate sufficiently smooth and defect-free to allow subsequent bonding of good quality.

[0044] Following removal of the sacrificial layer, optionally, the surface portion of the thin layer 12 to be transferred may be removed. This surface portion, which is typically on the order of a few nanometers in thickness, may be removed by any suitable means, for example by thermal oxidation or chemical etching, which makes it possible not to reduce the uniformity of the transferred layer. Less preferably, chemical-mechanical polishing may also be used.

[0045] Referring to FIG. 4, an electrically insulating layer 20 is also formed on the carrier substrate 2 .

[0046] The carrier substrate 2 is a semiconductor substrate, for example made of silicon, having a high electrical resistivity, for example above 500 Ωcm, preferably above 1000 Ωcm.

[0047] Particularly advantageously, the carrier substrate is a silicon substrate with a high interstitial oxygen content, i.e. a content of more than 20 old ppma (for the definition of the unit old ppma, see the dissertation "A Study of Oxygen Precipitation in Heavily Doped Silicon" by Robert Kurt Graupner (1989), Dissertations and Theses, Paper 1218). Such substrates are generally designated using the abbreviation "HiOi". Interstitial oxygen atoms are prone to precipitate under the influence of heat treatment, forming a large number of defects called "Bulk Micro Defects" (BMDs) formed by oxygen precipitates, which block dislocations generated during high-temperature heat treatment, which is advantageous for maintaining the crystalline quality of the carrier substrate.

[0048] In practice, to manufacture a FDSOI substrate using such a HiOi substrate, the method includes a step of heat treating the carrier substrate prior to bonding at a temperature sufficient to precipitate interstitial oxygen and form said BMDs, which may typically be performed in a thermal cycle reaching a temperature of the order of 1000° C. for 12 hours.

[0049] Moreover, HiOi substrates generally contain a large number of crystalline defects, called COPs (acronym of the term "crystal originated particles"), which are undesirable for FDSOI substrates. The manufacturing method therefore advantageously includes a "depletion" heat treatment aimed at diffusing oxygen out of the carrier substrate. In practice, this treatment can be carried out simultaneously with the heat treatment for precipitating interstitial oxygen, as long as the surface of the carrier substrate is free, i.e. not oxidized, so that oxygen can diffuse out of the substrate. In this case, this precipitation / diffusion heat treatment should be carried out before forming the electrically insulating layer on the carrier substrate.

[0050] Alternatively, the skilled person may select for the carrier substrate a silicon substrate having a low or medium interstitial oxygen content, i.e. a content of less than 10, respectively 10-20 ppma. Such substrates are generally designated using the abbreviations "LowOi" or "MidOi". In this case, the above-mentioned precipitation and / or diffusion heat treatment is not necessary.

[0051] The electrically insulating layer 20 is advantageously an oxide layer so as to ensure a good bond with the semiconductor material of the donor substrate 1 .

[0052] The electrically insulating layer can be formed by a deposition process, in particular chemical vapor deposition (CVD), or by an oxidative heat treatment of the carrier substrate.

[0053] The thickness of the electrical insulating layer 20 is preferably 10 to 150 nm.

[0054] 5, a donor substrate 1 is placed in contact with a receiver substrate 2, with the thin layer to be transferred 12 and an electrically insulating layer 20 at the bonding interface. A molecular adhesion bond is then made between the oxide of layer 20 and the semiconductor material of layer 12.

[0055] The bonding may be supplemented by a process of preparing an electrically insulating surface, for example using an oxygen plasma.

[0056] As mentioned above, the manufacturing steps following bonding remain intact compared to existing methods for manufacturing FDSOI substrates, therefore the method is compatible with existing industrial manufacturing lines and does not affect the physical and electrical properties of the product.

[0057] 6, the donor substrate 1 is separated along a weakened area 11. In a manner known per se, said separation can be induced by applying a mechanical stress near the weakened area, by a heat treatment or by any other suitable means.

[0058] Once this separation is complete, the thin layer 12 is transferred from the donor substrate to the carrier substrate, resulting in a FDSOI structure comprising the carrier substrate 2, the electrically insulating bonding layer 2 and the transferred layer 12 (see FIG. 7).

[0059] The structure then undergoes the finishing processes conventionally performed for FDSOI substrates, which in particular include thermal smoothing of the transferred layers ("batch anneal"), as mentioned in the introduction.

[0060] In some embodiments, this smoothing process consists of placing a batch of FDSOI structures in a furnace and slowly raising the temperature from ambient (20° C.) to a temperature on the order of 1500-1200° C., and then holding the structures at this temperature for a few minutes, preferably a duration of more than 15 minutes.

[0061] The removal of the sacrificial layer from the donor substrate before bonding surprisingly makes it possible to reduce the diffusion of dopants into the carrier substrate and the degradation of the high resistance properties of the final structure.

[0062] Without wishing to be bound by this hypothesis, the inventors believe that the formation of a protective oxide layer on the donor substrate may be responsible for the phenomenon of dopant accumulation at the interface between the donor substrate and said oxide layer, which dopant diffuses after the donor substrate is bonded to the carrier substrate. Removal of this sacrificed layer (and optionally the surface portion of the underlying thin layer to be transferred) therefore appears to eliminate or at least reduce this dopant accumulation.

[0063] The thermal budget of this smoothing process is high enough to diffuse any dopants present in the structure, but the dopants in the donor substrate are sufficiently separated from the carrier substrate by an electrically insulating layer (which does not contain any such dopants) to prevent diffusion into the carrier substrate, so that the electrical resistivity of the carrier substrate is not affected, even near the bond interface.

[0064] Therefore, the FDSOI structure thus formed can function satisfactorily in high frequency applications, particularly in the millimeter wave band.

Claims

1. 1. A method for manufacturing a semiconductor-on-insulator substrate for high frequency applications, comprising: Providing a p-doped semiconductor donor substrate (1); forming a sacrificial layer (13) on the donor substrate; - implanting nuclear species through said sacrificial layer (13) to form in said donor substrate (1) a weakened area (11) defining a thin semiconductor layer (12) to be transferred; removing the sacrificial layer (13) from the donor substrate (1) after said implantation; Providing a semiconductor carrier substrate (2) having an electrical resistivity of 500 Ω cm or more; forming an electrical insulating layer (20) on said carrier substrate (2); bonding the donor substrate (1) to the carrier substrate (2), the semiconductor thin layer (12) and the electrically insulating layer (20) being at the bonding interface between the donor substrate (1) and the carrier substrate (2); Separating the donor substrate (1) along the weakened region (11) and transferring the semiconductor thin layer (12) from the donor substrate (1) to the carrier substrate (2); Including, A method, wherein forming the sacrificial layer (13) comprises oxidizing a material of the donor substrate (1).

2. The method of claim 1 , wherein removing the sacrificial layer (13) comprises wet etching the sacrificial layer (13).

3. The method according to claim 1 or 2, wherein removing the sacrificial layer (13) further comprises removing a surface portion of the semiconductor thin layer (12) to be transferred from the donor substrate.

4. The method according to any one of claims 1 to 3, wherein the donor substrate (1) is boron doped.

5. The method according to any one of claims 1 to 4, wherein forming the electrically insulating layer (20) comprises depositing an oxide on the carrier substrate (2).

6. The method according to any one of claims 1 to 4, wherein forming the electrically insulating layer (20) comprises oxidizing the carrier substrate (2).

7. The method according to any one of the preceding claims, wherein the electrically insulating layer (20) has a thickness of 10 to 150 nm.

8. The method according to any one of the preceding claims, wherein the transferred thin semiconductor layer (12) has a thickness of 4 to 100 nm.

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