Epitaxial structure of semiconductor device, device and method for manufacturing epitaxial structure

Abstract

The present invention relates to an epitaxial structure for a semiconductor device, a device, and a method for manufacturing the epitaxial structure. The epitaxial structure includes a substrate and a first semiconductor layer located on the substrate and including a buffer layer. The buffer layer includes at least a first buffer layer, a second buffer layer, and a third buffer layer arranged in a stacked manner. The second buffer layer is located between the first buffer layer and the third buffer layer. The second buffer layer is doped with iron impurities, while the first buffer layer and the third buffer layer are not actively doped with iron impurities. The concentration of the iron impurities in the second buffer layer satisfies a first predetermined range. The above epitaxial structure realizes a high-resistance buffer layer and can achieve both crystal quality and subthreshold characteristics of the device.

Description

[Technical field]

[0001] The present invention relates to the field of semiconductor technology, and in particular to epitaxial structures for semiconductor devices, devices and methods for manufacturing epitaxial structures. [Background technology]

[0002] Gallium nitride (GaN) as a semiconductor material has characteristics such as a wide band gap, high electron mobility, high dielectric breakdown field strength, and excellent thermal conductivity. It also has large spontaneous polarization and piezoelectric polarization effects, making it more suitable for the manufacture of high-frequency, high-voltage, and high-temperature resistant high-power electronic devices than first- and second-generation semiconductor materials, and has clear advantages particularly in the radio frequency and power supply areas.

[0003] In gallium nitride high electron mobility transistor (GaN HEMT) structures, it is usually necessary to set the buffer layer to a high resistance in order to obtain better device leakage and pinch-off characteristics. Although it is very difficult to achieve high resistance of intrinsic GaN material in the process, high resistance of the buffer layer can be achieved by introducing acceptor impurities during the growth of the buffer layer. Conventional acceptor impurities include carbon (C) or iron (Fe) atoms.

[0004] The deep energy levels formed by doping capture electrons in the buffer layer to obtain high resistance and affect the crystal quality of the buffer layer and the subthreshold characteristics of the device. Therefore, an epitaxial structure that can ensure the high resistance characteristics of the buffer layer and take into consideration the subthreshold characteristics of the device is required. Summary of the Invention [Problem to be solved by the invention]

[0005] Therefore, there is a need to provide an epitaxial structure for a semiconductor device that overcomes the problem of the difficulty in achieving both crystal quality and subthreshold characteristics of the device when fabricating a high-resistance buffer layer of conventional semiconductor materials. [Means for solving the problem]

[0006] The epitaxial structure of the semiconductor device includes a substrate and a first semiconductor layer located on the substrate and including a buffer layer. The buffer layer includes at least a first buffer layer, a second buffer layer, and a third buffer layer that are stacked. The second buffer layer is located between the first buffer layer and the third buffer layer. The second buffer layer is doped with iron impurities, and the first buffer layer and the third buffer layer are not actively doped with iron impurities. The concentration of the iron impurities in the second buffer layer satisfies a first predetermined range.

[0007] In the epitaxial structure of the semiconductor device, the buffer layer includes at least a first buffer layer, a second buffer layer, and a third buffer layer, the second buffer layer is doped with iron impurities, the first buffer layer and the third buffer layer are not actively doped with iron impurities, and the concentration of the iron impurities in the second buffer layer satisfies a first predetermined range. This contributes to realizing a high resistance of the buffer layer, and gives the device excellent leakage characteristics and pinch-off characteristics. Meanwhile, in the epitaxial structure, the iron impurities are distributed in a suitable concentration range in the central buffer layer, but the buffer layer adjacent to the substrate and the second semiconductor layer has almost no iron impurities or has an extremely small amount of iron impurities. Specifically, for example, the concentration of the iron impurities in the first buffer layer is almost zero, and the concentration of the iron impurities in the third buffer layer is 10 16 cm -3 It is preferable that the dc is lower than dc and is approximately zero, which contributes to improving the crystal quality of the buffer layer, and contributes to improving the drain-induced barrier lowering (DIBL) phenomenon and the tailing phenomenon of iron impurities in the device, and further improves the subthreshold characteristics of the device to ensure the reliability of the device.

[0008] In one embodiment, the second buffer layer is further doped with carbon impurities, the concentration of the carbon impurities in the second buffer layer being within a second predetermined range and lower than the concentration of the iron impurities in the second buffer layer.

[0009] In one embodiment, the first predetermined range is 10 16 cm -3 ~5×10 18 cm -3 and the second predetermined range is 10 16 cm -3 ~10 17 cm -3 Includes.

[0010] In one embodiment, the second buffer layer has a thickness d2, where 200 nm≦d2≦800 nm.

[0011] In one embodiment, the first buffer layer is located on one side of the second buffer layer adjacent to the substrate. The third buffer layer is located on one side of the second buffer layer adjacent to the second semiconductor layer. The first buffer layer has carbon impurities. A concentration of the carbon impurities in the first buffer layer is equal to or less than a concentration of the carbon impurities in the second buffer layer. The third buffer layer has carbon impurities. A concentration of the carbon impurities in the third buffer layer is lower than a concentration of the carbon impurities in the second buffer layer.

[0012] In one embodiment, the first buffer layer has a carbon impurity concentration of 10 17 cm -3 The carbon impurity concentration of the second buffer layer is 10 16 cm -3 Greater than or equal to 10 17 cm -3 The carbon impurity concentration of the third buffer layer is 5×10 16 cm -3 The following is the result.

[0013] In one embodiment, the third buffer layer has a thickness d3, where 200 nm≦d3≦500 nm.

[0014] In one embodiment, the first buffer layer has a thickness d1, where 200 nm≦d1≦800 nm.

[0015] In one embodiment, the first semiconductor layer further comprises a nucleation layer located on the substrate, the buffer layer being located on one side of the nucleation layer away from the substrate.

[0016] In one embodiment, the second semiconductor layer includes a channel layer located on one side of the first semiconductor layer away from the substrate, a barrier layer located on one side of the channel layer away from the first semiconductor layer and forming a heterojunction structure together with the channel layer and forming a conductive channel at the heterointerface, and a cap layer located on one side of the barrier layer away from the channel layer.

[0017] The present invention further provides a semiconductor device.

[0018] The semiconductor device includes the epitaxial structure described above.

[0019] The above semiconductor device is manufactured using the above-mentioned epitaxial structure, which leads to obtaining better leakage and pinch-off characteristics of the device, and also improves the subthreshold characteristics of the device, thereby ensuring the reliability of the device.

[0020] The present invention further provides a method for manufacturing an epitaxial structure for a semiconductor device.

[0021] A method for manufacturing an epitaxial structure of a semiconductor device includes the steps of providing a substrate, manufacturing a first semiconductor device on the substrate, and manufacturing a second semiconductor layer on one side of the first semiconductor layer away from the substrate, the second semiconductor layer having a conductive channel formed therein. The first semiconductor layer includes a buffer layer. The buffer layer includes at least a first buffer layer, a second buffer layer, and a third buffer layer that are stacked. The second buffer layer is located between the first buffer layer and the third buffer layer. The second buffer layer is doped with iron impurities, and the first buffer layer and the third buffer layer are not actively doped with iron impurities. The concentration of the iron impurities in the second buffer layer satisfies a first predetermined range.

[0022] In the above manufacturing method, when manufacturing the buffer layer, the first buffer layer, the second buffer layer, and the third buffer layer are formed in three steps, and the second buffer layer is doped with iron impurities to set the concentration of the iron impurities in the second buffer layer to a first predetermined range, thereby contributing to realizing a high resistance of the buffer layer and providing the device with excellent leakage characteristics and pinch-off characteristics. On the other hand, by distributing the iron impurities in an appropriate concentration range in the central buffer layer, the buffer layer adjacent to the substrate and the second semiconductor layer has almost no iron impurities or has an extremely small amount of iron impurities. Specifically, for example, the concentration of the iron impurities in the first buffer layer is almost zero, and the concentration of the iron impurities in the third buffer layer is 10 16 cm -3 It is preferable that the dc is lower than dc and is approximately zero, which contributes to improving the crystal quality of the buffer layer, and contributes to improving the drain-induced barrier lowering (DIBL) phenomenon and the tailing phenomenon of iron impurities in the device, and further improves the subthreshold characteristics of the device to ensure the reliability of the device.

[0023] In one embodiment, the step of manufacturing a first semiconductor device on the substrate includes the steps of epitaxially growing a nucleation layer on the substrate, epitaxially growing the first buffer layer on one side of the nucleation layer away from the substrate, epitaxially growing the second buffer layer on one side of the first buffer layer away from the nucleation layer and doping the second buffer layer with iron impurities together with carbon impurities, and epitaxially growing the third buffer layer on one side of the second buffer layer away from the first buffer layer. The concentration of the carbon impurities in the second buffer layer satisfies a second predetermined range and is lower than the concentration of the iron impurities in the second buffer layer.

[0024] In one embodiment, the first buffer layer has carbon impurities, and on one side of the first buffer layer away from the nucleation layer, the step of epitaxially growing the second buffer layer includes forming the second buffer layer by an epitaxial process and setting a carbon impurity concentration of the second buffer layer equal to or greater than a carbon impurity concentration of the first buffer layer. The third buffer layer has carbon impurities, and on one side of the second buffer layer away from the first buffer layer, the step of epitaxially growing the third buffer layer includes forming the third buffer layer by an epitaxial process and setting a carbon impurity concentration of the third buffer layer lower than a carbon impurity concentration of the second buffer layer.

[0025] In one embodiment, the step of producing the buffer layer includes a step of turning off an iron source to make the concentration of iron impurities in the first buffer layer approximately zero when forming the first buffer layer, and a step of turning on the iron source to control a flow rate to make the concentration of iron impurities in the second buffer layer approximately zero when forming the second buffer layer. 16 cm -3 ~5×10 18 cm -3 and when forming the third buffer layer, turning off the iron source to set the concentration of iron impurities in the third buffer layer to 10. 16 cm-3 and lowering the [Brief description of the drawings]

[0026] [Figure 1] FIG. 1 is a diagram showing a configuration of an embodiment of the present invention. [Diagram 2] FIG. 2 is a diagram showing the concentration distribution of carbon impurities and iron impurities in the epitaxial structure according to the present invention. [Diagram 3] FIG. 13 is a diagram showing the configuration of a buffer layer according to another embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] In order to facilitate an understanding of the present invention, the present invention will now be described more fully with reference to the accompanying drawings, in which preferred embodiments of the present invention are shown, although the present invention is not limited to the embodiments described herein, but may be embodied in many different forms, and on the contrary, these embodiments are provided to provide a more complete and comprehensive understanding of the present disclosure.

[0028] It should be noted that when an element is "fixed" to another element, the element may be fixed directly to the other element or may be fixed via an intermediate element. When an element is "connected" to another element, the element may be connected directly to the other element or may be connected via an intermediate element. It should be understood that the terms "vertical", "horizontal", "left", "right", "upper", "lower", "front", "rear", "circumferential" and similar descriptions used herein are based on the relationship of directions or positions shown in the drawings, and are not intended to indicate or imply that the devices or components shown have a particular orientation or are required to be configured and operated in a particular direction, but are merely intended to facilitate and simplify the description of the present invention, and therefore should not be understood as limitations on the present invention.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention belongs. The terms used within the present specification are for the purpose of describing particular embodiments only and are not intended to limit the present invention. As used herein, the term "and / or" includes any or all combinations of one or more of the associated listed items.

[0030] In order to obtain better device leakage and pinch-off characteristics, it is necessary to make the buffer layer in a semiconductor device highly resistive. In conventional processes, it is possible to make the buffer layer highly resistive by introducing acceptor impurities during the growth of the buffer layer. However, a relatively high concentration of acceptor impurities in the buffer layer affects the crystal quality of the buffer layer and the subthreshold characteristics of the device, which results in a decrease in device reliability and a limited range of application of the device.

[0031] Therefore, the present invention provides a new epitaxial structure for semiconductor devices that solves the problems of the prior art, meets the high resistance of the buffer layer, and reduces the impact of doping on the crystal quality of the buffer layer and the subthreshold characteristics of the device. The technical solution of the present invention will be described in detail below through specific embodiments.

[0032] 1, an epitaxial structure 100 of a semiconductor device according to the present invention includes a substrate 10 and a first semiconductor layer 20 located on the substrate 10. The substrate 110 may be one or a combination of gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, indium phosphide, gallium arsenide, silicon carbide, diamond, sapphire, germanium, and silicon, or other materials capable of growing Group III nitrides.

[0033] Specifically, the first semiconductor layer 20 includes a buffer layer 22. The buffer layer 22 includes at least a first buffer layer 221, a second buffer layer 222, and a third buffer layer 223 that are stacked. The second buffer layer 222 is located between the first buffer layer 221 and the third buffer layer 223. The first buffer layer 221 may be located between the substrate 10 and the second buffer layer 222, or may be located on one side of the second buffer layer 222 that is away from the substrate 10. As illustrated in FIG. 1, the first buffer layer 221 is located between the substrate 10 and the second buffer layer 222, and the third buffer layer 223 is located on one side of the second buffer layer 222 that is away from the substrate 10. The buffer layer 22 has the effect of adhering to a semiconductor material layer that needs to be grown next, and can prevent metal ions from penetrating into the substrate 10. The buffer layer 22 may be a III-nitride material such as AlGaN, GaN, or AlGaInN.

[0034] Furthermore, the second buffer layer 222 is doped with iron impurities, while the first buffer layer 221 and the third buffer layer 223 are not actively doped with iron impurities. Preferably, as illustrated in Fig. 1, the iron impurities of the buffer layer 22 are distributed in the second buffer layer 222, the content of the iron impurities in the first buffer layer 221 is almost zero, and the content of the iron impurities in the third buffer layer 223 is almost zero. However, due to the tailing phenomenon of the iron impurities in the second buffer layer, a small amount of iron impurities is distributed in the third buffer layer, but the content is extremely small and is less than 10 16 cm -3 In addition, once the tailing phenomenon can be eliminated with the development of technology, it is preferable that the iron impurity content in the third buffer layer is almost zero. In the present invention, the iron impurity content being almost zero means that iron is not actively doped. Logically, it is preferable that the iron impurity content is zero, but in practice, the presence of iron is inevitable.

[0035] The iron impurity of the buffer layer 22 is distributed in the second buffer layer 222 located in the intermediate layer, and the host of the adjacent layer in contact with the second buffer layer 222 in which the iron impurity is distributed is the same as the host of the second buffer layer 222. In other words, the iron impurity of the buffer layer 22 does not directly contact a semiconductor layer having a different host, such as a substrate, a nucleation layer, or a channel layer.

[0036] Preferably, the epitaxial structure of the semiconductor may further include a second semiconductor layer 30 located on one side of the first semiconductor layer 20 away from the substrate. As shown in FIG. 1, a conductive channel indicated by a thick dashed line is formed in the second semiconductor layer 30. Specifically, the second semiconductor layer 30 may include a channel layer 31 and a barrier layer 32. The channel layer 31 may be formed between the buffer layer 22 and the barrier layer 32, and may form a heterojunction structure together with the barrier layer 32 above it, and may form a two-dimensional electron gas channel (i.e., a conductive channel) at the interface. The channel layer 31 provides a channel for two-dimensional electron gas movement, and the barrier layer 32 plays the role of a barrier. The barrier layer 32 is made of Al x Ga 1-x It may be an N material, and its Al content x may be controlled to 0-1.

[0037] Specifically, the first buffer layer 221, the second buffer layer 222 and the third buffer layer 223 are sequentially formed stepwise by an epitaxial growth process. In the process of forming the first buffer layer 221, the growth conditions are controlled to turn off the iron source, so that the content of iron impurities in the first buffer layer 221 can be zero. In the process of forming the second buffer layer 222, the growth conditions are adjusted to turn on the iron source, and the flow rate is controlled to dope the iron impurities into the second buffer layer 222. When forming the third buffer layer 223, the growth conditions are subsequently adjusted to turn off the iron source, so that the concentration of iron impurities attenuating into the conductive channel can be reduced, and the concentration of iron impurities in the third buffer layer 223 can be set to a relatively low range, for example, 10 16 cm -3The distribution of iron impurities in the second buffer layer 222 can be achieved by the above method, but the desired first buffer layer 221, second buffer layer 222, and third buffer layer 223 may be formed by other growth processes. In the present invention, the specific manufacturing process of the buffer layer 22 is not limited.

[0038] In the epitaxial structure 100 of the semiconductor device, the buffer layer 22 includes at least a first buffer layer 221, a second buffer layer 222, and a third buffer layer 223. The buffer layer 22 is doped with iron impurities, and the iron impurities are distributed in the second buffer layer 222. The concentration of the iron impurities in the second buffer layer 222 satisfies a first predetermined range, which contributes to realizing a high resistance of the buffer layer 22 and gives the device excellent leakage characteristics and pinch-off characteristics. On the other hand, in the epitaxial structure 100, the iron impurities are distributed in the central buffer layer in an appropriate concentration range, but the buffer layer adjacent to the substrate and the second semiconductor layer has almost no iron impurities or has an extremely small amount of iron impurities. Specifically, for example, the concentration of the iron impurities in the first buffer layer is almost zero, and the concentration of the iron impurities in the third buffer layer is 10 16 cm -3 Preferably, the concentration of iron impurities is lower than 100%, and is approximately zero. This contributes to improving the crystal quality of the buffer layer 22, and contributes to improving the drain-induced barrier lowering (DIBL) phenomenon and the tailing phenomenon of iron impurities of the device, and further improves the subthreshold characteristics of the device to ensure the reliability of the device. Taking the epitaxial structure shown in FIG. 1 as an example, the first buffer layer 221 contains almost no iron impurities, which improves the crystal growth quality of the buffer layer 22 and effectively improves the drain-induced barrier lowering phenomenon of the device. In addition, a single layer of a third buffer layer 223 is further sandwiched between the second buffer layer 222 and the second semiconductor layer 30. The concentration of iron impurities in the third buffer layer 223 is also extremely low, which not only contributes to reducing the iron content attenuated in the channel, but also prevents the iron impurities from entering the channel to cause impurity scattering, reducing the two-dimensional electron gas concentration and electron mobility, and affecting the saturation current and output of the device.

[0039] In an exemplary embodiment, the second buffer layer 222 is further doped with carbon impurities. The concentration of the carbon impurities in the second buffer layer 222 meets a second predetermined range and is lower than the concentration of the iron impurities in the second buffer layer 222.

[0040] Specifically, in order to obtain excellent crystal quality, the crystal is grown by a high-temperature and high-pressure epitaxial growth process, and under this growth condition, the concentration of carbon impurities in the second buffer layer 222 is not high, but the iron impurities are doped by flow control, and their concentration is not easily affected by temperature and pressure, so they may be the main acceptor impurities for realizing the high resistance of the buffer layer 22. On the other hand, considering that the concentration of carbon impurities is easily affected by temperature and pressure, the second buffer layer 222 can be continuously doped with an appropriate concentration of carbon impurities to compensate for the high resistance effect of the iron impurities and further obtain the required high resistance of the buffer layer.

[0041] Furthermore, the first predetermined range of the concentration of the iron impurity in the second buffer layer 222 is 10 16 cm -3 ~5×10 18 cm -3 and the second predetermined range of the concentration of carbon impurities in the second buffer layer 222 is 10 16 cm -3 ~10 17 cm -3 The iron impurities and carbon impurities are doped in the second buffer layer 222 at appropriate concentrations as deep level acceptors to achieve high resistance and low leakage current throughout the buffer layer 22. If the iron impurity concentration is too low, the required high resistance of the buffer layer cannot be achieved. If the iron impurity concentration is too high and the carbon impurity concentration is too low, it will affect the crystal quality and surface shape of the buffer layer 22. If the carbon impurity concentration is too high, it will deteriorate the crystal growth quality of the buffer layer.

[0042] In an exemplary embodiment, as shown in FIG. 1, the first buffer layer 221 is located on one side of the second buffer layer 222 adjacent to the substrate 10, and the third buffer layer 223 is located on one side of the second buffer layer 222 adjacent to the second semiconductor layer 30. Furthermore, as shown in FIG. 2, the first buffer layer 221 has carbon impurities, and the concentration of the carbon impurities in the first buffer layer 221 is equal to or lower than the concentration of the carbon impurities in the second buffer layer 222. In addition, the third buffer layer 223 has carbon impurities, and the concentration of the carbon impurities in the third buffer layer 223 is lower than the concentration of the carbon impurities in the second buffer layer 222. By making the concentrations of the carbon impurities in both the first buffer layer 221 and the third buffer layer 223 lower than the concentration of the carbon impurities in the second buffer layer 222, a high resistance can be realized and the crystal quality of the buffer layer 22 can be effectively improved. On the other hand, since it is easier to adjust the carbon impurity concentration of the third buffer layer 223, the crystal quality of the buffer layer 22 is further improved by making the carbon impurity concentration of the third buffer layer 223 lower than the carbon impurity concentration of the second buffer layer 222.

[0043] Furthermore, the carbon impurity concentration of the first buffer layer 221 is 10 17 cm -3 The carbon impurity concentration of the second buffer layer 222 is 10 16 cm -3 Greater than or equal to 10 17 cm -3 The carbon impurity concentration of the third buffer layer 223 is 5×10 16 cm -3 The carbon impurity concentrations of the first buffer layer 221, the second buffer layer 222, and the third buffer layer 223 are controlled to be within the above ranges, thereby contributing to realizing high resistance of the buffer layer 22 and improving the crystal quality of the buffer layer 22. If the carbon impurity concentration of each buffer layer is too high, the crystal quality of the buffer layer 22 is obviously degraded, but if the carbon impurity concentration of the second buffer layer 222 is too low, the high resistance effect due to the iron impurity cannot be sufficiently compensated for.

[0044] In an exemplary embodiment, with continued reference to FIG. 1, the thickness of the third buffer layer 223 is d3. Here, 200 nm≦d3≦500 nm. By controlling the thickness of the third buffer layer 223 to satisfy the above relationship, the iron impurities in the second buffer layer 222 can be made to have an appropriate distance from the conductive channel, and the influence of the doped iron impurities on the two-dimensional electron gas in the conductive channel can be reduced. If the third buffer layer 223 is too thin, the distance from the iron impurities in the second buffer layer 222 to the conductive channel is too short, which is likely to cause an excess of iron impurities to be attenuated in the conductive channel, which further affects the saturation current and output of the device, and makes it difficult to ensure the reliability of the device. If the thickness of the third buffer layer 223 is too thick, it will affect the growth efficiency of the buffer layer 22.

[0045] In an exemplary embodiment, the thickness of the second buffer layer 222 is d2. Here, 200 nm≦d2≦800 nm. By controlling the thickness of the second buffer layer 222 so as to satisfy the above relationship, the high resistance of the buffer layer 22 is well realized and the crystal quality of the buffer layer 22 is improved. If the second buffer layer 222 is too thin, it affects the realization of the high resistance of the entire buffer layer 22. If the thickness of the second buffer layer 222 is too thick, it affects the growth efficiency of the buffer layer 22. In addition, the second buffer layer 222 is further doped with a relatively high concentration of iron impurities. If the thickness of the second buffer layer 222 is too thick, it also affects the crystal quality and surface shape of the second buffer layer 222.

[0046] In an exemplary embodiment, the thickness of the first buffer layer is d1. Note that 200 nm≦d1≦800 nm. Controlling the thickness of the first buffer layer 221 to satisfy the above relationship contributes to the crystal of the first buffer layer 221 converting from three-dimensional growth to two-dimensional growth as soon as possible, ensuring the crystal growth quality of the subsequent buffer layer, and not affecting the growth efficiency of the buffer layer 22. If the first buffer layer 221 is too thin, the first buffer layer 221 is more likely not to convert from three-dimensional growth to two-dimensional growth immediately, which deteriorates the growth quality of the subsequent buffer layer. If the thickness of the first buffer layer 221 is too thick, it affects the growth efficiency of the buffer layer 22.

[0047] In an exemplary embodiment, referring to FIG. 3, the buffer layer 22 may further include a fourth buffer layer 224 and a fifth buffer layer 225. Specifically, the fourth buffer layer 224 is located between the first buffer layer 221 and the second buffer layer 222, and the fifth buffer layer 225 is located between the second buffer layer 222 and the third buffer layer 223. If the first buffer layer 221 is too thin, the fourth buffer layer 224 may be used to compensate for the thickness of the first buffer layer 221. If the third buffer layer 221 is too thin, the fifth buffer layer 225 may be used to compensate for the thickness of the third buffer layer 223. If the second buffer layer 222 is too thin, the fourth buffer layer 224 and / or the fifth buffer layer 225 may be used to compensate for the thickness of the second buffer layer 222. If the number of layers in the buffer layer 22 is large, this tends to affect the growth efficiency of the buffer layer 22, so the number of layers in the buffer layer 22 is preferably three, four, or five.

[0048] In an exemplary embodiment, with continued reference to FIG. 1, the first semiconductor layer 20 may further include a nucleation layer 21 located on the substrate 10. A buffer layer 22 is located on one side of the nucleation layer 21 away from the substrate 10. The nucleation layer 21 can affect parameters such as crystal quality, surface shape and electrical properties of the heterojunction material above it. The nucleation layer 21 varies depending on the material of the substrate 10 and mainly serves to match the substrate 10 and the semiconductor material layer in the heterojunction structure. In the present invention, the nucleation layer 21 may be formed by high temperature AlN or low temperature GaN, and mainly transforms the buffer layer 22 from an initial three-dimensional growth mode to a two-dimensional growth mode.

[0049] The present invention further provides a semiconductor device including the above-mentioned epitaxial structure 100. The above-mentioned semiconductor device may be manufactured by the above-mentioned epitaxial structure 100, which leads to obtaining better leakage characteristics and pinch-off characteristics of the device, and improves the subthreshold characteristics of the device to ensure the reliability of the device. For example, the above-mentioned epitaxial structure 100 can be used to obtain a field effect transistor with excellent performance by successively manufacturing a source, a gate, and a drain.

[0050] The present invention further provides a method for manufacturing an epitaxial structure 100 of a semiconductor device. The structure of the epitaxial structure 100 is shown in FIG. 1. The method includes a step S1 of providing a substrate 10 and a step S2 of manufacturing a first semiconductor layer 20 on the substrate 10. The first semiconductor layer 20 includes a buffer layer 22. The buffer layer 22 includes at least a first buffer layer 221, a second buffer layer 222, and a third buffer layer 223 that are stacked. The second buffer layer 222 is located between the first buffer layer 221 and the third buffer layer 223. The buffer layer 22 is doped with iron impurities, and the iron impurities are doped into the second buffer layer 222.

[0051] In the above manufacturing method, when manufacturing the buffer layer 22, the first buffer layer 221, the second buffer layer 222, and the third buffer layer 223 are formed in three steps, and the second buffer layer 222 is doped with iron impurities to set the concentration of the iron impurities in the second buffer layer 222 to a first predetermined range, thereby contributing to realizing high resistance of the buffer layer 22 and giving the device excellent leakage characteristics and pinch-off characteristics. On the other hand, by distributing the iron impurities in an appropriate concentration range in the central buffer layer, the buffer layer adjacent to the substrate 10 and the second semiconductor layer 30 has almost no or very little iron impurities, which contributes to improving the crystal quality of the buffer layer 22 and contributes to improving the drain-induced barrier lowering (DIBL) phenomenon and the tailing phenomenon of iron impurities in the device, and further improves the subthreshold characteristics of the device to ensure the reliability of the device.

[0052] In an exemplary embodiment, step S2 specifically includes the following steps: S210: The nucleation layer 21 is epitaxially grown on the substrate 10. The nucleation layer 21 is formed by high-temperature AlN or low-temperature GaN, and mainly converts the buffer layer 22 from an initial three-dimensional growth mode to a two-dimensional growth mode.

[0053] S220: A first buffer layer 221 is epitaxially grown on one side of the nucleation layer 21 away from the substrate 10. Specifically, the epitaxial growth process ensures that the carbon impurity in the first buffer layer 221 is in a low range, which contributes to improving the subsequent crystal growth quality of the buffer layer.

[0054] S230: A second buffer layer 222 is epitaxially grown on one side of the first buffer layer 221 away from the nucleation layer 21, and iron impurities are doped into the second buffer layer 222 together with carbon impurities. The concentration of the carbon impurities in the second buffer layer 222 is set to a second predetermined range, and the concentration of the carbon impurities in the second buffer layer 222 is set to be lower than the concentration of the iron impurities in the second buffer layer 222. Specifically, the combination of iron impurities and carbon impurities contributes more to realizing the high resistance required for the buffer layer 22 .

[0055] S240: A third buffer layer 223 is epitaxially grown on one side of the second buffer layer 222 away from the first buffer layer 221.

[0056] Specifically, the epitaxial growth process allows the concentration of carbon impurities in the third buffer layer 223 to fall within a low range, which contributes to improving the crystal quality of the buffer layer 22.

[0057] Furthermore, step S230 further includes a step of forming a second buffer layer 222 by an epitaxial growth process, and setting the carbon impurity concentration of the second buffer layer 222 to be equal to or higher than the carbon impurity concentration of the first buffer layer 221. Step S240 further includes a step of forming a third buffer layer 223 by an epitaxial growth process, and setting the carbon impurity concentration of the third buffer layer 223 to be lower than the carbon impurity concentration of the second buffer layer 222. The carbon impurity concentrations of the first buffer layer 221, the second buffer layer 222, and the third buffer layer 223 satisfying the above relationship contribute to realizing high resistance of the buffer layer 22, and effectively improving the crystal quality of the buffer layer 22 to ensure the reliability of the physical properties of the device.

[0058] The technical features of the above-mentioned embodiments can be combined in any combination. For the sake of simplicity, all combinations of the technical features in the above-mentioned embodiments are not described, but the combinations of these technical features should be considered within the scope described in this specification unless they are inconsistent.

[0059] The above examples merely show a number of embodiments of the present invention, and although the description is specific and detailed, it should not be construed as limiting the scope of the present invention. In addition, those skilled in the art can make some modifications and improvements without departing from the spirit of the present invention, and all of these modifications and improvements are included in the scope of protection of the present invention. The scope of protection of the present invention shall be pursuant to the scope of the claims. [Explanation of symbols]

[0060] 100 Epitaxial Structure 10 Substrate 20 First semiconductor layer 30 Second semiconductor layer 21 Nucleation layer 22 Buffer layer 221 First buffer layer 222 Second buffer layer 223 3rd Buffer Layer 224 4th buffer layer 225 5th Buffer Layer 31 Channel Layer 32 Barrier Layer

Claims

1. An epitaxial structure of a semiconductor device, comprising: A substrate; a first semiconductor layer located on the substrate, the first semiconductor layer including a nucleation layer formed on the substrate and a buffer layer formed on one side of the nucleation layer away from the substrate; a second semiconductor layer including a conductive channel formed adjacent to the first semiconductor layer on one side of the first semiconductor layer away from the substrate; Including, the buffer layer is located adjacent to the second semiconductor layer; the buffer layer is composed of a first buffer layer, a second buffer layer, and a third buffer layer that are stacked, the second buffer layer is located between the first buffer layer and the third buffer layer; the second buffer layer is doped with iron impurities, while the first buffer layer and the third buffer layer are not actively doped with iron impurities; The second buffer layer is further doped with carbon impurities; the carbon impurity of the second buffer layer is at a lower concentration than the iron impurity of the second buffer layer; the first buffer layer is disposed on one side of the second buffer layer adjacent to the substrate; the third buffer layer is located on one side of the second buffer layer adjacent to the second semiconductor layer, the first buffer layer has carbon impurities; a carbon impurity concentration of the first buffer layer is equal to or lower than a carbon impurity concentration of the second buffer layer; the third buffer layer has carbon impurities; a carbon impurity concentration of the third buffer layer is lower than a carbon impurity concentration of the second buffer layer; a concentration of iron impurities in the first buffer layer is lower than a concentration of carbon impurities in the first buffer layer and is substantially zero throughout the first buffer layer; The concentration of iron impurities in the third buffer layer is 10 １６ cm －３ It is lower than a concentration of iron impurities in the third buffer layer is lower than a concentration of carbon impurities in the third buffer layer and is substantially zero throughout the third buffer layer; The above "almost zero" means that the first buffer layer and the third buffer layer are not actively doped with iron. Although it is logically preferable that the content of iron impurities is zero, the presence of iron is actually inevitable due to the tailing phenomenon of iron impurities in the second buffer layer, etc. The concentration of the iron impurity in the second buffer layer satisfies a first predetermined range, and the first predetermined range is 10 １６ cm －３ ~5×10 １８ cm －３ Including, The carbon impurity concentration of the second buffer layer satisfies a second predetermined range, and the second predetermined range is 10 １６ cm －３ ~10 １７ cm －３ Including, a carbon impurity concentration in a central portion of the second buffer layer is higher than a carbon impurity concentration in a boundary portion between the second buffer layer and the first buffer layer and a carbon impurity concentration in a boundary portion between the second buffer layer and the third buffer layer; a concentration of iron impurities in a central portion of the second buffer layer is higher than a concentration of iron impurities in a boundary portion between the second buffer layer and the first buffer layer and a concentration of iron impurities in a boundary portion between the second buffer layer and the third buffer layer; An epitaxial structure comprising:

2. The thickness of the second buffer layer is d ２ and Here, 200 nm≦d ２ 2. The epitaxial structure of claim 1, wherein: ≦800 nm.

3. The thickness of the third buffer layer is d ３ and Here, 200 nm≦d ３ ≦500 nm, The thickness of the first buffer layer is d １ and Here, 200 nm≦d １ 2. The epitaxial structure of claim 1, wherein: ≦800 nm.

4. A semiconductor device comprising:

4. The semiconductor device according to claim 1, comprising the epitaxial structure according to claim 1.

5. A method for manufacturing an epitaxial structure of a semiconductor device, comprising the steps of: Providing a substrate; fabricating a first semiconductor device on the substrate; and forming a second semiconductor layer on a side of the first semiconductor layer away from the substrate, the second semiconductor layer having a conductive channel formed therein; the first semiconductor layer includes a nucleation layer and a buffer layer, the buffer layer being adjacent to the second semiconductor layer; the buffer layer is composed of a first buffer layer, a second buffer layer, and a third buffer layer that are stacked, the second buffer layer is located between the first buffer layer and the third buffer layer; the second buffer layer is doped with iron impurities, while the first buffer layer and the third buffer layer are not actively doped with iron impurities; The step of manufacturing a first semiconductor device on the substrate includes: epitaxially growing the nucleation layer on the substrate; epitaxially growing the first buffer layer on a side of the nucleation layer away from the substrate; epitaxially growing the second buffer layer on one side of the first buffer layer away from the nucleation layer, and doping the second buffer layer with iron impurities together with carbon impurities so that the concentration of the carbon impurities in the second buffer layer is lower than the concentration of the iron impurities in the second buffer layer; epitaxially growing the third buffer layer on one side of the second buffer layer away from the first buffer layer; The step of fabricating the buffer layer comprises: When forming the first buffer layer, turning off the iron source to make the concentration of iron impurities in the first buffer layer lower than the concentration of carbon impurities contained in the first buffer layer and approximately zero throughout the first buffer layer; When forming the second buffer layer, the iron source is turned on and the flow rate is controlled to make the concentration of iron impurities in the second buffer layer 10 １６ cm －３ ~5×10 １８ cm －３ and When forming the third buffer layer, the iron source is turned off to set the concentration of iron impurities in the third buffer layer to 10 １６ cm －３ and lowering the a concentration of iron impurities in the third buffer layer is lower than a concentration of carbon impurities in the third buffer layer and is substantially zero throughout the third buffer layer; The above "almost zero" means that the first buffer layer and the third buffer layer are not actively doped with iron. Although it is logically preferable that the content of iron impurities is zero, the presence of iron is actually inevitable due to the tailing phenomenon of iron impurities in the second buffer layer, etc. The concentration of the iron impurity in the second buffer layer satisfies a first predetermined range, and the first predetermined range is 10 １６ cm －３ ~5×10 １８ cm －３ Including, The carbon impurity concentration of the second buffer layer satisfies a second predetermined range, and the second predetermined range is 10 １６ cm －３ ~10 １７ cm －３ Including, a carbon impurity concentration in a central portion of the second buffer layer is higher than a carbon impurity concentration in a boundary portion between the second buffer layer and the first buffer layer and a carbon impurity concentration in a boundary portion between the second buffer layer and the third buffer layer; a concentration of iron impurities in a central portion of the second buffer layer is higher than a concentration of iron impurities in a boundary portion between the second buffer layer and the first buffer layer and a concentration of iron impurities in a boundary portion between the second buffer layer and the third buffer layer; 2. A method for manufacturing an epitaxial structure of a semiconductor device comprising the steps of:

Images