Method for manufacturing a Group III nitride semiconductor

Abstract

To suppress variations in Si concentration of a III nitride semiconductor.SOLUTION: In a preparation step S1, first, a dummy substrate 3 is installed in a recess 2 of a susceptor 1. The susceptor 1 used is one in which a SiC film 4 is formed on the surface of the susceptor 1 made of carbon. Next, the susceptor 1 is heated to a temperature of 1100°C or higher, and an Al raw material is introduced onto the susceptor 1. Due to the introduction of the Al raw material, a film 5 containing Al is formed on the SiC film 4 of the susceptor 1 and on the dummy substrate 3. Next, the temperature of the susceptor 1 is lowered to room temperature, and the dummy substrate 3 is taken out from the recess 2 of the susceptor 1. A growth step S2 is a step performed after the preparation step S1. In the growth step S2, a substrate 7 is placed in the recess 2 of the susceptor 1, and a semiconductor layer 8 made of a III nitride semiconductor is formed on the substrate 7 by MOCVD.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a method for producing a Group III nitride semiconductor, in which a susceptor having a SiC film formed thereon is used to grow a Group III nitride semiconductor on a substrate. [Background technology]

[0002] The mainstream method for growing III-nitride semiconductors is to use MOCVD equipment. In MOCVD, a substrate is placed on a carbon susceptor, which is then heated to the desired temperature, and the source gases are reacted on the substrate to grow the III-nitride semiconductor crystals.

[0003] Here, a carbon susceptor reacts with ammonia, which is a Group V source gas, so it is common to use a susceptor whose surface is coated with a SiC film.

[0004] Patent Document 1 describes a preparatory process before forming a group III nitride semiconductor with a high Al content. In the preparatory process, it describes forming a dummy layer made of AlN on a dummy substrate at 1100° C. or higher. This incorporates impurities such as group III metals and nitrogen deposited in the reactor into the dummy layer, thereby reducing the impurities in the group III nitride semiconductor with a high Al content that is subsequently formed. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 5225928 Summary of the Invention [Problem to be solved by the invention]

[0006] In vertical power devices, the donor concentration in the drift layer has a significant effect on device characteristics such as breakdown voltage and on-resistance. In horizontal power devices, the resistance of the buffer layer affects the breakdown voltage. However, the inventors' research revealed that when a SiC-coated susceptor is used, Si dissociates from the SiC film and is unintentionally mixed into the III-nitride semiconductor. This causes problems such as variation in the Si concentration in the drift layer and buffer layer within a wafer and variation between lots.

[0007] Moreover, Patent Document 1 is intended to prevent impurities accumulated in a reactor from being mixed into a Group III nitride semiconductor, but is not intended to prevent Si dissociated from the SiC film of the susceptor from being mixed into the Group III nitride semiconductor.

[0008] Therefore, an object of the present invention is to suppress the variation in the Si concentration of a Group III nitride semiconductor in a manufacturing method of the Group III nitride semiconductor. [Means for solving the problem]

[0009] The present invention relates to a method for producing a Group III nitride semiconductor comprising a growth step of placing a substrate on a susceptor having a surface covered with a SiC film and forming a Group III nitride semiconductor on the substrate, the method comprising a preparation step prior to the growth step, the preparation step comprising a first step of placing a dummy substrate on the susceptor, a second step of heating the susceptor to 1100° C. or higher and supplying an Al source to form an Al-containing film on the SiC film, and a third step of removing the dummy substrate from the susceptor.

[0010] In the present invention, ammonia gas does not necessarily need to be supplied in the second step.

[0011] In the present invention, the flow rate of the carrier gas that carries the Al source material may be changed in the second step.

[0012] In the present invention, after the second step and before the third step, a semiconductor layer made of a Group III nitride semiconductor may be formed on the Al-containing film. Effect of the Invention

[0013] According to the present invention, it is possible to prevent Si from being mixed into the Group III nitride semiconductor from the SiC film of the susceptor, and therefore it is possible to suppress variations in the Si concentration in the Group III nitride semiconductor. [Brief description of the drawings]

[0014] [Figure 1] 2A to 2C are views for explaining a method for manufacturing a Group III nitride semiconductor according to the first embodiment. [Diagram 2] FIG. [Diagram 3] FIG. 13 is a diagram showing a modified example of the preparation step S1. [Figure 4] 3A to 3C are diagrams showing examples of the configuration of a semiconductor layer 8. [Diagram 5] FIG. 13 shows the distribution of donor concentration in a wafer obtained by CV measurement. [Figure 6] FIG. 13 shows the distribution of donor concentration in a wafer obtained by CV measurement. [Figure 7] Graph showing the difference in lot and the variation in donor concentration within a wafer. [Figure 8] 4 is a graph showing the results of a SIMS analysis of the Si concentration in a semiconductor layer 8. [Figure 9] 4 is a graph showing the results of a SIMS analysis of the Si concentration in a semiconductor layer 8. [Figure 10] 3A to 3C are diagrams showing examples of the configuration of a semiconductor layer 8. [Figure 11] 3A to 3C are diagrams showing examples of the configuration of a semiconductor layer 8. [Figure 12] 3A to 3C are diagrams showing examples of the configuration of a semiconductor layer 8. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0016] (First embodiment) The method for manufacturing a semiconductor device made of a group III nitride semiconductor according to the first embodiment includes a preparation step S1, a crystal growth step S2, and a device step S3. FIG. 1 is a flow chart showing the manufacturing steps of a group III nitride semiconductor according to the first embodiment. As shown in FIG. 1, the preparation step S1 is a step performed before growing a group III nitride semiconductor crystal on a substrate. The growth step S2 is a step for actually growing a group III nitride semiconductor crystal on a substrate after the preparation step S1. After repeating the growth step S2 about 1 to 20 times, the preparation step S1 is performed again. The device step S3 is a step performed after each growth step S2, and is a device manufacturing step other than the formation of a group III nitride semiconductor, for example, an electrode formation step. The preparation step S1 and the growth step S2 are steps performed in a reactor of an MOCVD apparatus, and the device step S3 is a step performed outside the reactor. The preparation step S1, the growth step S2, and the device step S3 will be described below.

[0017] (Preparation process S1) In the preparation step S1, first, a dummy substrate 3 is placed in the recess 2 of the susceptor 1 (see FIG. 2(a)). The susceptor 1 used is SiC-coated. In other words, the surface of the susceptor 1 made of carbon is covered with a SiC film 4. The SiC film 4 is provided to prevent ammonia from reacting with carbon, which is the material of the susceptor 1. Ammonia serves as a nitrogen source gas in the crystal growth of a Group III nitride semiconductor by the MOCVD method. The material of the dummy substrate 3 may be any material that is heat-resistant and does not react with the Al source material or carrier gas. For example, sapphire, SiC, AlN, etc. may be used.

[0018] Next, the susceptor 1 is heated to a temperature of 1100°C or higher, and an Al source material is introduced onto the susceptor 1. The pressure may be normal pressure or reduced pressure, but the same pressure as in the growth step S2 is preferable. The Al source material may be any material that is an Al source material used in growing a Group III nitride semiconductor by MOCVD, and organic metals such as TMA (trimethylaluminum) and TEA (triethylaluminum) can be used. The same material as the Al source material used in forming the Group III nitride semiconductor containing Al in the growth step S2 is preferable. TMA is particularly preferable. The Al source material is usually mixed with a carrier gas and supplied. The carrier gas is, for example, hydrogen.

[0019] By introducing the Al raw material, an Al-containing film 5 is formed on the SiC film 4 of the susceptor 1 and on the dummy substrate 3 (see FIG. 2(b)). It is unclear what specific material the Al-containing film 5 is made of, and its thickness is also unknown. However, since the Al-containing film 5 is transparent and does not have a metallic luster, it may not be an Al film or may be a very thin Al film. It may also be a dielectric material such as AlC. Of course, it may also be a material other than these.

[0020] The reason why the Al-containing film 5 is formed at 1100°C or higher is to prevent the Al-containing film 5 from evaporating when the Group III nitride semiconductor is formed in the growth step S2. The temperature may be lower than 1100°C as long as it is higher than the maximum growth temperature of the Group III nitride semiconductor in the growth step S2. The temperature is preferably 1150°C or higher, and more preferably 1200°C.

[0021] The flow rate of the carrier gas carrying the Al raw material may be constant or may be varied. If the flow rate of the carrier gas is increased, the reaction point shifts downstream, so that it becomes easier to form the film 5 containing Al over the entire susceptor 1 by varying the flow rate of the carrier gas. When the flow rate is changed, it may be changed stepwise or continuously.

[0022] After the Al-containing film 5 is formed, a semiconductor layer 6 made of a group III nitride semiconductor may be further formed on the Al-containing film 5 by MOCVD before the next process (see FIG. 3). When the temperature of the susceptor 1 is lowered, the Al-containing film 5 may peel off from the SiC film 4 due to stress caused by the difference in thermal expansion coefficient between the SiC film 4 and the Al-containing film 5. Therefore, by forming the semiconductor layer 6 made of a group III nitride semiconductor on the Al-containing film 5, it is possible to suppress peeling of the Al-containing film 5 during the temperature lowering. The semiconductor layer 6 is preferably made of GaN. The thickness of the semiconductor layer 6 is, for example, 1 to 2 μm.

[0023] Next, the temperature of the susceptor 1 is lowered to room temperature, and the dummy substrate 3 is removed from the recess 2 of the susceptor 1 (see FIG. 2(c)). Since the dummy substrate 3 was placed in the recess 2, the Al-containing film 5 is not formed on the bottom or side of the recess 2. Therefore, when the substrate 7 is placed in the growth step S2, there is no risk that the Al-containing film 5 will be transferred and adhered to the substrate 7.

[0024] (Growth process S2) The growth step S2 is a step performed after the preparation step S1. In the growth step S2, a substrate 7 is placed in the recess 2 of the susceptor 1, and a semiconductor layer 8 made of a group III nitride semiconductor is formed on the substrate 7 by MOCVD. The wafer may be removed from the reactor once to etch a part of the semiconductor layer 8, and after etching, the wafer may be put back into the reactor to re-grow the semiconductor layer 8. The substrate 7 may be any material on which a group III nitride semiconductor can be grown. For example, a horizontal semiconductor element may be an insulating substrate such as sapphire, and a vertical semiconductor element may be a conductive substrate such as GaN.

[0025] The semiconductor layer 8 has a layer structure according to the semiconductor element to be fabricated. For example, in the case of a vertical FET, as shown in FIG. 4, a base layer 10 made of high-concentration n-type GaN, a drift layer 11 made of low-concentration n-type GaN, a channel layer 12 made of p-type GaN, and a contact layer 13 made of high-concentration n-type GaN are laminated in this order. In the case of a vertical Schottky barrier diode, as shown in FIG. 10, a base layer 10 made of high-concentration n-type GaN and a drift layer 11 made of low-concentration n-type GaN are laminated in this order. In the case of a lateral HFET, as shown in FIG. 11, a buffer layer 14 made of non-doped GaN and a barrier layer 15 made of AlGaN are laminated in this order. Or, as shown in FIG. 12, a LT-GaN layer 16 made of low-temperature grown GaN, a buffer layer 17 made of non-doped GaN, and a barrier layer 18 made of AlGaN are laminated in this order.

[0026] If the preparation step S1 is not performed, Si from the SiC film 4 will be mixed into the semiconductor layer 8, causing the Si concentration to vary within the wafer and between lots.

[0027] On the other hand, in the first embodiment in which the preparation step S1 is performed, the film 5 containing Al is formed on the SiC film 4. Therefore, it is possible to suppress the separation of Si from the SiC film 4 during the growth step S2, and to suppress the incorporation of Si into the group III nitride semiconductor.

[0028] After repeating the growth step S2 about 1 to 20 times, the preparation step S1 is performed again. Repeating the growth step S2 may cause the Al-containing film 5 to peel off from the SiC film 4. Therefore, the preparation step S1 is performed again to overwrite the Al-containing film 5 or to form the Al-containing film 5 again on the peeled portion.

[0029] (Device process S3) The device process S3 is a process carried out after each growth process S2. In the device process S3, element manufacturing processes other than the formation of the semiconductor layer 8 are carried out. In other words, various processes are carried out outside the reaction furnace of the MOCVD apparatus. For example, an insulating film forming process, an etching process, an electrode forming process, etc. are carried out. Through the above steps, a semiconductor element is manufactured.

[0030] In the method for manufacturing a semiconductor device according to the first embodiment described above, the preparation step S1 is performed before the growth step S2, and the Al-containing film 5 is formed on the SiC film 4 of the susceptor 1. This makes it possible to prevent Si from being dissociated from the SiC film 4 in the growth step S2 and being mixed into the semiconductor layer 8, thereby making it possible to suppress variations in the Si concentration within a wafer and variations in the Si concentration between lots.

[0031] Next, various experimental results regarding the first embodiment will be described.

[0032] Example 1 In Example 1, a vertical FET was fabricated by a preparation step S1, a growth step S2, and a device step S3.

[0033] First, the preparation step S1 was performed as follows. A dummy substrate 3 made of sapphire and having a diameter of 2 inches was placed in the recess 2 of the susceptor 1 coated with a SiC film 4. Then, while hydrogen was flowing into the reactor at a flow rate of 72 slm, the susceptor 1 was heated to 1108°C, and TMA was introduced into the reactor at a flow rate of 67.1 μmol / min to form an Al-containing film 5 on the SiC film 4 of the susceptor 1. The hydrogen flow rate was changed in three stages, 72 slm for the first 10 minutes after the introduction of TMA, 60 slm for the next 10 minutes, and 48 slm for the last 5 minutes. This allowed the Al-containing film 5 to be formed over the entire susceptor 1.

[0034] Next, hydrogen was introduced into the reactor at a flow rate of 72 slm, TMG (trimethylgallium) at 938.7 μmol / min, and ammonia at 1,383,929 μmol / min for 60 minutes. This formed a semiconductor layer 6 made of GaN on the Al-containing film 5, and prevented the Al-containing film 5 from peeling off.

[0035] Next, the introduction of TMG was stopped, the heating of the susceptor 1 was stopped, and at the same time, the hydrogen introduced into the reactor was switched to nitrogen, and the nitrogen flow rate was reduced to 36 slm and the ammonia flow rate to 669643 μmol / min. When the temperature of the susceptor 1 reached 700°C, the nitrogen flow rate was reduced to 6 slm and the ammonia flow rate to 133939 μmol / min. When the temperature of the susceptor 1 reached 400°C, the introduction of ammonia was stopped. After that, it was confirmed that the temperature of the susceptor 1 had dropped to room temperature, and the dummy substrate 3 was removed from the reactor.

[0036] Next, the growth step S2 was performed as follows. First, a 2-inch diameter GaN substrate 7 was placed in the recess 2 of the susceptor 1 in the reactor. Then, the susceptor 1 was heated to 1080° C. while hydrogen and ammonia were introduced into the reactor. After that, TMG and silane were introduced in addition to hydrogen and ammonia to form a n + The underlayer 10 made of n-GaN was then formed to a thickness of 200 nm. - A drift layer 11 made of n-GaN was formed to a thickness of 10 μm. Next, hydrogen, TMG, ammonia, and Cp2Mg were introduced into the reactor, and a channel layer 12 made of p-GaN was formed to a thickness of 0.6 μm. Next, hydrogen, TMG, ammonia, and silane were introduced into the reactor, and n + A contact layer 13 made of -GaN was formed to a thickness of 0.2 μm. In this manner, the semiconductor layer 8 was formed on the substrate 7 (see FIG. 4).

[0037] Next, the device process S3 was performed as follows. A trench was formed by dry etching from a portion of the contact layer 13 to the drift layer 11. A gate insulating film was then formed continuously on the surface of the contact layer 13 near the trench, the side of the trench, and the bottom of the trench, and a gate electrode was formed on the gate insulating film. Next, a recess was formed by dry etching from a portion of the contact layer 13 to the channel layer 12, and a source electrode was formed in contact with the bottom of the recess and the contact layer 13. Next, a drain electrode was formed on the back surface of the substrate 7. A vertical FET was fabricated in this manner. A pn ​​junction diode was also formed to measure the donor concentration in the wafer.

[0038] Figure 5 shows the distribution of donor concentration in a wafer obtained by CV measurement. The average donor concentration is 7.8×10 15 cm -3 , the maximum is 8.7 × 10 15 cm -3 , the smallest is 6.8×10 15 cm -3 , standard deviation σ is 5.7×10 14 cm -3 It was.

[0039] Comparative Example 1 For comparison, a vertical FET was fabricated in the same manner except that the preparation step S1 was not performed, and a pn junction diode for measuring the donor concentration was fabricated.

[0040] 6 is a diagram showing the distribution of donor concentration in a wafer (distribution of donor concentration in the drift layer in the semiconductor layer 8) in a comparative example, determined by CV measurement. The average donor concentration is 1.19×10 16 cm -3 , the maximum is 1.81×10 16 cm -3 , the smallest is 9.79×10 15 cm -3 , standard deviation σ is 2.26×10 15 cm -3 It was.

[0041] As shown in FIGS. 5 and 6, it was found that the variation in donor concentration within the wafer was reduced by performing the preparation step S1.

[0042] Figure 7 is a graph showing the variation in donor concentration within a wafer depending on the lot. It was found that when preparation step S1 was not performed, the donor concentration within the wafer varied widely, whereas when preparation step S1 was performed, the variation was small.

[0043] Example 2 After the preparation step S1 was performed in the same manner as in Example 1, the growth step S2 was performed as follows. A 2-inch diameter substrate 7 made of GaN was placed in the recess 2 of the susceptor 1 in the reactor. Then, the susceptor 1 was heated to 1080° C. while hydrogen and ammonia were introduced into the reactor. Thereafter, TMG was introduced in addition to hydrogen and ammonia, and a semiconductor layer 8 made of non-doped GaN was formed to a thickness of 8 μm.

[0044] Comparative Example 2 For comparison, a semiconductor layer 8 was formed in the same manner except that the preparation step S1 was not performed.

[0045] 8 and 9 are graphs showing the results of SIMS analysis of the Si concentration in the semiconductor layer 8, with FIG. 8 being for Comparative Example 2 and FIG. 9 being for Example 2. The horizontal axis represents the depth (μm) from the surface of the semiconductor layer 8, and the vertical axis represents the Si concentration (cm -3 ).

[0046] As shown in FIG. 8, in Comparative Example 2, although the semiconductor layer 8 is non-doped GaN, the 15 ~1×10 16 cm -3 This unintended inclusion of Si is believed to be due to the SiC film 4 covering the surface of the susceptor 1.

[0047] On the other hand, as shown in FIG. 9, in Example 2, the Si concentration in the semiconductor layer 8 was approximately the detection limit (1×10 14 cm -3As a result, it is believed that the formation of Al-containing film 5 in preparation step S1 suppresses the incorporation of Si dissociated from SiC film 4 into semiconductor layer 8, resulting in the formation of undoped GaN as intended.

[0048] Example 3 In Example 3, a vertical Schottky barrier diode was fabricated by a preparation step S1, a growth step S2, and a device step S3. The preparation step S1 was the same as in Example 1.

[0049] After the preparation step S1, the growth step S2 was carried out as follows. First, a 2-inch diameter GaN substrate 7 was placed in the recess 2 of the susceptor 1 in the reactor. Then, the susceptor 1 was heated to 1080° C. while hydrogen and ammonia were introduced into the reactor. After that, TMG and silane were introduced in addition to hydrogen and ammonia, and n + The underlayer 10 made of n-GaN was then formed to a thickness of 200 nm. - A drift layer 11 made of -GaN was formed to a thickness of 10 μm. In this manner, the semiconductor layer 8 was formed on the substrate 7 (see FIG. 10).

[0050] Next, the device process S3 was performed as follows: a Schottky electrode was formed on the front surface of the drift layer 11, and an ohmic electrode was formed on the back surface of the substrate 7. In this manner, a vertical Schottky barrier diode was fabricated.

[0051] In the case of Example 3, similarly to Example 1, it was confirmed that the variation in the distribution of the donor concentration in the wafer was reduced.

[0052] Example 4 In the fourth embodiment, a lateral HFET was fabricated by a preparation step S1, a growth step S2, and a device step S3. The preparation step S1 is the same as in the first embodiment.

[0053] After the preparation step S1, the growth step S2 was performed as follows. First, a 2-inch diameter substrate 7 made of GaN was placed in the recess 2 of the susceptor 1 in the reactor. Then, the susceptor 1 was heated to 1080°C while hydrogen and ammonia were introduced into the reactor. After that, TMG was introduced in addition to hydrogen and ammonia to form a buffer layer 14 made of non-doped GaN to a thickness of 10 μm. Next, hydrogen, ammonia, TMG, and TMA were introduced to form a barrier layer 15 made of AlGaN to a thickness of 30 nm. In this manner, a semiconductor layer 8 was formed on the substrate 7 (see FIG. 11).

[0054] Next, the device process S3 was performed as follows. A gate insulating film was formed on a partial region of the surface of the barrier layer 15, and a gate electrode was formed on the gate insulating film. Next, a source electrode was formed on another region of the surface of the barrier layer 15. Next, a drain electrode was formed on the back surface of the substrate 7. In this manner, a vertical HFET was fabricated.

[0055] In the case of Example 4 as well, it was confirmed that the variation in the donor concentration distribution within the wafer was reduced, similarly to Example 1.

[0056] Example 5 In the fifth embodiment, a lateral HFET was fabricated by a preparation step S1, a growth step S2, and a device step S3. The preparation step S1 is the same as in the first embodiment.

[0057] After the preparation step S1, the growth step S2 was performed as follows. First, the substrate 7 made of sapphire was placed in the recess 2 of the susceptor 1 in the reactor. Then, the susceptor 1 was heated to 1180°C while hydrogen was being introduced into the reactor. Then, the temperature was lowered to 550°C, and ammonia and TMG were introduced in addition to hydrogen to form a LT-GaN layer 16 of 30 nm. Next, the susceptor 1 was heated to 1100°C while hydrogen and ammonia were being introduced into the reactor, and TMG was introduced in addition to hydrogen and ammonia to form a buffer layer 17 made of non-doped GaN of 1 μm. Next, hydrogen, ammonia, TMG, and TMA were introduced to form a barrier layer 15 made of AlGaN. In this manner, a semiconductor layer 8 was formed on the substrate 7 (see FIG. 12).

[0058] Next, the device process S3 was performed as follows. A gate insulating film was formed on a partial region of the surface of the barrier layer 15, and a gate electrode was formed on the gate insulating film. Next, a source electrode and a drain electrode were formed on the other region of the surface of the barrier layer 15, which sandwiched the gate electrode. In this manner, a lateral HFET was fabricated.

[0059] In the case of Example 5, similarly to Example 1, it was confirmed that the variation in the distribution of the donor concentration within the wafer was reduced. [Industrial Applicability]

[0060] The present invention is effective in the manufacture of power devices and the like. [Explanation of symbols]

[0061] 1: Susceptor 2: Recess 3: Dummy board 4:SiC film 5: Film containing Al 6, 8: Semiconductor layer 7: Substrate

Claims

1. 1. A method for producing a Group III nitride semiconductor, comprising the steps of placing a substrate on a susceptor having a surface covered with a SiC film, and growing a Group III nitride semiconductor on the substrate, A preparation step is performed before the growth step, The preparation step includes: a first step of placing a dummy substrate on the susceptor; a second step of heating the susceptor to 1100° C. or higher and supplying an Al source to form an Al-containing film on the SiC film; a third step of removing the dummy substrate from the susceptor; having 2. A method for producing a Group III nitride semiconductor comprising the steps of:

2. 2. The method for producing a Group III nitride semiconductor according to claim 1, wherein in the second step, no ammonia gas is supplied.

3. 3. The method for producing a Group III nitride semiconductor according to claim 1, wherein a flow rate of a carrier gas carrying the Al source material is changed in the second step.

4. 3. The method for producing a Group III nitride semiconductor according to claim 1, further comprising forming a semiconductor layer made of a Group III nitride semiconductor on the Al-containing film after the second step and before the third step.

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