Wiring Board

Abstract

This wiring substrate is provided with an insulating layer composed of ceramics, and a via conductor penetrating through the insulating layer in the thickness direction, the via conductor including a metal portion and a ceramic portion. The metal portion comprises a continuous phase located along the thickness direction of the insulating layer in a longitudinal sectional view.

Description

[Technical field]

[0001] The disclosed embodiments relate to a wiring substrate. [Background technology]

[0002] Conventionally, a wiring board having an insulating layer, a conductor layer mainly composed of copper, and a via conductor is known. For example, such a wiring board is obtained by simultaneously firing a conductor material in which a metal oxide is added to copper powder, and glass ceramics as an insulating layer material (for example, see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2003-277852 A Summary of the Invention

[0004] According to one aspect of the embodiment, a wiring board includes an insulating layer made of ceramics and a via conductor penetrating the insulating layer in a thickness direction, the via conductor including a metal portion and a ceramic portion, and the metal portion has a continuous phase located along the thickness direction of the insulating layer in a vertical cross-sectional view. [Brief description of the drawings]

[0005] [Figure 1] FIG. 1 is a cross-sectional view showing an example of the configuration of a wiring board according to an embodiment. [Diagram 2] FIG. 2 is a vertical cross-sectional view showing an example of the configuration of a via conductor according to the embodiment. [Diagram 3] FIG. 3 is a cross-sectional view showing an example of the configuration of a via conductor according to the embodiment. [Figure 4] FIG. 4 is a diagram showing an example of the arrangement of crystallites in a via conductor according to the embodiment. [Diagram 5] FIG. 5 is a diagram showing an SEM photograph of a via conductor according to an example. [Figure 6]FIG. 6 is a diagram showing an SEM photograph of a via conductor in a comparative example. [Figure 7] FIG. 7 is a diagram showing an SEM photograph of a via conductor according to an example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0006] Conventionally, a wiring board having an insulating layer, a conductor layer mainly made of copper, and a via conductor is known. Such a wiring board is obtained, for example, by simultaneously firing a conductor material in which a metal oxide is added to copper powder, and glass ceramics as an insulating layer material.

[0007] However, the conventional techniques leave room for further improvement in terms of increasing the interfacial conductivity of the via conductor.

[0008] Therefore, there is a need to develop a technology that can overcome the above-mentioned problems and increase the interfacial conductivity of the via conductor.

[0009] Hereinafter, an embodiment of the wiring board disclosed in the present application will be described with reference to the accompanying drawings. Note that the present invention is not limited to the following embodiment. In addition, in the accompanying drawings of the present disclosure, in order to clarify the positional relationship, an X-axis, a Y-axis, and a Z-axis that are mutually orthogonal are defined, and the Z-axis direction is the thickness direction of the insulating layer.

[0010] <Wiring board> First, the configuration of a wiring board 1 according to an embodiment will be described with reference to Fig. 1. Fig. 1 is a cross-sectional view showing an example of a wiring board 1 according to an embodiment. As shown in Fig. 1, the wiring board 1 according to an embodiment includes an insulating layer 2, a conductor layer 3, and a via conductor 4.

[0011] The insulating layer 2 is made of one ceramic selected from the group consisting of glass ceramics sintered body, aluminum oxide sintered body, aluminum nitride sintered body, silicon carbide sintered body, silicon nitride sintered body, and mullite sintered body.

[0012] The insulating layer 2 may be made of, for example, glass ceramics. This allows the wiring board 1 to be manufactured by simultaneously firing the green sheet, which is the raw material of the insulating layer 2, and the conductive paste, which is the raw material of the conductor layer 3 and the via conductor 4. Therefore, according to the embodiment, the manufacturing cost of the wiring board 1 can be reduced.

[0013] 1, the wiring board 1 according to the embodiment is configured by laminating a plurality of (four in the figure) insulating layers 2. Note that in the present disclosure, the wiring board 1 may be configured by one insulating layer 2.

[0014] The conductor layer 3 is conductive and is arranged in a predetermined pattern on the surface of the insulating layer 2 and between adjacent insulating layers 2. That is, the wiring board 1 is configured by alternately stacking the insulating layers 2 and the conductor layers 3.

[0015] The conductor layer 3 is made of a metal material such as copper, silver, palladium, gold, platinum, tungsten, molybdenum, or manganese, or a mixed material such as an alloy material or an intermetallic compound containing these metal materials as a main component.

[0016] The via conductor 4 is electrically conductive and is disposed so as to penetrate the insulating layer 2 along the thickness direction of the insulating layer 2. The via conductor 4 includes a metal portion 7 (see FIG. 5) and a ceramic portion 8 (see FIG. 5).

[0017] The metal portion 7 is made of a metal, such as copper, silver, palladium, gold, platinum tungsten, molybdenum, manganese, etc. The metal portion 7 is preferably made of copper, for example. This can increase the conductivity of the via conductor 4.

[0018] The ceramic portion 8 is made of ceramic. The ceramic portion 8 may be made of at least one of the ceramic materials contained in the insulating layer 2, for example.

[0019] This allows the thermal shrinkage behavior of insulating layer 2 and via conductor 4 to be similar, so that in the simultaneous firing process of wiring board 1, damage to wiring board 1 due to thermal shrinkage after firing can be reduced.

[0020] <Via conductor> Next, details of the via conductor 4 according to the embodiment will be described with reference to Fig. 2 to Fig. 4. Fig. 2 is a vertical cross-sectional view showing an example of the configuration of the via conductor 4 according to the embodiment, and Fig. 3 is a horizontal cross-sectional view showing an example of the configuration of the via conductor 4 according to the embodiment.

[0021] 2 and 3, the via conductor 4 has a columnar shape, for example, a substantially cylindrical shape. The via conductor 4 also has a continuous phase 5 and a core portion 6.

[0022] The continuous phase 5 is located along the side surface 4a of the via conductor 4 having a columnar shape, and has a predetermined thickness from the side surface 4a toward the center. That is, the continuous phase 5 is in the shape of a strip having a length L corresponding to the thickness T of the insulating layer 2 in the vertical cross-sectional view, as shown in FIG.

[0023] Fig. 4 is a diagram showing an example of the arrangement of crystallites 9 in a via conductor 4 according to an embodiment. As shown in Fig. 4, the continuous phase 5 has a plurality of crystallites 9 of metal particles constituting the metal portion 7 (see Fig. 5), and these crystallites 9 are continuously connected. That is, the metal portion 7 included in the via conductor 4 has a band-shaped continuous phase 5 in a vertical cross-sectional view near the side surface 4a of the via conductor 4 (see Fig. 2).

[0024] Here, the crystallites 9 of the metal particles include those that are polygonal in cross section. As shown in Fig. 4, the multiple crystallites 9 are in contact with each other at the linear sides of the polygonal crystallites 9. The metal part 7 formed by such polygonal crystallites 9 is in a state in which the crystallites 9 are integrally connected without any intervening gaps such as voids or foreign matter such as ceramic particles.

[0025] Here, a method for determining the region of the belt-shaped continuous phase 5 will be described below. Note that the method for identifying the dividing line 5A (see FIG. 5) described below is merely one example. The belt-shaped continuous phase 5 has a basic shape of a so-called rectangular (or oblong) shape, the length of which is equal to the thickness direction of the insulating layer 2 when the via conductor 4 is viewed in vertical cross section as shown in FIG. 2, but is not limited to this and also includes cases where both side surfaces of the continuous phase 5 are uneven.

[0026] In this case, the unevenness is due to the external shape of the particles constituting at least one of the metal portion 7 and the ceramic portion 8 included in the via conductor 4. Therefore, when the average roughness Ra of both side surfaces of the continuous phase 5 is measured, there may be some portions that are smaller than the average particle diameter of the particles (or crystallites) constituting at least one of the metal portion 7 and the ceramic portion 8 included in the via conductor 4.

[0027] Here, the two side surfaces of the continuous phase 5 refer to one surface that is in contact with the insulating layer 2 and the other surface that is in contact with the core portion 6. When a portion of the continuous phase 5 is specified in the via conductor 4, one side surface of the continuous phase 5 in the width direction becomes the interface between the continuous phase 5 and the insulating layer 2. The opposite side surface (the other side surface) may be a partition line 5A as shown in FIG.

[0028] In this case, the partition line 5A is a line that linearly connects in the thickness direction a plurality of particulate ceramic parts 8 contained in the via conductor 4. The position at which the partition line 5A is drawn in the ceramic parts 8 is on the continuous phase 5 side of the ceramic parts 8 when the via conductor 4 is viewed in vertical cross section, as shown in FIG.

[0029] That is, the position where the partition line 5A is drawn in the ceramic part 8 is the surface of the ceramic part 8 on the continuous phase 5 side. In terms of Fig. 5, the position where the partition line 5A is drawn in the ceramic part 8 is the position on the left surface of the ceramic part 8 that is the contact point with the continuous phase 5. In this case, the ceramic part 8 to be selected has an average particle size of 200 (nm) or more.

[0030] There may be ceramic portions 8 with a maximum diameter of 200 nm or less present within the continuous phase 5, but it is preferable that the proportion of ceramic portions 8 in the continuous phase 5 be smaller near the insulating layer 2, which is on the outer periphery of the via conductor 4, than near the core portion 6.

[0031] Here, the ratio of the ceramic portion 8 may be a ratio by number, in addition to a ratio by volume or an area. This is because the portion of the via conductor 4 close to the insulating layer 2 is a portion where the skin effect becomes prominent at higher frequencies.

[0032] For this reason, it is preferable that the via conductor 4 has a lower proportion of the ceramic portion 8 in the portion closer to the insulating layer 2. For example, when the continuous phase 5 is divided into two equal parts in the width direction between the interface with the insulating layer 2 and the dividing line 5A, it is preferable that the portion on the insulating layer 2 side has a lower proportion of the ceramic portion 8 than the portion on the core portion 6 side.

[0033] 5, even if the continuous phase 5 contains minute ceramic parts 8 with a maximum diameter of a few nm, it is better for these minute ceramic parts 8 to be located closer to the core part 6 than to the insulating layer 2. It is preferable that the vicinity of the outer periphery of the via conductor 4 is a phase in which the presence of minute ceramic parts 8 with a maximum diameter of a few nm is not observed.

[0034] 2 and 3, the core portion 6 is disposed inside the continuous phase 5 in the via conductor 4 having a columnar shape. The core portion 6 includes a mixture of a metal portion 7 and a ceramic portion 8 (see FIG. 5).

[0035] As described above, in the embodiment, the continuous phase 5 located along the thickness direction of the insulating layer 2 is disposed in the via conductor 4 through which a current flows along the thickness direction of the insulating layer 2. This allows a good conductive path to be formed by the continuous phase 5 in the vicinity of the interface between the via conductor 4 and the insulating layer 2.

[0036] Therefore, according to the embodiment, the interface conductivity of the via conductor 4 can be increased.

[0037] In the embodiment, the length of the continuous phase 5 may be the same as the thickness T of the insulating layer 2 in a vertical cross-sectional view. This allows the continuous phase 5 to form a better conductive path inside the via conductor 4.

[0038] Therefore, according to the embodiment, the interface conductivity of the via conductor 4 can be further increased.

[0039] 2, when the average width of the via conductors 4 is W0 and the average width of the continuous phase 5 is W1, W1 / W0 may be 0.01 or more and 0.5 or less. This allows the width of the continuous phase 5 penetrating the insulating layer 2 in the thickness direction to be widened, thereby further increasing the interfacial conductivity of the via conductors 4.

[0040] 2, in the case of viewing the via conductor 4 in vertical cross section, the continuous phase 5 may be disposed at both ends of the via conductor 4 in the width direction. That is, in the case of the embodiment, the continuous phase 5 may be located along the interface between the via conductor 4 and the insulating layer 2, and the core portion 6 may be located inside the continuous phase 5 to form a core-shell structure.

[0041] This makes it possible to increase the electrical conductivity in the vicinity of the interface between the via conductor 4 and the insulating layer 2, thereby increasing the interface electrical conductivity of the via conductor 4 in the high frequency range.

[0042] In this disclosure, the end portion in the width direction of the via conductor 4 refers to the range of length from the end portion in the width direction of the via conductor 4 (i.e., the side surface 4a of the via conductor 4) toward the inside of the via conductor 4, which is 1 μm or more and 10 μm or less.

[0043] In the embodiment, the area ratio of the metal portion 7 in the via conductor 4 may be 60(%) or more. This can increase the conductivity of the core portion 6 in addition to the via conductor 4, thereby increasing the conductivity of the entire via conductor 4.

[0044] In this case, the upper limit of the area ratio of the metal portion 7 inside the via conductor 4 is 100%, but the via conductor 4 may contain a ceramic component to improve adhesion between the via conductor 4 and the insulating layer 2. For this reason, the upper limit of the area ratio of the metal portion 7 inside the via conductor 4 may be 99%. Furthermore, in order to firmly adhere the entire side surface of the via conductor 4 to the insulating layer 2, the upper limit of the area ratio of the metal portion 7 inside the via conductor 4 may be 90% or 80%.

[0045] In the present disclosure, the area ratio of metal portion 7 inside via conductor 4 is calculated by A1 / A0, where A0 is the area of ​​the region observed in vertical cross section of via conductor 4 and A1 is the area occupied by metal portion 7 in that region.

[0046] In an embodiment, the continuous phase 5 of the via conductor 4 may contain silicon oxide components 10 (see FIG. 7) having a size of 10 (nm) or more and 50 (nm) or less. This makes it possible to increase the adhesion between the continuous phase 5 and the ceramic insulating layer 2 adjacent to the continuous phase 5 by the silicon oxide components 10. Here, the size refers to the maximum diameter of the silicon oxide components 10 seen in the cross section of the via conductor 4.

[0047] Therefore, according to the embodiment, it is possible to improve the reliability of the wiring board 1. Furthermore, in the embodiment, since the silicon oxide component 10 has a minute size, it is possible to reduce a decrease in the interfacial conductivity of the continuous phase 5.

[0048] In an embodiment, the continuous phase 5 may include polygonal crystallites 9 as shown in Fig. 4. In an embodiment, adjacent crystallites 9 may be in contact with each other along linear sides of the crystallites 9, which serve as grain boundaries.

[0049] As a result, even if tiny silicon oxide components 10 are present at the interface between crystallites 9, the contact area between crystallites 9 can be increased, thereby further increasing the interfacial conductivity of via conductor 4 in the high frequency range.

[0050] In the embodiment, it is preferable that the crystallites 9 having a size of 0.5 μm or more and 6.0 μm or less account for 90% or more in terms of number ratio.

[0051] In the present disclosure, the polygonal crystallite 9 refers to a crystallite having two or more straight sides. In the present disclosure, the crystallite 9 can be observed, for example, by analyzing a polished surface using an electron backscattered diffraction pattern (EBSD) method.

[0052] In addition, in the embodiment, the relative dielectric constant of the insulating layer 2 may be not less than 5 and not more than 7. This can further increase the interface conductivity of the via conductor 4 in the high frequency range.

[0053] [Example] Specifically, wiring boards 1 of the example and the comparative example were fabricated, and the differences in various characteristics were evaluated.

[0054] As an example, first, a mixture of 40 (wt%) alumina particles and 60 (wt%) borosilicate glass was prepared as the material for the insulating layer 2. This mixture is a glass ceramic raw material with a firing temperature of 900°C or more and 1000°C or less.

[0055] In addition, 20 parts by mass of isobutyl methacrylate resin and dibutyl phthalate were used as an organic binder for 100 parts by mass of the glass ceramic raw material, and a green sheet having a thickness of 100 μm was produced by doctor blade molding.

[0056] In addition, copper powder with an average particle size of 2 μm, borosilicate glass powder with an average particle size of 2 μm, and silica (silicon oxide) particles with an average particle size of 20 nm were prepared as the raw materials for the via conductor 4. The percentage of the integrated amount of the silica particles with a lower limit of 10 nm and an upper limit of 30 nm was 70% or more. The copper powder used had a purity of 99.9%.

[0057] The organic binder was a mixed solvent of isobutyl methacrylate resin, butyl carbitol acetate, and dibutyl phthalate. A conductor paste containing copper powder, borosilicate glass powder, and silica particles was prepared by adding 5 parts by mass of isobutyl methacrylate resin to 100 parts by mass of copper powder, and then adding a mixed solvent of butyl carbitol acetate and dibutyl phthalate.

[0058] The amounts of glass powder and silica particles added shown in Table 1 are all percentages relative to 100 parts by mass of copper powder.

[0059] The amount of glass powder added in the comparative sample is high at 20.5 parts by mass because, in conventional via conductors, gaps are likely to form between the via conductor formed after firing and the insulating layer 2 unless a conductor paste containing this amount of glass powder is used.

[0060] In other words, the conductive paste of the embodiment contains fine silica particles, so the amount of glass powder added can be reduced. Therefore, even with a composition with a small amount of glass powder added as shown in the embodiment, it is possible to form via conductors 4 with a high filling rate such that the metal parts 7 form a continuous phase 5.

[0061] In this case, it may be possible to confirm that the silica particles are still present in the via conductors 4 even after firing.

[0062] The area ratio of the silica particles in the cross section of the via conductor 4 is about 0.002(%) to 0.01(%). The area ratio of the glass phase in the cross section of the via conductor 4 is about 10 times the area ratio of the silica particles, for example, 0.02(%) to 0.1(%). Therefore, the remainder in the via conductor 4 is the metal portion 7 and the ceramic portion 8.

[0063] The ceramic portion 8 is a glass ceramic whose precursor is alumina particles and borosilicate glass that were originally contained in the green sheet that will become the insulating layer 2 after firing. It is believed that this glass ceramic migrates from the insulating layer 2 side to the via conductor 4 side during firing.

[0064] Then, through holes were formed in advance in the prepared green sheet, and the through holes were filled with a conductive paste by a screen printing method. That is, a substantially cylindrical conductive paste was printed so as to penetrate the green sheet. Next, the conductive paste was printed in a predetermined area on both surfaces of the prepared green sheet including the through holes, and then fired. In this way, the wiring conductor according to the embodiment was obtained.

[0065] The firing process was carried out in a reducing atmosphere using a hydrogen-nitrogen mixed gas, with a maximum temperature of 930° C. and a holding time of 2 hours. A plurality of green sheets were stacked to a thickness of 500 μm.

[0066] On the other hand, the wiring board 1 according to the comparative example was produced in the same manner as the wiring board 1 according to the above-mentioned example, except that no silica particles were added to the conductive paste. In the example and comparative example, the mixing ratio of the borosilicate glass powder and the silica particles in the conductive paste is the value shown in Table 1 below, and is appropriately adjusted so that the wiring board 1 is not damaged after the firing process.

[0067] Here, as shown in Table 1, compared to the comparative example in which the conductive paste does not contain minute silica particles, in the embodiment containing silica particles, even when the proportion of borosilicate glass powder is reduced (i.e., the proportion of copper powder is increased), the wiring board 1 can be formed without being damaged during firing.

[0068] The reason for this is presumed to be as follows. Before the firing process, fine silica particles adhere to the copper powder, which shifts the necking start temperature of the copper powder to a higher temperature. This makes it possible to align the necking start temperature of the copper powder, which is the main component of the via conductor 4, with the necking start temperature of the glass ceramic powder, which is the main component of the insulating layer 2.

[0069] Therefore, in the embodiment, by adding fine silica particles to the conductive paste, even if the ratio of borosilicate glass powder is reduced, damage due to thermal contraction after firing can be reduced. As shown as a comparative example in Table 1, the conventional via conductor is made by adding 20.5 parts by mass of borosilicate glass powder.

[0070] Next, the obtained wiring board 1 was cut, and the interface between the insulating layer 2 and the via conductor 4 and its vicinity were observed by SEM (Scanning Electron Microscope). Figures 5 and 7 are SEM observation photographs of the via conductor 4 according to the example, and Figure 6 is a SEM observation photograph of the via conductor 4 in the comparative example.

[0071] 5, in the example, a continuous phase 5 was present in the via conductor 4 and was located along the thickness direction of the insulating layer 2. Moreover, the continuous phase 5 was strip-shaped and had a length L (see FIG. 2) equivalent to the thickness T (see FIG. 2) of the insulating layer 2.

[0072] In the present embodiment, the average width W0 (see FIG. 2) of the via conductors 4 was about 80 μm, and the average width W1 (see FIG. 2) of the continuous phase 5 was about 2 μm. The range of the band-shaped continuous phase 5 was determined by marking the via conductors 4 shown in the SEM photograph with a dividing line 5A as shown in FIG.

[0073] On the other hand, as shown in FIG. 6, in the comparative example, no band-shaped continuous phase 5 was observed in the via conductor 4.

[0074] The reason why the band-shaped continuous phase 5 was formed in the via conductor 4 in the wiring board 1 according to the embodiment is presumed to be as follows: During the firing process, the copper powder in the via conductor 4 that is in contact with the glass ceramic powder of the green sheet has a lower apparent melting point than the copper powder in other parts.

[0075] Furthermore, in the copper powder of the via conductors 4 in contact with the green sheet, the copper particles are easily turned into a film by the silica particles of the fine powder, so that a band-like continuous phase 5 is formed.

[0076] 7, in the via conductor 4 of the wiring board 1 according to the example, silicon oxide components 10 were observed between adjacent copper crystallites 9 in the continuous phase 5. Such silicon oxide components 10 are presumed to be due to finely powdered silica particles.

[0077] In addition, the SEM photographs of the via conductors 4 in the examples and comparative examples were used to determine the ratio (area ratio) of the metal portion 7 in the entire via conductor 4. Specifically, the obtained SEM photographs were converted into a binary image with a predetermined brightness (for example, brightness 50%) or more and a predetermined brightness or less, and the ratio of the number of pixels with a predetermined brightness or more to the total number of pixels in the binary image was calculated to obtain the area ratio of the metal portion 7.

[0078] Next, the interfacial conductivity of the wiring board 1 in the example and the comparative example was measured by the dielectric cylindrical resonator method described below.

[0079] The method for measuring interfacial conductivity using the dielectric cylinder resonator method is a method for measuring the conductivity at the interface between a conductor and an insulating layer, i.e., at the conductor interface, by attaching an insulating layer having a conductor formed therein to both end faces or one end face of a dielectric cylinder made of a dielectric material with known relative dielectric constant and dielectric loss in a predetermined relationship to form a dielectric resonator.

[0080] The principle of this measurement method is that when an electromagnetic resonator is constructed by sandwiching a conductor plate (usually a conductor plate having a diameter D about three times the diameter d of the dielectric cylinder) that is large enough to ignore the edge effect, parallel to both end faces of a dielectric cylinder having a predetermined dimensional ratio (height h / diameter d), the high-frequency current flowing in the conductor plate due to the TEomn resonance mode (hereinafter referred to as the TEomn mode) is distributed only on the short-circuit surface, i.e., the opposing surface between the dielectric and the conductor.

[0081] In a dielectric resonator, the high-frequency current flowing in the conductor due to the TEomn mode (m = 1, 2, 3..., n = 1, 2, 3...) is distributed only at the interface between the conductor and the dielectric substrate in contact with the dielectric cylinder, and by utilizing this, the interfacial conductivity can be calculated from the measured resonant frequency f0 of the TEomn mode (m = 1, 2, 3..., n = 1, 2, 3...), and the unloaded Q and Qu. The interfacial conductivity was measured at a frequency of 6 (GHz).

[0082] Table 1 shows the amounts of glass powder and silica particles added in the conductive paste, which is the raw material of the via conductor 4, the measurement results of the interfacial conductivity at a frequency of 6 GHz, and the measurement results of the proportion of the metal part 7 in the via conductor 4 for the examples and comparative examples. Note that the measurement results of the interfacial conductivity at a frequency of 6 (GHz) are relative values ​​when the interfacial conductivity in direct current is set to 100 (%).

[0083] [Table 1]

[0084] By comparing an embodiment in which a band-shaped continuous phase 5 is arranged in the via conductor 4 with a comparative example in which such a continuous phase 5 is not arranged, it can be seen that the arrangement of the band-shaped continuous phase 5 in the via conductor 4 increases the interfacial conductivity of the via conductor 4 in the high frequency range.

[0085] Furthermore, by comparing an embodiment in which silica particles were added to the conductive paste, which is the raw material of the via conductor 4, with a comparative example in which silica particles were not added, it was found that by adding silica particles to the conductive paste, the proportion of the metal portion 7 can be increased to 60% or more.

[0086] Although the embodiment of the present invention has been described above, the present invention is not limited to the above embodiment, and various modifications are possible without departing from the spirit of the present invention. For example, in the above embodiment, an example in which fine powder of silica (silicon oxide) particles is added to the conductive paste, which is the raw material of the via conductor 4, is shown, but the present disclosure is not limited to such an example.

[0087] For example, ceramic fine powder other than silica (such as alumina fine powder) may be added to the conductive paste, which also provides the same effects as the above embodiment.

[0088] On the other hand, by using a fine powder of silica particles, which is the same component as that contained in the glass ceramics (here, borosilicate glass) of the insulating layer 2, the adhesion between the insulating layer 2 and the via conductors 4 can be improved, thereby increasing the reliability of the wiring board 1.

[0089] Further advantages and other aspects may readily occur to those skilled in the art. Thus, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described above. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and equivalents thereof. [Explanation of symbols]

[0090] 1. Wiring board 2. Insulation layer 3 Conductor Layer 4 Via conductor 5. Continuous Phase 6 Core 7 Metal Parts 8. Ceramics Department 9. Crystallite 10. Silicon oxide component L Length T Thickness W0, W1 average width

Claims

1. An insulating layer made of ceramics; a via conductor penetrating the insulating layer in a thickness direction; Equipped with the via conductor includes a metal portion and a ceramic portion, the metal portion is made of a metal and has a continuous phase of the metal located along a thickness direction of the insulating layer in a vertical cross-sectional view; When the average width of the via conductor is W0 and the average width of the continuous phase is W1, W1 / W0 is 0.01 or more and 0.5 or less. Wiring board.

2. An insulating layer made of ceramics; a via conductor penetrating the insulating layer in a thickness direction; Equipped with the via conductor includes a metal portion and a ceramic portion, the metal portion is made of a metal and has a continuous phase of the metal located along a thickness direction of the insulating layer in a vertical cross-sectional view; The area ratio of the metal portion in the via conductor is 60% or more and 99% or less. Wiring board.

3. An insulating layer made of ceramics; a via conductor penetrating the insulating layer in a thickness direction; Equipped with the via conductor includes a metal portion and a ceramic portion, the metal portion is made of a metal and has a continuous phase of the metal located along a thickness direction of the insulating layer in a vertical cross-sectional view; The continuous phase contains a silicon oxide component having a size of 10 (nm) or more and 50 (nm) or less. Wiring board.

4. An insulating layer made of ceramics; a via conductor penetrating the insulating layer in a thickness direction; Equipped with the via conductor includes a metal portion and a ceramic portion, the metal portion is made of a metal and has a continuous phase of the metal located along a thickness direction of the insulating layer in a vertical cross-sectional view; The continuous phase contains polygonal crystallites. Wiring board.

5. The plurality of crystallites are in contact with each other along linear sides of the polygonal crystallites. The wiring board according to claim 4 .

6. The polygonal crystallites are crystallites having two or more straight sides. The wiring board according to claim 5 .

7. An insulating layer made of ceramics; a via conductor penetrating the insulating layer in a thickness direction; Equipped with the via conductor includes a metal portion and a ceramic portion, the metal portion is made of a metal and has a continuous phase of the metal located along a thickness direction of the insulating layer in a vertical cross-sectional view; The continuous phase contains a plurality of crystallites of metal particles constituting the metal portion, and the plurality of crystallites are continuously connected to each other. Wiring board.

8. An insulating layer made of ceramics; a via conductor penetrating the insulating layer in a thickness direction; Equipped with the via conductor includes a metal portion and a ceramic portion, the metal portion is made of a metal and has a continuous phase of the metal located along a thickness direction of the insulating layer in a vertical cross-sectional view; The metal portion has a core-shell structure in which a core portion is located inside the continuous phase, the ceramic portion is present within the continuous phase, and when the via conductor is viewed in cross section, the area ratio of the ceramic portion is smaller on an outer periphery side than on a core portion side of the via conductor; Wiring board.

9. An insulating layer made of ceramics; a via conductor penetrating the insulating layer in a thickness direction; Equipped with the via conductor includes a metal portion and a ceramic portion, the metal portion is made of a metal and has a continuous phase of the metal located along a thickness direction of the insulating layer in a vertical cross-sectional view; The continuous phase has crystallites having a size of 0.5 μm or more and 6.0 μm or less in a number ratio of 90(%) or more. Wiring board.

10. The length of the continuous phase is the same as the thickness of the insulating layer when viewed in vertical cross section. The wiring board according to claim 1 .

11. When the via conductor is viewed in vertical cross section, the continuous phase is disposed at both ends of the via conductor in the width direction. The wiring board according to claim 1 .

12. The end of the via conductor in the width direction has a length in the range of 1 (μm) or more and 10 (μm) or less from the side surface of the via conductor toward the inside of the via conductor. The wiring board according to claim 11 .

13. The continuous phase is located near and along the interface between the insulating layer and the via conductor. The wiring board according to claim 1 .

14. The metal portion has a core-shell structure in which a core portion is located inside the continuous phase. The wiring board according to claim 1 .

15. The continuous phase is located along a side surface of the via conductor having a columnar shape, and has a predetermined thickness from the side surface toward the center. The wiring board according to claim 1 .

16. The metal portion has the continuous phase in a band shape in a vertical cross-sectional view in the vicinity of a side surface of the via conductor. The wiring board according to claim 1 .

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