Apparatus and method for tool mark free stitch bonding - Patents.com

Abstract

To provide an apparatus and a method for stitch-bonding without a tool mark.SOLUTION: A method for wire bonding includes the steps of: feeding a wire 40 through a capillary tip 22 and attaching a first end of the wire to a first location (bond pad 44), thereby forming a ball bond; moving the capillary tip towards a second location while the wire feeds out of the capillary tip; attaching a second end of the wire to the second location (lead finger 50) while preventing contact between the capillary tip and the second location, thereby forming a stitch bond without a tool mark at the second location.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] Cross - Reference to Related Applications This application claims priority based on U.S. Provisional Application No. 63 / 130,376, filed on December 23, 2020, entitled APPARATUS AND METHODS FOR TOOL MARK FREE STITCH BONDING, and the entire disclosure thereof is hereby expressly incorporated by reference herein.

[0002] Background Field This disclosure relates to wire bonding of semiconductor devices.

Background Art

[0003] Description of Related Art Wire bonding is a technique for electrical interconnection that uses a thin wire and a combination of heat, pressure, and / or ultrasonic energy. Wire bonding is a solid - phase welding process that directly contacts two metal materials (e.g., the wire and the pad surface, or the wire and the PCB lead surface). When these materials are in direct contact, electron sharing or atomic inter - diffusion occurs, resulting in the formation of a wire bond.

Summary of the Invention

Means for Solving the Problems

[0004] Summary In some implementations, the present disclosure relates to a wire bonding method. The method includes supplying a wire through a capillary tip and forming a ball bond by attaching a first end of the wire to a first position. The method further includes moving the capillary tip toward a second position while supplying the wire from the capillary tip. The method further includes forming a stitch bond at the second position without tool marks by attaching a second end of the wire to the second position while preventing the capillary tip from contacting the second position.

[0005] In some embodiments, the method may further include, after forming the stitch bond, contacting the second end of the wire with the capillary tip.

[0006] In some embodiments, the method may further include determining effective bonding parameters before forming the stitch bond, the bonding parameters including one or more of impact force, bonding force, ultrasonic energy level, pressure, and temperature.

[0007] In some embodiments, the first position may be a bond pad on a semiconductor die, and the second position may be a lead finger on a printed circuit board. The lead finger on the printed circuit board may be a thin plate-like lead finger. The thin plate-like lead finger may be formed of nickel, gold, and palladium.

[0008] According to some embodiments, the present disclosure relates to a wire bonding system including a handling device configured to place a semiconductor die on a circuit board. The wire bonding system further includes a wire bonding device configured to form a ball bond by feeding a wire through a capillary tip and attaching a first end of the wire to a first position. The wire bonding device is further configured to move the capillary tip toward a second position while feeding the wire from the capillary tip. The wire bonding device is further configured to form a stitch bond at the second position without tool marks by attaching a second end of the wire to the second position while preventing the capillary tip from contacting the second position.

[0009] In some embodiments, the wire bonding device may further be configured to contact the second end of the wire with the capillary tip after forming the stitch bond.

[0010] In some embodiments, the wire bonding device may further be configured to determine effective bonding parameters before forming the stitch bond, the bonding parameters including one or more of impact force, bonding force, ultrasonic energy level, pressure, and temperature.

[0011] In some embodiments, the first position may be a bond pad on the semiconductor die, and the second position may be a lead finger on the printed circuit board. The lead finger on the printed circuit board may be a thin plate-like lead finger. The thin plate-like lead finger may be formed of nickel, gold, and palladium.

[0012] In some teachings, the present disclosure relates to a wire bonding method. The method includes forming a ball bond on a surface at a first position and a stitch bond on a surface at a second position by supplying a wire from a distal end of a capillary tool using the capillary tool. The method further includes preventing contact between the distal end of the capillary tool and the surface at the second position during the formation of the stitch bond.

[0013] In some embodiments, the method may further include strengthening the stitch bond by contacting the stitch bond with the distal end of the capillary tool.

[0014] In some embodiments, forming a ball bond using a capillary tool may include exposing a first end of a wire from the distal end of the capillary tool and attaching the first end of the wire to the surface at the first position. The first position may be a bond pad on a semiconductor die.

[0015] In some embodiments, forming a stitch bond using a capillary tool may include moving the distal end of the capillary tool toward a second position while supplying a wire from the distal end of the capillary tool and attaching a second end of the wire to the second position while preventing a tool mark from occurring at the second position by preventing contact between the distal end of the capillary tool and the second position. The second position may be a lead finger of a printed circuit board.

[0016] According to some implementations, the present disclosure relates to a wire bonding system including a handling device configured to place a semiconductor die on a circuit board. The wire bonding system further includes a wire bonding device including a capillary tool configured to form a ball bond on the surface at a first position and a stitch bond on the surface at a second position by feeding a wire from a distal end of the capillary tool. The wire bonding device is configured to prevent contact between the distal end of the capillary tool and the surface at the second position during formation of the stitch bond.

[0017] In some embodiments, the wire bonding device may further be configured to strengthen the stitch bond by contacting the stitch bond with the distal end of the capillary tool.

[0018] In some embodiments, the wire bonding device may be configured to form a ball bond by exposing a first end of the wire from the distal end of the capillary tool and attach the first end of the wire to the surface at the first position. The first position may be a bond pad on the semiconductor die.

[0019] In some embodiments, the wire bonding device may be configured to form a stitch bond by moving the distal end of the capillary tool toward the second position while feeding the wire from the distal end of the capillary tool, and attach a second end of the wire to the second position while preventing a tool mark from occurring at the second position by preventing contact between the distal end of the capillary tool and the second position. The second position may be a lead finger of a printed circuit board.

[0020] To summarize the present disclosure, some aspects, advantages, and novel features of the present invention have been described herein. It must be understood that not all of such advantages may be achieved in accordance with any particular embodiment of the present invention. Thus, the present invention can be practiced or carried out in a manner that realizes or optimizes one advantage or a group of advantages taught herein, without necessarily realizing other advantages that may be taught or suggested herein.

Brief Description of the Drawings

[0021]

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Best Mode for Carrying Out the Invention

[0022] Detailed Description of Some Embodiments If a heading is provided in this specification, it is for convenience only and does not necessarily affect the scope or meaning of the claimed invention.

[0023] This specification describes various examples of systems, devices, structures, materials, and / or methods related to wire bonding associated with semiconductor devices. Wire bonding is a technique for electrical interconnection that uses a thin wire and a combination of heat, pressure, and / or ultrasonic energy. Wire bonding is a solid-phase welding process that directly contacts two metal materials (e.g., a wire and a pad surface, or a wire and a PCB lead surface). When these materials are in direct contact, electron sharing or atomic interdiffusion occurs, resulting in the formation of a wire bond.

[0024] Typical wire bonding operations are shown in FIGS. 1, 2, 3, and 4. As shown in FIG. 1, a wire 40, typically made of gold or copper, is passed through a hole 20 in a capillary tip 22. By heating the end of the wire 40, a ball 42 made of molten metal is formed at the end of the wire 40.

[0025] As shown in FIG. 2, the capillary tip 22 is lowered toward a bond pad 44 on the active surface of a semiconductor device 46. The ball 42 of molten metal is pressed against the bond pad 44 by the capillary tip 22, and the wire 40 is joined to the bond pad 44 by alloying the metal elements of the wire 40 and the bond pad 44, forming a ball bond. Optionally, ultrasonic vibration is applied to the capillary tip 22 when pressing the molten metal ball 42 at the end of the wire 40 against the bond pad 44.

[0026] Referring to FIG. 3, the capillary chip 22 is then raised to supply the wire 40 through the hole in the capillary chip 22 and move it to the bonding site on the lead finger 50 of the lead frame mounted on the substrate layer 48. By pressing the wire 40 against the lead finger 50, the metal elements of the wire 40 and the lead finger 50 are alloyed to bond the wire 40 to the lead finger 50 and form a stitch bond. If necessary, ultrasonic vibration may be applied to the capillary chip 22 when pressing the wire 40 against the lead finger 50.

[0027] Referring to FIG. 4, when the capillary chip 22 is raised from the bonding site on the lead finger 50, as a result, a wire bond connection is obtained between the bond pad 44 of the semiconductor device 46 and the lead finger 50 on the substrate layer 48.

[0028] As shown in FIG. 5, the contact between the capillary chip 22 and the lead finger 50, which was described with reference to FIG. 3, results in tool marks 60. The tool marks 60 are imprints of the outer shape of the capillary chip 22.

[0029] Note that the lead finger 50 may be a thin plate-like lead finger made of a very thin layer of metal (such as nickel, gold, and palladium) that is vulnerable to damage. Therefore, when the capillary chip 22 comes into contact with the lead finger 50, oxidation or contamination may occur.

[0030] As shown in FIG. 6, when a wire tension test is performed on the stitch bond, a small amount of wire material remains on the lead finger 50.

[0031] FIG. 7 shows an example of a stitch bond formed on wire 40 on lead finger 50, the stitch bond being formed without creating tool marks. In some embodiments, such tool mark-free stitch bonds are made using procedures (described in more detail below) that avoid contact between capillary tip 22 and lead finger 50.

[0032] A wire tensile test of the tool mark-free stitch bond of FIG. 7 shows that the tool mark-free stitch bond is much stronger (requiring a tensile force of, for example, about 8 grams) than a typical stitch bond (requiring a tensile force of, for example, about 6-7 grams). The strengthened tool mark-free stitch bond can be seen in FIG. 8, which shows that a greater amount of wire material remains on the lead after the tensile test.

[0033] A comparison of FIG. 8 and FIG. 6 shows that the tool mark-free stitch bond enhances strength and reliability compared to a typical stitch bond formed by contacting lead finger 50 with capillary tip 22. For example, in FIG. 6, part of the stitch bond itself is damaged during the tensile test, while in FIG. 6, part of wire 40 itself is damaged during the tensile test, but the tool mark-free stitch bond remains intact for lead finger 50.

[0034] In some embodiments, the strength of the tool mark-free stitch bonds described herein may be enhanced by contacting the stitch bond with capillary tip 22 after formation of the stitch bond. For example, FIG. 9A shows a tool mark-free stitch bond, and FIG. 9B shows the tool mark-free stitch bond after impacting the capillary tip. As shown in FIG. 9B, this double impact creates a cup or depression 70 on the stitch bond, forming a more secure stitch bond.

[0035] In some embodiments, one or more bonding parameters may be optimized or selected to minimize or reduce contact between the capillary tip 22 and the lead finger 50, thereby forming a stitch bond without creating tool marks. Such bonding parameters may include impact force, bonding force, ultrasonic energy level, pressure, and temperature.

[0036] For example, FIG. 10 shows a timing graph 100 of a method used to create a stitch bond without tool marks. During period t1, a stitch bond without tool marks is formed. During period t2, any security stitch bond can be formed.

[0037] In the example of FIG. 10, the first line 110 shows the movement of the capillary tip relative to the semiconductor device. During the bonding period t1, the position of the capillary tip is closest to the lead finger but does not make contact. During the security bonding period t2 as well, the position of the capillary tip is closest to the lead finger.

[0038] The second line 120 represents the bonding force between the capillary tip and the lead finger. The bonding force is highest during the bonding period t1.

[0039] The third line 130 represents the ultrasonic energy level. The ultrasonic energy level is highest during part or all of the bonding period t1 and during part or all of the security stitch bond period t2.

[0040] FIG. 11 shows the steps in a process 200 that can be implemented to obtain a wire bond having one or more features described herein. The process 200 described herein can provide for bonding of a wire to a semiconductor device without creating tool marks.

[0041] In some embodiments, process 200 may include or may be provided with a wire supplied through a capillary tip, as in the example shown in FIG. 1. In step 210, a ball bond is created by attaching a first end of the wire to a first location on a substrate. The substrate may be a packaging substrate, a semiconductor substrate (such as bond pads 44 on semiconductor die 46 shown in FIGS. 1 and 2), and the like.

[0042] In step 220, the capillary tip is moved toward a second location while feeding the wire from the capillary tip. The second location may be a packaging substrate (such as PCB lead fingers 50 shown in FIGS. 3 and 4), a semiconductor substrate, and the like.

[0043] In step 230, the second end of the wire is joined to the second location while preventing the capillary tip from contacting the second location. In this way, a stitch bond is created and tool marks at the location of the stitch bond are prevented.

[0044] In operation step 240, after the formation of the stitch bond, the capillary tip is brought into contact with the second end of the wire in order to increase the strength of the stitch bond.

[0045] In some embodiments, bonding parameters effective for forming the stitch bonds described herein may be determined while preventing tool marks at the stitch bond sites. In some embodiments, such bonding parameters may be determined prior to step 210.

[0046] In some embodiments, some or all of the wire bonding operations described herein may be controlled by one or more computers. Such a computer may obtain the above-described bonding parameters and apply such parameters during the control of the wire bonding operations.

[0047] Although the present disclosure describes various features, no single one of those features is responsible for the advantages described herein on its own. As will be apparent to those skilled in the art, it should be understood that the various features described herein may be combined, modified, or omitted. Combinations and sub-combinations other than those specifically described herein will be apparent to those skilled in the art and are intended to form part of the present disclosure. In this specification, various methods are described in relation to the steps and / or stages of various flowcharts. In many cases, it should be understood that specific steps and / or stages may be combined together so that multiple steps and / or stages shown in a flowchart can be performed as a single step and / or stage. Also, specific steps and / or stages may be divided into additional sub-elements to be performed separately. In some cases, the order of steps and / or stages may be rearranged, and specific steps and / or stages may be completely omitted. Also, the methods described herein are to be understood as open-ended so that additional steps and / or stages with respect to those shown and described herein can also be performed.

[0048] Some aspects of the systems and methods described herein can be advantageously implemented using, for example, computer software, hardware, firmware, or any combination of computer software, hardware, and firmware. The computer software can include computer-executable code stored on a computer-readable medium (e.g., a non-transitory computer-readable medium) that, when executed, implements the functions described herein. In some embodiments, the computer-executable code is executed by one or more general-purpose computer processors. Those skilled in the art will recognize that any features or functions that can be implemented using software executed on a general-purpose computer can also be implemented using different combinations of hardware, software, or firmware, in light of the present disclosure. For example, such modules can be fully implemented in hardware using a combination of integrated circuits. Alternatively or in addition, such features or functions can be fully or partially implemented using a dedicated computer designed to perform the specific functions described herein, rather than a general-purpose computer.

[0049] The plurality of distributed computing devices can be replaced with any one of the computing devices described herein. In such distributed embodiments, the functions of the one computing device are distributed (e.g., via a network) such that some functions are executed at each of the distributed computing devices.

[0050] Some embodiments may be described with reference to equations, algorithms, and / or flowcharts. These methods may be implemented using computer program instructions executable on one or more computers. Further, these methods may be separately implemented as a computer program product, or may be implemented as a component of an apparatus or system. In this regard, each equation, algorithm, block, or flowchart step, and combinations thereof, may be implemented by hardware, firmware, and / or software including one or more computer program instructions in computer-readable program code logic. As will be appreciated, any such computer program instructions may be loaded onto one or more computers, which include, but are not limited to, general purpose computers or special purpose computers, or other programmable processing apparatuses for manufacturing machines, and the computer program instructions executed on the computer or other programmable processing apparatus implement the functions specified in the equations, algorithms, and / or flowcharts. Also, it should be understood that each block in each equation, algorithm, and / or flowchart diagram, and combinations thereof, may be implemented by a dedicated hardware-based computer system that performs the specified function or step, or by a combination of dedicated hardware and computer-readable program code logic means.

[0051] Furthermore, for example, computer program instructions, which are implemented in computer-readable program code logic and can be used to instruct one or more computers or other programmable processing devices to function in a specific manner, may be stored in a computer-readable memory (such as a non-transitory computer-readable medium), and the instructions stored in the computer-readable memory may implement the functions specified in the blocks of the flowchart. Also, the computer program instructions may be loaded onto one or more computers or other programmable computing devices to cause a series of work steps to be executed on one or more computers or other programmable computing devices, thereby generating a process implemented by the computer, and the instructions executed on the computer or other programmable processing device may provide steps for implementing the functions specified in the equations, algorithms, and / or blocks of the flowchart.

[0052] Some or all of the methods and tasks described herein may be performed and fully automated by a computer system. The computer system may, in some cases, include a plurality of different computers or computing devices (e.g., physical servers, workstations, storage arrays, etc.) that communicate via a network and are interoperable to perform the described functions. Each such computing device typically includes a processor (or processors) that executes program instructions or modules stored in a memory or other non-transitory computer-readable storage medium or device. The various functions disclosed herein may be implemented in such program instructions, although some or all of the disclosed functions may alternatively be implemented in a special-purpose circuit of the computer system (e.g., an ASIC or FPGA). If the computer system includes a plurality of computing devices, these devices may be located in the same place, but they do not have to be. The results of the disclosed methods and tasks may be permanently stored by converting a physical storage device such as a solid-state memory chip and / or a magnetic disk to a different state.

[0053] Throughout this specification and the claims, words such as "comprise, comprising" shall be construed in an inclusive sense as opposed to an exclusive or exhaustive sense, i.e., in the sense of "including, but not limited to", unless the context clearly requires otherwise. The word "coupled" as generally used herein means that two or more elements can be directly connected or connected through one or more intermediate elements. In addition, the words "herein", "above", "below" and words of similar import, when used in this application, refer to the application as a whole and not to any particular part of the application. Where context permits, words used in the singular or plural in the above "Detailed Description" may also include the plural or singular, respectively. The word "or" with respect to a list of two or more items covers all of the following interpretations of this word, i.e., any of the items in the list, all of the items in the list, and any combination of the items in the list. The phrase "by way of example" is used exclusively herein to mean "serving as an example, case, or illustration". No implementation described herein as a "specific example" should necessarily be construed as preferred or advantageous over other implementations.

[0054] The present disclosure is not intended to be limited to the implementations shown in this specification. Various modifications of the implementations described in this disclosure will be readily apparent to those skilled in the art. Also, the general principles defined herein are applicable to other implementations without departing from the spirit or scope of the present disclosure. The teachings of the invention provided herein can be applied to other methods and systems and are not limited to the above methods and systems, and by combining the elements and operations of the various embodiments described above, still other embodiments can be provided. Therefore, the novel methods and systems described herein can be implemented in a variety of other forms, and furthermore, various omissions, substitutions, and changes to the forms of the methods and systems described herein can be made without departing from the spirit of the present disclosure. The following claims and their equivalents are intended to cover such forms or modifications that are within the scope and spirit of the present disclosure.

Claims

1. 1. A method of wire bonding, the method comprising: feeding a wire through a capillary tip; forming a ball bond by attaching a first end of the wire to a first location; moving the capillary tip towards a second location while feeding the wire from the capillary tip; forming a stitch bond at the second location without a tool mark produced by a capillary tip by attaching a second end of the wire to the second location while avoiding contact between the capillary tip and the second location; and after the step of forming the stitch bond, moving the capillary tip from the second location in an opposite direction relative to the first location to bring the stitch bond into contact with the capillary tip to form a security stitch bond at a location further from the second location in the opposite direction relative to the first location, wherein the capillary tip forms the security stitch bond by rising an amount and then falling back, wherein the stitch bond and the security stitch bond each have a crescent shape facing in the same direction, and there is a semicircular recessed area between the stitch bond and the security stitch bond.

2. 10. The method of claim 1, further comprising determining effective bonding parameters prior to forming the stitch bond, the bonding parameters comprising one or more of an impact force, a bonding force, an ultrasonic energy level, a pressure, or a temperature.

3. 2. The method of claim 1, wherein the first location is a bond pad on a semiconductor die and the second location is a lead finger on a printed circuit board.

4. The method of claim 3 , wherein the lead fingers on the printed circuit board are thin, plate-like lead fingers.

5. The method of claim 4 , wherein the thin plate lead fingers are formed of nickel, gold, and palladium.

6. 1. A wire bonding system comprising: a handling device configured to place a semiconductor die on a circuit substrate; and a wire bonding apparatus configured to form a ball bond by feeding a wire through a capillary tip and depositing a first end of the wire at a first location, the wire bonding apparatus further configured to move the capillary tip toward a second location while feeding the wire from the capillary tip, the wire bonding apparatus further configured to form a stitch bond at the second location without a tool mark generated by the capillary tip by depositing a second end of the wire at the second location while avoiding contact between the capillary tip and the second location, the wire bonding apparatus a capillary tip that is moved from the second location in an opposite direction relative to the first location after forming the stitch bond to contact the second end of the wire with the capillary tip to form a security stitch bond at a location distal from the second location in the opposite direction relative to the first location, the capillary tip rising an amount and then falling back to form the security stitch bond, the stitch bond and the security stitch bond each having a crescent shape facing in the same direction, and a semicircular recessed area being present between the stitch bond and the security stitch bond.

7. 7. The system of claim 6, wherein the wire bonding machine is further configured to determine effective bonding parameters, the bonding parameters including one or more of an impact force, a bonding force, an ultrasonic energy level, a pressure, or a temperature.

8. 7. The system of claim 6, wherein the first location is a bond pad on a semiconductor die and the second location is a lead finger on a printed circuit board.

9. The system of claim 8 , wherein the lead fingers on the printed circuit board are thin, plate-like lead fingers.

10. 10. The system of claim 9, wherein the thin plate lead fingers are formed of nickel, gold, and palladium.

11. 1. A method of wire bonding, the method comprising: forming a ball bond on the surface at the first location and a stitch bond on the surface at the second location using a capillary tool by feeding a wire from a distal end of the capillary tool; preventing contact between the distal end of the capillary tool and the surface at the second location during formation of the stitch bond; and after the step of forming the stitch bond, moving a distal end of the capillary tool from the second location in an opposite direction relative to the first location to bring the stitch bond into contact with the distal end of the capillary tool to form a security stitch bond at a location distal from the second location in the opposite direction relative to the first location, wherein the distal end of the capillary tool rises an amount and falls back to form the security stitch bond, wherein the stitch bond and the security stitch bond each have a crescent shape facing in the same direction, and wherein there is a semicircular recessed area between the stitch bond and the security stitch bond.

12. The method of claim 11 , further comprising contacting the stitch bond with the distal end of the capillary tool to strengthen the stitch bond.

13. 12. The method of claim 11, wherein forming the ball bond with the capillary tool includes exposing a first end of the wire from the distal end of the capillary tool and attaching the first end of the wire to the surface at the first location.

14. The method of claim 13 , wherein the first location is a bond pad on a semiconductor die.

15. 12. The method of claim 11, wherein forming the stitch bond with the capillary tool comprises: moving the distal end of the capillary tool toward the second location while feeding the wire from the distal end of the capillary tool, and attaching the second end of the wire to the second location while avoiding contact between the distal end of the capillary tool and the second location, thereby avoiding tool marks generated by the capillary tool at the second location.

16. The method of claim 15 , wherein the second location is a lead finger of a printed circuit board.

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