Method for forming a molybdenum contact
The method addresses the inefficiencies in cleaning and depositing molybdenum films on substrates by cleaning the substrate to remove oxides, selectively depositing a molybdenum film without breaking vacuum, and optionally forming a cap or liner and annealing the substrate, resulting in improved production yields and circuit integration density.
Patent Information
- Application Number
- JP2023568055
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-05-07
- Filing Date
- 2022-05-06
- Publication Date
- 2025-06-19
- Estimated Expiration
- 2042-05-06
AI Technical Summary
Current methods for cleaning substrates with both metal and dielectric surfaces require multiple oxidation and reduction reactions, often necessitating temperature changes and incompatible process gases, leading to inefficiencies and contamination issues.
A method for forming semiconductor structures that involves cleaning a substrate to create a substantially oxide-free surface, followed by selective deposition of a molybdenum film using a molybdenum precursor and a reactant without breaking vacuum, and optionally forming a cap or liner and annealing the substrate.
This method effectively removes contaminants, deposits a uniform molybdenum film, and maintains process control without introducing oxides, thereby improving production yields and circuit integration density.
Smart Images

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Abstract
Description
Technical Field
[0001]
[0001] Embodiments of the present disclosure relate to the field of semiconductor devices and semiconductor device manufacturing. More particularly, embodiments of the present disclosure relate to a method for selectively forming molybdenum contacts.
Background Art
[0002]
[0002] The semiconductor processing industry continues to strive for higher production yields while increasing the uniformity of layers deposited on substrates having larger surface areas. These same factors, when combined with new materials, also enable higher circuit integration per unit area of the substrate. As the circuit integration density increases, the need for higher uniformity and process control regarding layer thickness increases. As a result, various techniques have been developed for depositing layers on substrates in a cost-effective manner while maintaining control over the properties of the layers.
[0003]
[0003] Chemical vapor deposition (CVD) and atomic layer deposition (ALD) are common deposition processes used to deposit layers on substrates. CVD is a flux-dependent deposition technique that requires precise control of the substrate temperature and the flux of precursors introduced into the processing chamber to produce a desired layer of uniform thickness. A variant of CVD that exhibits excellent step coverage is cyclic deposition or atomic layer deposition (ALD). Cyclic deposition is based on atomic layer epitaxy (ALE) and uses chemisorption techniques to sequentially deliver precursor molecules to the substrate surface in cycles. The cycles expose the substrate surface to a first precursor, a purge gas, a second precursor, and then a purge gas. The first precursor and the second precursor react to form a product compound as a film on the substrate surface.
[0004]
[0004] Highly sophisticated advanced microelectronic devices place stringent requirements on currently used deposition techniques. Molybdenum and molybdenum-based films have attractive material and conductive properties. These films have been proposed and tested for applications from front-end components to back-end components of semiconductor and microelectronic devices.
[0005]
[0005] Current methods for cleaning substrates having both metal surfaces and dielectric surfaces rely on alternating oxidation and reduction reactions to remove contaminants and restore any damage caused by the other reaction. Most cleaning processes require at least three oxidation or reduction reaction processes to adequately clean the substrate surface. However, oxidation and reduction reactions are typically carried out at different temperatures. Therefore, it is often necessary to heat or cool the substrate during the process. Furthermore, the process gases used for oxidation and reduction reactions are often incompatible. Thus, it is often necessary to transfer the substrate from one processing chamber to another for different processes.
[0006]
[0006] Accordingly, there is a need in the art to develop methods for removing contaminants and depositing a metal film on a substrate.
SUMMARY OF THE INVENTION
[0007]
[0007] One or more embodiments of the present disclosure are directed to a method of forming a semiconductor structure. In one or more embodiments, the method includes cleaning a substrate to form a substantially oxide-free substrate surface and exposing the substrate surface to a first molybdenum precursor and a reactant to selectively deposit a first molybdenum film on the substrate surface. In one or more embodiments, the method is carried out without breaking vacuum in a processing chamber.
[0008]
[0008] Another embodiment of the present disclosure is directed to a method of forming a semiconductor structure without breaking a vacuum. In one or more embodiments, the method includes cleaning a substrate to form a substantially oxide-free substrate surface, the substrate surface including at least one feature; exposing the substrate surface to a first molybdenum precursor to selectively deposit a first molybdenum film on the substrate surface; exposing the substrate surface to a reactant; processing the substrate surface to form one or more of a cap and a liner; and annealing the substrate.
[0009]
[0009] To better understand the features of the present disclosure described above, the present disclosure summarized above will be described more specifically with reference to embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings only show typical embodiments of the present disclosure and should not be considered as limiting the scope of the present disclosure, as the present disclosure may admit other equally effective embodiments.
Brief Description of the Drawings
[0010]
Figure 1A
Figure 1B
Figure 1C
Figure 2A-B
Figure 2C-D
Figure 2E-F
Figure 2G-H
Figure 2I-J
Figure 2K-L
Figure 2M
DETAILED DESCRIPTION OF THE INVENTION
[0011]
[0014] In the accompanying drawings, similar components and / or features may be labeled with the same reference labels. Further, various components of the same type may be distinguished by attaching a dash and a second label that distinguishes the similar components after the reference label. When only the first reference label is used in this specification, the description is applicable to any one of the similar components having the same first reference label regardless of the second reference label.
[0012]
[0015] Before describing some exemplary embodiments of the present invention, it should be understood that the present invention is not limited to the details of the structures or process steps shown in the following description. The present invention can have other embodiments and can be implemented or carried out in various ways.
[0013]
[0016] As used herein, the term "substrate" refers to the surface on which a process acts, or a part of the surface. Further, unless the context clearly indicates otherwise, those skilled in the art will understand that a reference to a substrate may refer to only a part of the substrate. Further, a reference to deposition on a substrate can mean both a bare substrate and a substrate on which one or more films or features have been deposited or formed.
[0014]
[0017] Furthermore, as used herein, the term "substrate" refers to any substrate or material surface formed on a substrate on which film processing is performed during the manufacturing process. For example, the substrate surface on which processing can be performed may include materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, etc., and any other materials such as metals, metal nitrides, metal alloys, dielectric materials, other conductive materials, or combinations thereof. In some embodiments, the substrate includes silicon (Si), ruthenium (Ru), cobalt (Co), tungsten (W), silicon phosphide (SiP), titanium silicon (TiSi), titanium nitride (TiN), titanium aluminide (TiAl), silicon germanium (SiGe), silicon germanium boron (SiGeB), hafnium oxide (HfO2), aluminum oxide (Al2O3), or combinations thereof. The substrate includes, but is not limited to, semiconductor wafers. The substrate can be exposed to a pretreatment process for polishing, etching, reducing, oxidizing, hydroxiding, annealing, and / or firing the substrate surface. In addition to performing the film processing directly on the surface of the substrate itself, in the present disclosure, any of the disclosed film processing steps can be performed on a lower layer formed on the substrate, as will be disclosed in more detail below, and the term "substrate surface" is intended to include such a lower layer as the context indicates.
[0015]
[0018] According to one or more embodiments, the term "on" with respect to a film or layer of a film includes the film or layer being directly present on a surface, such as a substrate surface, and the presence of one or more lower layers between the film or layer and the surface, such as a substrate surface. Thus, in one or more embodiments, the expression "on the substrate surface" is intended to include one or more lower layers. In other embodiments, the expression "directly on" refers to a layer or film that is in contact with a surface, such as a substrate surface, without an intervening layer. Thus, the expression "a layer directly present on the substrate surface" refers to a layer that is in direct contact with the substrate surface and has no layer therebetween.
[0016]
[0019] As used herein, the term "substrate surface" refers to any substrate surface on which a layer can be formed. The substrate surface may have one or more features formed therein, one or more layers formed thereon, and combinations thereof. The shape of the feature may be any suitable shape including, but not limited to, peaks, trenches, and cylindrical vias. As used in this regard, the term "feature" refers to any intentional surface irregularity. Suitable examples of features include trenches having a top, two sidewalls, and a bottom, peaks having a top and two sidewalls extending upwardly from the surface, and vias having a sidewall extending downwardly from a surface with an open bottom, but are not limited thereto. The feature may have any suitable aspect ratio (the ratio of the depth of the feature to the width of the feature). In some embodiments, the feature has an aspect ratio in the range of 3:1 to 15:1, 6:1 to 15:1, 9:1 to 15:1, 12:1 to 15:1, 3:1 to 12:1, 6:1 to 12:1, 9:1 to 12:1, 3:1 to 9:1, 6:1 to 9:1, or 3:1 to 6:1.
[0017]
[0020] As used herein and in the appended claims, terms such as "reactive compound", "reactive gas", "reactant species", "precursor", "process gas", etc. are interchangeable and refer to any gaseous species that can react with the substrate surface or materials on the substrate surface in a surface reaction (e.g., chemisorption, oxidation, reduction). In one or more embodiments, the reactive compound is volatile and thermally stable and is thus suitable for vapor deposition.
[0018]
[0021] As used herein, the term "processing chamber" includes the portion of the processing chamber adjacent to the substrate surface and does not encompass the entire internal region of the processing chamber. For example, in a spatially separated sector of the processing chamber, the portion of the processing chamber adjacent to the substrate surface is purged of one or more reactive compounds by any suitable technique including, but not limited to, moving the substrate through a gas curtain to a portion or sector of the processing chamber that does not contain or substantially does not contain the reactive compound.
[0019]
[0022] As used herein, the terms "atomic layer deposition" or "cyclic deposition" refer to the sequential exposure of a substrate surface to two or more reactive compounds to deposit a layer of material thereon. A substrate or a portion of the substrate surface is sequentially exposed to two or more reactive compounds introduced into the reaction zone of a processing chamber. By sequentially exposing to reactive gases, gas-phase reactions between the reactive gases are prevented or minimized. In a time-domain ALD process, the exposure to each reactive compound is separated by a time delay such that each compound can adhere and / or react on the substrate surface. In a spatial ALD process, different portions of the substrate surface, or materials on the substrate surface, are simultaneously exposed to two or more reactive compounds, such that any point on the substrate is not substantially simultaneously exposed to more than one reactive compound. As used in this specification and the appended claims, the term "substantially" as used in this context means that, as would be understood by one of ordinary skill in the art, a small portion of the substrate may be simultaneously exposed to multiple reactive gases by diffusion, which is not intended to be simultaneous exposure.
[0020]
[0023] In one aspect of a time-domain ALD process, a first reactive gas (i.e., a first precursor or compound A) is pulsed into the reaction zone following a first time delay. Next, a second precursor or compound B is pulsed into the reaction zone, followed by a second delay. During each time delay, a purge gas such as argon is introduced into the processing chamber to purge the reaction zone or remove residual reactive compounds or by-products from the reaction zone. Alternatively, the purge gas may flow continuously through the deposition process such that the purge gas flows only during the time delay between pulses of the reactive compounds. The reactive compounds may alternatively be pulsed until a desired film or film thickness is formed on the substrate surface. In any scenario, an ALD process that pulses compound A, purge gas, compound B, and purge gas constitutes one cycle. The cycle can start with either compound A or compound B and continue in the respective order of the cycle until a film of the desired thickness is reached. In one or more embodiments, the time-domain ALD process may be performed using more than one reactive compound in a predetermined order.
[0021]
[0024] In one aspect of the spatial ALD process, the first reactive gas and the second reactive gas are delivered to the reaction zone simultaneously but are separated by an inert gas curtain and / or a vacuum curtain. The substrate is moved relative to the gas delivery device such that any point on the substrate is exposed to the first reactive gas and the second reactive gas. In one or more embodiments, the spatial ALD process can be performed using more than one reactive compound in a predetermined order.
[0022]
[0025] In some embodiments, the substrate surface is exposed to the first reactive compound and the second reactive compound substantially sequentially. As used throughout this specification, "substantially sequentially" means that most of the duration of the first reactive compound exposure does not overlap with the second reactive compound exposure, although some overlap may be possible.
[0023]
[0026] As used herein, the term "chemical vapor deposition" refers to depositing a layer of material on a substrate surface by exposing it to at least one reactive compound. In some embodiments, the chemical vapor deposition (CVD) process includes mixing two or more reactive compounds in a processing chamber to enable gas-phase reactions and deposition of the reactive compounds. In some embodiments, the CVD process includes simultaneously exposing the substrate surface to two or more reactive compounds. In some embodiments, the CVD process includes continuously exposing the substrate surface to a first reactive compound and intermittently exposing it to a second reactive compound. In some embodiments, a CVD reaction is applied to the substrate surface to deposit a film having a predetermined thickness. In a CVD process, the film can be deposited in a single exposure to the mixed reactive compounds or in multiple exposures to the mixed reactive compounds with purges in between. In some embodiments, the substrate surface is exposed to the first reactive compound and the second reactive compound substantially simultaneously.
[0024]
[0027] As used throughout this specification, "substantially simultaneously" means that a majority of the duration of the first reactive compound exposure overlaps with the second reactive compound exposure.
[0025]
[0028] As used herein, the term "purge" includes any suitable purge process for removing unreacted precursors, reaction products, and by-products from the processing region. Suitable purge processes include moving the substrate through a gas curtain to a portion or sector of the processing region that does not contain or substantially does not contain reactants. In one or more embodiments, purging the processing chamber includes applying a vacuum. In some embodiments, purging the processing region includes flowing a purge gas over the substrate. In some embodiments, the purge process includes flowing an inert gas. In one or more embodiments, the purge gas is selected from one or more of nitrogen (N2), helium (He), and argon (Ar). In some embodiments, prior to exposing the substrate to a second reactive compound, the first reactive compound is purged from the reaction chamber for a duration ranging from 0.2 seconds to 30 seconds, 0.2 seconds to 10 seconds, 0.2 seconds to 5 seconds, 0.5 seconds to 30 seconds, 0.5 seconds to 10 seconds, 0.5 seconds to 5 seconds, 1 second to 30 seconds, 1 second to 10 seconds, 1 second to 5 seconds, 5 seconds to 30 seconds, 5 seconds to 10 seconds, or 10 seconds to 30 seconds.
[0026]
[0029] As used herein, the term "liner" refers to a layer conformally formed along at least a portion of the sidewall and / or bottom surface of an opening such that a substantial portion of the opening remains unfilled after deposition of the layer. The liner can be formed along the entire sidewall and bottom surface of the opening. The liner can be formed by any process known to those skilled in the art. In some embodiments, the liner includes a metal nitride, a PVD metal, or a combination thereof.
[0027]
[0030] Embodiments of the present disclosure provide a method for forming a semiconductor structure. In some embodiments, the method includes selectively depositing a metal film on a substrate. To achieve a minimum contact resistance, the volume of the features on the substrate is very small. In one or more embodiments, the substrate includes silicon or a derivative thereof. In one or more embodiments, a method is advantageously provided for filling the features with a low resistivity metal and minimizing the silicon compound at the bottom of the features.
[0028]
[0031] In some embodiments, a metal precursor is used to form the metal film. In one or more embodiments, when the substrate is exposed to the metal precursor, etching of the underlying substrate occurs. In some embodiments, the metal film is deposited on the substrate surface in an oxygen-free environment, thereby advantageously reducing or eliminating the etching of the underlying substrate. Thus, in some embodiments, the degree of etching of the underlying substrate can be changed by adjusting one or more of the deposition parameters including, but not limited to, the presence of reactants, reactant concentration, reactant pulse length, pressure, or temperature.
[0029]
[0032] Figures 1A - 1C are process flow diagrams showing a method 100 for forming a semiconductor structure according to one or more embodiments of the present disclosure. Figures 2A - 2M are schematic cross-sectional views showing a semiconductor device 200 according to one or more embodiments of the present disclosure. Referring to Figure 2A, the semiconductor device 200 includes a substrate 201. The substrate 201 has a first material 204 having a first surface 205 and a second material 206 having a second surface 207 and a third surface 209.
[0030]
[0033] In some embodiments, the first material 204 includes a metal, an alloy, a nitride, or a combination thereof. In some embodiments, the alloy includes silicon germanium (SiGe).
[0031]
[0034] In some embodiments, the second material 206 includes an oxide, a dielectric, or a combination thereof. In some embodiments, the second material 206 includes one or more of silicon dioxide (SiO2), silicon nitride (SiN), hafnium oxide (HfO2), aluminum oxide (Al2O3), a low dielectric constant material, or a combination thereof.
[0032]
[0035] Referring to FIG. 2A, the semiconductor device 200 has at least one feature 212 formed therein. Those skilled in the art will understand that the single feature 212 shown in FIG. 2 is for illustrative purposes and that more than one feature may be present. The shape of the feature 212 may be any suitable shape including, but not limited to, peaks, trenches, and cylindrical vias. In the illustrated embodiment, the feature 212 is a trench. The trench has a bottom formed by the first surface 205 and sidewalls 209 formed by the third surface 209. In other specific embodiments, the feature 212 is a via. In some embodiments, the feature 212 has an aspect ratio in the range of 3:1 to 15:1, 6:1 to 15:1, 9:1 to 15:1, 12:1 to 15:1, 3:1 to 12:1, 6:1 to 12:1, 9:1 to 12:1, 3:1 to 9:1, 6:1 to 9:1, or 3:1 to 6:1.
[0033]
[0036] Referring to FIGS. 1A and 2A, in step 110, method 100 includes cleaning substrate 201 (or the substrate surface). In some embodiments, cleaning the substrate 201 (or the substrate surface) removes the oxide from the substrate surface. In some embodiments, the oxide is a native oxide. In some embodiments, cleaning the substrate surface in step 110 forms a substantially oxide-free substrate surface. As used in this context, the term "substantially oxide-free" means that there are no more than 5%, 2%, 1%, or 0.5% oxygen atoms present on the substrate surface. In one or more embodiments, anisotropic etching is used to remove the oxide from the substrate surface. In one or more embodiments, the anisotropic etching removes more oxide from the first surface 205 than from the second material 206. In one or more embodiments, cleaning the substrate surface in step 110 forms a substantially oxide-free first surface 205.
[0034]
[0037] Referring to FIGS. 1A and 2B, in step 120, a first metal film 220 is selectively formed on the first substrate surface 205. In some embodiments, step 130 includes exposing the substrate 201 (or the substrate surface) to a first metal precursor and exposing the substrate 201 (or the substrate surface) to a first reactant. The first metal film 220 can be deposited by an ALD deposition process, a CVD deposition process, or a combination thereof.
[0035]
[0038] In one or more embodiments, the first metal film 220 includes a first metal film. In some embodiments, the first metal film includes a first molybdenum film.
[0036]
[0039] In one or more embodiments, the formation of the first metal film 220 is a selective deposition process. The first metal film 220 is formed only on a metal surface from which oxides have been removed, for example by cleaning, on a specific nitride material, and on a silicon-containing substrate. In one or more specific embodiments, the first material 204 includes silicon or silicon germanium, and the second material 206 includes an uncleaned silicon substrate or a dielectric material such as silicon nitride (SiN), hafnium oxide (HfO2), or aluminum oxide (Al2O3). In one or more embodiments, the first metal film 220 is selectively formed on the first surface 205 of the first material 204 and not on the surface of the second material 206.
[0037]
[0040] In one or more embodiments, the first metal precursor includes a first molybdenum precursor. In some embodiments, the first molybdenum precursor includes molybdenum halide. In some embodiments, the molybdenum halide includes molybdenum fluoride, molybdenum chloride, or a combination thereof. In a specific embodiment, the first molybdenum precursor includes molybdenum fluoride. In other specific embodiments, the first molybdenum precursor includes molybdenum chloride. In one or more embodiments, the first precursor is flowed onto the substrate surface using a carrier gas. In some embodiments, the carrier gas is flowed through an ampoule containing the first precursor. In some embodiments, the carrier gas is an inert gas. In some embodiments, the inert gas includes one or more of N2, Ar, and He.
[0038]
[0041] In one or more embodiments, the first reactant comprises an oxidizing agent, a reducing agent, or a combination thereof. In some embodiments, the first reactant comprises hydrogen (H2), ammonia (NH3), silane, polysilane, or a combination thereof. In some embodiments, the silane is selected from one or more of disilane, trisilane, tetrasilane, higher-order silanes, and substituted silanes. In a specific embodiment, the first reactant comprises hydrogen (H2). In other specific embodiments, the reactant comprises ammonia (NH3). In one or more embodiments, the first reactant is flowed onto the substrate using a carrier gas. In some embodiments, the carrier gas is an inert gas. In some embodiments, the inert gas comprises one or more of N2, Ar, and He. In other embodiments, the reactant gas can be flowed continuously, and the flow of the molybdenum precursor into the chamber can be switched on and off.
[0039]
[0042] In one or more embodiments, the substrate surface is exposed to a first precursor, such as molybdenum halide, in a carrier gas, such as Ar, at a flow rate in the range of 100 slm to 1000 slm, 100 slm to 700 slm, 100 slm to 400 slm, 400 slm to 1000 slm, 400 slm to 700 slm, or 700 slm to 1000 slm.
[0040]
[0043] In one or more embodiments, the substrate surface is exposed to a first precursor, such as molybdenum halide, for a duration in the range of 0.3 seconds to 5 seconds, 0.3 seconds to 3 seconds, 0.3 seconds to 1 second, 1 second to 5 seconds, 1 second to 3 seconds, or 3 seconds to 5 seconds.
[0041]
[0044] In one or more embodiments, the substrate surface is exposed to a continuous flow or a plurality of pulses of a first precursor, such as molybdenum halide. In some embodiments, the plurality of pulses of the first precursor have a waiting time in the range of 0.3 seconds to 30 seconds, 0.3 seconds to 10 seconds, 0.3 seconds to 5 seconds, 0.3 seconds to 1 second, 0.5 seconds to 5 seconds, 1 second to 30 seconds, 1 second to 10 seconds, 1 second to 5 seconds, 5 seconds to 30 seconds, 5 seconds to 10 seconds, or 10 seconds to 30 seconds.
[0042]
[0045] In some embodiments, each of the plurality of pulses of the first precursor is applied over a duration in the range of from 0.3 seconds to 5 seconds, from 0.3 seconds to 3 seconds, from 0.3 seconds to 1 second, from 1 second to 5 seconds, from 1 second to 3 seconds, or from 3 seconds to 5 seconds. In some embodiments, at least one of the plurality of pulses of the first precursor is applied over a duration in the range of from 0.3 seconds to 5 seconds, from 0.3 seconds to 3 seconds, from 0.3 seconds to 1 second, from 1 second to 5 seconds, from 1 second to 3 seconds, or from 3 seconds to 5 seconds.
[0043]
[0046] In one or more embodiments, the substrate surface is exposed to a first reactant, such as hydrogen (H2) or ammonia (NH3), at a flow rate in the range of from 0.5 slm to 15 slm, from 0.5 slm to 10 slm, from 0.5 slm to 5 slm, from 5 slm to 15 slm, from 5 slm to 10 slm, or from 10 slm to 15 slm.
[0044]
[0047] In one or more embodiments, the substrate surface is exposed to a first reactant, such as hydrogen (H2) or ammonia (NH3), over a duration in the range of from 0.5 seconds to 10 seconds, from 0.5 seconds to 5 seconds, from 0.5 seconds to 1 second, from 1 second to 10 seconds, from 1 second to 5 seconds, or from 5 seconds to 10 seconds.
[0045]
[0048] In one or more embodiments, the substrate surface is exposed to a continuous flow or a plurality of pulses of a first reactant, such as hydrogen (H2) or ammonia (NH3). In some embodiments, the plurality of pulses of the first reactant have a waiting time in the range of from 0.3 seconds to 30 seconds, from 0.3 seconds to 10 seconds, from 0.3 seconds to 5 seconds, from 0.3 seconds to 1 second, from 0.5 seconds to 5 seconds, from 1 second to 30 seconds, from 1 second to 10 seconds, from 1 second to 5 seconds, from 5 seconds to 30 seconds, from 5 seconds to 10 seconds, or from 10 seconds to 30 seconds.
[0046]
[0049] In some embodiments, each of the plurality of pulses of the first reactant is applied over a duration in the range of from 0.5 seconds to 10 seconds, from 0.5 seconds to 5 seconds, from 0.5 seconds to 1 second, from 1 second to 10 seconds, from 1 second to 5 seconds, or from 5 seconds to 10 seconds. In some embodiments, at least one of the plurality of pulses of the first reactant is applied over a duration in the range of from 0.5 seconds to 10 seconds, from 0.5 seconds to 5 seconds, from 0.5 seconds to 1 second, from 1 second to 10 seconds, from 1 second to 5 seconds, or from 5 seconds to 10 seconds.
[0047]
[0050] In one or more embodiments, step 120 is repeated a predetermined number of cycles. In some embodiments, step 120 is repeated until the first film 220 has a predetermined thickness. The predetermined thickness may be in the range of from 10 Å to 50 Å, from 10 Å to 40 Å, from 10 Å to 30 Å, from 10 Å to 20 Å, from 15 Å to 50 Å, from 15 Å to 40 Å, from 15 Å to 30 Å, from 15 Å to 20 Å, from 20 Å to 50 Å, from 20 Å to 40 Å, from 20 Å to 30 Å, from 30 Å to 50 Å, from 30 Å to 40 Å, or from 40 Å to 50 Å. In some embodiments, step 120 is continued for a predetermined duration.
[0048]
[0051] In one or more embodiments, step 120 includes purging the substrate surface or the processing chamber of the first metal precursor prior to exposing the substrate 201 (or the substrate surface) to the first reactant. In some embodiments, the substrate surface or the processing chamber is purged of the first reactant. The purge may be carried out over a duration in the range of from 0.2 seconds to 30 seconds, from 0.2 seconds to 10 seconds, from 0.2 seconds to 5 seconds, from 0.5 seconds to 30 seconds, from 0.5 seconds to 10 seconds, from 0.5 seconds to 5 seconds, from 1 second to 30 seconds, from 1 second to 10 seconds, from 1 second to 5 seconds, from 5 seconds to 30 seconds, from 5 seconds to 10 seconds, or from 10 seconds to 30 seconds.
[0049]
[0052] In one or more embodiments, steps 110 and 120 are performed without breaking the vacuum. In some embodiments, steps 110 and 120 are performed in a processing chamber without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned without breaking the vacuum between cleaning and metal film formation, and then a metal film, such as a molybdenum film, is formed on the substrate surface. By keeping the cleaning and metal film formation processes under vacuum, oxides are not introduced / formed on the substrate surface during method 100. By cleaning the substrate or the substrate surface in step 110, oxides, such as native oxides, are removed from the substrate surface. The first reactant includes a reducing agent, and the reducing agent maintains an oxygen-free state during step 120.
[0050]
[0053] In one or more embodiments, method 100 is performed at a pressure in the range of 2 Torr to 60 Torr, 2 Torr to 40 Torr, 2 Torr to 20 Torr, 20 Torr to 60 Torr, 20 Torr to 40 Torr, or 40 Torr to 60 Torr.
[0051]
[0054] In one or more embodiments, the processing chamber includes a pedestal on which the substrate is placed. In some embodiments, step 120 is performed on the substrate 201 (or the substrate surface) and on the pedestal within the processing chamber. In some embodiments, the pedestal is maintained at a temperature in the range of 350 °C to 550 °C, 350 °C to 500 °C, 350 °C to 450 °C, 350 °C to 400 °C, 400 °C to 550 °C, 400 °C to 500 °C, 400 °C to 450 °C, 450 °C to 550 °C, 450 °C to 500 °C, or 500 °C to 550 °C. In one or more embodiments, method 100 is performed at a temperature in the range of 400 °C to 425 °C.
[0052]
[0055] Referring to FIGS. 1A, 1B, and 2C, in some embodiments, optionally in step 130, the first metal film 220 is protected from oxide formation by a cap layer 240. The cap layer 240 can be formed by any process known to those skilled in the art. In some embodiments, the cap layer 240 is formed on the first metal film 220. In some embodiments, the first metal film 220 is processed to form the cap layer 240. In some embodiments, the cap layer 240 is formed by nitriding the first metal film 220. In some embodiments, the cap layer 240 is formed by nitriding the first metal film 220 using ammonia (NH3). In some embodiments, the cap layer 240 is formed by treating the first metal film 220 with plasma to nitride the first metal film 220. In some embodiments, the plasma treatment includes nitrogen (N2) plasma treatment. In some embodiments, the cap layer 240 includes a metal nitride, a PVD metal, or a combination thereof. In one or more embodiments, steps 110, 120, and 130 are performed without breaking the vacuum. In some embodiments, steps 110, 120, and 130 are performed in a processing chamber without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, and a cap layer is formed on the metal film without breaking the vacuum during cleaning, metal film formation, and cap layer formation. Keeping the cleaning, metal film formation process, and cap layer formation process under vacuum prevents oxides from being introduced / formed on the substrate surface during method 100.
[0053]
[0056] Referring to FIGS. 1A and 2D, in some embodiments, optionally in step 140, the first metal film 220 is protected from oxide formation by a liner 250. The liner 250 can be formed by any process known to those skilled in the art. In some embodiments, the liner 250 includes a metal nitride, a PVD metal, or a combination thereof.
[0054]
[0057] Referring to FIGS. 1A and 2E, in some embodiments, the liner 250 can be formed on the first metal film 220 without a cap layer. Referring to FIGS. 1A, 1B, and 2D, in some embodiments, the liner 250 may be formed on the cap layer 240, and the cap layer 240 may be formed on the first metal film 220.
[0055]
[0058] In some embodiments, at least steps 110, 120, and 140 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, and a liner is formed on the metal film without breaking the vacuum during cleaning, metal film formation, and liner formation. In some embodiments, at least steps 110, 120, 130, and 140 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, a cap layer is formed on the metal film, and a liner is formed on the cap layer without breaking the vacuum during cleaning, metal film formation, cap layer formation, and liner formation.
[0056]
[0059] In another aspect of the present disclosure, a method of forming the semiconductor structure 200 includes reducing the contact resistance of the semiconductor structure 200. In some embodiments, the first metal film 220, such as a molybdenum film, is annealed to form a metal silicide film, such as molybdenum silicide. In some embodiments, annealing the first metal film 220 to form a metal silicide film reduces the contact resistance. In one or more embodiments, a metal silicide is formed by annealing, and the resistivity of the metal silicide is higher than the resistivity of the metal film 220. In one or more embodiments, the metal silicide is formed to reduce the contact resistance. When current flows from silicon to the metal film 220, the resistance increases. In one or more embodiments, forming the metal silicide reduces the resistance of the current flowing through silicon, the metal silicide, and the metal film.
[0057]
[0060] Referring to FIGS. 1A and 1B, in one or more embodiments, in step 150, the substrate 201 is annealed. In one or more embodiments, by annealing the substrate 201, a smooth surface is obtained. Thus, in some embodiments, a method of forming the semiconductor structure 200 includes smoothing the surface of the first metal film 120 by annealing. In some embodiments, after the annealing step 150, the substrate surface is not rough. Thus, in some embodiments, the annealing step 150 is configured to produce a smooth surface.
[0058]
[0061] The substrate 201 (or the substrate surface) can be annealed by any process known to those skilled in the art. In some embodiments, the substrate 201 (or the substrate surface) is annealed by a rapid thermal process (RTP).
[0059]
[0062] Referring to FIGS. 1A and 2F - 2I, the first metal film 220 is annealed in step 150 to form the annealed first metal film 230. In some embodiments, the annealed first metal film 230 includes a metal silicide. As shown in FIG. 2F, in one or more embodiments, there is no cap layer or liner, and upon annealing, the first metal film 220 forms the annealed first metal film 230. As shown in FIG. 2G, in one or more embodiments, the device may include a cap layer 240 on the first metal film 220, and upon annealing, the first metal film 220 forms the annealed first metal film 230. As shown in FIG. 2H, in one or more embodiments, the device may include a liner 250 on the cap layer 240 on the first metal film 220, and upon annealing, the first metal film 220 forms the annealed first metal film 230. As shown in FIG. 2I, in some embodiments, the device includes a liner 250 formed on the first metal film 220, and upon annealing, the first metal film 220 forms the annealed first metal film 230.
[0060]
[0063] In some embodiments, at least process 110, process 120, and process 150 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, and the device is annealed without breaking the vacuum between cleaning, metal film formation, and annealing.
[0061]
[0064] In some embodiments, at least process 110, process 120, process 130, and process 150 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, a cap layer is formed on the metal film, and the device is annealed without breaking the vacuum between cleaning, metal film formation, cap layer formation, and annealing.
[0062]
[0065] In some embodiments, at least process 110, process 120, process 140, and process 150 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, a liner is formed on the first metal film, and the device is annealed without breaking the vacuum between cleaning, metal film formation, liner formation, and annealing.
[0063]
[0066] In some embodiments, at least process 110, process 120, process 130, process 140, and process 150 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, a cap layer is formed on the metal film, a liner is formed on the cap layer, and the device is annealed without breaking the vacuum between cleaning, metal film formation, cap layer formation, liner formation, and annealing.
[0064]
[0067] In some embodiments, annealing the device in step 150 forms an annealed first metal film 230. In some embodiments, the annealed first metal film 230 has a thickness in the range of 1.5 times to 3 times the thickness of the first metal film 220, or 1.5 times to 2 times the thickness of the first metal film 220, or 2 times to 3 times the thickness of the first metal film 220. In some embodiments, the annealed first metal film 230 has a thickness in the range of 20 Å to 150 Å, 20 Å to 100 Å, 20 Å to 50 Å, 50 Å to 150 Å, 50 Å to 100 Å, or 100 Å to 150 Å.
[0065]
[0068] In some embodiments, the annealed first metal film 230 has a root mean square (RMS) roughness in the range of 4% to less than 30%, 4% to less than 20%, 4% to less than 10%, 10% to less than 30%, 10% to less than 20%, or 20% to less than 30%.
[0066]
[0069] In some embodiments, after annealing (step 150), a cap layer 240 may be formed on the annealed first metal film 230. Referring to FIGS. 1C and 2G, in one or more embodiments, in step 160, the annealed first metal film 230 is protected by the cap layer 240. The cap layer 240 can be formed according to any of the methods disclosed in step 130. The cap layer 240 can include any suitable material known to those skilled in the art, including the materials of one or more embodiments. In some embodiments, at least steps 110, 120, 150, and 160 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, the device is annealed, and a cap layer is formed on the annealed metal film without breaking the vacuum during cleaning, metal film formation, annealing, and cap layer formation.
[0067]
[0070] In some embodiments, a liner 250 can be formed on the annealed first metal film 230. Referring to FIGS. 1C and 2G, in one or more embodiments, in step 170, a liner 240 is formed on the annealed first metal film 230. Referring to FIGS. 1B and 2H, in one or more embodiments, in step 170, a liner 250 can be formed on the cap layer 240. The liner 250 can be formed according to any of the methods disclosed in step 140. The liner 250 can include any suitable material known to those skilled in the art, including any of the materials described in one or more of the above-described embodiments.
[0068]
[0071] Referring to FIG. 1B, in some embodiments, at least steps 110, 120, 150, and 170 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, the device is annealed, and a cap layer is formed on the annealed metal film without breaking the vacuum during cleaning, metal film formation, annealing, and cap layer formation.
[0069]
[0072] Referring to FIG. 1B, in some embodiments, at least steps 110, 120, 130, 150, and 170 are performed without breaking the vacuum. Thus, in one or more embodiments, when the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, a cap layer is formed on the metal film, the device is annealed, and a liner is formed on the cap layer without breaking the vacuum during cleaning, metal film formation, cap layer formation, annealing, and liner formation, the liner is formed.
[0070]
[0073] Referring to FIG. 1C, in some embodiments, at least process 110, process 120, process 150, process 160, and process 170 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, the device is annealed, a cap layer is formed on the annealed metal film, and a liner is formed on the cap layer, all without breaking the vacuum during cleaning, metal film formation, annealing, cap layer formation, and liner formation.
[0071]
[0074] With respect to FIGS. 1A - 1C and FIGS. 2J - 2M, a method of forming a semiconductor structure 200 includes filling at least one feature 212 of a substrate 201 (or substrate surface) in process 180. In some embodiments, filling at least one feature includes depositing a second metal film 260 on a first metal film 220, an annealed first metal film 230, a cap layer 240, or a liner 250. In one or more embodiments, the second metal film 260 can be deposited by any suitable gap filling process known to those skilled in the art. In some embodiments, the gap filling process in process 180 includes exposing to a metal precursor, such as molybdenum halide, and a reactant, such as hydrogen (H2), as described in one or more of the above embodiments. In some embodiments, the second metal film 260 includes a second molybdenum film. In some embodiments, the first molybdenum film and the second molybdenum film are the same. In some embodiments, the first molybdenum film and the second molybdenum film are different.
[0072]
[0075] In other embodiments, the gap filling process of step 180 includes exposing the substrate 201 (or the substrate surface) to a second metal precursor and exposing the substrate 201 (or the substrate surface) to a second reactant. The first metal precursor and the second metal precursor may be the same or different. The first reactant and the second reactant may be the same or different. In some embodiments, the second metal precursor includes a second molybdenum precursor. In some embodiments, the first molybdenum precursor and the second molybdenum precursor are the same. In some embodiments, the first molybdenum precursor and the second molybdenum precursor are different.
[0073]
[0076] In some embodiments, the gap filling process of step 180 is a bottom-up gap filling process. In one or more embodiments, the second metal film 260 is deposited on the first metal film 220, or on the annealed first metal film 230, or on the cap layer 240.
[0074]
[0077] In other embodiments, the gap filling process of step 180 includes a conformal gap filling process. In some embodiments, the conformal gap filling process is performed on a substrate 201 (or the substrate surface) having a liner 250 thereon.
[0075]
[0078] In one or more embodiments, the liner 250 overhangs at least one feature. During the conformal gap fill process, the overhang is etched and reduced by exposing the liner 250 to a second metal precursor. In one or more embodiments, the overhang is reduced by exposing it to a molybdenum precursor without a reactant, such that more of the overhang is etched and little molybdenum gap fill deposition occurs. In one or more embodiments, the overhang is reduced by exposing it to a molybdenum precursor with a substantially low concentration of reactant, such that more of the overhang is etched and little molybdenum gap fill deposition occurs. As used in this context, the term "substantially low concentration of reactant" means that the reactant concentration in step 120 is 80%, 60%, 40%, 20%, 10%, 5%, 2%, 1%, or 0% or less. Once the overhang has been sufficiently etched, a reactant can be introduced to fill at least one feature with a gap fill material, such as molybdenum. In some embodiments, the degree of etching can be varied by adjusting one or more parameters. The one or more parameters for etching the overhang may be the same as or different from the degree of etching of the underlying substrate.
[0076]
[0079] In some embodiments, at least steps 110, 120, 150, and 180 are performed without breaking vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, the device is annealed, and gap fill is performed without breaking vacuum during cleaning, metal film formation, annealing, and gap fill.
[0077]
[0080] In some embodiments, at least process 110, process 120, process 130, process 150, and process 180 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, a cap layer is formed on the metal film, the device is annealed, and gap filling is performed without breaking the vacuum during cleaning, metal film formation, cap layer formation, annealing, and gap filling.
[0078]
[0081] In some embodiments, at least process 110, process 120, process 140, process 150, and process 180 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, a liner is formed on the metal film, the device is annealed, and gap filling is performed without breaking the vacuum during cleaning, metal film formation, liner formation, annealing, and gap filling.
[0079]
[0082] In some embodiments, at least process 110, process 120, process 130, process 140, process 150, and process 180 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, a cap layer is formed on the metal film, a liner is formed on the cap layer, the device is annealed, and gap filling is performed without breaking the vacuum during cleaning, metal film formation, cap layer formation, liner formation, annealing, and gap filling.
[0080]
[0083] In some embodiments, at least process 110, process 120, process 150, process 170, and process 180 are performed without breaking the vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, the device is annealed, a liner is formed on the annealed metal film, and gap filling is performed without breaking the vacuum during cleaning, metal film formation, annealing, liner formation, and gap filling.
[0081]
[0084] In some embodiments, at least process 110, process 120, process 130, process 150, process 170, and process 180 are performed without breaking vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, a cap layer is formed on the metal film, the device is annealed, a liner is formed, and gap filling is performed without breaking vacuum during cleaning, metal film formation, annealing, liner formation, and gap filling.
[0082]
[0085] In some embodiments, at least process 110, process 120, process 150, process 160, and process 180 are performed without breaking vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, the device is annealed, a cap layer is formed on the annealed metal film, and gap filling is performed without breaking vacuum during cleaning, metal film formation, annealing, cap layer formation, and gap filling.
[0083]
[0086] In some embodiments, at least process 110, process 120, process 150, process 160, process 170, and process 180 are performed without breaking vacuum. Thus, in one or more embodiments, the substrate surface is cleaned, a metal film, such as a molybdenum film, is formed on the substrate surface, the device is annealed, a cap layer is formed, a liner is formed, and gap filling is performed without breaking vacuum during cleaning, metal film formation, annealing, cap layer formation, liner formation, and gap filling.
[0084]
[0087] In another aspect of the present disclosure, a method of forming a semiconductor structure 200 includes breaking vacuum and / or performing a gap filling process (process 180) in a different processing chamber. In the above embodiments where vacuum is broken, the substrate 201 (or substrate surface) may include a cap layer 240 and / or a liner 250.
[0085]
[0088] Referring to FIGS. 1A - 1C, in one or more embodiments, method 100 includes an optional post - processing step 190. In one or more embodiments, for example, the post - processing step 190 may include a process (e.g., annealing) to modify the film properties or a further film deposition process (e.g., an additional ALD or CVD process) to grow an additional film. In one or more embodiments, the optional post - processing step 190 may be a process that modifies the properties of the deposited film. In some embodiments, the optional post - processing step 190 includes annealing the as - deposited film. In some embodiments, the annealing is performed at a temperature higher than the temperature of step 120. In some embodiments, the annealing is performed at a temperature in the range of 100°C to 550°C, 100°C to 450°C, 100°C to 350°C, 100°C to 250°C, 200°C to 550°C, 200°C to 450°C, 200°C to 350°C, 300°C to 550°C, 300°C to 450°C, or 400°C to 550°C. In some embodiments, the annealing is performed at a temperature in the range of less than 550°C and greater than or equal to 100°C, less than 450°C and greater than or equal to 100°C, less than 350°C and greater than or equal to 100°C, less than 250°C and greater than or equal to 100°C, less than 550°C and greater than or equal to 200°C, less than 450°C and greater than or equal to 200°C, less than 350°C and greater than or equal to 200°C, less than 550°C and greater than or equal to 300°C, less than 450°C and greater than or equal to 300°C, or less than 550°C and greater than or equal to 400°C. The annealing environment of some embodiments includes one or more of an inert gas (e.g., molecular nitrogen (N2), argon (Ar)) or a reducing gas (e.g., molecular hydrogen (H2) or ammonia (NH3)). The annealing can be performed for any suitable length of time. In some embodiments, the film is annealed for a predetermined time in the range of 1 hour to 24 hours, 1 hour to 20 hours, 1 hour to 15 hours, 1 hour to 10 hours, 1 hour to 5 hours, 5 hours to 24 hours, 5 hours to 20 hours, 5 hours to 15 hours, 5 hours to 10 hours, 10 hours to 24 hours, 10 hours to 20 hours, 10 hours to 15 hours, 15 hours to 24 hours, 15 hours to 20 hours, or 20 hours to 24 hours. In some embodiments, annealing the as - deposited film increases the density of the film, decreases the resistivity, and / or increases the purity. In some embodiments, the annealing is performed in an RTP chamber.In some embodiments, annealing in the RTP chamber is performed for less than 10 minutes from spike annealing (microseconds). In some embodiments, annealing in the RTP chamber is performed for about 1 minute. In some embodiments, spike annealing is performed at a temperature of 900 °C or less.
[0086]
[0089] In some embodiments, the semiconductor structure 200 is moved from the first chamber to another subsequent chamber for further processing. The semiconductor structure 200 can be moved directly from the first chamber to another processing chamber, or the semiconductor structure 200 can be moved from the first chamber to one or more transfer chambers and then to another processing chamber. In some embodiments, the deposition of the first metal film 220 and the second metal film 260 can be performed in a single chamber. In some embodiments, the deposition of the first metal film 220 and the deposition of the second metal film 260 are performed in separate chambers. Thus, the processing apparatus can include a plurality of chambers in communication with a transfer station. This type of apparatus can be referred to as a "cluster tool" or "cluster system", etc. In some embodiments, a vacuum is maintained between the chambers so that the substrate is substantially free of oxides.
[0087]
[0090] Generally, a cluster tool is a modular system that includes multiple chambers that perform various functions including substrate centering and orientation, degassing, annealing, deposition, and / or etching. According to one or more embodiments, the cluster tool includes at least a first chamber and a central transfer chamber. The central transfer chamber can house a robot that can reciprocate substrates between a processing chamber and a load lock chamber, as well as within the processing chamber and the load lock chamber. The transfer chamber is typically maintained in a vacuum state and provides an intermediate stage for reciprocating substrates from one chamber to another and / or to a load lock chamber positioned at the front end of the cluster tool. Two well-known cluster tools applicable to the present disclosure are Centura® and Endura®, both of which are available from Applied Materials, Inc. of Santa Clara, California. However, the exact arrangement and combination of chambers can be varied for the purpose of performing specific steps of the processes described herein. Other processing chambers that can be used include, but are not limited to, cyclic layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etching, pre-cleaning, chemical clean, plasma nitridation, degassing, orientation, hydroxylation, and other substrate processes. By performing processes in the chambers on the cluster tool, surface contamination of the substrate 201 (or the substrate surface) by impurities in the atmosphere can be avoided without oxidizing prior to depositing subsequent films.
[0088]
[0091] According to one or more embodiments, the substrate 201 (or substrate surface) is continuously under vacuum or “load lock” conditions and is not exposed to ambient air when moving from one chamber to the next. Thus, the transfer chamber is under vacuum and is “pumped down” under vacuum pressure. An inert gas may be present in the processing chamber or the transfer chamber. In some embodiments, the inert gas is used as a purge gas to remove some or all of the reactants (e.g., reagents). According to one or more embodiments, the purge gas is injected at the outlet of the deposition chamber to prevent reactants (e.g., reagents) from moving from the deposition chamber to the transfer chamber and / or additional processing chambers. Thereby, a curtain of inert gas flow is formed at the outlet of the chamber.
[0089]
[0092] The substrate 201 can be processed in a single substrate deposition chamber where a single substrate is loaded, processed, and unloaded before another substrate is processed. The substrate 201 can also be processed in a continuous manner similar to a conveyor system where multiple substrates are individually loaded into the first portion of the chamber, move through the chamber, and are unloaded from the second portion of the chamber. The shape of the chamber and the associated conveyor system may form a linear path or a curved path. Further, the processing chamber may be a carousel in which multiple substrates move about a central axis and are exposed to processes such as deposition, etching, annealing, cleaning, etc. throughout the carousel path.
[0090]
[0093] During processing, the substrate 201 can be heated or cooled. Such heating or cooling can be achieved by any suitable means including, but not limited to, changing the temperature of the substrate support and flowing heated or cooled gas over the substrate surface. In some embodiments, the substrate support includes a heater / cooler that can be controlled to conductively change the substrate temperature. In one or more embodiments, the gas employed (either a reactive gas or an inert gas) is heated or cooled to locally change the substrate temperature. In some embodiments, the heater / cooler is positioned within a chamber adjacent to the substrate surface to change the substrate temperature by convection.
[0091]
[0094] The substrate 201 may also be stationary or rotating during processing. The rotating substrate can rotate continuously (about the substrate axis) or in discontinuous steps. For example, the substrate 201 may rotate throughout the process, or the substrate 201 may rotate only slightly during exposure to different reactive or purge gases. Rotating the substrate 201 (continuously or stepwise) during processing can help to produce more uniform deposition or etching, for example, by minimizing the effects of local variations in the gas flow pattern.
[0092]
[0095] Spatial relative terms such as "beneath", "below", "lower", "above", "upper", etc. may be used herein to facilitate descriptions of the relationship of one element or feature shown to another element(s) or feature(s). It will be understood that the spatial relative terms encompass different orientations of the device in use or operation in addition to the illustrated orientation. For example, if the device in the figures is turned over, an element described as "below" or "beneath" another element or feature will be oriented "above" the other element or feature. Thus, the exemplary term "below" can encompass both upward and downward orientations. The device may be otherwise oriented (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein may be interpreted accordingly.
[0093]
[0096] In the context of the materials and methods described herein (particularly in the context of the following claims), the use of the terms "a", "an", "the", and similar referents is to be interpreted to cover both the singular and the plural forms unless otherwise stated herein or clearly contradicted by the context. The recitation of a range of values herein is merely intended to serve as a shorthand method of referring individually to each separate value within the range unless otherwise stated herein, and each separate value is incorporated herein as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise stated herein or clearly contradicted by the context. The use of any and all examples, or exemplary language (e.g., "such as") provided herein is merely intended to better clarify the materials and methods and is not intended to impose a limitation on the scope unless otherwise claimed. No language in this specification should be construed as indicating any non-claimed element as essential to the practice of the disclosed materials and methods.
[0094]
[0097] As used throughout this specification, "one embodiment", "a particular embodiment", "one or more embodiments", or "an embodiment" means that a particular feature, structure, material, or characteristic described in connection with that embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of the phrases "in one or more embodiments", "in a particular embodiment", "in one embodiment", or "in an embodiment" in various places in this specification are not necessarily referring to the same embodiment of the present disclosure. In one or more embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner.
[0095]
[0098] Although the disclosure of this specification has been described with reference to particular embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of the present disclosure. It will be apparent to those skilled in the art that various modifications and changes can be made to the methods and apparatuses of the present disclosure without departing from the spirit and scope of the present disclosure. Accordingly, the present disclosure is intended to cover modifications and changes that are within the scope of the appended claims and their equivalents.
Claims
1. A method of forming a semiconductor structure, comprising: cleaning a substrate to form a substantially oxide-free first substrate surface, the substrate including the first substrate surface and a second substrate surface, the first substrate surface including silicon germanium (SiGe), and the second substrate surface including a second material different from silicon germanium (SiGe), cleaning the substrate to form a substantially oxide-free first substrate surface; exposing the substrate to a first molybdenum precursor; exposing the substrate to a reactant such that a first molybdenum film is selectively deposited on the first substrate surface and substantially not deposited on the second substrate surface; forming a cap layer including a metal nitride, a PVD metal, or a combination thereof on the first molybdenum film, or treating the first molybdenum film to form the cap layer; and the method is performed without breaking vacuum in a processing chamber.
2. The method according to claim 1, wherein the second material includes an oxide, a dielectric, or a combination thereof.
3. The method according to claim 1, wherein the substrate is exposed to the molybdenum precursor and the reactant sequentially or simultaneously.
4. The method according to claim 1, wherein the reactant includes one or more of an oxidizing agent and a reducing agent.
5. The reactant is hydrogen (H 2 ), ammonia (NH 3 ), silane, polysilane, or a combination thereof, according to the method of claim 1.
6. The method according to claim 1, wherein the first molybdenum precursor includes molybdenum and a halide.
7. The method according to claim 3, wherein etching of the first substrate surface by the first molybdenum precursor is reduced by exposing the substrate to the reactant.
8. The method according to claim 1, wherein the first molybdenum film has a thickness in the range of 15 Å to 50 Å.
9. The method according to claim 1, further comprising annealing the substrate.
10. The method according to claim 9, wherein annealing forms a smooth first substrate surface, and the smooth surface has a root mean square (RMS) roughness in the range of 4% to less than 30%.
11. The method according to claim 1, wherein the substrate includes at least one feature having an aspect ratio in the range of 3:1 to 15:1, and the at least one feature includes a bottom surface including the first substrate surface, a top surface including the second substrate surface, and at least one side wall including a third substrate surface.
12. The method according to claim 11, further comprising filling the at least one feature with a second molybdenum film by exposing the at least one feature to a second molybdenum precursor and a second reactant.
13. The method according to claim 12, further comprising depositing a liner on the at least one feature before filling the at least one feature with the second molybdenum film.
14. The method according to claim 13, wherein the liner includes a metal nitride or a PVD metal.
15. The method according to claim 14, wherein exposing the at least one feature to the second molybdenum precursor is performed with a substantially low concentration of reactant until the overhang formed by the liner in the at least one feature is reduced.
16. A method of forming a semiconductor structure without breaking vacuum, Cleaning a substrate to form a substantially oxide-free first substrate surface, wherein the first substrate surface includes at least one feature having a bottom surface including the first substrate surface, a top surface including a second substrate surface, and at least one sidewall including a third substrate surface, the first substrate surface includes silicon germanium (SiGe), and the second substrate surface includes a second material different from silicon germanium (SiGe), and cleaning the substrate to form a substantially oxide-free first substrate surface, and Performing a first process on the substrate, the first process including exposing the substrate to a first molybdenum precursor and exposing the substrate to a reactant so as to selectively deposit a first molybdenum film on the first substrate surface and substantially not deposit on the second substrate surface, and performing a first process on the substrate, and Processing the substrate to form or deposit one or more of a cap and a liner on the first molybdenum film, and Annealing the substrate and A method comprising.
17. A method of forming a semiconductor structure, comprising: Performing the method according to claim 16, and Performing a second deposition process on the substrate surface, the second deposition process including exposing the substrate to a second molybdenum precursor and exposing the substrate to a second reactant to deposit a second molybdenum film on the first molybdenum film, and performing a second deposition process on the substrate surface, and A method comprising.
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