Exposure apparatus, exposure method, and method of manufacturing an article

Abstract

To provide an exposure device advantageous in terms of productivity.SOLUTION: An exposure device for exposing a substrate while moving an original plate and the substrate in a scanning direction includes: a first measurement part that measures a position of an original plate stage for holding the original plate to acquire a first measurement value; a second measurement part that measures a position of a substrate stage for holding the substrate to acquire a second measurement value; a calculation part that calculate a synchronous error of the original plate stage and the substrate stage in a period during which the original plate stage and the substrate stage are driven in synchronization in the scanning direction; a determination part that determines, in each divided area which is the unit of an area to be exposed on the substrate, an evaluation area where the synchronous error should be evaluated and a non-evaluation area where the synchronous error is not evaluated; and a processing part that performs processing according to the synchronous error. The calculation part, regarding each divided area on the substrate, calculates the synchronous error based on the first measurement value and the second measurement value to be acquired by the first measurement part and the second measurement part respectively during exposure of the evaluation area.SELECTED DRAWING: Figure 8

Description

Technical Field

[0001] The present invention relates to an exposure apparatus, an exposure method, and a method for manufacturing an article.

Background Art

[0002] In a photolithography process for manufacturing devices such as semiconductor elements, generally, an exposure apparatus that illuminates a reticle (reticle or mask) and projects the pattern of the reticle onto a substrate (wafer) is used (see Patent Documents 1 and 2).

[0003] Patent Document 1 discloses an exposure apparatus having a substrate stage for holding a substrate, a first measurement unit for measuring a physical quantity related to the position of the substrate stage, a reticle stage for holding a reticle, and a second measurement unit for measuring a physical quantity related to the position of the reticle stage. In the exposure apparatus disclosed in Patent Document 1, during the relative driving of the substrate stage and the reticle stage, the respective measurement values of the first measurement unit and the second measurement unit are monitored, and the synchronization error between the substrate stage and the reticle stage is obtained based on the monitoring result. Then, the positional deviation of the pattern transferred onto the substrate is evaluated from the synchronization error between the substrate stage and the reticle stage.

[0004] Patent Document 2 discloses an exposure apparatus having a position measurement unit for measuring the position (position in the height direction) of a substrate held by a substrate stage with respect to the direction of the optical axis of a projection optical system that projects the pattern of a reticle onto the substrate. In the exposure apparatus disclosed in Patent Document 2, when driving the substrate stage in a direction orthogonal to the optical axis of the projection optical system (so-called focus leveling driving) based on the measurement result of the position measurement unit, the driving of the substrate stage is controlled so as not to exceed a predetermined limit value (driving amount). At this time, by determining such a limit value based on the speed of the substrate stage or the like, a decrease in the accuracy (transfer accuracy) of the pattern transferred onto the substrate due to excessive driving of the substrate stage is suppressed.

Prior Art Documents

Patent Documents

[0005] Patent Document 1 Japanese Patent Application Laid-Open No. 11-67655 Patent Document 2 Japanese Patent Application Laid-Open No. 2010-251788 SUMMARY OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION

[0006] In an exposure apparatus, in order to improve productivity (yield), it is required to perform exposure on a partition region (shot region) which is a unit of an area to be exposed and is located around a substrate. In the partition region located around the substrate, a chip region where chips are formed and a non-chip region where chips are not formed (a region in contact with the substrate edge or a region outside the substrate) often coexist. Therefore, in the conventional technology, the height position is measured only for the chip region among the partition regions, and the target value of the focus leveling drive is generated based on the measured value, so that the surface position of the chip region is aligned with the image plane of the projection optical system.

[0007] However, in the partition region located around the substrate, the flatness of the surface tends to decrease due to adhesion of foreign matters or uneven application of resist (photosensitive agent). For the focus leveling drive for a region where the flatness has decreased, the driving amount of the substrate stage becomes large (that is, excessive driving), which not only causes a focus leveling tracking error but also leads to a synchronization error between the substrate stage and the reticle stage. In particular, when the flatness is decreased near the boundary between the chip region and the non-chip region, the synchronization error between the substrate stage and the reticle stage tends to decrease. In order to reduce the synchronization error between the substrate stage and the reticle stage, it is conceivable to limit the driving amount in the focus leveling drive. However, in this case, a focus leveling tracking error may occur, which may cause resolution failure due to defocus.

[0008] The present invention has been made in view of such problems of the conventional technology, and an exemplary object thereof is to provide an exposure apparatus advantageous in terms of productivity. MEANS FOR SOLVING THE PROBLEM

[0009] To achieve the above object, an exposure apparatus according to one aspect of the present invention is an exposure apparatus for exposing a Using a master plate on which a pattern is formed, substrate a plurality of shot areas above with scanning a first measurement unit that measures the position of a reticle stage holding the reticle to obtain a first measurement value, and a second measurement unit that measures the position of a substrate stage holding the substrate to obtain a second measurement value and the front and an arithmetic unit that calculates a synchronization error between the reticle stage and the substrate stage and, are and has each of the plurality of shot areas includes an evaluation area for evaluating the synchronization error and a non-evaluation area for not evaluating the synchronization error, wherein the arithmetic unit , the front calculates the synchronization error based on the first measurement value and the second measurement value during a period when an evaluation area is being exposed to the front which is characterized in that

[0010] A further object or another aspect of the present invention will be clarified by embodiments described below with reference to the accompanying drawings

Advantages of the Invention

[0011] According to the present invention, for example, an exposure apparatus advantageous in terms of productivity can be provided

Brief Description of the Drawings

[0012]

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Embodiments for Carrying Out the Invention

[0013] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the invention according to the claims. Although a plurality of features are described in the embodiments, not all of these plurality of features are essential to the invention, and the plurality of features may be arbitrarily combined. Further, in the accompanying drawings, the same or similar configurations are denoted by the same reference numerals, and redundant descriptions are omitted.

[0014] FIG. 1 is a schematic diagram showing the configuration of an exposure apparatus 100 as one aspect of the present invention. The exposure apparatus 100 illuminates a reticle 102 while moving the reticle 102 and a substrate 104 in a scanning direction, and transfers the pattern of the reticle 102 onto the substrate. In the present embodiment, the exposure apparatus 100 is a step-and-scan type exposure apparatus (scanner) that forms an exposure region in a rectangular or arcuate slit shape and moves the reticle 102 and the substrate 104 relatively at high speed to perform exposure with a large field angle and high precision.

[0015] As shown in FIG. 1, the exposure apparatus 100 includes a projection optical system 101, a reticle stage 103, a substrate stage 105, an illumination optical system 106, a main control unit 127, and a measurement unit MU. As shown in FIG. 1, a Z-axis is defined in a direction parallel to the optical axis AX of the projection optical system 101, and an X-axis and a Y-axis are defined in directions orthogonal to the Z-axis. The image plane of the projection optical system 101 is perpendicular to the Z-direction.

[0016] The reticle 102 is held by the reticle stage 103. The pattern of the reticle 102 is projected at a magnification (e.g., 1 / 4, 1 / 2, 1 / 5) of the projection optical system 101 to form an image on the image plane of the projection optical system 101.

[0017] The substrate 104 is, for example, a wafer having a resist (photosensitive agent) applied to its surface. The substrate 104 has a plurality of shot regions arranged thereon that have the same pattern structure formed in the previous exposure process.

[0018] The substrate stage 105 is a stage that holds and moves the substrate 104. The substrate stage 105 includes a chuck that adsorbs (fixes) the substrate 104. Further, the substrate stage 105 includes an XY stage that is horizontally movable in each of the X-direction and the Y-direction and a Z stage that is movable in the Z-direction (the height direction of the substrate 104) parallel to the optical axis AX of the projection optical system 101. Furthermore, the substrate stage 105 also includes a leveling stage that is rotatable about the X-axis and the Y-axis and a rotation stage that is rotatable about the Z-axis. Thus, the substrate stage 105 constitutes a six-axis drive system for aligning the image of the pattern of the reticle 102 with the shot region of the substrate 104. The positions of the substrate stage 105 in the X-direction, Y-direction, and Z-direction are constantly measured by a beam splitter 123 and an interferometer 124 disposed on the substrate stage 105.

[0019] The measurement unit MU has a function of measuring the surface position (position in the height direction) and inclination of the substrate 104. In this embodiment, the measurement unit MU measures the surface position (position in the height direction) of the measurement target location of the partition region (shot region), which is the unit of the region to be exposed on the substrate 104 held by the substrate stage 105. The measurement unit MU includes, for example, a light source 110, a collimator lens 111, a slit member 112, a light-projecting side optical system 113, and a light-projecting side mirror 114. Further, the measurement unit MU includes, for example, a light-receiving side mirror 115, a light-receiving side optical system 116, a stopper aperture 117, a correction optical system 118, and a photoelectric conversion element 119.

[0020] The light source 110 includes a lamp or a light-emitting diode, etc. The collimator lens 111 converts the light from the light source 110 into parallel light with a substantially uniform intensity distribution in the cross section. The slit member 112 is configured by bonding a pair of prisms (prism-shaped members) such that their inclined surfaces face each other, and a plurality of openings (for example, nine pinholes) are formed on such a bonding surface using a light-shielding film such as chromium. The light-projecting side optical system 113 is a bilateral telecentric system, and guides each of the lights that have passed through the plurality of openings of the slit member 112 to a plurality of measurement target locations in the partition region of the substrate 104 via the light-projecting side mirror 114.

[0021] With respect to the light-projecting side optical system 113, the plane in which the opening is formed (bonding surface) and the plane including the surface of the substrate 104 are set to satisfy the shine-proof condition. In this embodiment, the incident angle Φ of the light from the light-projecting side optical system 113 to the substrate 104 (the angle formed with the optical axis AX) is 70 degrees or more. The plurality of (for example, nine) lights that have passed through the light-projecting side optical system 113 are incident on and form images at each independent measurement target location on the substrate. Further, the light from the light-projecting side optical system 113 is incident from a direction rotated by θ degrees (for example, 22.5 degrees) within the XY plane from the X direction so that a plurality of (for example, nine) measurement target locations on the substrate can be observed independently of each other.

[0022] The light-receiving side optical system 116 is a bilateral telecentric system. A plurality of lights (reflected lights) reflected at each measurement target location on the substrate 104 enter the light-receiving side optical system 116 via the light-receiving side mirror 115. The stopper aperture 117 is disposed inside the light-receiving side optical system 116 and is provided in common for a plurality of measurement target locations on the substrate. The stopper aperture 117 blocks higher-order diffracted light (noise light) generated by the pattern formed on the substrate 104.

[0023] The plurality of lights that have passed through the light-receiving side optical system 116 have their optical axes parallel to each other. The correction optical system 118 includes a plurality (for example, nine) of correction lenses, and recombines the plurality of lights that have passed through the light-receiving side optical system 116 into spot lights having the same size as each other on the photoelectric conversion surface (light-receiving surface) of the photoelectric conversion element 119. Further, the light-receiving side optical system 116, the stopper aperture 117, and the correction optical system 118 perform tilt correction so that each measurement target location on the substrate and the photoelectric conversion surface of the photoelectric conversion element 119 are conjugate to each other. Accordingly, there is no change in the position of the aperture image (pinhole image) on the photoelectric conversion surface due to the local tilt of each measurement target location on the substrate, and the aperture image changes on the photoelectric conversion surface according to the change in the height (position in the direction parallel to the optical axis AX) of each measurement target location. Here, the photoelectric conversion element 119 is composed of, for example, a plurality (for example, nine) of one-dimensional CCD line sensors, but a plurality of two-dimensional sensors may be arranged and configured.

[0024] In the exposure apparatus 100, as described above, the reticle 102 is held by the reticle stage 103. The reticle stage 103 is driven at a constant speed in the Y direction (the direction of arrow 103a) within a plane orthogonal to the optical axis AX of the projection optical system 101. At this time, the reticle stage 103 is driven for correction so that the position of the reticle stage 103 in the X direction always maintains the target position. The positions of the reticle stage 103 in the X direction and the Y direction are constantly measured by the bar mirror 120 disposed on the reticle stage 103 and the interferometer 121.

[0025] The illumination optical system 106 illuminates the original plate 102 using light from a light source that generates pulsed light such as an excimer laser. The illumination optical system 106 includes a beam shaping optical system, an optical integrator, a collimator lens, a mirror, a masking blade, etc., and efficiently transmits or reflects pulsed light in the far ultraviolet region. The beam shaping optical system shapes the cross-sectional shape (dimensions) of the incident light into a predetermined shape. The optical integrator makes the light distribution characteristics of the light uniform and illuminates the original plate 102 with uniform illuminance. The masking blade defines a rectangular illumination area corresponding to the chip size. The pattern of the original plate 102 partially illuminated in such an illumination area is projected onto the substrate 104 via the projection optical system 101.

[0026] The main control unit 127 is composed of a computer (information processing device) including, for example, a CPU and a memory, and comprehensively controls each part of the exposure apparatus 100 according to a program stored in a storage unit or the like. In order to form an image of the light from the pattern of the original plate 102 on a predetermined area of the substrate 104, the main control unit 127 controls the original plate stage 103 that holds the original plate 102 and the substrate stage 105 that holds the substrate 104. For example, the main control unit 127 adjusts the positions in the XY plane (positions in the X and Y directions, and rotation with respect to the Z axis) and the positions in the Z direction (rotation with respect to each of the X and Y axes) of the original plate 102 and the substrate 104 via the original plate stage 103 and the substrate stage 105. Further, the main control unit 127 drives the original plate stage 103 and the substrate stage 105 in synchronization with the projection optical system 101. In this way, the main control unit 127 controls an exposure process (scanning exposure) in which each of the partitioned areas of the substrate 104 is exposed in the exposure area while scanning the original plate 102 and the substrate 104 by the original plate stage 103 and the substrate stage 105.

[0027] As described above, when the original plate stage 103 is driven (scanned) in the direction of arrow 103a, the substrate stage 105 is driven (scanned) in the direction of arrow 105a at a speed corrected by the magnification (reduction ratio) of the projection optical system 101. The speed at which the original plate stage 103 is driven is determined based on the width in the scanning direction of the masking blade in the illumination optical system 106 and the sensitivity of the resist applied to the surface of the substrate 104 so as to be advantageous for productivity.

[0028] The alignment in the XY plane of the substrate 104 with respect to the pattern of the original plate 102 is performed based on the position of the original plate stage 103, the position of the substrate stage 105, and the position of the substrate 104 (each section region) with respect to the substrate stage 105. The positions of the original plate stage 103 and the substrate stage 105 are measured by the interferometers 121 and 124, respectively, as described above. In other words, the interferometer 121 functions as a first measurement unit that measures the position of the original plate stage 103 and obtains a first measurement value, and the interferometer 124 functions as a second measurement unit that measures the position of the substrate stage 105 and obtains a second measurement value. The position of the substrate 104 with respect to the substrate stage 105 is obtained by detecting a reference mark provided on the substrate stage 105 and an alignment mark provided on the substrate 104 by an alignment optical system (not shown).

[0029] The alignment in the Z direction of the substrate 104 with respect to the pattern of the original plate 102, that is, the alignment of the substrate 104 with respect to the image plane of the projection optical system 101, is realized by controlling the substrate stage 105 (the leveling stage included therein) based on the measurement result of the measurement unit MU.

[0030] In addition, in this embodiment, the main control unit 127 functions as an arithmetic unit that calculates the synchronization error between the original plate stage 103 and the substrate stage 105 during the period when the original plate stage 103 and the substrate stage 105 are driven synchronously in the scanning direction. With reference to FIG. 2, the arithmetic process for calculating the synchronization error between the original plate stage 103 and the substrate stage 105 by the main control unit 127 will be specifically described. As shown in FIG. 2, the main control unit 127 calculates the synchronization error between the original plate stage 103 and the substrate stage 105 from the control deviation of the original plate stage 103 and the control deviation of the substrate stage 105. Specifically, first, regarding the original plate stage 103, the main control unit 127 obtains the difference between the target position of the original plate stage 103 and the first measurement value regarding the position of the original plate stage 103 acquired by the interferometer 121, that is, the control deviation of the original plate stage 103. Similarly, regarding the substrate stage 105, the main control unit 127 obtains the difference between the target position of the substrate stage 105 and the second measurement value regarding the position of the substrate stage 105 acquired by the interferometer 124, that is, the control deviation of the substrate stage 105. Then, the main control unit 127 sets the difference between the control deviation of the original plate stage 103 and the control deviation of the substrate stage 105 as the synchronization error between the original plate stage 103 and the substrate stage 105. Note that the average value (moving average MA) of the synchronization error while the exposure slit (exposure region) passes through a certain point on the substrate 104 may be used as the synchronization error between the original plate stage 103 and the substrate stage 105. Also, the standard deviation (moving standard deviation MSD) of the synchronization error while the exposure slit (exposure region) passes through a certain point on the substrate 104 may be used as the synchronization error between the original plate stage 103 and the substrate stage 105.

[0031] FIG. 3 is a diagram showing the relationship between measurement points 303 to 311 formed by the measurement unit MU in the partition area 301 of the substrate 104 and the exposure slit 302. The exposure slit 302 is a rectangular exposure area indicated by a dashed line in FIG. 3. In other words, the exposure area is an area in the XY plane on which the exposure slit 302 is projected. The measurement points 303, 304, and 305 are measurement points formed on the exposure slit 302. The measurement points 306, 307, and 308, and the measurement points 309, 310, and 311 are measurement points formed at positions separated from each of the measurement points 303, 304, and 305 by a distance Lp.

[0032] The main control unit 127 switches the measurement points used for measuring the surface position (position in the height direction) of the measurement target location in the partition area 301 according to the direction (scanning direction) in which the substrate stage 105 is driven. For example, referring to FIG. 3, when the substrate stage 105 is driven in the direction indicated by the arrow F, the surface position of the measurement target location in the partition area 301 is measured at the measurement points 306 to 308. On the other hand, when the substrate stage 105 is driven in the direction indicated by the arrow R, the surface position of the measurement target location in the partition area 301 is measured at the measurement points 309 to 311. The main control unit 127 calculates the surface position (position in the Z direction) of the exposure target area including the measurement target location in the partition area 301 based on these measurement results. Then, until the exposure target area reaches the exposure slit 302, the main control unit 127 drives the substrate stage 105 in the Z direction (height direction of the substrate 104) so that the exposure target area is positioned at the optimum exposure position (target position), that is, performs so-called focus leveling drive. Here, the optimum exposure position is the imaging surface of the pattern of the original plate 102, that is, the position of the image surface of the projection optical system 101 (best focus position). However, the optimum exposure position does not mean a position that completely coincides with the position of the image surface of the projection optical system 101, but includes within the range of the allowable depth of focus.

[0033] Here, with reference to FIGS. 4(a) and 4(b), the partitioned region R on the substrate will be described in detail. As shown in FIG. 4(a), the partitioned region R on the substrate includes a total of 12 chip regions (regions where chips are formed), 3 in the X direction and 4 in the Y direction. FIG. 4(b) shows a partitioned region RR located around the substrate and having the same chip arrangement as the partitioned region R shown in FIG. 4(a). The partitioned region RR includes a chip region CR where chips are formed and a non-chip region NR where chips are not formed. The non-chip region NR corresponds to a region in contact with the substrate edge SE or a region outside the substrate. In the focus leveling drive for the partitioned region RR where the chip region CR and the non-chip region NR are mixed, only the surface position of the chip region CR is measured by the measurement unit MU. This is to align the surface position of the chip region CR with the optimal exposure position, which is the position of the image plane of the projection optical system 101, without being affected by the non-chip region NR in the focus leveling drive.

[0034] Hereinafter, with reference to FIGS. 5, 6A to 6D, 7(a) to 7(d), and 8, the exposure process by the exposure apparatus 100 and the focus leveling drive in such an exposure process will be specifically described.

[0035] FIG. 5 shows a substrate edge 501 and two partition regions 510 and 520 located in the vicinity of the substrate edge 501. In the present embodiment, when exposing the partition region 510, the substrate stage 105 is driven in the direction indicated by the arrow F, and when exposing the partition region 520, the substrate stage 105 is driven in the direction indicated by the arrow R. The partition region 510 includes a total of nine chip regions 510A, three in the X direction and three in the Y direction. The partition region 520 includes a chip region 520A and a non-chip region 520B. In addition, in the partition region 510, measurement target locations 511, 512, and 513 exist corresponding to each chip region as locations where the surface position should be measured by the measurement unit MU. Similarly, in the partition region 520, measurement target locations 521, 522, and 523 exist corresponding to each chip region or each non-chip region as locations where the surface position should be measured by the measurement unit MU. In FIG. 5, the measurement target locations indicated by ○ are measurement target locations where the surface position can be measured by the measurement unit MU, and the measurement target locations indicated by × are measurement target locations where the surface position cannot be measured (or not measured) by the measurement unit MU. In the partition region 520 where the chip region 520A and the non-chip region 520B are mixed, as described above, only the chip region 520A, that is, a part of the measurement target location 522 and the measurement target location 523 existing in the chip region 520A are measured by the measurement unit MU. In addition, in each of the partition regions 510 and 520, there are a plurality of measurement target locations in the Y direction to measure the surface position of their entire bodies, but in FIG. 5, for simplicity, only the measurement target locations 511, 512, 513, 521, 522, and 523 are shown.

[0036] Figures 6A to 6D show the positional relationships among the substrate edge 501, the measurement target locations 511 to 513 and 521 to 523 respectively existing in the partition regions 510 and 520, the exposure slit 302, and the measurement points 303 to 311 of the measurement unit MU. Referring to FIG. 6A, the partition region 510 is an area to be exposed (the target of the exposure process), and the partition region 520 is an area to be exposed next to the partition region 510. When the exposure process for the partition region (not shown) that is exposed before the partition region 510 is completed, the substrate stage 105 is driven so that the partition region 510 moves under the projection optical system 101. Then, when the substrate stage 105 reaches the acceleration start point, the substrate stage 105 is accelerated in the direction of arrow F.

[0037] FIG. 6B shows a state where the measurement points 306 to 308 of the measurement unit MU have reached the measurement target location 511 in the partitioned area 510. First, when the measurement points 306 to 308 of the measurement unit MU reach the measurement target location 511 in the partitioned area 510, the surface positions of the respective measurement target locations 511 are measured at each of the measurement points 306 to 308 to obtain a third measurement value. In other words, the measurement unit MU functions as a third measurement unit that measures the height-direction position of the partitioned area on the substrate and obtains a third measurement value. Based on the third measurement value thus obtained, the main control unit 127 performs focus leveling drive. For example, the target position of the substrate stage 105 in the focus leveling drive for positioning the exposure target area including the measurement target location 511 at the optimal exposure position is determined, and the substrate stage 105 is driven in the Z direction, rotation direction, and tilt direction. Such focus leveling drive is repeated at the timing when the measurement points 306 to 308 of the measurement unit MU reach the respective measurement target locations 512 and 513 in the partitioned area 510. Also, when a part of the exposure slit 302 reaches the partitioned area 510, the light source starts emitting light, and the exposure of the partitioned area 510 is started. Then, when all areas of the exposure slit 302 reach outside the partitioned area 510, the light source stops emitting light, and the exposure of the partitioned area 510 is ended. At this time, in the prior art, the synchronization error between the reticle stage 103 and the substrate stage 105 is calculated based on the control deviation of the reticle stage 103 and the control deviation of the substrate stage 105 during the period from the start to the stop of the light source emission.

[0038] When the exposure process for the partitioned area 510 is completed, the substrate stage 105 is driven in the X direction while decelerating in the Y direction so that the partitioned area 520 moves under the projection optical system 101. Then, when the substrate stage 105 reaches the acceleration start point, the substrate stage 105 is accelerated in the direction of arrow R.

[0039] FIG. 6C shows a state where the measurement points 309 to 311 of the measurement unit MU have reached the measurement target location 521 in the partition area 520. In the partition area 520, since the area where the measurement target location 521 exists is the non-chip area 520B, the surface position of the measurement target location 511 is not (cannot be) measured. Therefore, even if the measurement points 309 to 311 of the measurement unit MU reach the measurement target location 521 in the partition area 520, the focus leveling drive is not performed. However, when a part of the exposure slit 302 reaches the partition area 520, the light source starts emitting light and the exposure of the partition area 520 is started.

[0040] FIG. 6D shows a state where the measurement points 309 to 311 of the measurement unit MU have reached the measurement target location 522 in the partition area 520. The area where the measurement target location 522 exists is an area where the chip area 520A and the non-chip area 520B are mixed. Therefore, when the measurement points 309 to 311 of the measurement unit MU reach the measurement target location 522 in the partition area 520, at each of the measurement points 309 and 310, the surface positions of the measurement target locations 522 existing in the chip area 520A are measured to obtain third measurement values. On the other hand, for the measurement target location 522 existing in the non-chip area 520B (where the measurement point 311 is located), its surface position is not measured. In this way, based on the third measurement values obtained at the measurement points 309 and 310, the main control unit 127 performs the focus leveling drive. When the measurement points 309 to 311 of the measurement unit MU reach the measurement target location 523 in the partition area 520, the surface positions of the measurement target locations 523 are measured at each of the measurement points 309 to 311 to obtain third measurement values. Based on the third measurement values obtained in this way, the main control unit 127 performs the focus leveling drive. Also, when a part of the exposure slit 302 reaches the partition area 520, the light source starts emitting light and the exposure of the partition area 520 is started. Then, when all areas of the exposure slit 302 reach outside the partition area 520, the light source stops emitting light and the exposure of the partition area 520 is ended.

[0041] Referring to FIGS. 7(a) to 7(d), the driving of the substrate stage 105 in focus leveling driving will be described in detail. FIG. 7(a) shows the driving locus and control deviation of the substrate stage 105 during focus leveling driving (FIG. 6B) with respect to the partition region 510. FIG. 7(b) shows the synchronization error between the master stage 103 and the substrate stage 105 during focus leveling driving with respect to the partition region 510. FIG. 7(c) shows the driving locus and control deviation of the substrate stage 105 during focus leveling driving (FIGS. 6C and 6D) with respect to the partition region 520. FIG. 7(d) shows the synchronization error between the master stage 103 and the substrate stage 105 during focus leveling driving with respect to the partition region 520.

[0042] In FIGS. 7(a) to 7(d), time t0 is the time when the driving (in the height direction, rotation direction, tilt direction) of the substrate stage 105 starts. In FIGS. 7(a) and 7(b), time t1 is the time when a part of the exposure slit 302 reaches the partition region 510 and the light source starts emitting light to start the exposure of the partition region 510. Similarly, in FIGS. 7(c) and 7(d), time t2 is the time when a part of the exposure slit 302 reaches the partition region 520 and the light source starts emitting light to start the exposure of the partition region 520. In FIGS. 7(a) and 7(b), time t3 is the time when all regions of the exposure slit 302 reach outside the partition region 510 and the light source stops emitting light to end the exposure of the partition region 510. Similarly, in FIGS. 7(c) and 7(d), time t4 is the time when all regions of the exposure slit 302 reach outside the partition region 520 and the light source stops emitting light to end the exposure of the partition region 520. In FIGS. 7(a) and 7(c), the vertical axis Zposition indicates the position of the substrate stage 105 in the Z direction (height direction), and the vertical axis Zerror indicates the control deviation with respect to the target position of the substrate stage 105 in the Z direction. Also, Ztarget indicates the target position (Z direction) of the substrate stage 105 in the focus leveling drive. In FIGS. 7(b) and 7(d), the vertical axis Zsync indicates the synchronization error between the reticle stage 103 and the substrate stage 105. Note that in FIGS. 7(a) to 7(d), the horizontal axis indicates time. Also, 601 indicates the driving locus of the substrate stage 105, and 602 indicates the control deviation of the substrate stage 105. 603 indicates the synchronization error between the reticle stage 103 and the substrate stage 105, and 604 indicates the threshold value of the synchronization error between the reticle stage 103 and the substrate stage 105.

[0043] Referring to Fig. 7(a), regarding the focus leveling drive for the partition area 510, in the vicinity of the time t0 when the driving of the substrate stage 105 starts, the driving amount of the substrate stage 105 is large, and the control deviation of the substrate stage 105 is also large. As time elapses from the time t0, the driving amount of the substrate stage 105 decreases, and the control deviation of the substrate stage 105 also decreases. At the time t1 when the exposure of the partition area 510 starts, the driving amount of the substrate stage 105 becomes almost zero, and the control deviation of the substrate stage 105 converges near zero. Thus, if the focus leveling drive is completed before the time t1 when the exposure of the partition area 510 starts, the control deviation of the substrate stage 105 at the time t1 becomes small.

[0044] Fig. 7(b) shows the synchronization error between the original plate stage 103 and the substrate stage 105, which is calculated from the control deviation of the original plate stage 103 and the control deviation of the substrate stage 105 during the period from the start to the end of the exposure of the partition area 510. Specifically, the synchronization error between the original plate stage 103 and the substrate stage 105 is calculated based on the control deviation of the original plate stage 103 and the control deviation of the substrate stage 105 during the period between the time t1 and the time t3. Referring to Fig. 7(b), during the period from the time t1 to the time t3, the synchronization error between the original plate stage 103 and the substrate stage 105 is within the threshold range.

[0045] Referring to Fig. 7(c), regarding the focus leveling drive for the partition area 520, in the vicinity of the time t0 when the driving of the substrate stage 105 starts, the driving amount of the substrate stage 105 is large, and the control deviation of the substrate stage 105 is also large. As time elapses from the time t0, the driving amount of the substrate stage 105 decreases, and the control deviation of the substrate stage 105 also decreases. However, at the time t2 when the exposure of the partition area 520 starts, since the driving amount of the substrate stage 105 does not converge near zero, the control deviation of the substrate stage 105 does not converge sufficiently. Thus, if the focus leveling drive is not completed before the time t2 when the exposure of the partition area 520 starts, the control deviation of the substrate stage 105 at the time t2 becomes large.

[0046] FIG. 7(d) shows a synchronization error between the original stage 103 and the substrate stage 105, which is calculated from the control deviation of the original stage 103 and the control deviation of the substrate stage 105 during the period from the start to the end of the exposure of the partition region 520. Specifically, the synchronization error between the original stage 103 and the substrate stage 105 is calculated based on the control deviation of the original stage 103 and the control deviation of the substrate stage 105 for the period between time t2 and time t4. Referring to FIG. 7(d), during a part of the period from time t2 to time t3, the synchronization error between the original stage 103 and the substrate stage 105 exceeds the threshold value.

[0047] As shown in FIG. 7(d), when the synchronization error between the original stage 103 and the substrate stage 105 exceeds the threshold value, the main control unit 127 notifies, via the notification unit 128, that an abnormality has occurred in the partition region 520 on the substrate. In this way, the main control unit 127 functions as a processing unit that performs processing according to the synchronization error between the original stage 103 and the substrate stage 105. Further, the notification unit 128 includes a display device that displays an image of the partition region where the abnormality has occurred, an output device that outputs a sound of the partition region where the abnormality has occurred, and the like. Note that the processing according to the synchronization error between the original stage 103 and the substrate stage 105 is not limited to the processing of notifying the partition region where the synchronization error exceeds the threshold value, as described above. For example, as the processing according to the synchronization error between the original stage 103 and the substrate stage 105, processing such as making the substrate 104 including the partition region where the synchronization error exceeds the threshold value into a rework substrate may be included.

[0048] Here, as a method for reducing the synchronization error between the original plate stage 103 and the substrate stage 105, it is conceivable to limit the driving amount of the substrate stage 105 in focus leveling driving. As described above, since there is a correlation between the driving amount of the substrate stage 105 in focus leveling driving and the control deviation of the substrate stage 105, by limiting the driving amount of the substrate stage 105, the control deviation of the substrate stage 105 is reduced. However, a focus leveling tracking error may occur, which may cause a resolution defect due to defocus.

[0049] Also, as another method for reducing the synchronization error between the original plate stage 103 and the substrate stage 105, it is also conceivable to slow down the scanning speeds of the original plate stage 103 and the substrate stage 105. When the scanning speeds of the original plate stage 103 and the substrate stage 105 are slowed down, since the time from the start of focus leveling driving to the start of exposure increases, the control deviation of the substrate stage 105 at the time of starting exposure is reduced. However, the time until the exposure ends also increases, resulting in a decrease in productivity.

[0050] Therefore, in the present embodiment, within one partition area on the substrate, an area (calculation area) for calculating the synchronization error between the original plate stage 103 and the substrate stage 105 and an area (non-calculation area) for not calculating the synchronization error between the original plate stage 103 and the substrate stage 105 are provided (defined). In other words, within one partition area on the substrate, the main control unit 127 is made to function as a determination unit for determining an evaluation area for evaluating the synchronization error and a non-evaluation area for not evaluating the synchronization error.

[0051] FIG. 8(a) shows the drive locus and control deviation of the substrate stage 105 during focus leveling drive (FIGS. 6C and 6D) for the partition region 520 in the present embodiment. FIG. 8(b) shows the synchronization error between the reticle stage 103 and the substrate stage 105 during focus leveling drive for the partition region 520 in the present embodiment. In FIGS. 8(a) and 8(b), the horizontal axis represents time. The time t0 is the time when the drive (height direction, rotation direction, tilt direction) of the substrate stage 105 starts. The time t2 is the time when a part of the exposure slit 302 reaches the partition region 520 and the light source starts emitting light to start the exposure of the partition region 520. The time t31 is the time when a part of the exposure slit 302 reaches the chip region 520A of the partition region 520. The time t4 is the time when all regions of the exposure slit 302 reach outside the partition region 520 and the light source stops emitting light to end the exposure of the partition region 520. The vertical axis Zposition indicates the position of the substrate stage 105 in the Z direction (height direction), and the vertical axis Zerror indicates the control deviation with respect to the target position of the substrate stage 105 in the Z direction. The vertical axis Zsync indicates the synchronization error between the reticle stage 103 and the substrate stage 105. Also, Ztarget indicates the target position (Z direction) of the substrate stage 105 in focus leveling drive.

[0052] In this embodiment, the main control unit 127 determines, with time t31 as the boundary, an arithmetic region as an evaluation region for evaluating the synchronization error between the reticle stage 103 and the substrate stage 105, and a non-arithmetic region as a non-evaluation region where the synchronization error is not evaluated. Before time t31, specifically, the period from time t2 to time t31 is a period during which the non-chip region 520B in the partitioned region 520 is being exposed. In this embodiment, such a region where no chip is formed, that is, the non-chip region 520B, is defined as a region (non-arithmetic region) 605 where the synchronization error between the reticle stage 103 and the substrate stage 105 is not calculated. On the other hand, after time t31, specifically, the period from time t31 to time t4 is a period during which the chip region 520 in the partitioned region 520 is being exposed. In this embodiment, such a region where a chip is formed, that is, the chip region 520A, is defined as a region (arithmetic region) 606 where the synchronization error between the reticle stage 103 and the substrate stage 105 is calculated. As described above, in focus leveling driving, the chip region, which is a region where a chip is formed in the partitioned region, is adjusted to the optimal exposure position. Therefore, at time t31, the main control unit 127 generates a target value for the substrate stage 105 in focus leveling driving so that the position of the substrate stage 105 in the Z direction becomes the target position Ztarget, and drives the substrate stage 105.

[0053] Referring to FIG. 8(a), during the period from time t2 to time t31, since the driving amount of the substrate stage 105 does not converge near zero, the control deviation of the substrate stage 105 does not sufficiently converge either. Therefore, during the period from time t2 to time t31, the synchronization error between the reticle stage 103 and the substrate stage 105 exceeds the threshold value. However, during the period from time t2 to time t31, it is a period of exposing the non-chip region 520B of the partition region 520 and does not cause factors for defective resolution in the chip region 520A. Therefore, during the period from time t2 to time t31, it is not necessary to obtain the synchronization error between the reticle stage 103 and the substrate stage 105, and there is no problem even if the non-chip region 520B is set as the non-operation region 605. During the period from time t31 to time t4, the driving amount of the substrate stage 105 becomes almost zero, and the control deviation of the substrate stage 105 converges near zero. Therefore, during the period from time t31 to time t4, the synchronization error between the reticle stage 103 and the substrate stage 105 is within the threshold range. During the period from time t31 to time t4, since it is a period of exposing the chip region 520A of the partition region 520, it is necessary to obtain the synchronization error between the reticle stage 103 and the substrate stage 105. Therefore, in the present embodiment, the synchronization error between the reticle stage 103 and the substrate stage 105 is calculated with the chip region 520A as the operation region 606. And when the synchronization error between the reticle stage 103 and the substrate stage 105 exceeds the threshold value, as described above, the main control unit 127 notifies, via the notification unit 128, that an abnormality has occurred in the partition region 520 on the substrate.

[0054] In addition, when specifying the chip region (and at least one of the non-chip regions) of each partition region on the substrate, chip region information indicating the chip region within each partition region input via the input unit 129 may be used. For example, as shown in FIG. 4(b), the chip region information is input to the input unit 129 as information indicating the chip region CR and the non-chip region NR in the partition region R. Also, instead of the chip region information, it is also possible to specify the chip region (and at least one of the non-chip regions) of each partition region based on the design information indicating the arrangement of the chips formed in the partition regions on the substrate.

[0055] In FIGS. 7(a) to 7(d), FIG. 8(a), and FIG. 8(b), the control deviation and the synchronization error with respect to the target position in the Z direction (height direction) of the substrate stage 105 have been described, but the present invention is not limited thereto. The present invention can also be applied to the control deviation and the synchronization error with respect to the target position in the X direction and the Y direction of the substrate stage 105. Further, the present invention can also be applied to the control deviation and the synchronization error with respect to the target position of the rotation and tilt of the substrate stage 105.

[0056] Note that, in the present embodiment, during the period when the non-chip region within the partition region on the substrate is being exposed, the positions of the reticle stage 103 and the substrate stage 105 are not measured by the interferometers 121 and 124. Therefore, during the period when the non-chip region is being exposed, the first measurement value and the second measurement value cannot be obtained by each of the interferometers 121 and 124, and thus the main control unit 127 cannot calculate the synchronization error between the reticle stage 103 and the substrate stage 105. Therefore, as the synchronization error during the period when the reticle stage 103 and the substrate stage 105 are driven in synchronization in the scanning direction, the synchronization error is calculated based on the first measurement value and the second measurement value obtained by each of the interferometers 121 and 124 during the period when the chip region is being exposed. Note that, even during the period when the non-chip region is being exposed, the positions of the reticle stage 103 and the substrate stage 105 may be measured by the interferometers 121 and 124, and these measurement values may not be used when calculating the synchronization error. Further, the synchronization error may be calculated even during the period when the non-chip region is being exposed. Then, when determining (evaluating) whether the synchronization error exceeds the threshold value, among such synchronization errors, the synchronization error during the period when the target region (for example, the chip region) to be noted within the partition region on the substrate is being exposed may be extracted.

[0057] In addition, in the present embodiment, within the partitioned region on the substrate, an evaluation region for evaluating the synchronization error and a non-evaluation region for not evaluating the synchronization error are defined according to whether it is a chip region or a non-chip region, but it is not limited thereto. For example, based on the driving amount when driving the substrate stage 105 in focus leveling driving, an evaluation region for evaluating the synchronization error and a non-evaluation region for not evaluating the synchronization error may be defined.

[0058] For example, referring to FIGS. 6(a) to 6(d), FIGS. 8(a) and 8(b), in the focus leveling driving in the period before time t31, the driving amount when driving the substrate stage 105 is large. In such focus leveling driving, a region on the substrate where the driving amount when driving the substrate stage 105 is equal to or greater than a predetermined driving amount is set as a non-evaluation region (non-calculation region) for not evaluating the synchronization error. This is because the period from time t2 to time t31 is a period during which the non-chip region 520B where no chip is formed is being exposed as described above. On the other hand, in the focus leveling driving in the period from time t31 to time t4, the driving amount when driving the substrate stage 105 is small. In such focus leveling driving, a region on the substrate where the driving amount when driving the substrate stage 105 is less than a predetermined driving amount is set as an evaluation region (calculation region) for evaluating the synchronization error. This is because the period from time t31 to time t4 is a period during which the chip region 520A where a chip is formed is being exposed as described above.

[0059] Further, based on the flatness (information indicating the same) within each section area on the substrate, an evaluation area for evaluating the synchronization error and a non-evaluation area for not evaluating the synchronization error may be defined based on the driving amount when driving the substrate stage 105 in focus leveling driving. Within each section area on the substrate, as described above, the flatness is different between the area where the chip is formed and the area where the chip is not formed. Therefore, the chip area (or non-chip area where the chip is not formed) where the chip is formed is estimated from the flatness within each section area on the substrate, the chip area is set as the evaluation area, and the area excluding the chip area (non-chip area) is set as the non-evaluation area.

[0060] By defining an evaluation area for evaluating the synchronization error and a non-evaluation area for not evaluating the synchronization error within the section area on the substrate as in this embodiment, the synchronization error in unnecessary areas such as the non-chip area can be excluded and the synchronization error can be evaluated. As a result, it is reduced to evaluate that an abnormality has occurred in the section area due to the influence of the synchronization error in unnecessary areas such as the non-chip area, so that the productivity (yield) of the exposure apparatus 100 can be improved.

[0061] Referring to FIG. 9, the operation in the exposure apparatus 100, that is, the exposure process will be described. Such an exposure process is performed by the main control unit 127 comprehensively controlling each part of the exposure apparatus 100 as described above.

[0062] In S1, the substrate 104 is loaded into the exposure apparatus 100. Specifically, the substrate 104 is transported by a transport hand (not shown), and such a substrate is held on the substrate stage 105.

[0063] In S2, pre-alignment (pre-measurement and correction) for global alignment is performed. Specifically, the amount of deviation such as the rotation error of the substrate 104 is measured and corrected using a low-magnification field alignment optical system (not shown) so that the alignment mark on the substrate 104 is within the measurement range of the high-magnification field alignment optical system (not shown) used for global alignment.

[0064] In S3, global tilting is performed. Specifically, as shown in FIG. 10, the surface position (position in the height direction) of the sample region 901 among the plurality of partition regions of the substrate 104 is measured by the measurement unit MU. Then, based on the surface position of the sample region 901 measured by the measurement unit MU, the overall inclination of the substrate 104 is calculated and corrected.

[0065] In S4, pre-adjustment for measuring the surface position of the substrate 104 during exposure (while the original stage 103 and the substrate stage 105 are being driven) is performed. The pre-adjustment includes, for example, adjustment of the light amount of the light source 110 of the measurement unit MU and storage of the pattern step in the partition region of the substrate 104.

[0066] In S5, adjustment of the projection optical system 101 is performed. Specifically, using the light amount sensor and the reference mark (not shown) arranged on the substrate stage 105 and the reference plate (not shown) arranged on the original stage 103, the inclination and the image surface curvature of the projection optical system 101 are obtained. For example, the change in the light amount of the exposure light when the substrate stage 105 is driven in the X direction, the Y direction, and the Z direction is measured by the light amount sensor arranged on the substrate stage 105. Then, based on the change in the light amount of the exposure light, the deviation amount of the reference mark with respect to the reference plate is obtained and the projection optical system 101 is adjusted.

[0067] In S6, global alignment is performed. Specifically, the alignment marks on the substrate 104 are detected using a high-magnification field alignment optical system, and the overall displacement amount of the substrate 104 and the common displacement amount in each section region are obtained. In order to detect the alignment marks with high precision, the alignment marks must be located at the position where the contrast of the alignment marks is the best contrast (the best contrast position). For measuring the best contrast position, the measurement unit MU and the alignment optical system may be used. For example, the substrate stage 105 is driven to a predetermined height (the position in the Z direction), the contrast is measured with the alignment optical system, and the position of the substrate 104 in the Z direction is measured with the measurement unit MU, which is repeated. At this time, the measurement result of the contrast corresponding to each position in the Z direction of the substrate stage 105 and the measurement result of the position of the substrate 104 in the Z direction are associated and stored. Then, based on the measurement results of a plurality of contrasts, the position in the Z direction of the substrate stage 105 where the contrast is the highest is obtained and set as the best contrast position.

[0068] In S7, exposure of each section region of the substrate 104 is performed. Specifically, as described above, while performing focus leveling drive, the section region to be exposed on the substrate 104 is exposed. At this time, as described above, an evaluation region for evaluating the synchronization error and a non-evaluation region for not evaluating the synchronization error are defined within the section region on the substrate. Then, as the synchronization error between the reticle stage 103 and the substrate stage 105, the synchronization error in unnecessary regions such as non-chip regions is excluded, and the synchronization error in the chip region is evaluated.

[0069] In S8, the substrate 104 is carried out from the exposure apparatus 100. Specifically, the exposed substrate 104 is received from the substrate stage 105 by a transfer hand (not shown) and transferred outside the exposure apparatus 100.

[0070] According to the exposure process in this embodiment, it is possible to reduce the evaluation that an abnormality has occurred in the section region due to the influence of the synchronization error in unnecessary regions such as non-chip regions within the section region on the substrate.

[0071] The method for manufacturing an article according to an embodiment of the present invention is suitable for manufacturing articles such as flat panel displays, liquid crystal display elements, semiconductor elements, and MEMS. Such a manufacturing method includes a step of exposing a substrate coated with a photosensitive agent using the exposure apparatus 100 described above, and a step of developing the exposed photosensitive agent. Further, an etching process, an ion implantation process, etc. are performed on the substrate using the pattern of the developed photosensitive agent as a mask, and a circuit pattern is formed on the substrate. These processes such as exposure, development, and etching are repeated to form a circuit pattern composed of a plurality of layers on the substrate. In a subsequent process, dicing (processing) is performed on the substrate on which the circuit pattern is formed, and chip mounting, bonding, and inspection processes are performed. Further, such a manufacturing method may include other well-known processes (oxidation, film formation, vapor deposition, doping, planarization, resist stripping, etc.). The method for manufacturing an article according to the present embodiment is advantageous in at least one of the performance, quality, productivity, and production cost of the article as compared with the prior art.

[0072] The invention is not limited to the above embodiment, and various changes and modifications are possible without departing from the spirit and scope of the invention. Therefore, the claims are attached to disclose the scope of the invention.

Explanation of Reference Numerals

[0073] 100: Exposure apparatus 102: Original plate 103: Original plate stage 104: Substrate 105: Substrate stage 127: Main control unit

Claims

An exposure apparatus that scans and exposes a plurality of shot regions on a substrate using a master plate on which a pattern is formed, comprising: a first measurement unit that measures the position of the master plate stage holding the master plate to obtain a first measurement value; a second measurement unit that measures the position of the substrate stage holding the substrate to obtain a second measurement value; a calculation unit that calculates a synchronization error between the master plate stage and the substrate stage; and having each of the plurality of shot regions includes an evaluation region for evaluating the synchronization error and a non-evaluation region for not evaluating the synchronization error; the calculation unit calculates the synchronization error based on the first measurement value and the second measurement value during a period when the evaluation region is being exposed. The exposure apparatus is characterized by this.

2. The exposure apparatus further includes a processing unit that performs processing according to the synchronization error, wherein the processing unit, as the processing, notifies a shot region in which the synchronization error for the evaluation region calculated by the calculation unit exceeds a threshold value. The exposure apparatus according to claim 1 is characterized by this.

3. The exposure apparatus further includes a processing unit that performs processing according to the synchronization error, wherein the processing unit, as the processing, sets a substrate including a shot region in which the synchronization error for the evaluation region calculated by the calculation unit exceeds a threshold value as a rework substrate. The exposure apparatus according to claim 1 or 2 is characterized by this.

4. For each of the plurality of shot regions, an input unit that inputs chip region information indicating a chip region within the shot region; a determination unit that determines the chip region as the evaluation region based on the chip region information input to the input unit, and determines a region excluding the chip region within the shot region as the non-evaluation region; The exposure apparatus according to any one of claims 1 to 3, further comprising this.

5. Based on design information indicating an arrangement of chips configured in each of the plurality of shot regions, a determination unit that determines a chip region within the shot region as the evaluation region, and determines a region excluding the chip region within the shot region as the non-evaluation region. The exposure apparatus according to any one of claims 1 to 3, further comprising this.

6. Based on the information indicating the flatness within each shot area on the substrate, a region estimated to be the chip area within the shot area is determined as the evaluation area, and a region excluding the region estimated to be the chip area within the shot area is determined as the non-evaluation area. The exposure apparatus according to any one of claims 1 to 3, further comprising a determination unit.

7. Before the shot area on the substrate held by the substrate stage reaches the exposure area where exposure is performed on the shot area, a third measurement unit that measures the position in the height direction of the shot area to obtain a third measurement value; Based on the drive amount when driving the substrate stage so that the position in the height direction of the substrate held by the substrate stage reaches the target position by the time the shot area reaches the exposure area, which is determined based on the third measurement value, a determination unit that determines the evaluation area and the non-evaluation area; The exposure apparatus according to any one of claims 1 to 3, further comprising the above.

8. The determination unit determines, within the shot area on the substrate, a region where the drive amount is less than a predetermined drive amount as the evaluation area, and a region where the drive amount is greater than or equal to the predetermined drive amount as the non-evaluation area. The exposure apparatus according to claim 7.

9. The calculation unit extracts the first measurement value and the second measurement value obtained during the period of exposing the evaluation area from the first measurement value obtained by the first measurement unit and the second measurement value obtained by the second measurement unit, and calculates the synchronization error. The exposure apparatus according to any one of claims 1 to 8.

10. The first measurement unit measures the position of the reticle stage during the period of exposing the evaluation area to obtain the first measurement value, and does not measure the position of the reticle stage during the period of exposing the non-evaluation area. The second measurement unit measures the position of the substrate stage during the period of exposing the evaluation area to obtain the second measurement value, and does not measure the position of the substrate stage during the period of exposing the non-evaluation area. The exposure apparatus according to any one of claims 1 to 8. The exposure apparatus according to claim 1, further comprising a processing unit that performs processing according to a synchronization error during a period in which a target area to be noted within the shot area among the synchronization errors calculated by the calculation unit is being exposed.

12. An exposure method for performing scanning exposure of a plurality of shot areas on a substrate using a reticle on which a pattern is formed, comprising a step of calculating a synchronization error between a reticle stage that holds the reticle and a substrate stage that holds the substrate, wherein each of the plurality of shot areas includes an evaluation area for evaluating the synchronization error and a non-evaluation area for not evaluating the synchronization error, and in the step, the synchronization error is calculated based on a first measurement value obtained by measuring the position of the reticle stage and a second measurement value obtained by measuring the position of the substrate stage during a period in which the evaluation area is being exposed.

13. The exposure method according to claim 12, further comprising a step of performing processing according to a synchronization error during a period in which a target area to be noted within the shot area among the synchronization errors calculated in the step is being exposed.

14. A step of exposing a substrate using the exposure apparatus according to any one of claims 1 to 11, a step of developing the exposed substrate, and a step of manufacturing an article from the developed substrate, characterized by comprising the above steps.

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