Method of manufacturing a semiconductor device and semiconductor manufacturing apparatus

Abstract

To provide a manufacturing method of a semiconductor device capable of performing laser annealing processing while suppressing failure to a substrate in which a crack is generated, and provide a manufacturing apparatus.SOLUTION: A manufacturing method of a semiconductor device includes: detecting a clack generated in a main surface of a substrate; and scanning the main surface of the substrate with a laser beam so that a time integration of a light amount of a laser beam for annealing radiated to a unit area within a crack region containing the detected crack becomes smaller than the time integration of the light amount of the laser beam radiated to a unit area within a region different from the crack region, and performing laser annealing processing to the substrate.SELECTED DRAWING: Figure 10

Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing a semiconductor device and a semiconductor manufacturing apparatus.

Background Art

[0002] A laser annealing process, which is one of the manufacturing processes of a semiconductor device, is a process of locally heating a semiconductor substrate using a laser to activate, for example, a semiconductor layer. Currently, in order to meet the market requirements of low loss, the thinning of semiconductor substrates is progressing.

[0003] Patent Document 1 discloses a technique for laser dicing a substrate to be processed. In Patent Document 1, in order to avoid overlapping of laser irradiation, when laser light passes through an area that has been irradiated once, the laser light is blocked.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] Since the substrate becomes thinner by the thinning process, if a crack occurs on one main surface of the substrate, the crack is likely to extend to the other main surface of the substrate. When laser light is irradiated onto the crack on one main surface by laser annealing, the laser light easily reaches the other main surface of the substrate, and the other main surface of the substrate is unnecessarily heated. Due to this heating, for example, problems such as welding may occur between a stage that supports the other main surface of the substrate and the substrate.

[0006] In order to solve such problems, it is conceivable to discard the substrate with cracks in advance and perform laser annealing treatment only on the substrates without cracks. However, if the substrates are discarded, the yield will decrease.

[0007] The present disclosure has been made to solve the above problems, and an object thereof is to provide a method and an apparatus for manufacturing a semiconductor device capable of performing laser annealing processing while suppressing defects even on a substrate in which cracks have occurred.

Means for Solving the Problems

[0008] The method for manufacturing a semiconductor device according to the present disclosure detects cracks generated on the main surface of a substrate, After the detection of cracks, and scans the main surface of the substrate with laser light so that the time integral of the amount of laser light for annealing irradiated per unit area in a crack region including the detected crack is smaller than the time integral of the amount of laser light irradiated per unit area in a region different from the crack region, and performs laser annealing processing on the substrate. This is a method for manufacturing a semiconductor device.

[0009] The semiconductor manufacturing apparatus according to the present disclosure includes an inspection unit that detects cracks generated on the main surface of a substrate, a stage that holds the substrate, an optical unit that irradiates the substrate held by the stage with laser light for annealing, a scanning unit that scans the laser light on the substrate, After the detection of cracks by the inspection unit, and a control unit that controls the optical unit and the scanning unit so that the time integral of the amount of laser light irradiated per unit area in a crack region including the crack detected by the inspection unit is smaller than the time integral of the amount of laser light irradiated per unit area in a region different from the crack region, scans the laser light on the main surface of the substrate, and performs laser annealing processing on the substrate. This is a semiconductor manufacturing apparatus.

Advantages of the Invention

[0010] According to the present disclosure, even on a substrate in which cracks have occurred, laser annealing processing can be performed while suppressing defects.

Brief Description of the Drawings

[0011]

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Mode for Carrying Out the Invention

[0012] <Embodiment 1> FIG. 1 is a plan view schematically showing an example of the configuration of a semiconductor manufacturing apparatus 100 according to Embodiment 1. A semiconductor substrate 1 is carried into the semiconductor manufacturing apparatus 100. The semiconductor substrate 1 has, for example, a disc shape.

[0013] FIG. 2 is a plan view schematically showing an example of the configuration of the semiconductor substrate 1. Hereinafter, one main surface of the semiconductor substrate 1 is also referred to as a first main surface 1a, and the main surface on the side opposite to the first main surface 1a is also referred to as a second main surface 1b. In a plan view, a plurality of semiconductor device regions 1c are formed on the semiconductor substrate 1. Various semiconductor layers, insulating layers, and electrodes are formed in each semiconductor device region 1c to manufacture a semiconductor device. A semiconductor substrate 1 during manufacturing is carried into the semiconductor manufacturing apparatus 100. More specifically, a semiconductor substrate 1 in a state where an impurity implantation layer is formed in each semiconductor device region 1c is carried in.

[0014] The semiconductor manufacturing apparatus 100 is a laser annealing apparatus that performs a laser annealing process on the semiconductor substrate 1. The laser annealing process is a process of irradiating the semiconductor substrate 1 with laser light to heat the semiconductor substrate 1, and by this heating, activating the impurity implantation layer of the semiconductor substrate 1 electrically. By this laser annealing process, the impurity implantation layer of the semiconductor substrate 1 becomes a semiconductor layer having a conductivity type corresponding to the impurity.

[0015] In the example of FIG. 1, the semiconductor manufacturing apparatus 100 includes a load port 110, an inspection unit 120, a laser annealing unit 130, and a transfer unit 140. The load port 110 is an interface unit for carrying the semiconductor substrate 1 in and out with the outside. Here, a cassette 38 storing a plurality of semiconductor substrates 1 is carried in and out of the load port 110. Although one load port 110 is shown in the example of FIG. 1, a plurality of load ports 110 may be provided.

[0016] The transfer unit 140 takes out the unprocessed semiconductor substrate 1 from the cassette 38 and transfers this semiconductor substrate 1 to the inspection unit 120. As will be described later, the inspection unit 120 inspects whether there are cracks in the semiconductor substrate 1. The transfer unit 140 takes out the inspected semiconductor substrate 1 from the inspection unit 120 and transfers this semiconductor substrate 1 to the laser annealing unit 130. The laser annealing unit 130 scans the semiconductor substrate 1 with laser light according to the inspection result of the inspection unit 120 and performs laser annealing processing on the semiconductor substrate 1. The laser annealing processing according to the inspection result will be described in detail later. The transfer unit 140 takes out the laser-annealed semiconductor substrate 1 from the laser annealing unit 130 and transfers this semiconductor substrate 1 to the cassette 38.

[0017] By the transfer unit 140 sequentially taking out the unprocessed semiconductor substrates 1 from the cassette 38 and transferring them along the above transfer path, the processed semiconductor substrates 1 are sequentially stored in the cassette 38. When all the semiconductor substrates 1 are processed, the cassette 38 is carried out to the outside from the load port 110.

[0018] <Transfer unit 140> The transfer unit 140 includes, for example, an articulated arm 141, a hand 142, and a lifting unit 143. The hand 142 is attached to the tip of the articulated arm 141, and the base end of the articulated arm 141 is attached to the lifting unit 143. The articulated arm 141 horizontally moves the hand 142 by driving the joint part. The lifting unit 143 raises and lowers the articulated arm 141 to integrally raise and lower the articulated arm 141 and the hand 142. The hand 142 may be either a scooping type or a Bernoulli type hand.

[0019] <Inspection unit 120> In the example of FIG. 1, the inspection unit 120 includes an aligner 121 and a sensor unit 122. The aligner 121 includes, for example, a holding mechanism that holds the semiconductor substrate 1 horizontally, and a rotation mechanism that rotates the semiconductor substrate 1 held by the holding mechanism. The holding mechanism holds the semiconductor substrate 1 by various methods such as a vacuum chuck, an electrostatic chuck, and a mechanical chuck. Here, the holding mechanism holds the semiconductor substrate 1 in a posture with the second main surface 1b facing vertically upward. The rotation mechanism has, for example, a motor and rotates the holding mechanism around a specified rotation axis. The specified rotation axis is an axis that passes through the center of the semiconductor substrate 1 in the state held by the holding mechanism and is parallel to the vertical direction. When the rotation mechanism rotates the holding mechanism, the semiconductor substrate 1 held by the holding mechanism also rotates around the rotation axis. As shown in FIG. 2, a notch 1d is formed in the semiconductor substrate 1, and the aligner 121 rotates the semiconductor substrate 1 so that the notch 1d is at a specified rotation position.

[0020] The sensor unit 122 includes a sensor for detecting cracks that may occur in the semiconductor substrate 1. The cracks referred to here include cracks and splits that occur on the second main surface 1b of the semiconductor substrate 1. The cracks may reach the first main surface 1a of the semiconductor substrate 1 or may reach the periphery of the semiconductor substrate 1. Cracks that reach the first main surface 1a may also be called through-cracks. The sensor unit 22 detects the presence or absence of cracks in the semiconductor substrate 1, and when cracks occur, also detects the position and shape of the cracks.

[0021] The sensor of the sensor unit 122 is, for example, a sensor of an image inspection method or a laser inspection method. In the former case, the sensor is, for example, an image sensor including light receiving elements arranged two-dimensionally, and images the second main surface 1b of the semiconductor substrate 1. The sensor unit 122 detects a crack based on the captured image of the semiconductor substrate 1. In the latter case, the sensor includes, for example, a light emitting unit that irradiates the second main surface 1b of the semiconductor substrate 1 with inspection light, and a light receiving unit that receives the inspection light reflected from the second main surface 1b of the semiconductor substrate 1. The sensor unit 122 detects a crack based on the amount of received light measured by the light receiving unit.

[0022] <Laser annealing unit 130> FIG. 3 is a side view schematically showing an example of the configuration of the laser annealing unit 130 according to Embodiment 1. The laser annealing unit 130 includes an optical unit 131, a stage 137, and a scanning unit 138.

[0023] The stage 137 holds the semiconductor substrate 1 horizontally. Here, the stage 137 holds the semiconductor substrate 1 with the second main surface 1b facing vertically upward. As the chucking method of the stage 137, any of a vacuum chuck, an electrostatic chuck, or a mechanical chuck may be adopted as long as the flatness of the second main surface 1b of the semiconductor substrate 1 can be ensured.

[0024] When a vacuum chuck is adopted, a plurality of suction holes are formed on the upper surface of the stage 137. A negative pressure is formed in the suction holes by a suction mechanism (not shown), and thereby the semiconductor substrate 1 is adsorbed to the stage 137. In order to suppress the defocusing effect at the suction hole portion, it is desirable that the diameter of each suction hole is 1 mm or less. Note that the stage 137 may be formed of a porous material. Also in this case, the pore diameter (corresponding to the suction hole) of the stage 137 is 1 mm or less. Such a chucking method of the stage 137 is also called a porous chuck.

[0025] The optical unit 131 irradiates the laser light 30 for annealing onto the semiconductor substrate 1 held by the stage 137. For example, the optical unit 131 includes a laser oscillator 132, a transmittance adjustment mechanism 133 such as an attenuator, a laser switch 134, and a mirror 135. Although the optical unit 131 further includes a uniform optical system such as a homogenizer for equalizing the light quantity distribution of light and a condenser lens for condensing the laser light 30, these are not shown in FIG. 3.

[0026] The laser oscillator 132 emits the laser light 30. The laser light 30 from the laser oscillator 132 is incident on the transmittance adjustment mechanism 133. The transmittance adjustment mechanism 133 adjusts the amplitude of the laser light 30 by adjusting its own transmittance. The laser light 30 that has passed through the transmittance adjustment mechanism 133 is incident on the laser switch 134.

[0027] The laser switch 134 switches between an open state in which the laser light 30 passes through and a closed state in which the laser light 30 is blocked. For example, the laser switch 134 includes a plate member having an opening and a moving mechanism for moving the plate member. The moving mechanism includes a drive source such as a motor and moves the plate member between an open position and a closed position. The open position is the position of the plate member when the laser light 30 passes through the opening, and the closed position is the position of the plate member when the laser light 30 is blocked by the plate member.

[0028] The laser light 30 that has passed through the laser switch 134 is incident on the mirror 135. The mirror 135 reflects the laser light 30 toward the semiconductor substrate 1 on the stage 137. The laser light 30 reflected by the mirror 135 irradiates the semiconductor substrate 1.

[0029] The scanning unit 138 scans the laser beam 30 on the semiconductor substrate 1. For example, the scanning unit 138 moves the stage 137 two-dimensionally along the horizontal direction with respect to the optical unit 131. Due to the movement of this stage 137, the laser beam 30 moves on the semiconductor substrate 1. Note that the scanning unit 138 does not necessarily have to move the stage 137, and the optical unit 131 may be moved with respect to the stage 137. Alternatively, the scanning unit 138 may include a galvanometer mirror and an fθ lens.

[0030] <Electrical Configuration of the Semiconductor Manufacturing Apparatus 100> FIG. 4 is a block diagram schematically showing an example of the electrical configuration of the semiconductor manufacturing apparatus 100. The semiconductor manufacturing apparatus 100 further includes, for example, a host PC (personal computer) 150 and a control unit 160. The host PC 150 is electrically connected to the control unit 160 and gives various instructions to the control unit 160. The control unit 160 is electrically connected to the load port 110, the inspection unit 120, the laser annealing unit 130, and the transfer unit 140 and controls them.

[0031] The control unit 160 is an electronic circuit and includes, for example, a processing circuit such as a CPU (Central Processing Unit), a temporary storage unit such as a RAM (Random Access Memory), and a non-temporary storage unit such as a ROM (Read Only Memory). A program is stored in the non-temporary storage unit, and by operating according to the program, the processing circuit enables the control unit 160 to perform a specified operation. Note that part or all of the functions of the control unit 160 do not necessarily have to be realized by software and may be realized by dedicated hardware such as a logic circuit.

[0032] Also, since the host PC 150 also has a control unit similar to the control unit 160, it is also possible to understand that the entire host PC 150 and the control unit 160 constitute one control unit.

[0033] Here, first, an overview of the scanning control of the laser beam 30 by the control unit 160 will be given, and then a detailed operation example will be described.

[0034] FIG. 5 schematically shows an example of the locus of movement of the beam 31, which is the irradiation area (i.e., the spot) of the laser beam 30 on the semiconductor substrate 1. In FIG. 5, the locus of movement of the beam 31 is mainly indicated by the solid-line arrows. The beam 31 moves along the scanning lines in the scanning direction across the semiconductor substrate 1 and moves to the next scanning line along the pitch direction orthogonal to the scanning direction on the outer peripheral side of the semiconductor substrate 1. By sequentially moving the beam 31 along all the scanning lines, the entire semiconductor substrate 1 is scanned.

[0035] In the example of FIG. 5, a crack 1e is formed in the semiconductor substrate 1. This crack 1e is detected by the inspection unit 120, and an inspection result signal including the position and shape of the crack 1e is output from the inspection unit 120 to the control unit 160.

[0036] The control unit 160 controls the laser annealing unit 130 to scan the laser beam 30 on the semiconductor substrate 1 and perform a laser annealing process on the semiconductor substrate 1 as described below. Specifically, the control unit 160 controls the laser annealing unit 130 such that the time integral of the light amount of the laser beam 30 irradiated per unit area within the crack region 1f including the crack 1e is smaller than the time integral of the light amount of the laser beam 30 irradiated per unit area within a region different from the crack region 1f. As a more specific example, the laser annealing unit 130 causes the beam 31 to disappear when the beam 31 passes through the crack 1e. For example, the control unit 160 operates the laser opening / closing device 134 and the scanning unit 138 in synchronization to block the laser beam 30 from the laser opening / closing device 134 during the period when the beam 31 passes through the crack region 1f.

[0037] As a result, irradiation of the laser beam 30 (i.e., the beam 31) onto the crack 1e can be substantially avoided, and the amount of heat applied to the crack region 1f can be reduced. Therefore, malfunctions caused by irradiation of the laser beam 30 onto the crack 1e can be suppressed. Specific examples of such malfunctions will be described later.

[0038] <An example of the functional units of the control unit 160> Next, an example of a specific functional unit of the control unit 160 for realizing the above control will be described. In the example of FIG. 4, the control unit 160 includes an inspection result receiving unit 161, an irradiation map correction unit 162, and an annealing control unit 163.

[0039] The inspection result receiving unit 161 receives an inspection result signal indicating the inspection result by the inspection unit 120 from the inspection unit 120. This inspection result signal includes, for example, information indicating the presence or absence of the crack 1e and information indicating the position and shape of the crack 1e on the semiconductor substrate 1. The position and shape of the crack 1e can be represented using coordinates in a virtual coordinate system set on the second main surface 1b of the semiconductor substrate 1.

[0040] The irradiation map correction unit 162 corrects irradiation map information indicating an irradiation map on the semiconductor substrate 1 to which the laser beam 30 is to be irradiated, based on the inspection result signal of the inspection unit 120. Here, first, the irradiation map will be described.

[0041] FIG. 6 is a diagram for explaining the irradiation map according to the first embodiment. The irradiation map includes a plurality of components 51 virtually arranged on the semiconductor substrate 1 in a plan view. The plurality of components 51 have a rectangular shape and are adjacent to each other in a plan view. The plurality of components 51 are arranged in a matrix so as to cover the entire surface of the semiconductor substrate 1 with the scanning direction as the row direction and the pitch direction as the column direction.

[0042] FIG. 7 is a view showing an enlarged part of the irradiation map of FIG. 6. In the example of FIG. 7, the beam 31 is also shown. Here, as an example, the beam 31 is shown as being formed by a homogeneous optical system. In the example of FIG. 7, the beam 31 has a rectangular shape with the scanning direction of the beam 31 being the short side direction. Conversely, the optical unit 131 shapes the shape of the laser beam 30 such that the shape in the cross-section perpendicular to the traveling direction of the laser beam 30 is similar to the shape of the beam 31 in FIG. 7.

[0043] The size of the component 51 is preset based on the beam 31 and registered in the host PC 150. The size of each component 51 is defined by the width 52 and the width 53. The width 52 is the width along the scanning direction, and the width 53 is the width along the pitch direction. The width 53 of the component 51 is set based on the beam width 33 of the beam 31 (specifically, the width along the pitch direction). As a specific example, the width 53 of the component 51 is set to 1 / n (here, 1 / 2) of the beam width 33. In this case, as the beam 31 moves along the scanning direction, the laser beam 30 is irradiated onto two rows of the components 51. That is, one scanning line is composed of two rows of the components 51.

[0044] The width 52 of the component 51 is set to be at least equal to or greater than the beam width 32 of the beam 31 (specifically, the width along the scanning direction). In the present embodiment, for example, it can be set as described below. That is, the width 52 of the component 51 is set so that the laser opening / closing device 134 can complete the switching operation between the open and closed states within the passing period during which the beam 31 passes through one component 51 in the scanning direction. Here, the passing period specifically refers to the following period. Here, the case where the beam 31 is moving from left to right will be described as an example. In this case, the left end 31a of the beam 31 corresponds to the rear end in the moving direction, and the right end 31b of the beam 31 corresponds to the front end. Similarly, the left end 51a of the component 51 corresponds to the rear end, and the right end 51b of the component 51 corresponds to the front end. The passing period is the period from the time when the rear end 31a of the beam 31 reaches the rear end 51a of the component 51 to the time when the front end 31b of the beam 31 reaches the front end 51b of the component 51.

[0045] For example, assume that the beam width 32 is 0.2 mm, the moving speed of the beam 31 is 200 mm / sec, and the opening / closing time required for the switching operation of the laser opening / closing device 134 is 0.5 msec. In this case, it is desirable to define the width 52 of the component 51 as being equal to or greater than the sum (= 1.2 mm) of the beam width 32 and the moving amount of the beam 31 (= 1.0 mm) during the switching operation of the laser opening / closing device 134. Thereby, the laser opening / closing device 134 can cause the beam 31 to disappear or be revived during the passing period in which the beam 31 passes through one component 51.

[0046] More preferably, the width 52 of the component 51 is set so that the laser opening / closing device 134 can return from the open state to the closed state and then to the open state again within the passing period. That is, it is desirable to define the width 52 of the component 51 as being equal to or greater than the sum (= 2.2 mm) of the beam width 32 and the moving amount of the beam 31 (= 2.0 mm) during two switching operations of the laser opening / closing device 134. According to this, the laser opening / closing device 134 can cause the beam 31 to disappear once and then be revived within the passing period in which the beam 31 passes through one component 51.

[0047] The irradiation map information includes, for example, information about the amount of light of the beam 31 irradiated to each component 51. In the irradiation map information, initially, the irradiation map is set so that the beam 31 is irradiated to all of the components 51 with a specified amount of light. Therefore, in the scanning control based on the initial irradiation map information, the operation information of the optical unit 131 and the scanning unit 138 is determined so that the beam 31 is irradiated to all of the components 51 with a specified amount of light. For example, the laser opening / closing device 134 is always open during the scanning of the laser light 30, and the operation information can be determined so that the scanning unit 138 allows the beam 31 to pass through all of the components 51 (that is, all of the scanning lines).

[0048] The irradiation map correction unit 162 corrects the irradiation map information based on the position and shape of the crack 1e included in the inspection result signal from the inspection unit 120. In the example of FIG. 7, the crack 1e is formed across five components 51. The crack region 1f includes the crack 1e and is a region with one component 51 that constitutes the scanning lines of each row as one minimum unit. Here, since the scanning line is composed of two components 51 for two rows, two components 51 arranged in the pitch direction constitute one minimum unit. The irradiation map correction unit 162 corrects the irradiation map information so that the time integral of the light amount per unit area within the crack region 1f is smaller than the time integral of the light amount per unit area within a component 51 different from the crack region 1f. For example, the irradiation map information is corrected so that the beam 31 disappears in the crack region 1f.

[0049] The host PC 150 rewrites the operation information of the optical unit 131 and the scanning unit 138 registered in itself based on the corrected irradiation map information and transfers the corrected operation information to the control unit 160. Note that the control unit 160 may also rewrite the operation information.

[0050] The annealing control unit 163 synchronously controls the optical unit 131 and the scanning unit 138 based on the corrected operation information. Specifically, for example, the annealing control unit 163 causes the laser opening / closing device 134 to block the laser light 30 during the period when the beam 31 passes through the crack region 1f.

[0051] <Method for manufacturing a semiconductor device> Next, taking as an example a method for manufacturing a semiconductor device for manufacturing an RC-IGBT (Reverse Conducting Insulated Gate Bipolar Transistor), the method for manufacturing the semiconductor device according to the present embodiment will be described more specifically. Also, in the description of the method for manufacturing the semiconductor device, the operation of the semiconductor manufacturing apparatus 100 will be described. FIG. 8 is a flowchart showing an example of the method for manufacturing a semiconductor device.

[0052] In the following description of the method for manufacturing a semiconductor device, the method for manufacturing the active region of an RC-IGBT is described, and the methods for manufacturing the termination region, the gate signal receiving region, etc. are omitted.

[0053] In the method for manufacturing a semiconductor device according to each embodiment, a semiconductor device is manufactured with a plurality of semiconductor substrates 1 as one group. As shown in FIG. 2, a semiconductor device is formed in at least one semiconductor device region 1c on each of the plurality of semiconductor substrates 1.

[0054] The method for manufacturing a semiconductor device includes a semiconductor substrate preparation step, a first main surface side semiconductor layer formation step, a first main surface side trench formation step, a first main surface side gate electrode formation step, a first main surface side protective film formation step, a second main surface side grinding step, a second main surface side impurity implantation step, a second main surface side laser annealing step, a second main surface side electrode formation step, a first main surface side protective film removal step, and a dicing step. FIG. 9 is a cross-sectional view schematically showing an example of the configuration of the semiconductor substrate 1 in each step. In FIG. 9, a portion corresponding to one semiconductor element (RC-IGBT) is shown.

[0055] In the semiconductor substrate preparation step, an n-type semiconductor substrate 1 having a low donor concentration, as shown in FIG. 9(a), is prepared (step S1). Hereinafter, not only the state prepared in the semiconductor substrate preparation step but also the state in which various layers such as a semiconductor layer, an insulating layer, and an electrode are formed in the following manufacturing steps are included and referred to as the semiconductor substrate 1.

[0056] In the first main surface side semiconductor layer forming step, as shown in FIG. 9(b), a p-type first main surface side p layer 10 and an n-type first main surface side n layer 11 are formed on a portion of the semiconductor substrate 1 on the first main surface 1a side (step S2). Specifically, impurities serving as donors and impurities serving as acceptors are sequentially ion-implanted into the first main surface 1a of the semiconductor substrate 1 so that their depths are different, and a heat treatment is performed. Thereby, the first main surface side p layer 10 and the first main surface side n layer 11 are formed. Hereinafter, among the semiconductor substrate 1 in FIG. 9(b), portions other than the first main surface side p layer 10 and the first main surface side n layer 11 are also referred to as a drift layer 9. The impurity concentrations of the first main surface side p layer 10 and the n-type first main surface side n layer 11 are higher than the impurity concentration of the drift layer 9. For example, impurities such as arsenic and phosphorus are used as donors, and impurities such as boron and aluminum are used as acceptors. By selectively implanting donors and acceptors using a mask, a plurality of first main surface side p layers 10 and first main surface side n layers 11 corresponding to a plurality of semiconductor elements formed in the plane of the semiconductor substrate 1 are formed in the same pattern.

[0057] In the first main surface side trench forming step, as shown in FIG. 9(c), a plurality of trenches (that is, grooves) 13 are formed on the first main surface 1a side of the semiconductor substrate 1 (step S3). Specifically, the first main surface side trench forming step includes a heating step, an exposure step, and an etching step. In the heating step, an oxide film is formed on the first main surface 1a side of the semiconductor substrate 1. In the exposure step, a shot pattern is formed on the oxide film using a photomask, and the oxide film is used as an etching mask having an opening. In the etching step, the first main surface 1a side of the semiconductor substrate 1 is etched using the etching mask to form a trench 13 having a depth reaching the drift layer 9.

[0058] In the first main surface side gate electrode forming step, as shown in FIG. 9(d), an oxide film 14a, a gate electrode 14, and an upper electrode 12 are formed (step S4). Specifically, the first main surface side gate electrode forming step includes a polysilicon deposition step, an etching step, and an electrode metal film forming step. Before the polysilicon deposition step, the semiconductor substrate 1 is heated in an atmosphere containing oxygen to form an oxide film 14a on the inner wall of the trench 13. At this time, an oxide film is also formed on the first main surface 1a of the semiconductor substrate 1. In the polysilicon deposition step, polysilicon doped with an n-type or p-type impurity is deposited in the trench 13 having the oxide film 14a formed on its inner wall by CVD (chemical vapor deposition) or the like to form a gate electrode 14 in the trench 13. In the etching step, the oxide film formed on the first main surface 1a of the semiconductor substrate 1 is removed by etching. In the electrode metal film forming step, an upper electrode 12 connected to each gate electrode 14 is formed on the first main surface 1a side of the semiconductor substrate 1.

[0059] In the first main surface side protective film forming step, as shown in FIG. 9(e), a protective film 15 for suppressing damage on the first main surface 1a side is formed (step S5). The material of the protective film 15 is preferably a tape or a polyimide-based material.

[0060] In the second main surface side grinding step, the first main surface 1a side of the semiconductor substrate 1 on which the protective film 15 is formed is adsorbed by the stage of a grinding device, and the second main surface 1b of the semiconductor substrate 1 is ground so that the thickness of the semiconductor substrate 1 becomes 100 μm or less, for example (step S6). Thereby, the semiconductor substrate 1 is thinned. Since a damaged layer remains on the surface layer on the second main surface 1b side of the semiconductor substrate 1 by this second main surface side grinding step, it is desirable to remove the damaged layer by an etching step. By the second main surface side grinding step, the semiconductor substrate 1 becomes the state shown in FIG. 9(f).

[0061] In the second main surface side impurity implantation process, as shown in FIG. 9(g), impurity implantation layers that will become the n-type cathode layer 17, the n-type buffer layer 18, and the p-type collector layer 19 are respectively formed (step S7). These impurity implantation layers will become the cathode layer 17, the buffer layer 18, and the collector layer 19 respectively by the second main surface side laser annealing process described later. The second main surface side impurity implantation process includes a lithography process and an ion implantation process. In the lithography process, a mask is formed on the second main surface 1b side of the semiconductor substrate 1. In the ion implantation process, impurities are implanted through the openings of the mask formed in the lithography process. Here, by repeatedly performing the lithography process and the ion implantation process, impurity implantation layers that will become the cathode layer 17, the buffer layer 18, and the collector layer 19 are formed. In the ion implantation process, for example, impurities such as arsenic and phosphorus are used as donors, and impurities such as boron and aluminum are used as acceptors. The depth of the impurity implantation layer is about several μm, for example. The impurity concentration of each of the impurity implantation layers corresponding to the cathode layer 17, the buffer layer 18, and the collector layer 19 is higher than the impurity concentration of the drift layer 9.

[0062] By performing the processes up to the second main surface side impurity implantation process, damage accumulates on the second main surface 1b side of the semiconductor substrate 1. Therefore, cracks 1e of about several mm × several mm may occur on the second main surface 1b side of the semiconductor substrate 1 in a plan view.

[0063] In the second main surface side laser annealing process, the impurity implantation layer on the second main surface 1b side formed in the second main surface side impurity implantation process is electrically activated by laser annealing treatment (step S8). As a result, the cathode layer 17, the buffer layer 18, and the collector layer 19 are formed in a region with a depth of several μm on the second main surface 1b side of the semiconductor substrate 1.

[0064] FIG. 10 is a flowchart showing a specific example of the second main surface side laser annealing process. As shown in FIG. 10, the second main surface side laser annealing process includes a first transfer process, an alignment process, an inspection process, an irradiation map correction process, a second transfer process, a laser irradiation process, and a third transfer process.

[0065] In the first transfer process, the transfer unit 140 takes out one of the plurality of semiconductor substrates 1 stored in the cassette 38 that has not been processed, and transfers this semiconductor substrate 1 to the aligner 121 (step S81). The aligner 121 holds the loaded semiconductor substrate 1 horizontally.

[0066] In the alignment process, the aligner 121 rotates the semiconductor substrate 1 so that the notch 1d of the semiconductor substrate 1 is located at a specified rotational position (step S82).

[0067] In the inspection process, the sensor unit 122 inspects the presence or absence of cracks 1e on the semiconductor substrate 1 (step S83). The sensor unit 122 transmits an inspection result signal indicating the inspection result to the control unit 160. The inspection result signal includes, for example, information indicating the presence or absence of cracks 1e, and the position and shape of the cracks 1e on the semiconductor substrate 1.

[0068] In the example of FIG. 1, although the inspection unit 120 includes the aligner 121 and the sensor unit 122, it is not necessarily limited to this. The inspection unit 120 only needs to include the sensor unit 122. Also, the inspection unit 120 may be provided outside the semiconductor manufacturing apparatus 100. In this case, each semiconductor substrate 1 is inspected in the inspection unit 120 before the semiconductor substrate 1 is loaded into the semiconductor manufacturing apparatus 100.

[0069] In the irradiation map correction process, the inspection result receiving unit 161 of the control unit 160 receives an inspection result signal from the inspection unit 120, and the irradiation map correction unit 162 corrects the irradiation map information based on the inspection result signal (step S84). Specifically, when the inspection unit 120 does not detect the crack 1e, the irradiation map correction unit 162 leaves the irradiation map information as it is. On the other hand, when the inspection unit 120 detects the crack 1e, the irradiation map correction unit 162 corrects the irradiation map information based on the position and shape of the crack 1e. Specifically, the irradiation map correction unit 162 corrects the irradiation map information so that the time integral of the light amount of the beam 31 per unit area within the crack region 1f is smaller than the time integral of the light amount of the beam 31 per unit area within a region different from the crack region 1f. As a more specific example, the control unit 160 corrects the irradiation map information so that the beam 31 disappears in the crack region 1f.

[0070] Here, the semiconductor substrate 1 in FIG. 7 will be described with reference. In the example of FIG. 7, a pair of components 51A to a pair of components 51E constitute the crack region 1f. The pair of components 51A and the pair of components 51B are adjacent to each other in the scanning direction, and the pair of components 51C to the pair of components 51E are adjacent to each other in the scanning direction. The scanning line including the pair of components 51A and the pair of components 51B is adjacent to the scanning line including the pair of components 51C to the pair of components 51E in the pitch direction. The component 51A is located upstream of the component 51B in the scanning line, the component 51B is located upstream of the component 51C in the scanning line, the component 51C is located upstream of the component 51D in the scanning line, and the component 51D is located upstream of the component 51E in the scanning line.

[0071] In this case, the irradiation map correction unit 162 corrects the irradiation map information so that the beam 31 disappears in the crack region 1f composed of the pair of components 51A to the pair of components 51E. The host PC 150 rewrites the operation information of the laser opening / closing device 134 based on the corrected irradiation map information so that the beam 31 disappears in the crack region 1f, and transfers the rewritten operation information to the control unit 160. In the rewritten operation information, the laser opening / closing device 134 shuts off the laser light 30 during the period when the beam 31 passes through the crack region 1f.

[0072] As described above, the semiconductor manufacturing apparatus 100 collates the initial irradiation map information with the information indicating the position and shape of the crack 1e, and rewrites the operation information of the laser opening / closing device 134.

[0073] In the second transfer step, the transfer unit 140 takes out the inspected semiconductor substrate 1 from the inspection unit 120 and transfers it to the laser annealing unit 130 (step S85). The stage 137 of the laser annealing unit 130 holds the loaded semiconductor substrate 1 in a posture where the first main surface 1a faces the stage 137.

[0074] In the laser irradiation step, the annealing control unit 163 controls the laser annealing unit 130 based on the operation information of the optical unit 131 and the scanning unit 138, and performs laser annealing processing (step S86).

[0075] When the inspection unit 120 does not detect the crack 1e, the annealing control unit 163 controls the optical unit 131 and the scanning unit 138 based on the initial operation information, and moves all the scanning lines in order to the beam 31. Thereby, laser annealing processing is performed on all the components 51, and laser annealing processing can be performed on the entire semiconductor substrate 1.

[0076] On the other hand, when the inspection unit 120 detects the crack 1e, the annealing control unit 163 controls the optical unit 131 and the scanning unit 138 based on the operation information rewritten based on the corrected irradiation map information. Here, the operation information of the laser switch device 134 is rewritten, and the operation information of the scanning unit 138 remains as it is. Since the operation information of the scanning unit 138 remains as it is, the scanning unit 138 scans the beam 31 on all the scanning lines.

[0077] FIG. 11 is a diagram showing an example of the time change of the open / closed state of the laser switch device 134 after rewriting. For example, the laser switch device 134 starts the switching operation from the open state to the closed state at time t1. The time t1 is the time when the end 31a of the beam 31 reaches the end 51a of the pair of components 51A. In the example of FIG. 11, the component 51 where the beam 31 is located at each time is also shown on the horizontal axis. In the example of FIG. 11, at time t2 when the beam 31 is still located within the component 51A, the laser switch device 134 completes the switching operation from the open state to the closed state. In the example of FIG. 11, the open / close time Δt required for the switching operation is also shown. Then, the laser switch device 134 starts the switching operation from the closed state to the open state at time t3, which is Δt before time t4, so that the switching operation from the closed state to the open state can be completed at time t4 when the end 31b of the beam 31 reaches the end 51b of the pair of components 51B. Thereby, the laser switch device 134 can block the laser light 30 during the period when the beam 31 passes through the pair of components 51A and the pair of components 51B. Therefore, the beam 31 substantially disappears in the pair of components 51A and 51B. For this reason, the time integral of the light amount per unit area in the pair of components 51A and 51B can be reduced.

[0078] In the example of FIG. 11, the laser opening / closing device 134 starts the switching operation from the open state to the closed state again at time t5. Time t5 is the time when the end 31b of the beam 31 reaches the end 51b of the pair of components 51C. In the example of FIG. 11, at time t6 when the beam 31 is still located on the component 51C, the laser opening / closing device 134 completes the switching operation from the open state to the closed state. Then, the laser opening / closing device 134 starts the switching operation from the closed state to the open state at time t7, which is the time Δt before time t8 when the end 31a of the beam 31 reaches the end 51a of the pair of components 51E, so that the switching operation from the closed state to the open state can be completed at time t8. Thereby, the time integral of the light quantity per unit area from the pair of components 51C to the pair of components 51E can be reduced.

[0079] In this specific example, since the irradiation of the laser beam 30 to the crack region 1f is substantially avoided, it can be said that the crack region 1f is a laser irradiation avoidance region.

[0080] As described above, the laser opening / closing device 134 is in the closed state during the period when the beam 31 passes through the crack region 1f. Conversely, the laser opening / closing device 134 is in the open state during the period other than when the beam 31 passes through the crack region 1f. For this reason, the time integral of the light quantity of the beam 31 irradiated per unit area within the crack region 1f is smaller than the time integral of the light quantity of the laser beam 30 irradiated per unit area within the region other than the crack region 1f.

[0081] For comparison, a case where the crack 1e is irradiated with the laser beam 30 with sufficient light quantity will be described. In this case, the laser beam 30 propagates through the internal space of the crack 1e and reaches the first main surface 1a of the semiconductor substrate 1. That is, in the internal space of the crack 1e, since there is no member that absorbs the laser beam 30, the first main surface 1a side of the semiconductor substrate 1 is irradiated with the laser beam 30 with a large light quantity. For this reason, the laser beam 30 is absorbed by the semiconductor substrate 1 on the first main surface 1a side, and the semiconductor substrate 1 is also heated on the first main surface 1a side. When the crack 1e penetrates the semiconductor substrate 1, the laser beam 30 may pass through the internal space of the crack 1e and reach the stage 127. In this case, the stage 137 is also heated. When the semiconductor substrate 1 is heated on the first main surface 1a side in this way, or when the stage 137 is also heated, welding may occur between the semiconductor substrate 1 and the stage 137. In this case, even if there is a semiconductor device region 1c in which the crack 1e is not formed, it is necessary to discard the entire semiconductor substrate 1. Furthermore, it may also be necessary to replace the stage 137 itself.

[0082] On the other hand, in the present embodiment, since the time integral of the light quantity of the laser beam 30 irradiated to the crack 1e can be reduced, unnecessary heating in the crack 1e as described above can be suppressed. For this reason, while eliminating the above-described problem due to unnecessary heating in the region where the crack 1e has occurred, the laser annealing process can be appropriately performed on the semiconductor device region 1c in which the crack 1e is not formed. Therefore, in the semiconductor device region 1c in which the crack 1e is not formed, the impurity implantation layers become an n-type cathode layer 17, an n-type buffer layer 18, and a p-type collector layer 19, respectively (see FIG. 9(g)).

[0083] In the third transfer step, the stage 137 releases the holding of the semiconductor substrate 1, the transfer unit 140 takes out the semiconductor substrate 1 from the laser annealing unit 130, and transfers the semiconductor substrate 1 to the cassette 38 (step S87).

[0084] Returning to FIG. 8, in the second main surface side electrode formation step, as shown in FIG. 9(h), an electrode 20 is formed on the second main surface 1b side of the semiconductor substrate 1 (step S9). The electrode 20 is formed by, for example, a sputtering apparatus. The material of the electrode 20 is, for example, aluminum.

[0085] In the first main surface side protective film removal step, as shown in FIG. 9(h), the protective film 15 on the first main surface 1a side of the semiconductor substrate 1 is removed (step S10). For example, the protective film 15 is removed by chemical solution treatment.

[0086] In the dicing step, the semiconductor substrate 1 is divided into each semiconductor device region 1c (that is, the manufactured semiconductor device) (step S11).

[0087] Through the above steps, a semiconductor element (for example, an RC-IGBT) as a semiconductor device is obtained. However, the semiconductor device to be manufactured by the manufacturing method of the semiconductor device of the present embodiment may be a semiconductor module in which, for example, a wire or the like is provided on the semiconductor element and sealed with a sealing resin, or further a device incorporating the semiconductor module.

[0088] As described above, in the present embodiment, in the laser irradiation step (step S86), the time integral of the amount of laser light 30 irradiated per unit area in the crack region 1f including the crack 1e is smaller than the time integral of the amount of laser light 30 irradiated per unit area in a region other than the crack region 1f. The laser light 30 is scanned on the second main surface 1b of the semiconductor substrate 1, and laser annealing treatment is performed on the semiconductor substrate 1. Therefore, it is possible to perform laser annealing treatment on regions other than the crack 1e of the semiconductor substrate 1 while avoiding problems caused by unnecessary heating of the crack 1e. Therefore, a semiconductor device can be manufactured in the semiconductor device region 1c where the crack 1e does not occur, and a decrease in yield can be suppressed.

[0089] In a more specific example, in the laser irradiation step (step S86), the switching operation of the laser opening / closing device 134 and the scanning by the scanning unit 138 are synchronized to avoid irradiating the laser light 30 onto the crack region 1f, while scanning the laser light 30 on the second main surface 1b of the semiconductor substrate 1 to perform laser annealing treatment. For this reason, even for a scanning line including the crack region 1f, the laser light 30 is irradiated on a region other than the crack region 1f. Therefore, the laser light 30 can be irradiated on a relatively wide region, and the impurity implantation layer can be activated in a relatively wide region. As a result, the reduction in yield due to the crack 1e can be substantially minimized.

[0090] In the above example, in the laser irradiation step (step S86), the scanning unit 138 scans the beam 31 along a linear scanning direction. However, it is not necessarily limited to this. FIG. 12 is a diagram showing an enlarged view of another example of the irradiation map according to Embodiment 1. In the example of FIG. 12, a circular beam 31 is also shown, and this beam 31 moves on the semiconductor substrate 1 with the circumferential direction along the periphery of the semiconductor substrate 1 as the scanning direction and the radial direction of the semiconductor substrate 1 as the pitch direction. In this case, the scanning unit 138 includes a rotation mechanism that rotates the stage 137 around a vertical rotation axis passing through the center of the semiconductor substrate 1, and a movement mechanism that moves the rotation mechanism along the pitch direction.

[0091] In the example of FIG. 12, each component 51 has a strip shape extending along the circumferential direction, and a plurality of components 51 are arranged in a matrix with the scanning direction as the row direction and the pitch direction as the column direction. In the example of FIG. 12, the width 53 of the component 51 is set to half of the diameter 34 of the beam 31. That is, also in the example of FIG. 12, two rows of components 51 constitute one scanning line. By rotating the stage 137 by the scanning unit 138, the beam 31 moves along the circumferential direction (i.e., the scanning direction), and scanning of the scanning line is performed. Further, by moving the stage 137 in the pitch direction by the scanning unit 138, the beam 31 moves along the pitch direction, and the beam 31 can be positioned on the next scanning line. The rotation mechanism of the scanning unit 138 rotates the stage 137 so that the linear velocity of the semiconductor substrate 1 in each scanning line, that is, the moving speed of the beam 31, is constant.

[0092] Even in this case, when the inspection unit 120 detects the crack 1e, the irradiation map correction unit 162 corrects the irradiation map information so that the time integral of the amount of light per unit area in the crack region 1f is smaller than the time integral of the amount of light per unit area in a region other than the crack region 1f. For example, the irradiation map correction unit 162 corrects the irradiation map information so that the laser opening / closing device 134 blocks the laser light 30 during the period when the beam 31 passes through the crack region 1f.

[0093] <Embodiment 2> An example of the configuration of the semiconductor manufacturing apparatus 100 according to Embodiment 2 is the same as the configuration of FIG. 1. However, in Embodiment 2, the configuration of the laser annealing unit 130 is different from that of Embodiment 1. FIG. 13 is a side view showing an example of the configuration of the laser annealing unit 130 according to Embodiment 2. In Embodiment 2, the stage 137 of the laser annealing unit 130 has a function of cooling the semiconductor substrate 1. The stage 137 includes, for example, a cooling stage 1371 made of metal and a cooling mechanism 1372 for cooling the cooling stage 1371.

[0094] The cooling stage 1371 is formed of a metal with high thermal conductivity and has a placement surface that contacts the first main surface 1a of the semiconductor substrate 1. The cooling stage 1371 is, for example, an adsorption stage.

[0095] The cooling mechanism 1372 includes, for example, a coolant supply path 1373 and a liquid cooling unit 1374. The coolant supply path 1373 is mainly constituted by piping. A part of the coolant supply path 1373 is arranged inside the cooling stage 1371, and its upstream end and downstream end are connected to the liquid cooling unit 1374. The liquid cooling unit 1374 cools the coolant such as water supplied from the downstream end of the coolant supply path 1373 and supplies the cooled coolant to the upstream end of the coolant supply path 1373. The coolant flows through the coolant supply path 1373 and cools the cooling stage 1371 inside the cooling stage 1371. Since the cooling stage 1371 is cooled, the first main surface 1a of the semiconductor substrate 1 adsorbed to the cooling stage 1371 is also cooled.

[0096] The operation of the semiconductor manufacturing apparatus 100 according to the second embodiment is the same as that of the first embodiment. However, the stage 137 cools the first main surface 1a of the semiconductor substrate 1 at least in the laser irradiation process (step S86). That is, when performing the laser annealing process, the cooling stage 1371 cools while supporting the first main surface 1a of the semiconductor substrate 1. Therefore, in the laser irradiation process, while heating the second main surface 1b side of the semiconductor substrate 1 to activate the impurity implantation layer, it is possible to cool the first main surface 1a side of the semiconductor substrate 1 and suppress the temperature rise on the first main surface 1a side.

[0097] Moreover, also in the second embodiment, in the vicinity of the crack 1e, the time integral of the light amount per unit area is small. Conversely, the laser light 30 does not directly enter the cooling stage 1371 with a large light amount. For this reason, even if a metal cooling stage 1371 is adopted, it is possible to suppress the contamination (so-called contamination) of impurities from the metal cooling stage 1371 to the semiconductor substrate 1 due to laser irradiation.

[0098] As described above, according to the second embodiment, it is possible to achieve both suppression of heat transfer to the first main surface 1a side of the semiconductor substrate 1 and activation of impurities within a region of about several micrometers in depth of the extremely thin semiconductor substrate 1.

[0099] <Embodiment 3> An example of the configuration of the semiconductor manufacturing apparatus 100 according to the third embodiment is the same as the configuration of FIG. 1. However, in the third embodiment, the configuration of the laser annealing unit 130 may be different from that of the first embodiment. FIG. 14 is a side view showing an example of the configuration of the laser annealing unit 130 according to the third embodiment. In the third embodiment, the laser annealing unit 130 may not include the laser opening / closing device 134 in the first embodiment.

[0100] The operation of the semiconductor manufacturing apparatus 100 according to the third embodiment is the same as that of the first embodiment. However, in the third embodiment, in the laser irradiation step (step S86), the laser light 30 is scanned on the second main surface 1b of the semiconductor substrate 1 while avoiding the scanning lines including the crack 1e, and the laser annealing process is performed. This will be specifically described below.

[0101] FIG. 15 is a diagram for explaining the irradiation map according to the third embodiment. In the irradiation map according to the third embodiment, each component 51 has a rectangular shape that is long in the scanning direction, and a plurality of components 51 are arranged adjacent to each other one-dimensionally in the pitch direction. FIG. 16 is a diagram showing an enlarged part of the irradiation map of FIG. 15. The width 53 of the component 51 is set based on the beam width 33 of the beam 31 in the same manner as in the first embodiment. As a specific example, the width 53 of the component 51 is set to half of the beam width 33. In this case, as the beam 31 moves along the scanning direction, the beam 31 irradiates two rows of components 51. That is, one scanning line is composed of two rows of components 51.

[0102] As shown in FIG. 15, the width 52 of each component 51 is set to decrease as it moves away from the central portion of the semiconductor substrate 1. That is, the width 52 of the component 51 located on the uppermost side and the width 52 of the component 51 located on the lowermost side are the shortest.

[0103] Initially, an irradiation map is set so that all components 51 are irradiated with a prescribed amount of light from the beam 31. Therefore, in the scanning control based on the initial irradiation map information, the operation information of the optical unit 131 and the scanning unit 138 is determined so that all components 51 are irradiated with the prescribed amount of light from the beam 31. For example, the laser opening / closing device 134 is always open during the scanning of the laser light 30, and the operation information is determined so that the scanning unit 138 allows the beam 31 to pass through all components 51 (that is, all scanning lines).

[0104] When the inspection unit 120 does not detect the crack 1e, the irradiation map correction unit 162 adopts the initial irradiation map as it is (step S84), so that all components 51 are irradiated with the beam 31 (step S86).

[0105] On the other hand, when the inspection unit 120 detects the crack 1e, the irradiation map correction unit 162 corrects the irradiation map information so that the time integral of the light amount in the crack region including the crack 1e becomes smaller than the time integral of the light amount in the region other than the crack region. As a specific example, the irradiation map correction unit 162 corrects the irradiation map so that the beam 31 scans the semiconductor substrate 1 while avoiding the scanning line (hereinafter referred to as the avoidance line) including the crack 1e. In the example of FIG. 16, a pair of components 51A and a pair of components 51B correspond to the avoidance line.

[0106] Then, the host PC 150 rewrites the operation information of the scanning unit 138 based on the corrected irradiation map information so as to skip the entire avoidance line and perform scanning, and transfers the rewritten operation information to the control unit 160. For example, the host PC 150 rewrites the moving speed of the beam 31 in the pitch direction (hereinafter referred to as the pitch speed) included in the operation information to avoid scanning of the beam 31 with respect to the avoidance line. Note that the pitch speed is the speed at which the beam 31 moves in the pitch direction on the outer peripheral side of the semiconductor substrate 1.

[0107] FIG. 17 is a graph showing an example of the temporal change in the moving speed (hereinafter referred to as the scanning speed) of the beam 31 in the scanning direction and the pitch speed. In the example of FIG. 17, the pitch speed immediately before the avoidance line is set higher than the pitch speed in other scanning lines. In the example of FIG. 17, the period during which the beam 31 moves along the pitch direction so as to skip the avoidance line (that is, the pair of components 51A and the pair of components 51B) is indicated by reference numerals 51A and 51B.

[0108] As described above, the host PC 150 rewrites the operation information of the scanning unit 138 so that the moving amount in the pitch direction corresponding to the avoidance line becomes larger than the moving amount in the pitch direction corresponding to other scanning lines.

[0109] In the laser irradiation step (step S86), since the annealing control unit 163 controls the scanning unit 138 based on the rewritten operation information, the beam 31 moves on the second main surface 1b of the semiconductor substrate 1 while avoiding the avoidance line including the crack 1e. Therefore, the amount of heat applied to the crack 1e can be reduced. Accordingly, as in the first embodiment, it is possible to perform the laser annealing process on the region of the semiconductor substrate 1 other than the crack 1e while suppressing the problems caused by unnecessary heating of the crack 1e.

[0110] Moreover, according to the semiconductor manufacturing apparatus 100 according to Embodiment 3, since it is not necessary to cause the laser opening / closing device 134 to perform a switching operation in the crack region 1f, the control is easy. Further, when the laser opening / closing device 134 is not provided, the cost of the semiconductor manufacturing apparatus 100 can also be reduced.

[0111] Also, in the above specific example, the pitch speed when crossing the avoidance line is increased. According to this, the throughput of the laser annealing process can be improved.

[0112] In the above example, although the scanning direction is a straight line direction, similar to Embodiment 1, it may be a circumferential direction along the periphery of the semiconductor substrate 1. FIG. 18 is a diagram showing an enlarged view of another example of the irradiation map according to Embodiment 3. In the example of FIG. 18, each component 51 has an annular shape extending along the circumferential direction, and a plurality of components 51 are arranged concentrically adjacent to each other in the radial direction (pitch direction).

[0113] In the example of FIG. 18, the width 53 of the component 51 is set to half of the diameter 34 of the beam 31. That is, also in the example of FIG. 18, two rows of components 51 constitute one scanning line.

[0114] Even in this case, when the inspection unit 120 detects the crack 1e, the irradiation map correction unit 162 corrects the irradiation map so that the beam 31 scans the semiconductor substrate 1 while avoiding the avoidance line including the crack 1e. In FIG. 18, the avoidance line is two rows of scanning lines including a pair of components 51A and a pair of components 51B. Then, the host PC 150 rewrites the operation information of the scanning unit 138 based on the corrected irradiation map information so as to skip the entire avoidance line and perform scanning, and transfers the rewritten operation information to the control unit 160. For example, as shown in FIG. 17, the host PC 150 rewrites the pitch speed of the beam 31 in the pitch direction included in the operation information. Thereby, the beam 31 moves on the second main surface 1b of the semiconductor substrate 1 while avoiding the avoidance line including the crack 1e. Therefore, the amount of heat applied to the crack 1e can be reduced.

[0115] It should be noted that it is possible to freely combine each embodiment, or to appropriately modify or omit each embodiment as needed.

[0116] Hereinafter, aspects of the present disclosure will be collectively described as appendices.

[0117] (Appendix 1) Detect cracks generated on the main surface of the substrate, A method for manufacturing a semiconductor device, in which the time integral of the amount of laser light for annealing irradiated per unit area in a crack region including the detected crack is made smaller than the time integral of the amount of the laser light irradiated per unit area in a region different from the crack region, and the laser light is scanned on the main surface of the substrate to perform laser annealing on the substrate. (Appendix 2) The method for manufacturing a semiconductor device according to Appendix 1, wherein when performing the laser annealing process, a metal cooling stage cools while supporting the main surface opposite to the main surface of the substrate. (Appendix 3) The method for manufacturing a semiconductor device according to Appendix 1 or Appendix 2, in which the switching operation of a laser opening / closing device that switches the passage and blocking of the laser light is synchronized with the scanning of the laser light by a scanning unit, and the laser light is scanned on the main surface of the substrate to perform the laser annealing process while avoiding irradiation of the laser light to the crack region. (Appendix 4) The method for manufacturing a semiconductor device according to Appendix 1 or Appendix 2, in which the laser light is scanned on the main surface of the substrate to perform the laser annealing process while avoiding an avoidance line that is a scanning line including the crack by increasing the amount of movement in the pitch direction orthogonal to the scanning direction along the scanning line. (Appendix 5) The method for manufacturing a semiconductor device according to any one of Appendices 1 to 4, in which the substrate is ground and thinned before performing the laser annealing process. (Appendix 6) An inspection unit that detects cracks generated on the main surface of the substrate, a stage that holds the substrate, an optical unit that irradiates the substrate held by the stage with annealing laser light, a scanning unit that scans the laser light on the substrate, a control unit that controls the optical unit and the scanning unit so that the time integral of the amount of the laser light irradiated per unit area within a crack region including the crack detected by the inspection unit is smaller than the time integral of the amount of the laser light irradiated per unit area within a region different from the crack region, scans the laser light on the main surface of the substrate, and performs laser annealing treatment on the substrate, A semiconductor manufacturing apparatus comprising:

Description of Signs

[0118] 1 semiconductor substrate, 1b main surface, 1e crack, 1f crack region, 131 optical unit, 134 laser opening / closing device, 137 stage, 1371 cooling stage, 138 scanning unit, 160 control unit.

Claims

1. Detecting a crack generated on the main surface of a substrate, after detecting the crack, scanning the laser light on the main surface of the substrate so that the time integral of the amount of the annealing laser light irradiated per unit area in a crack region including the detected crack becomes smaller than the time integral of the amount of the laser light irradiated per unit area in a region different from the crack region, and performing a laser annealing process on the substrate. A method for manufacturing a semiconductor device.

2. The method for manufacturing a semiconductor device according to claim 1, wherein when performing the laser annealing process, a metal cooling stage cools while supporting the main surface opposite to the main surface of the substrate.

3. Synchronizing the switching operation of a laser opening / closing device that switches the passage and blocking of the laser light with the scanning of the laser light by a scanning unit, scanning the laser light on the main surface of the substrate while avoiding irradiation of the laser light to the crack region, and performing the laser annealing process. The method for manufacturing a semiconductor device according to claim 1 or claim 2.

4. By increasing the movement amount in the pitch direction orthogonal to the scanning direction along a scanning line, avoiding a avoidance line which is a scanning line including the crack, scanning the laser light on the main surface of the substrate, and performing the laser annealing process. The method for manufacturing a semiconductor device according to claim 1 or claim 2.

5. Before performing the laser annealing process, grinding the substrate to make it thinner. The method for manufacturing a semiconductor device according to claim 1 or claim 2.

6. An inspection unit for detecting a crack generated on the main surface of a substrate, a stage for holding the substrate, an optical unit for irradiating the substrate held by the stage with annealing laser light, a scanning unit for scanning the laser light on the substrate, and after detecting the crack by the inspection unit, controlling the optical unit and the scanning unit so that the time integral of the amount of the laser light irradiated per unit area in a crack region including the crack detected by the inspection unit becomes smaller than the time integral of the amount of the laser light irradiated per unit area in a region different from the crack region, scanning the laser light on the main surface of the substrate, and a control unit for performing a laser annealing process on the substrate A semiconductor manufacturing apparatus comprising.

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