Silicon carbide epitaxial substrate and silicon carbide semiconductor device

Abstract

To provide a silicon carbide epitaxial substrate and a silicon carbide semiconductor device that can reduce surface density of basal plane dislocation in a silicon carbide epitaxial layer while suppressing increase in surface roughness of the silicon carbide epitaxial layer.SOLUTION: A silicon carbide epitaxial substrate has a silicon carbide substrate and a silicon carbide epitaxial layer. The silicon carbide epitaxial layer lies on the silicon carbide substrate. The silicon carbide epitaxial layer has a first layer in contact with the silicon carbide substrate, a second layer on the first layer, and a third layer on the second layer. The first layer has nitrogen density higher than that of the third layer and lower than that of the second layer. The silicon carbide substrate has nitrogen density higher than that of the second layer. The first layer is thinner than the second layer. In the third layer, surface density of basal plane dislocation is 0.01 / cm2 or more to 1 / cm2 or less.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a silicon carbide epitaxial substrate and a silicon carbide semiconductor device.

Background Art

[0002] Z. Zhang et al., "Mechanism of eliminating basal plane dislocations in SiC thin films by epitaxy on an etched substrate", Applied Physics Letters, 89, 081910(2006)(Non-Patent Document 1) describes the mechanism for eliminating basal plane dislocations in silicon carbide thin films.

Prior Art Documents

Non-Patent Documents

[0003]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When forming a silicon carbide epitaxial layer on a silicon carbide substrate, basal plane dislocations in the silicon carbide substrate may be inherited by the silicon carbide epitaxial layer. If there are many basal plane dislocations in the silicon carbide epitaxial layer, when a silicon carbide semiconductor device is manufactured using the silicon carbide epitaxial substrate having the silicon carbide epitaxial layer, the yield of the silicon carbide semiconductor device deteriorates.

[0005] Non-Patent Document 1 discloses a method of reducing the surface density of basal plane dislocations inherited by a silicon carbide epitaxial layer formed on a silicon carbide substrate by etching the silicon carbide substrate with molten potassium hydroxide (KOH) to form etch pits at locations with basal plane dislocations. However, according to the above method, a silicon carbide epitaxial layer is formed on the silicon carbide substrate on which the etch pits are formed. Therefore, there is a problem that the surface roughness of the silicon carbide epitaxial layer increases.

[0006] An object of the present disclosure is to provide a silicon carbide epitaxial substrate and a silicon carbide semiconductor device capable of reducing the surface density of basal plane dislocations in a silicon carbide epitaxial layer while suppressing an increase in the surface roughness of the silicon carbide epitaxial layer.

Means for Solving the Problems

[0007] The silicon carbide epitaxial substrate according to the present disclosure includes a silicon carbide substrate and a silicon carbide epitaxial layer. The silicon carbide epitaxial layer is on the silicon carbide substrate. The silicon carbide epitaxial layer includes a first layer in contact with the silicon carbide substrate, a second layer on the first layer, and a third layer on the second layer. The nitrogen concentration of the first layer is higher than that of the third layer and lower than that of the second layer. The nitrogen concentration of the silicon carbide substrate is higher than that of the second layer. The thickness of the first layer is smaller than that of the second layer. The surface density of basal plane dislocations in the third layer is 0.01 pieces / cm 2 Above 1 piece / cm 2 The following.

Effects of the Invention

[0008] According to the present disclosure, it is possible to provide a silicon carbide epitaxial substrate and a silicon carbide semiconductor device capable of reducing the surface density of basal plane dislocations in a silicon carbide epitaxial layer while suppressing an increase in the surface roughness of the silicon carbide epitaxial layer.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

[0010] [Overview of Embodiments of the Present Disclosure] First, an overview of the embodiments of the present disclosure will be described. In the crystallographic description of this specification, individual orientations are indicated by [], collective orientations are indicated by <>, individual planes are indicated by (), and collective planes are indicated by {}. A negative crystallographic index is usually expressed by attaching "-" (bar) above the number, but in this specification, a negative crystallographic index is expressed by attaching a negative sign before the number.

[0011] (1) The silicon carbide epitaxial substrate 100 according to the present disclosure includes a silicon carbide substrate 10 and a silicon carbide epitaxial layer 20. The silicon carbide epitaxial layer 20 is on the silicon carbide substrate 10. The silicon carbide epitaxial layer 20 includes a first layer 11 in contact with the silicon carbide substrate 10, a second layer 12 on the first layer 11, and a third layer 13 on the second layer 12. The nitrogen concentration of the first layer 11 is higher than that of the third layer 13 and lower than that of the second layer 12. The nitrogen concentration of the silicon carbide substrate 10 is higher than that of the second layer 12. The thickness of the first layer 11 is smaller than that of the second layer 12. The surface density of basal plane dislocations in the third layer 13 is 0.01 pieces / cm 2 more than 1 piece / cm 2 or less.

[0012] (2) In the silicon carbide epitaxial substrate 100 according to (1) above, the nitrogen concentration of the first layer 11 may be 5×10 16 cm -3 or more and 5×10 17 cm -3 or less. The thickness of the first layer 11 may be 0.01 μm or more and 0.6 μm or less.

[0013] (3) In the silicon carbide epitaxial substrate 100 according to (2) above, the nitrogen concentration of the first layer 11 may be 8×10 16 cm -3 or more and 4×10 17 cm -3 or less. The thickness of the first layer 11 may be 0.05 μm or more and 0.5 μm or less.

[0014] (4) In the silicon carbide epitaxial substrate 100 according to any one of (1) to (3) above, the nitrogen concentration of the second layer 12 may be 5×10 17 cm -3 or more and 5×10 18 cm -3 or less. The thickness of the second layer 12 may be 0.6 μm or more and 3 μm or less.

[0015] (5) In the silicon carbide epitaxial substrate 100 according to any one of (1) to (4) above, the nitrogen concentration of the third layer 13 may be 2×10 15 cm -3 or more and 5×10 16 cm -3 or less. The thickness of the third layer 13 may be 3 μm or more and 50 μm or less.

[0016] (6) In the silicon carbide epitaxial substrate 100 according to any one of (1) to (5) above, the value obtained by dividing the basal plane dislocation surface density in the third layer 13 by the basal plane dislocation surface density in the silicon carbide substrate 10 may be 0.01 or less.

[0017] (7) The silicon carbide semiconductor device 300 according to the present disclosure includes the silicon carbide epitaxial substrate 100 according to any one of (1) to (6) above.

[0018] [Details of Embodiments of the Present Disclosure] Hereinafter, details of embodiments of the present disclosure will be described. In the following description, the same or corresponding elements are denoted by the same reference numerals, and the same description thereof will not be repeated.

[0019] (Silicon Carbide Epitaxial Substrate) FIG. 1 is a schematic plan view showing the configuration of a silicon carbide epitaxial substrate according to this embodiment. FIG. 2 is a schematic cross-sectional view taken along line II-II of FIG. 1. As shown in FIGS. 1 and 2, the silicon carbide epitaxial substrate 100 according to this embodiment has a silicon carbide substrate 10 and a silicon carbide epitaxial layer 20. The silicon carbide epitaxial layer 20 is on the silicon carbide substrate 10. The silicon carbide epitaxial layer 20 is in contact with the silicon carbide substrate 10. The silicon carbide epitaxial layer 20 has a first main surface 1.

[0020] The silicon carbide epitaxial layer 20 constitutes the surface (first main surface 1) of the silicon carbide epitaxial substrate 100. The silicon carbide substrate 10 constitutes the back surface (second main surface 2) of the silicon carbide epitaxial substrate 100. As shown in FIG. 1, the silicon carbide epitaxial substrate 100 has an outer peripheral edge 5. The outer peripheral edge 5 has, for example, an orientation flat 3 and an arcuate portion 4. The orientation flat 3 extends along the first direction 101. As shown in FIG. 1, the orientation flat 3 is linear when viewed in a direction perpendicular to the first main surface 1. The arcuate portion 4 is continuous with the orientation flat 3. The arcuate portion 4 is arcuate when viewed in a direction perpendicular to the first main surface 1.

[0021] As shown in FIG. 1, when viewed in a direction perpendicular to the first main surface 1, the first main surface 1 extends along each of the first direction 101 and the second direction 102. When viewed in a direction perpendicular to the first main surface 1, the first direction 101 is perpendicular to the second direction 102.

[0022] The first direction 101 is, for example, the <11-20> direction. The first direction 101 may be, for example, the [11-20] direction. The first direction 101 may be the direction in which the <11-20> direction is projected onto the first main surface 1. From another perspective, the first direction 101 may be, for example, a direction including a <11-20> direction component.

[0023] The second direction 102 is, for example, the <1-100> direction. The second direction 102 may be, for example, the [1-100] direction. The second direction 102 may be, for example, the direction obtained by projecting the <1-100> direction onto the first main surface 1. From another perspective, the second direction 102 may be, for example, a direction including a <1-100> direction component.

[0024] The first main surface 1 may be a surface inclined with respect to the {0001} surface. When the first main surface 1 is inclined with respect to the {0001} surface, the inclination angle (off angle θ) with respect to the {0001} surface is, for example, 2° or more and 6° or less. When the first main surface 1 is inclined with respect to the {0001} surface, the inclination direction (off direction) of the first main surface 1 is, for example, the <11-20> direction. From another perspective, the first direction 101 may be the off direction of the first main surface 1.

[0025] As shown in FIG. 1, the maximum diameter W1 (diameter) of the first main surface 1 is not particularly limited, but is, for example, 100 mm (4 inches). The maximum diameter W1 may be 125 mm (5 inches) or more, or may be 150 mm (6 inches) or more. The upper limit of the maximum diameter W1 is not particularly limited. The maximum diameter W1 may be, for example, 200 mm (8 inches) or less. The maximum diameter W1 is the maximum distance between any two points on the outer peripheral edge 5.

[0026] In this specification, 2 inches means 50 mm or 50.8 mm (2 inches × 25.4 mm / inch). 4 inches means 100 mm or 101.6 mm (4 inches × 25.4 mm / inch). 5 inches means 125 mm or 127.0 mm (5 inches × 25.4 mm / inch). 6 inches means 150 mm or 152.4 mm (6 inches × 25.4 mm / inch). 8 inches means 200 mm or 203.2 mm (8 inches × 25.4 mm / inch).

[0027] As shown in FIG. 2, the silicon carbide substrate 10 has a second main surface 2 and a third main surface 14. The third main surface 14 is on the opposite side of the second main surface 2. The second main surface 2 is the back surface of the silicon carbide epitaxial substrate 100. The second main surface 2 is spaced apart from the silicon carbide epitaxial layer 20. The third main surface 14 is in contact with the silicon carbide epitaxial layer 20. The polytype of silicon carbide constituting the silicon carbide substrate 10 is, for example, 4H. Similarly, the polytype of silicon carbide constituting the silicon carbide epitaxial layer 20 is, for example, 4H.

[0028] As shown in FIG. 2, the silicon carbide epitaxial layer 20 includes a first layer 11, a second layer 12, and a third layer 13. The first layer 11 is on the silicon carbide substrate 10. The first layer 11 is in contact with the silicon carbide substrate 10. The second layer 12 is on the first layer 11. The second layer 12 is in contact with the first layer 11. The third layer 13 is on the second layer 12. The third layer 13 is in contact with the second layer 12. The first layer 11 is located between the silicon carbide substrate 10 and the second layer 12. The second layer 12 is located between the first layer 11 and the third layer 13. The third layer 13 constitutes the first main surface 1.

[0029] As shown in FIG. 2, the silicon carbide epitaxial substrate 100 includes a plurality of basal plane dislocations 6. Each of the plurality of basal plane dislocations 6 is located on the basal plane. The plurality of basal plane dislocations 6 has a first basal plane dislocation 31 and a second basal plane dislocation 32. The first basal plane dislocation 31 is located in the silicon carbide substrate 10. The first basal plane dislocation 31 reaches each of the second main surface 2 and the third main surface 14. The first basal plane dislocation 31 extends continuously from the second main surface 2 to the third main surface 14. The end of the first basal plane dislocation 31 is located on the third main surface 14. The first basal plane dislocation 31 is a basal plane dislocation that does not exist inside the silicon carbide epitaxial layer 20.

[0030] On the one hand, the second basal plane dislocation 32 is located in the silicon carbide substrate 10 and the silicon carbide epitaxial layer 20. The second basal plane dislocation 32 reaches each of the second main surface 2 and the first main surface 1. The first basal plane dislocation 31 extends continuously from the second main surface 2 to the first main surface 1. The end of the first basal plane dislocation 31 is located on the first main surface 1. The second basal plane dislocation 32 penetrates each of the first layer 11, the second layer 12, and the third layer 13.

[0031] The thickness of the first layer 11 (the first thickness T1) is smaller than the thickness of the second layer 12 (the second thickness T2). The first thickness T1 is, for example, 0.1 μm. The lower limit of the first thickness T1 is not particularly limited, but may be, for example, 0.01 μm or more, or may be 0.05 μm or more. The upper limit of the first thickness T1 is not particularly limited, but may be, for example, 0.3 μm or less, or may be 0.2 μm or less.

[0032] The second thickness T2 may be, for example, 3 times or more and 15 times or less the first thickness T1. Specifically, the second thickness T2 is, for example, 1 μm. The thickness of the third layer 13 (the third thickness T3) may be larger than the second thickness T2. The thickness of the third layer 13 may be, for example, 3 times or more and 15 times or less the second thickness T2. Specifically, the third thickness T3 is, for example, 7.5 μm.

[0033] The silicon carbide substrate 10 contains nitrogen (N) as an n-type impurity. The conductivity type of the silicon carbide substrate 10 is n-type. Each of the first layer 11, the second layer 12, and the third layer 13 contains nitrogen (N) as an n-type impurity. The conductivity type of each of the first layer 11, the second layer 12, and the third layer 13 is n-type.

[0034] FIG. 3 is a schematic diagram showing the relationship between the position of the silicon carbide epitaxial substrate 100 in the direction perpendicular to the first main surface 1 and the nitrogen concentration. The horizontal axis of FIG. 3 indicates the position of the silicon carbide epitaxial substrate 100 in the direction perpendicular to the first main surface 1. The left side of the horizontal axis is the first main surface 1 side. The right side of the horizontal axis is the second main surface 2 side. The vertical axis of FIG. 3 indicates the nitrogen concentration of the silicon carbide epitaxial substrate 100.

[0035] In the direction perpendicular to the first main surface 1, the first position P1 is the position of the first main surface 1. In the direction perpendicular to the first main surface 1, the second position P2 is the position of the boundary between the second layer 12 and the third layer 13. The third layer 13 is disposed between the first position P1 and the second position P2. In the direction perpendicular to the first main surface 1, the third position P3 is the position of the boundary between the first layer 11 and the second layer 12. The second layer 12 is disposed between the second position P2 and the third position P3. In the direction perpendicular to the first main surface 1, the fourth position P4 is the position of the boundary between the third layer 13 and the silicon carbide substrate 10. The first layer 11 is disposed between the third position P3 and the fourth position P4.

[0036] As shown in FIG. 3, the nitrogen concentration of the first layer 11 (the first nitrogen concentration N1) is higher than the nitrogen concentration of the third layer 13 (the third nitrogen concentration N3) and lower than the nitrogen concentration of the second layer 12 (the second nitrogen concentration N2). The first nitrogen concentration N1 is, for example, 1×10 17 cm -3 That is. The first nitrogen concentration N1 is, for example, 5×10 16 cm -3 or more and 5×10 17 cm -3 or less. In this case, the thickness of the first layer 11 may be 0.01 μm or more and 0.6 μm or less. Preferably, the first nitrogen concentration N1 is 8×10 16 cm -3 or more and 4×10 17 cm -3 or less. In this case, the thickness of the first layer 11 may be 0.05 μm or more and 0.5 μm or less.

[0037] The second nitrogen concentration N2 is, for example, 6×10 17 cm -3 That is. The second nitrogen concentration N2 is, for example, 5×10 17 cm -3 or more and 5×10 18 cm -3 or less. In this case, the thickness of the second layer 12 may be 0.6 μm or more and 3 μm or less. Preferably, the second nitrogen concentration N2 is, for example, 7×10 17 cm -3The above may be 3×10 18 cm -3 or less. In this case, the thickness of the second layer 12 may be 0.8 μm or more and 2 μm or less.

[0038] The third nitrogen concentration N3 is, for example, 8×10 15 cm -3 or the like. The nitrogen concentration of the third layer 13 is, for example, 2×10 15 cm -3 or more and 5×10 16 cm -3 or less. In this case, the thickness of the third layer 13 may be 3 μm or more and 50 μm or less. Preferably, the nitrogen concentration of the third layer 13 is, for example, 3×10 15 cm -3 or more and 2×10 16 cm -3 or less. In this case, the thickness of the third layer 13 may be 5 μm or more and 30 μm or less.

[0039] As shown in FIG. 3, the nitrogen concentration (fourth nitrogen concentration N4) of the silicon carbide substrate 10 is higher than the second nitrogen concentration N2. The fourth nitrogen concentration N4 is, for example, 7×10 18 cm -3 or the like. The fourth nitrogen concentration N4 is higher than, for example, 1×10 18 cm -3 and may be 1×10 20 cm -3 or less. The thickness (fourth thickness T4) of the silicon carbide substrate 10 is, for example, 200 μm or more and 500 μm or less.

[0040] Next, a method for measuring the dopant density (nitrogen concentration) will be described. The nitrogen concentration in each of the above regions can be measured, for example, by SIMS (Secondary Ion Mass Spectrometry). As the SIMS, for example, IMS7f manufactured by Cameca can be used. For example, the primary ion is Cs +It is an ion, and the measurement condition that the primary ion energy is 15 keV can be used. In addition, in order to measure the nitrogen concentration in a thin layer such as the first layer 11, it is preferable to perform measures such as reducing the sputtering rate.

[0041] According to the silicon carbide epitaxial substrate 100 according to the present embodiment, the areal density of basal plane dislocations in the third layer 13 is, for example, 0.05 pieces / cm 2 It is. The areal density of basal plane dislocations in the third layer 13 is 0.01 pieces / cm 2 Above 1 piece / cm 2 Below. Preferably, the areal density of basal plane dislocations in the third layer 13 is 0.05 pieces / cm 2 Above 0.5 pieces / cm 2 Below. The lower limit of the areal density of basal plane dislocations in the third layer 13 is not particularly limited, but may be, for example, 0.01 pieces / cm 2 Above or 0.05 pieces / cm 2 Above. The upper limit of the areal density of basal plane dislocations in the third layer 13 is not particularly limited, but may be, for example, 1 piece / cm 2 Below or 0.5 pieces / cm 2 Below.

[0042] According to the silicon carbide epitaxial substrate 100 according to the present embodiment, the value obtained by dividing the areal density of basal plane dislocations in the third layer 13 by the areal density of basal plane dislocations in the silicon carbide substrate 10 may be 0.01 or less. The lower limit of the value obtained by dividing the areal density of basal plane dislocations in the third layer 13 by the areal density of basal plane dislocations in the silicon carbide substrate 10 is not particularly limited, but may be, for example, 0.001 or more or 0.0001 or more. The upper limit of the value obtained by dividing the areal density of basal plane dislocations in the third layer 13 by the areal density of basal plane dislocations in the silicon carbide substrate 10 is not particularly limited, but may be, for example, 0.008 or less or 0.005 or less.

[0043] Next, a measuring device for the areal density of basal plane dislocations in the third layer 13 will be described. The surface density of basal plane dislocations in the third layer 13 can be measured, for example, using a photoluminescence imaging apparatus (model number: PLI-200) manufactured by Photon Design Co., Ltd. FIG. 4 is a schematic diagram showing the configuration of the photoluminescence imaging apparatus. As shown in FIG. 4, the photoluminescence imaging apparatus 200 mainly includes an excitation light generation unit 220 and an imaging unit 230.

[0044] The excitation light generation unit 220 includes a light source unit 221, a light guiding unit 222, and a filter unit 223. The light source unit 221 can generate excitation light LE having energy higher than the bandgap of hexagonal silicon carbide. The light source unit 221 is, for example, a mercury xenon lamp. The light guiding unit 222 can guide the light emitted from the light source unit 221 so that the first main surface 1 of the silicon carbide epitaxial substrate 100 is irradiated. The light guiding unit 222 has, for example, an optical fiber. As shown in FIG. 4, the excitation light generation unit 220 may be disposed on both sides of the near-infrared objective lens 237.

[0045] The filter unit 223 selectively transmits light having a specific wavelength corresponding to energy higher than the bandgap of hexagonal silicon carbide. The wavelength corresponding to the bandgap of hexagonal silicon carbide is typically about 390 nm. Therefore, for example, a band-pass filter that particularly transmits light having a wavelength of about 313 nm is used as the filter unit 223. The transmission wavelength range of the filter unit 223 may be, for example, 290 nm or more and 370 nm or less, or 300 nm or more and 330 nm or less, or 300 nm or more and 320 nm or less.

[0046] The imaging unit 230 mainly includes a control unit 238, a stage 239, a near-infrared objective lens 237, and a color image sensor 236. The control unit 238 controls the displacement operation of the stage 239 and the imaging operation by the color image sensor 236, and is, for example, a personal computer. The stage 239 supports the silicon carbide epitaxial substrate 100 so that the first main surface 1 is exposed. The stage 239 is, for example, an XY stage that displaces the position of the first main surface 1. The near-infrared objective lens 237 is disposed above the first main surface 1. The magnification of the near-infrared objective lens 237 is, for example, 4.5 times. The color image sensor 236 receives the photoluminescence light emitted from the silicon carbide epitaxial substrate 100.

[0047] Next, a method for measuring the surface density of basal plane dislocations in the third layer 13 will be described. First, using the excitation light generation unit 220, the excitation light LE is irradiated onto the first main surface 1 of the silicon carbide epitaxial substrate 100. Thereby, the photoluminescence light LL is generated from the silicon carbide epitaxial substrate 100. The wavelength of the excitation light LE is, for example, 313 nm. The intensity of the excitation light LE is, for example, 0.1 mW / cm 2 2 W / cm or less 2 The exposure time of the excitation light LE is, for example, 0.5 seconds or more and 120 seconds or less.

[0048] Next, the photoluminescence light is detected by the color image sensor. Specifically, the photoluminescence light LL generated in the silicon carbide epitaxial substrate 100 is detected by the color image sensor 236. The color image sensor 236 is, for example, a CCD (charge-coupled device) image sensor. The type of the CCD element is, for example, a back-illuminated deep depletion type. The CCD image sensor is, for example, eXcelon (trademark) manufactured by Cypress Semiconductor Corporation. The imaging wavelength range is, for example, 310 nm or more and 1024 nm or less. The element format is, for example, 1024ch × 1024ch. The image area is, for example, 13.3 mm × 13.3 mm. The element size is, for example, 13 μm × 13 μm. The number of pixels is, for example, 480 pixel × 640 pixel. The image size is, for example, 1.9 mm × 2.6 mm.

[0049] The color image sensor 236 may be, for example, a CMOS (complementary metal oxide semiconductor) image sensor. The CMOS image sensor is, for example, ORCA (trademark)-Fusion manufactured by Hamamatsu Photonics K.K. The imaging wavelength range is, for example, 350 nm or more and 1000 nm or less. The effective element size is 14.98 mm × 14.98 mm. The pixel size is 6.5 μm × 6.5 μm. Instead of the color image sensor 236, a black-and-white imaging sensor may be used.

[0050] FIG. 14 is a plan schematic view showing a photoluminescence image of basal plane dislocations. A photoluminescence image on the first main surface 1 of the silicon carbide epitaxial substrate 100 is acquired using the photoluminescence imaging apparatus. Based on the photoluminescence image, the basal plane dislocations 6 are specified. As shown in FIG. 14, in the photoluminescence image, the basal plane dislocations 6 are displayed brighter (whiter) than the regions other than the basal plane dislocations 6. When viewed in the direction perpendicular to the first main surface 1, the basal plane dislocations 6 are rod-shaped.

[0051] Assuming the thickness of the silicon carbide epitaxial layer 20 is H and the off-angle of the first main surface 1 is θ, the length of the basal plane dislocation 6 in the first direction 101 (the first length D1) is ideally H / tanθ. Here, H is the sum of the first thickness T1, the second thickness T2, and the third thickness T3. For example, when H is 10 μm and θ is 4°, the first length D1 is approximately 140 μm. In the photoluminescence image, a white rod-shaped region where the first length D1 is 0.9×H / tanθ or more and 1.1×H / tanθ or less, and the length of the basal plane dislocation 6 in the second direction 102 (the second length D2) is 0.1 times or less of the first length D1 can be determined to be the basal plane dislocation 6.

[0052] The silicon carbide epitaxial substrate 100 is moved in the XY direction parallel to the first main surface 1 by the stage 239. While moving the silicon carbide epitaxial substrate 100 in a direction parallel to the first main surface 1, a photoluminescence image of the entire first main surface 1 is taken. In the obtained photoluminescence image, the surface density of the basal plane dislocations is determined. Specifically, the value obtained by dividing the number of basal plane dislocations on the first main surface 1 by the observation area of the first main surface 1 is defined as the surface density of the basal plane dislocations in the third layer 13.

[0053] Next, a method for measuring the surface density of basal plane dislocations in the silicon carbide substrate 10 will be described. The surface density of basal plane dislocations in the silicon carbide substrate 10 is determined, for example, using molten potassium hydroxide (KOH). Specifically, the second main surface 2 of the silicon carbide substrate 10 is etched with molten KOH. As a result, the silicon carbide region near the basal plane dislocation exposed on the second main surface 2 is etched, and etch pits are formed on the second main surface 2. The value obtained by dividing the number of etch pits formed on the second main surface 2 by the measurement area of the second main surface 2 corresponds to the surface density of the basal plane dislocations in the silicon carbide substrate 10.

[0054] The temperature of the KOH solution is, for example, about 500°C or higher and 550°C or lower. The etching time is, for example, about 5 minutes or longer and 10 minutes or shorter. After etching, the etch pits formed on the second main surface 2 are observed using a Nomarski differential interference microscope. In plan view, hexagonal etch pits correspond to through dislocations. In plan view, elliptical etch pits correspond to basal plane dislocations.

[0055] Next, the surface roughness of the first main surface 1 of the silicon carbide epitaxial layer 20 will be described. The surface roughness of the first main surface 1 of the silicon carbide epitaxial layer 20 can be quantified, for example, by the arithmetic mean roughness Sa. The arithmetic mean roughness Sa is a three-dimensional surface texture parameter defined in the international standard ISO25178. The arithmetic mean roughness Sa can be measured using a white light interference microscope or the like. The measurement area of the white light interference microscope can be, for example, 255 μm square. The measurement positions can be a total of 9 points including the center on the first main surface 1 and 8 positions spaced 30 mm apart from the center toward the outer periphery and arranged at equal intervals in the circumferential direction. The average value of the measured values at a total of 9 measurement positions is defined as Sa (average value). The Sa (average value) on the first main surface 1 of the silicon carbide epitaxial layer 20 is, for example, 0.5 nm or less, preferably 0.35 nm or less, and more preferably 0.2 nm or less.

[0056] (Manufacturing Apparatus for Silicon Carbide Epitaxial Substrate) FIG. 5 is a schematic cross-sectional view showing the configuration of a manufacturing apparatus for a silicon carbide epitaxial substrate 100 according to the present embodiment. As shown in FIG. 5, the manufacturing apparatus for the silicon carbide epitaxial substrate 100 is, for example, a horizontal CVD (Chemical Vapor Deposition) apparatus of a hot wall type. The manufacturing apparatus 250 for the silicon carbide epitaxial substrate 100 mainly includes a chamber 201, a gas supply unit 235, a control unit 245, a heating element 203, a quartz tube 204, a heat insulating material (not shown), and an induction heating coil (not shown).

[0057] The heating element 203 has, for example, a cylindrical shape and forms a chamber 201 inside. The heating element 203 is made of, for example, graphite. The heating element 203 is provided inside a quartz tube 204. The heat insulating material surrounds the outer periphery of the heating element 203. The induction heating coil is wound, for example, along the outer peripheral surface of the quartz tube 204. The induction heating coil is configured to be able to supply an alternating current by an external power source (not shown). As a result, the heating element 203 is induction heated. As a result, the chamber 201 is heated by the heating element 203.

[0058] The chamber 201 is formed surrounded by the inner wall surface 205 of the heating element 203. A susceptor 210 for holding the silicon carbide substrate 10 is provided in the chamber 201. The susceptor 210 is made of, for example, silicon carbide. The silicon carbide substrate 10 is placed on the susceptor 210. The susceptor 210 is disposed on a stage 206. The stage 206 is rotatably supported by a rotating shaft 209. When the stage 206 rotates, the susceptor 210 rotates.

[0059] The manufacturing apparatus 250 for the silicon carbide epitaxial substrate 100 further has a gas inlet 207 and a gas outlet 208. The gas outlet 208 is connected to an exhaust pump (not shown). The arrows in FIG. 5 indicate the gas flow. The gas is introduced into the chamber 201 from the gas inlet 207 and exhausted from the gas outlet 208. The pressure inside the chamber 201 is adjusted by the balance between the gas supply amount and the gas exhaust amount.

[0060] The gas supply unit 235 is configured to be able to supply a mixed gas containing a source gas, a dopant gas, and a carrier gas to the chamber 201. Specifically, the gas supply unit 235 includes, for example, a first gas supply unit 231, a second gas supply unit 232, a third gas supply unit 233, and a fourth gas supply unit 234.

[0061] The first gas supply unit 231 is configured to be able to supply a first gas containing, for example, carbon atoms. The first gas supply unit 231 is, for example, a gas cylinder filled with the first gas. The first gas is, for example, propane (C3H8) gas. The first gas may be, for example, methane (CH4) gas, ethane (C2H6) gas, acetylene (C2H2) gas, or the like.

[0062] The second gas supply unit 232 is configured to be able to supply a second gas containing, for example, silane gas. The second gas supply unit 232 is, for example, a gas cylinder filled with the second gas. The second gas is, for example, silane (SiH4) gas. The second gas may be a mixed gas of silane gas and another gas other than silane.

[0063] The third gas supply unit 233 is configured to be able to supply a third gas containing, for example, ammonia gas. The third gas supply unit 233 is, for example, a gas cylinder filled with the third gas. The third gas is a doping gas containing N (nitrogen atoms). Ammonia gas is more easily thermally decomposed than nitrogen gas having a triple bond. Note that the third gas may be nitrogen gas.

[0064] The fourth gas supply unit 234 is configured to be able to supply a fourth gas (carrier gas) such as hydrogen. The fourth gas supply unit 234 is, for example, a gas cylinder filled with hydrogen.

[0065] The control unit 245 is configured to be able to control the flow rate of the mixed gas supplied from the gas supply unit 235 to the chamber 201. Specifically, the control unit 245 may include a first gas flow rate control unit 241, a second gas flow rate control unit 242, a third gas flow rate control unit 243, and a fourth gas flow rate control unit 244. Each control unit may be, for example, an MFC (Mass Flow Controller). The control unit 245 is disposed between the gas supply unit 235 and the gas inlet 207. In other words, the control unit 245 is disposed in the flow path connecting the gas supply unit 235 and the gas inlet 207.

[0066] (Method for manufacturing silicon carbide epitaxial substrate) Next, a method for manufacturing the silicon carbide epitaxial substrate 100 according to the present embodiment will be described.

[0067] First, a silicon carbide substrate 10 is prepared. For example, a polytype 4H silicon carbide single crystal is manufactured by the sublimation method. Next, the silicon carbide substrate 10 is prepared by slicing the silicon carbide single crystal, for example, by a wire saw. The silicon carbide substrate 10 contains an n-type impurity such as nitrogen, for example. The conductivity type of the silicon carbide substrate 10 is, for example, n-type. Next, mechanical polishing is performed on the silicon carbide substrate 10. Next, chemical mechanical polishing is performed on the silicon carbide substrate 10.

[0068] Next, a silicon carbide epitaxial layer 20 is formed on the silicon carbide substrate 10. Specifically, for example, a silicon carbide epitaxial layer 20 is formed by epitaxial growth on the silicon carbide substrate 10 by a CVD (Chemical Vapor Deposition) method. In the epitaxial growth, for example, silane (SiH4) and propane (C3H8) are used as source gases, and hydrogen (H2) is used as a carrier gas. The temperature of the epitaxial growth is, for example, about 1400 °C or higher and 1700 °C or lower. In the epitaxial growth, ammonia gas is used as a dopant gas. As a result, nitrogen atoms are introduced into the silicon carbide epitaxial layer 20.

[0069] FIG. 6 is a schematic diagram showing the relationship between the flow rate of the source gas and time. As shown in FIG. 6, at the first time point C1, the flow rate of the source gas is set to the first flow rate A1. Between the first time point C1 and the third time point C3, the flow rate of the source gas is maintained at the first flow rate A1. Between the first time point C1 and the second time point C2, the first layer 11 is formed on the silicon carbide substrate 10. From the second time point C2 to the third time point C3, the second layer 12 is formed on the first layer 11. Between the second time point C2 and the third time point C3, the second layer 12 is formed on the first layer 11. At the third time point C3, the flow rate of the source gas increases from the first flow rate A1 to the second flow rate A2. Between the third time point C3 and the fourth time point C4, the flow rate of the source gas is maintained at the second flow rate A2. Between the third time point C3 and the fourth time point C4, the third layer 13 is formed on the second layer 12.

[0070] The flow rate of the source gas is, for example, the flow rate of silane gas. When the source gas is silane gas, the first flow rate A1 is, for example, 30 sccm, and the second flow rate A2 is, for example, 100 sccm. The flow rate of the source gas may be, for example, the flow rate of propane gas. When the source gas is propane gas, the first flow rate A1 is, for example, 20 sccm, and the second flow rate A2 is, for example, 60 sccm.

[0071] FIG. 7 is a schematic diagram showing the relationship between the flow rate of ammonia gas and time. As shown in FIG. 7, at the first time point C1, the flow rate of ammonia gas is set to 0. At the first time point C1, ammonia gas is not substantially introduced into the chamber 201. Between the first time point C1 and the second time point C2, the flow rate of ammonia gas is maintained at 0. Between the first time point C1 and the second time point C2, the first layer 11 is formed on the silicon carbide substrate 10. Nitrogen atoms resulting from the ammonia gas supplied from the third gas supply unit 233 are not introduced into the first layer 11. However, background nitrogen atoms may be introduced into the first layer 11.

[0072] At the second time point C2, the flow rate of ammonia gas increases from 0 to the third flow rate B1. Between the second time point C2 and the third time point C3, the flow rate of ammonia gas is maintained at the third flow rate B1. Between the second time point C2 and the third time point C3, the second layer 12 is formed on the first layer 11. At the third time point C3, the flow rate of ammonia gas decreases from the third flow rate B1 to the fourth flow rate B2. Between the third time point C3 and the fourth time point C4, the flow rate of ammonia gas is maintained at the fourth flow rate B2. Between the third time point C3 and the fourth time point C4, the third layer 13 is formed on the second layer 12. The third flow rate B1 is, for example, 20 sccm. The fourth flow rate B2 is, for example, 10 sccm. As described above, a silicon carbide epitaxial substrate 100 having a silicon carbide substrate 10 and a silicon carbide epitaxial layer 20 is prepared (see FIG. 2).

[0073] (Silicon Carbide Semiconductor Device) Next, the configuration of the silicon carbide semiconductor device 300 according to the present embodiment will be described. FIG. 8 is a schematic cross-sectional view showing the configuration of the silicon carbide semiconductor device 300 according to the present embodiment. As shown in FIG. 8, the silicon carbide semiconductor device 300 according to the present embodiment mainly includes a silicon carbide epitaxial substrate 100, a gate insulating film 115, a gate electrode 127, a source electrode 116, a drain electrode 120, a source wiring 119, and an interlayer insulating film 126. The silicon carbide epitaxial substrate 100 has a silicon carbide substrate 10, a silicon carbide epitaxial layer 20, a first main surface 1, and a second main surface 2. The silicon carbide epitaxial layer 20 has a first layer 11, a second layer 12, a third layer 13, a body region 113, a source region 114, and a contact region 118.

[0074] The body region 113 is formed on the third layer 13. The body region 113 is in contact with the third layer 13. The body region 113 contains p-type impurities such as aluminum, for example. The body region 113 has a p-type conductivity type. The source region 114 is formed on the body region 113. The source region 114 contains n-type impurities such as phosphorus, for example. The source region 114 has an n-type conductivity type. The concentration of the n-type impurities contained in the source region 114 may be higher than the concentration of the p-type impurities contained in the body region 113.

[0075] The contact region 118 penetrates the source region 114 and the body region 113. The contact region 118 is in contact with each of the source region 114, the body region 113, and the third layer 13. The contact region 118 contains p-type impurities such as aluminum, for example. The concentration of the p-type impurities contained in the contact region 118 may be higher than the concentration of the n-type impurities contained in the source region 114.

[0076] The silicon carbide epitaxial substrate 100 has a plurality of basal plane dislocations 6. The plurality of basal plane dislocations 6 has a first basal plane dislocation 31 and a second basal plane dislocation 32. The first basal plane dislocation 31 is located in the silicon carbide substrate 10. The first basal plane dislocation 31 may be in contact with the drain electrode 120 on the second main surface 2. The second basal plane dislocation 32 is located in the silicon carbide substrate 10 and the silicon carbide epitaxial layer 20. The second basal plane dislocation 32 penetrates each of the first layer 11, the second layer 12, and the third layer 13. The second basal plane dislocation 32 may penetrate each of the body region 113 and the source region 114. The second basal plane dislocation 32 may be in contact with the source electrode 116 on the first main surface 1.

[0077] A trench 106 is provided on the first main surface 1. The trench 106 is defined by a side surface 103 and a bottom surface 104. The side surface 103 is composed of the source region 114, the body region 113, and the third layer 13. The bottom surface 104 is composed of the third layer 13.

[0078] The gate insulating film 115 is in contact with the third layer 13 at the bottom surface 104 and is in contact with each of the third layer 13, the body region 113, and the source region 114 at the side surface 103. The gate electrode 127 is disposed on the gate insulating film 115. The gate electrode 127 is in contact with the gate insulating film 115 inside the trench 106. The gate electrode 127 faces each of the side surface 103 and the bottom surface 104 of the trench 106.

[0079] The interlayer insulating film 126 covers the gate electrode 127. The interlayer insulating film 126 is in contact with the gate insulating film 115. The interlayer insulating film 126 is composed of a material containing, for example, silicon dioxide. The source electrode 116 is in contact with each of the source region 114 and the contact region 118. The source electrode 116 is made of a material containing, for example, Ti, Al, and Si. The source wiring 119 is in contact with the source electrode 116. The source wiring 119 is electrically connected to the source electrode 116. The source wiring 119 covers the source electrode 116 and the interlayer insulating film 126. The drain electrode 120 is in contact with the silicon carbide substrate 10 on the second main surface 2.

[0080] In the above embodiment, the case where the silicon carbide semiconductor device 300 is a MOSFET has been described, but the silicon carbide semiconductor device 300 is not limited to a MOSFET. The silicon carbide semiconductor device 300 may be, for example, an IGBT (Insulated Gate Bipolar Transistor) or the like.

[0081] (Method for manufacturing a silicon carbide semiconductor device) Next, a method for manufacturing the silicon carbide semiconductor device 300 according to the present embodiment will be described.

[0082] First, a silicon carbide epitaxial substrate 100 according to this embodiment is prepared (see FIG. 1). Next, a step of forming a body region is performed. FIG. 9 is a cross-sectional schematic view showing the step of forming the body region. Specifically, a p-type impurity such as aluminum is ion-implanted into the third layer 13 of the silicon carbide epitaxial layer 20. Thereby, a body region 113 having a p-type conductivity type is formed. The thickness of the body region 113 is, for example, 0.9 μm. The body region may be formed so as to be in contact with the second basal plane dislocation 32.

[0083] Next, a step of forming a source region is performed. FIG. 10 is a cross-sectional schematic view showing the step of forming the source region. Specifically, an n-type impurity such as phosphorus is ion-implanted into the body region 113. Thereby, a source region 114 having an n-type conductivity type is formed. The thickness of the source region 114 is, for example, 0.4 μm. The concentration of the n-type impurity contained in the source region 114 may be higher than the concentration of the p-type impurity contained in the body region 113. The source region 114 may be formed so as to be in contact with the second basal plane dislocation 32.

[0084] Next, a contact region 118 is formed by ion-implanting a p-type impurity such as aluminum into the source region 114. The contact region 118 is formed so as to penetrate the source region 114 and the body region 113 and to be in contact with the third layer 13. The concentration of the p-type impurity contained in the contact region 118 may be higher than the concentration of the n-type impurity contained in the source region 114.

[0085] Next, activation annealing is performed to activate the ion-implanted impurities. The temperature of the activation annealing is preferably 1500 °C or higher and 1900 °C or lower, for example, about 1700 °C. The time of the activation annealing is, for example, about 30 minutes. The atmosphere of the activation annealing is preferably an inert gas atmosphere, for example, an Ar atmosphere.

[0086] Next, a step of forming a trench in the first main surface 1 is carried out. FIG. 11 is a schematic cross-sectional view showing the step of forming a trench in the first main surface 1. As shown in FIG. 11, a mask 117 having an opening is formed on the first main surface 1 composed of the source region 114 and the contact region 118. Using the mask 117, the source region 114, the body region 113, and a part of the third layer 13 are removed by etching. As the etching method, for example, reactive ion etching, particularly inductively coupled plasma reactive ion etching can be used. Specifically, for example, inductively coupled plasma reactive ion etching using SF6 or a mixed gas of SF6 and O2 as a reaction gas can be used. By etching, a recess is formed in the first main surface 1.

[0087] Next, thermal etching is performed in the recess. The thermal etching can be performed, for example, by heating in an atmosphere containing a reactive gas having at least one or more halogen atoms with the mask 117 formed on the first main surface 1. The at least one or more halogen atoms include at least either a chlorine (Cl) atom or a fluorine (F) atom. The atmosphere contains, for example, Cl2, BCl3, SF6, or CF4. For example, thermal etching is performed using a mixed gas of chlorine gas and oxygen gas as a reaction gas and setting the heat treatment temperature to, for example, 700 °C or higher and 1000 °C or lower. Note that the reaction gas may contain a carrier gas in addition to the chlorine gas and oxygen gas described above. As the carrier gas, for example, nitrogen gas, argon gas, or helium gas can be used.

[0088] As shown in FIG. 11, a trench 106 is formed in the first main surface 1 by thermal etching. The trench 106 is defined by a side surface 103 and a bottom surface 104. The side surface 103 is composed of the source region 114, the body region 113, and the third layer 13. The bottom surface 104 is composed of the third layer 13. Next, the mask 117 is removed from the first main surface 1.

[0089] Next, a step of forming a gate insulating film is performed. FIG. 12 is a cross-sectional schematic view showing the step of forming the gate insulating film. Specifically, a silicon carbide epitaxial substrate 100 having a trench 106 formed in a first main surface 1 is heated in an atmosphere containing oxygen at a temperature of, for example, 1300° C. or higher and 1400° C. or lower. As a result, a gate insulating film 115 is formed which contacts the third layer 13 at the bottom surface 104, contacts each of the third layer 13, the body region 113, and the source region 114 at the side surface 103, and contacts each of the source region 114 and the contact region 118 at the first main surface 1.

[0090] Next, a step of forming a gate electrode is performed. FIG. 13 is a cross-sectional schematic view showing the steps of forming the gate electrode and the interlayer insulating film. The gate electrode 127 is formed so as to contact the gate insulating film 115 inside the trench 106. The gate electrode 127 is disposed inside the trench 106 and is formed so as to face each of the side surface 103 and the bottom surface 104 of the trench 106 on the gate insulating film 115. The gate electrode 127 is formed, for example, by a LPCVD (Low Pressure Chemical Vapor Deposition) method.

[0091] Next, an interlayer insulating film 126 is formed. The interlayer insulating film 126 is formed so as to cover the gate electrode 127 and contact the gate insulating film 115. The interlayer insulating film 126 is formed, for example, by a chemical vapor deposition method. The interlayer insulating film 126 is composed of, for example, a material containing silicon dioxide. Next, a part of the interlayer insulating film 126 and the gate insulating film 115 is etched so that openings are formed on the source region 114 and the contact region 118. As a result, the contact region 118 and the source region 114 are exposed from the gate insulating film 115.

[0092] Next, a step of forming a source electrode is performed. The source electrode 116 is formed so as to be in contact with each of the source region 114 and the contact region 118. The source electrode 116 is formed, for example, by a sputtering method. The source electrode 116 is made of a material containing, for example, Ti, Al, and Si.

[0093] Next, alloying annealing is performed. Specifically, the source electrode 116 in contact with each of the source region 114 and the contact region 118 is held at a temperature of, for example, 900°C or higher and 1100°C or lower for about 5 minutes. As a result, at least a part of the source electrode 116 is silicided. Thereby, the source electrode 116 that forms an ohmic contact with the source region 114 is formed. Preferably, the source electrode 116 forms an ohmic contact with the contact region 118.

[0094] Next, a source wiring 119 is formed. The source wiring 119 is electrically connected to the source electrode 116. The source wiring 119 is formed so as to cover the source electrode 116 and the interlayer insulating film 126.

[0095] Next, a step of forming a drain electrode 120 is performed. First, on the second main surface 2, the silicon carbide substrate 10 is polished. As a result, the thickness of the silicon carbide substrate 10 becomes thinner. A part of each of the first basal plane dislocation 31 and the second basal plane dislocation 32 may be removed by polishing. Next, the drain electrode 120 is formed. The drain electrode 120 is formed on the second main surface 2 so as to be in contact with the silicon carbide substrate 10. The drain electrode 120 may be formed so as to be in contact with each of the first basal plane dislocation 31 and the second basal plane dislocation 32. As described above, the silicon carbide semiconductor device 300 according to the present embodiment is manufactured (see FIG. 8).

[0096] Next, the operation and effects of the silicon carbide epitaxial substrate 100 and the silicon carbide semiconductor device 300 according to the present embodiment will be described.

[0097] The inventors have earnestly studied measures to reduce the surface density of basal plane dislocations inherited by the silicon carbide epitaxial layer 20 while suppressing an increase in the surface roughness of the silicon carbide epitaxial layer 20, and as a result of repeated experiments, they have found the silicon carbide epitaxial substrate 100 according to this embodiment.

[0098] According to the silicon carbide epitaxial substrate 100 according to this embodiment, the silicon carbide epitaxial layer 20 includes a first layer 11 in contact with the silicon carbide substrate 10, a second layer 12 on the first layer 11, and a third layer 13 on the second layer 12. The nitrogen concentration of the first layer 11 is higher than the nitrogen concentration of the third layer 13 and lower than the nitrogen concentration of the second layer 12. The nitrogen concentration of the silicon carbide substrate 10 is higher than the nitrogen concentration of the second layer 12. The thickness of the first layer 11 is smaller than the thickness of the second layer 12. Thereby, it is possible to effectively suppress the inheritance of basal plane dislocations from the silicon carbide substrate 10 to the silicon carbide epitaxial layer 20. As a result, the surface density of basal plane dislocations in the third layer 13 can be reduced. Further, in the silicon carbide substrate 10, etch pits are not formed by molten KOH. Therefore, when the silicon carbide epitaxial layer 20 is formed on the silicon carbide substrate 10, an increase in the surface roughness of the silicon carbide epitaxial layer 20 can be suppressed. Therefore, it is possible to reduce the surface density of basal plane dislocations in the silicon carbide epitaxial layer 20 while suppressing an increase in the surface roughness of the silicon carbide epitaxial layer 20. Therefore, the yield of the silicon carbide semiconductor device 300 manufactured using the silicon carbide epitaxial substrate 100 can be improved.

Example

[0099] (Sample Preparation) Silicon carbide epitaxial substrates 100 according to Samples 1 to 10 were prepared. The silicon carbide epitaxial substrates 100 according to Samples 2 to 7 are examples. The silicon carbide epitaxial substrates 100 according to Samples 1 and 8 to 10 are comparative examples.

[0100] The silicon carbide epitaxial substrate 100 according to Sample 1 has a silicon carbide substrate 10 and a silicon carbide epitaxial layer 20 provided on the silicon carbide substrate 10. The silicon carbide epitaxial layer 20 is composed of a second layer 12 and a third layer 13. The silicon carbide epitaxial substrate 100 according to Sample 1 does not have a first layer 11.

[0101] The silicon carbide epitaxial substrates 100 according to Samples 2 to 10 have a silicon carbide substrate 10 and a silicon carbide epitaxial layer 20 provided on the silicon carbide substrate 10. The silicon carbide epitaxial layer 20 is composed of a first layer 11, a second layer 12, and a third layer 13. The thickness (first thickness T1) of the first layer 11 is set to be 0.05 μm or more and 1.0 μm or less. The nitrogen concentration (first nitrogen concentration N1) of the first layer 11 is 0.02×10 17 cm -3 or more and 20×10 17 cm -3 or less.

[0102] In the silicon carbide epitaxial substrates 100 according to Samples 1 to 10, the thickness (second thickness T2) of the second layer 12 is set to 1 μm, and the nitrogen concentration (second nitrogen concentration N2) of the second layer 12 is 1×10 18 cm -3 In the silicon carbide epitaxial substrates 100 according to Samples 1 to 9, the thickness (third thickness T3) of the third layer 13 is set to 10 μm, and the nitrogen concentration (third nitrogen concentration N3) of the third layer 13 is 8×10 15 cm -3 or less.

[0103] (Evaluation method) The surface density of basal plane dislocations on the first main surface 1 of the third layer 13 of the silicon carbide epitaxial substrate 100 according to Samples 1 to 10 and the surface density of basal plane dislocations on the second main surface 2 of the silicon carbide substrate 10 were measured. The surface density of basal plane dislocations was measured using a photoluminescence imaging device (model number: PLI-200) manufactured by Photon Design Co., Ltd. Excitation light was irradiated onto the first main surface 1 of the silicon carbide epitaxial substrate 100. As a result, photoluminescence light was generated from the silicon carbide epitaxial substrate 100. The photoluminescence light was detected by an image sensor. The wavelength of the excitation light was 313 nm. The intensity of the excitation light was 2 2 W / cm 2 or less. The exposure time of the excitation light was 0.5 seconds or more and 120 seconds or less.

[0104] Based on the photoluminescence image of the first main surface 1 detected by the image sensor, the number of basal plane dislocations on the first main surface 1 was determined. The value obtained by dividing the number of basal plane dislocations on the first main surface 1 by the measured area of the first main surface 1 was defined as the basal plane dislocation density of the third layer 13. The surface density of basal plane dislocations in the silicon carbide substrate 10 was determined using molten potassium hydroxide (KOH). The value obtained by dividing the number of etch pits formed on the second main surface 2 by the measured area of the second main surface 2 was defined as the surface density of basal plane dislocations in the silicon carbide substrate 10. The temperature of the KOH melt was 500 °C or more and 550 °C or less. The etching time was, for example, 5 minutes or more and 10 minutes or less.

[0105] (Evaluation Results)

[0106] [Table 1]

[0107] Table 1 shows the surface density (B) of basal plane dislocations on the first main surface 1 of the third layer 13 of the silicon carbide epitaxial substrate 100 according to Samples 1 to 10, the surface density (A) of basal plane dislocations on the second main surface 2 of the silicon carbide substrate 10, and the value (B / A) obtained by dividing B by A. As shown in Table 1, the surface density (B) of basal plane dislocations on the first main surface 1 of the third layer 13 of the silicon carbide epitaxial substrate 100 according to Samples 2 to 7 was 0.02 pieces / cm 2 or more and 0.85 / cm 2 or less. On the other hand, the surface density (B) of basal plane dislocations on the first main surface 1 of the third layer 13 of the silicon carbide epitaxial substrate 100 according to Samples 1 and 8 to 10 was 3.13 pieces / cm 2 or more and 9.51 / cm 2 or less.

[0108] As shown in Table 1, the value (B / A) obtained by dividing the surface density (B) of basal plane dislocations on the first main surface 1 of the third layer 13 of the silicon carbide epitaxial substrate 100 according to Samples 2 to 7 by the surface density (A) of basal plane dislocations on the second main surface 2 of the silicon carbide substrate 10 was 0.0001 or more and 0.0009 or less. On the other hand, the value (B / A) obtained by dividing the surface density (B) of basal plane dislocations on the first main surface 1 of the third layer 13 of the silicon carbide epitaxial substrate 100 according to Samples 1 and 8 to 10 by the surface density (A) of basal plane dislocations on the second main surface 2 of the silicon carbide substrate 10 was 0.00135 or more and 0.0271 or less.

[0109] As described above, it was confirmed that by providing the first layer 11 (low-concentration layer) between the silicon carbide substrate 10 and the second layer 12 (buffer layer), it is possible to effectively suppress the inheritance of basal plane dislocations from the silicon carbide substrate 10 to the third layer 13. As a result, the surface density of basal plane dislocations in the third layer 13 can be reduced.

[0110] The embodiments and examples disclosed this time should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is shown not by the above-described embodiments and examples but by the claims, and it is intended that all meanings equivalent to the claims and all modifications within the scope are included.

Explanation of Symbols

[0111] 1 First main surface 2 Second main surface 3 Orientation flat 4 Arc-shaped part 5 Outer peripheral edge 6 Base plane dislocation 10 Silicon carbide substrate 11 First layer 12 Second layer 13 Third layer 14 Third main surface 20 Silicon carbide epitaxial layer 31 First base plane dislocation 32 Second base plane dislocation 100 Silicon carbide epitaxial substrate 101 First direction 102 Second direction 103 Side surface 104 Bottom surface 106 Trench 113 Body region 114 Source region 115 Gate insulating film 116 Source electrode 117 Mask 118 Contact region 119 Source wiring 120 Drain electrode 126 Interlayer insulating film 127 Gate electrode 200 Photoluminescence imaging device 201 Chamber 203 Heating element 204 Quartz tube 205 Inner wall surface 206,239 Stage 207 Gas inlet 208 Gas outlet 209 Rotation axis 210 Susceptor 220 Excitation light generation unit 221 Light source section 222 Light guiding section 223 Filter section 230 Imaging unit 231 First gas supply section 232 Second gas supply section 233 Third gas supply section 234 Fourth gas supply section 235 Gas supply section 236 Color image sensor 237 Near-infrared objective lens 238,245 Control section 241 First gas flow control section 242 Second gas flow control section 243 Third gas flow control section 244 Fourth gas flow control section 250 Manufacturing apparatus 300 Silicon carbide semiconductor device A1 First flow rate A2 Second flow rate B1 Third flow rate B2 Fourth flow rate C1 First time point C2 Second time point C3 Third time point C4 Fourth time point LE Excitation light LL Photoluminescence light N1 First nitrogen concentration N2 Second nitrogen concentration N3 Third nitrogen concentration N4 Fourth nitrogen concentration P1 First position P2 Second position P3 Third position P4 Fourth position T1 First thickness T2 Second thickness T3 Third thickness T4 Fourth thickness W1 Maximum diameter θ Off angle

Claims

1. A silicon carbide substrate, and a silicon carbide epitaxial layer on the silicon carbide substrate, wherein the silicon carbide epitaxial layer includes a first layer in contact with the silicon carbide substrate, a second layer on the first layer, and a third layer on the second layer, wherein the nitrogen concentration of the first layer is higher than the nitrogen concentration of the third layer and lower than the nitrogen concentration of the second layer, wherein the nitrogen concentration of the silicon carbide substrate is higher than the nitrogen concentration of the second layer, wherein the thickness of the first layer is smaller than the thickness of the second layer, The areal density of basal plane dislocations in the third layer is 0.01 pieces / cm 2 or more and 0.85 pieces / cm 2 or less, and The nitrogen concentration of the first layer is 2×10^17 cm -3 or more and 5×10 17 cm -3 or less, and and wherein the thickness of the first layer is 0.01 μm or more and 0.2 μm or less. A silicon carbide epitaxial substrate.

2. The nitrogen concentration of the second layer is 5×10 17 cm -3 or more and 5×10 18 cm -3 or less, and The silicon carbide epitaxial substrate according to claim 1, wherein the thickness of the second layer is 0.6 μm or more and 3 μm or less.

3. The nitrogen concentration of the third layer is 2×10 15 cm -3 or more and 5×10 16 cm -3 or less, and The silicon carbide epitaxial substrate according to claim 1 or claim 2, wherein the thickness of the third layer is 3 μm or more and 50 μm or less.

4. The silicon carbide epitaxial substrate according to any one of claims 1 to 3, wherein a value obtained by dividing a basal plane dislocation surface density in the third layer by a basal plane dislocation surface density in the silicon carbide substrate is 0.01 or less.

5. A silicon carbide semiconductor device including the silicon carbide epitaxial substrate according to any one of claims 1 to 4.

Images