Semiconductor device and manufacturing method thereof

Abstract

To provide a semiconductor device and a method for manufacturing the same, capable of reducing loss.SOLUTION: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, a connecting member, a first member, and an insulating member. The connecting member is electrically connected with the first conductive member. The first member is provided between a first electrode portion of the third electrode and the connecting member. A position of a second conductive region in a first direction is between a position of a third partial region in the first direction and a position of the first member in the first direction. The first member includes an element different from an element included in the second conductive region.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] For example, in semiconductor devices such as transistors, it is desirable to reduce losses. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-125827 Summary of the Invention [Problem to be solved by the invention]

[0004] SUMMARY OF THE INVENTION An embodiment of the present invention provides a semiconductor device capable of reducing loss and a method for manufacturing the same. [Means for solving the problem]

[0005] According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, a first conductive member, a connecting member, a first member, and an insulating member. The semiconductor member includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type. The first semiconductor region is located between the first electrode and the third semiconductor region. The first semiconductor region includes a first partial region, a second partial region, and a third partial region. The second semiconductor region is located between the first semiconductor region and the third semiconductor region. The third semiconductor region includes a first semiconductor portion and a second semiconductor portion. A second direction from the first semiconductor portion to the second semiconductor portion intersects with a first direction from the first electrode to the third semiconductor region. The second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion. The direction from the third semiconductor portion to the fourth semiconductor portion is along the second direction. The third semiconductor portion is located between the first partial region and the first semiconductor portion in the first direction. The fourth semiconductor portion is between the second partial region and the second semiconductor portion in the first direction. The position of the third partial region in the second direction is between the position of the first partial region in the second direction and the position of the second partial region in the second direction. The second electrode is electrically connected to the third semiconductor region. The third electrode includes a first electrode portion. The first electrode portion is between the first semiconductor portion and the second semiconductor portion and between the third semiconductor portion and the fourth semiconductor portion in the second direction. The first conductive member includes a first conductive region, a second conductive region, and a third conductive region. The first conductive region is between the first partial region and the second partial region in the second direction. The position of the first conductive region in the first direction is between the position of the third partial region in the first direction and the position of the first electrode portion in the first direction. The second conductive region is between the first conductive region and the third conductive region in a third direction intersecting a plane including the first direction and the second direction. The connecting member is electrically connected to the first conductive member. A direction from the third conductive region to the connecting member is along the first direction. The first member is provided between the first electrode portion and the connecting member in the third direction.The position of the second conductive region in the first direction is between the position of the third partial region in the first direction and the position of the first member in the first direction. The first member contains an element different from the element contained in the second conductive region. The insulating members are provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, between the first conductive member and the third electrode, and between the first conductive member and the first member. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 2] FIG. 2 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 3] FIG. 3 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 5] FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 6] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 7] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 8] FIG. 8 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 9] FIG. 9 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 10] FIG. 10 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 11] FIG. 11 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 12] FIG. 12 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 13]FIG. 13 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 14] FIG. 14 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 15] FIG. 15 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 16] FIG. 16 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 17] FIG. 17 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 18] FIG. 18 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 19] FIG. 19 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 20] FIG. 20 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 21] 21(a) to 21(f) are schematic cross-sectional views illustrating semiconductor devices. [Figure 22] 22(a) and 22(b) are graphs illustrating the characteristics of the semiconductor device. [Figure 23] 23(a) and 23(b) are graphs illustrating the characteristics of the semiconductor device. [Figure 24] FIG. 24 is a graph illustrating the characteristics of the semiconductor device. [Figure 25] FIG. 25 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 26] FIG. 26 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 27] FIG. 27 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 28] FIG. 28 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 29]29(a) to 29(d) are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 30] 30(a) to 30(d) are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 31] 31(a) to 31(d) are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In this specification and in each drawing, elements similar to those previously described with reference to the previous drawings are designated by the same reference numerals, and detailed descriptions thereof will be omitted where appropriate.

[0008] (First embodiment) 1 to 5 are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. Fig. 1 is a cross-sectional view taken along line A1-A2 in Figs. 4 and 5. Fig. 2 is a cross-sectional view taken along line B1-B2 in Figs. 4 and 5. Fig. 3 is a cross-sectional view taken along line C1-C2 in Figs. 4 and 5. Fig. 4 is a cross-sectional view taken along line E1-E2 in Figs. 1 to 3. Fig. 5 is a cross-sectional view taken along line F1-F2 in Figs. 1 to 3.

[0009] As shown in these figures, the semiconductor device 110 of the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a semiconductor member 10, a first conductive member 61, a connecting member 55M, a first member 58a, and an insulating member 41.

[0010] As shown in FIG. 1, the semiconductor member 10 includes a first semiconductor region 11 of a first conductivity type, a second semiconductor region 12 of a second conductivity type, and a third semiconductor region 13 of the first conductivity type. The first conductivity type is one of n-type and p-type. The second conductivity type is the other of n-type and p-type. For example, the first conductivity type is n-type and the second conductivity type is p-type. The semiconductor member 10 includes, for example, silicon or SiC.

[0011] The first semiconductor region 11 is located between the first electrode 51 and the third semiconductor region 13. The second semiconductor region 12 is located between the first semiconductor region 11 and the third semiconductor region 13.

[0012] The direction from the first electrode 51 to the third semiconductor region 13 is defined as the first direction D1. The first direction D1 is defined as the Z-axis direction. A direction perpendicular to the Z-axis direction is defined as the X-axis direction. The direction perpendicular to the Z-axis direction and the X-axis direction is defined as the Y-axis direction.

[0013] For example, the first semiconductor region 11 includes a first partial region 11a, a second partial region 11b, and a third partial region 11c. The first semiconductor region 11 may further include a fourth partial region 11d and a fifth partial region 11e. The boundaries between these partial regions may be unclear.

[0014] 1, the third semiconductor region 13 includes a first semiconductor portion 13a and a second semiconductor portion 13b. A second direction D2 from the first semiconductor portion 13a to the second semiconductor portion 13b intersects with the first direction D1 from the first electrode 51 to the third semiconductor region 13. The second direction D2 is, for example, the X-axis direction.

[0015] The second semiconductor region 12 includes a third semiconductor portion 12c and a fourth semiconductor portion 12d. The direction from the third semiconductor portion 12c to the fourth semiconductor portion 12d is along the second direction D2. The third semiconductor portion 12c is located between the first partial region 11a and the first semiconductor portion 13a in the first direction D1. The fourth semiconductor portion 12d is located between the second partial region 11b and the second semiconductor portion 13b in the first direction D1.

[0016] The position of the third partial region 11c in the second direction D2 is between the position of the first partial region 11a and the position of the second partial region 11b in the second direction D2. The fourth partial region 11d is, for example, between the first partial region 11a and the third partial region 11c. The fifth partial region 11e is between the third partial region 11c and the second partial region 11b.

[0017] In the semiconductor component 10, the first semiconductor region 11 may correspond to, for example, a drift layer, the second semiconductor region 12 may correspond to, for example, a base layer, and the third semiconductor region 13 may correspond to, for example, a source layer.

[0018] The second electrode 52 is electrically connected to the third semiconductor region 13. In this example, the semiconductor member 10 is provided between the first electrode 51 and the second electrode 52. A conductive layer 52L for the second electrode may be provided between the third semiconductor region 13 and the second electrode 52. The conductive layer 52L for the second electrode may include, for example, a stacked film such as a Ti film / TiN film / W film. The conductive layer 52L for the second electrode may include, for example, a contact region 52a. The contact region 52a is electrically connected to the second semiconductor region 12 and the third semiconductor region 13.

[0019] The third electrode 53 includes a first electrode portion 53a. The first electrode portion 53a is located between the first semiconductor portion 13a and the second semiconductor portion 13b and between the third semiconductor portion 12c and the fourth semiconductor portion 12d in the second direction D2. In this example, a portion of the first electrode portion 53a overlaps with the fourth partial region 11d in the first direction D1. Another portion of the first electrode portion 53a overlaps with the fifth partial region 11e in the first direction D1.

[0020] The first conductive member 61 includes a first conductive region 61a, a second conductive region 61b, and a third conductive region 61c. The boundaries between these conductive regions may be unclear. As shown in FIG. 1, the first conductive region 61a is located between the first partial region 11a and the second partial region 11b in the second direction D2. The position of the first conductive region 61a in the first direction D1 is located between the position of the third partial region 11c in the first direction D1 and the position of the first electrode portion 53a in the first direction D1.

[0021] 5, the second conductive region 61b is located between the first conductive region 61a and the third conductive region 61c in the third direction D3. The third direction D3 intersects with a plane including the first direction D1 and the second direction D2. The third direction D3 is, for example, the Y-axis direction. The second conductive region 61b is continuous with the first conductive region 61a and the third conductive region 61c in the third direction D3.

[0022] 3, the connection member 55M is electrically connected to the first conductive member 61. The direction from the third conductive region 61c to the connection member 55M is along the first direction D1.

[0023] As shown in FIG. 4, the first member 58a is provided between the first electrode portion 53a and the connection member 55M in the third direction D3. As shown in FIG. 2, the position of the second conductive region 61b in the first direction D1 is between the position of the third portion region 11c in the first direction D1 and the position of the first member 58a in the first direction D1. In the embodiment, the first member 58a contains an element different from the element contained in the second conductive region 61b. The connection member 55M, the first member 58a, and the third electrode 53 are electrically connected to one another. The first member 58a is continuous with the first electrode portion 53a and the connection member 55M in the third direction D3.

[0024] The insulating member 41 is provided between the semiconductor member 10 and the third electrode 53, between the semiconductor member 10 and the first conductive member 61, between the first conductive member 61 and the third electrode 53, and between the first conductive member 61 and the first member 58a. The insulating member 41 electrically insulates these conductive parts.

[0025] For example, the insulating member 41 includes a first insulating region 41a, a second insulating region 41b, and a third insulating region 41c. The first insulating region 41a is provided between the first semiconductor portion 13a and the first electrode portion 53a, and between the third semiconductor portion 12c and the first electrode portion 53a. The second insulating region 41b is provided between the first electrode portion 53a and the second semiconductor portion 13b, and between the first electrode portion 53a and the fourth semiconductor portion 12d. The third insulating region 41c is provided between the first conductive member 61 and the first electrode portion 53a.

[0026] The current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 is, for example, a potential based on the potential of the second electrode 52. The first electrode 51 functions as, for example, a drain electrode. The second electrode 52 functions as, for example, a source electrode. The third electrode 53 functions as, for example, a gate electrode. The first insulating region 41a and the second insulating region 41b function as, for example, a gate insulating film. The semiconductor device 110 is, for example, a transistor (for example, a MOS transistor).

[0027] In the embodiment, as described above, the first member 58a is provided. The first member 58a contains an element different from the element contained in the second conductive region 61b. For example, the electrical resistance of the first member 58a is higher than the electrical resistance of the second conductive region 61b.

[0028] For example, the second conductive region 61b includes a first element. The first member 58a includes a first element and a second element. The first element includes one of a third element and a fourth element. The second element includes the other of the third element and the fourth element. The third element includes at least one selected from the group consisting of phosphorus, arsenic, and antimony. The fourth element includes at least one selected from the group consisting of boron, aluminum, and gallium.

[0029] For example, the second conductive region 61b contains phosphorus. The first member 58a contains phosphorus and boron. The second conductive region 61b and the first member 58a contain at least one of silicon and SiC. For example, the second conductive region 61b is a semiconductor region containing p-type impurities. The electrical resistance of the second conductive region 61b is low. On the other hand, the first member 58a is a semiconductor region containing both p-type and n-type impurities. The conductivity of the second conductive region 61b is higher than the conductivity of the first member 58a. The second conductive region 61b is a low-resistance region. The first member 58a is a high-resistance region.

[0030] For example, a gate pulse is applied from the drive circuit to the connection member 55M electrically connected to the third electrode 53. The gate pulse is applied to the first conductive region 61a via the second conductive region 61b in the low resistance region. The gate pulse is applied to the third electrode 53 (first electrode portion 53a) via the first member 58a in the high resistance region. One gate pulse is applied to the first conductive region 61a and the first electrode portion 53a via current paths with different resistances. This shortens the mirror period, for example. For example, loss can be suppressed. According to the embodiment, a semiconductor device capable of reducing loss can be provided.

[0031] In the embodiment, for example, loss can be suppressed while maintaining a low surge voltage. For example, surge voltage can be suppressed while maintaining a low loss. For example, the trade-off between loss and surge voltage can be improved. For example, low loss and high breakdown voltage can be obtained.

[0032] For example, a reference example can be considered in which the first conductive member 61 is electrically isolated from the third electrode 53. In this reference example, a gate pulse is supplied from a first circuit to the third electrode 53. A separate gate pulse is supplied to the first conductive member 61 from a second circuit separate from the first circuit. In such a reference example, it is possible to improve the trade-off between loss and surge voltage. However, this reference example requires multiple circuits, which is disadvantageous from the viewpoint of practicality. Matching the characteristics of multiple circuits with high precision complicates the circuit design. Costs increase.

[0033] In contrast, in the embodiment, one gate pulse from one circuit may be supplied to the connection member 55M. A difference in electrical resistance is provided between the current path (second conductive region 61b) between the connection member 55M and the first conductive region 61a and the current path (first member 58a) between the connection member 55M and the third electrode 53. This allows potential changes with different transient characteristics to be obtained between the first conductive region 61a and the third electrode 53. For example, the first conductive region 61a responds quickly to the gate pulse. For example, the third electrode 53 responds slowly to the gate pulse. This allows the mirror period to be appropriately shortened, thereby suppressing losses. For example, it is possible to make the time change of the current gentler. This allows surge voltage to be suppressed.

[0034] In the embodiment, the first member 58a electrically connects the first electrode portion 53a to the connection member 55M. The resistance of this electrical connection is higher than the electrical resistance via the second conductive region 61b.

[0035] In the embodiment, the second conductive region 61b is, for example, substantially free of the second element (e.g., boron). Alternatively, the concentration of the second element in the second conductive region 61b is 1 / 10 or less of the concentration of the second element in the first member 58a. Low resistance is obtained in the second conductive region 61b. In this case, the concentration of the first element in the second conductive region 61b may be substantially the same as the concentration of the first element in the first member 58a. For example, the concentration of the first element in the second conductive region 61b may be 0.5 to 2 times the concentration of the first element in the first member 58a.

[0036] In the embodiment, the first electrode portion 53a is, for example, substantially free of the second element. Alternatively, the concentration of the second element in the first electrode portion 53a is 1 / 10 or less of the concentration of the second element in the first member 58a. Low resistance is obtained in the first electrode portion 53a. In this case, the concentration of the first element in the first electrode portion 53a may be substantially the same as the concentration of the first element in the first member 58a. For example, the concentration of the first element in the first electrode portion 53a may be 0.5 to 2 times that of the first element in the first member 58a.

[0037] In the embodiment, the connection member 55M does not contain the second element. Alternatively, the concentration of the second element in the connection member 55M is 1 / 10 or less of the concentration of the second element in the first member 58a. Low resistance is obtained in the connection member 55M. In this case, the concentration of the first element in the connection member 55M may be substantially the same as the concentration of the first element in the first member 58a. For example, the concentration of the first element in the connection member 55M may be 0.5 to 2 times the concentration of the first element in the first member 58a.

[0038] 1 , in this example, the semiconductor device 110 further includes a third conductive member 63. The position of the third conductive member 63 in the first direction D1 is between the position of the third partial region 11c in the first direction D1 and the position of the first conductive member 61 in the first direction D1. For example, the third conductive member 63 is electrically connected to the second electrode 52. Alternatively, the third conductive member 63 can be electrically connected to the second electrode 52.

[0039] For example, a terminal 52T may be provided that is electrically connected to the second electrode 52. For example, a terminal 63T may be provided that is electrically connected to the third conductive member 63. These terminals may be electrically connected by a wiring 63L.

[0040] By providing the third conductive member 63, for example, it is possible to suppress local concentration of an electric field, and for example, a higher withstand voltage can be obtained.

[0041] As shown in FIG. 1, a plurality of structures including the third electrode 53, the first conductive member 61, and the third conductive member 63 may be arranged in the X-axis direction.

[0042] For example, a first semiconductor region 11 is provided on a first electrode 51. A second semiconductor region 12 is provided on the first semiconductor region 11. A third semiconductor region 13 is provided on the second semiconductor region 12. A trench 10T is provided in a semiconductor member including these semiconductor regions. A third electrode 53, a first conductive member 61, and a third conductive member 63 are provided inside the trench 10T. A second electrode 52 is provided on the semiconductor member 10. A plurality of trenches 10T may be aligned along the X-axis direction.

[0043] 6 to 10 are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. Fig. 6 is a cross-sectional view taken along line A1-A2 in Figs. 9 and 10. Fig. 7 is a cross-sectional view taken along line B1-B2 in Figs. 9 and 10. Fig. 8 is a cross-sectional view taken along line C1-C2 in Figs. 9 and 10. Fig. 9 is a cross-sectional view taken along line E1-E2 in Figs. 6 to 8. Fig. 10 is a cross-sectional view taken along line F1-F2 in Figs. 6 to 8.

[0044] 6 to 10, in the semiconductor device 111 according to the embodiment, the third electrode 53 further includes a second electrode portion 53b in addition to the first electrode portion 53a. Except for this, the configuration of the semiconductor device 111 may be the same as the configuration of the semiconductor device 110.

[0045] The second electrode portion 53b is located between the first electrode portion 53a and the second semiconductor portion 13b and between the first electrode portion 53a and the fourth semiconductor portion 12d in the second direction D2. A portion of the insulating member 41 is located between the first electrode portion 53a and the second electrode portion 53b. In this example, at least a portion of the first electrode portion 53a overlaps with the fourth partial region 11d in the first direction D1. At least a portion of the second electrode portion 53b overlaps with the fifth partial region 11e in the first direction D1.

[0046] For example, the insulating member 41 includes first to fourth insulating regions 41a to 41d. The first insulating region 41a is provided between the first semiconductor portion 13a and the first electrode portion 53a, and between the third semiconductor portion 12c and the first electrode portion 53a. The second insulating region 41b is provided between the second electrode portion 53b and the second semiconductor portion 13b, and between the second electrode portion 53b and the fourth semiconductor portion 12d. The third insulating region 41c is provided between the first conductive member 61 and the first electrode portion 53a, and between the first conductive member 61 and the second electrode portion 53b. The fourth insulating region 41d is provided between the first electrode portion 53a and the second electrode portion 53b.

[0047] 6, in this example, at least a portion of the first conductive region 61a does not overlap with the first electrode portion 53a and the second electrode portion 53b in the first direction D1. At least a portion of the first conductive region 61a is provided between the third conductive member 63 and the fourth insulating region 41d in the first direction D1. In this example, the position of the first conductive region 61a in the second direction D2 is between the position of the first electrode portion 53a in the second direction D2 and the position of the second electrode portion 53b in the second direction D2.

[0048] As shown in FIGS. 7 and 9, in this example, the semiconductor device 111 further includes a second member 58b in addition to the first member 58a. As shown in FIG. 9, the second member 58b is provided between the second electrode portion 53b and the connection member 55M in the third direction D3. The second member 58b includes an element different from the element included in the second conductive region 61b. For example, the second conductive region 61b includes a first element. The second member 58b includes a first element and a second element. The first element includes one of a third element and a fourth element. The second element includes the other of the third element and the fourth element. The third element includes at least one selected from the group consisting of phosphorus, arsenic, and antimony. The fourth element includes at least one selected from the group consisting of boron, aluminum, and gallium. The second portion 58b includes at least one of silicon and SiC. A portion of the insulating member 41 is provided between the second conductive region 61b and the second member 58b. The second member 58b functions as, for example, a high resistance region.

[0049] In the semiconductor device 111, for example, the Miller period is shortened. For example, loss can be suppressed. According to the embodiment, a semiconductor device capable of reducing loss can be provided.

[0050] 11 to 15 are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. Fig. 11 is a cross-sectional view taken along line A1-A2 in Figs. 14 and 15. Fig. 12 is a cross-sectional view taken along line B1-B2 in Figs. 14 and 15. Fig. 13 is a cross-sectional view taken along line C1-C2 in Figs. 14 and 15. Fig. 14 is a cross-sectional view taken along line E1-E2 in Figs. 11 to 13. Fig. 15 is a cross-sectional view taken along line F1-F2 in Figs. 11 to 13.

[0051] 11 to 15, in the semiconductor device 112 according to the embodiment, the third electrode 53 also includes a first electrode portion 53a and a second electrode portion 53b. As shown in FIG. 11, in the semiconductor device 112, a portion of the first conductive region 61a overlaps a portion of the insulating member 41 in the first direction D1. Another portion of the first conductive region 61a overlaps the first electrode portion 53a and the second electrode portion 53b in the first direction D1. Except for this, the configuration of the semiconductor device 112 may be similar to the configuration of the semiconductor device 111.

[0052] In the semiconductor device 112, the width of the first conductive member 61 in the X-axis direction is large. This makes it possible to further reduce the electrical resistance of the first conductive member 61. This makes it possible to further reduce loss.

[0053] 16 to 20 are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. Fig. 16 is a cross-sectional view taken along line A1-A2 in Figs. 19 and 20. Fig. 17 is a cross-sectional view taken along line B1-B2 in Figs. 19 and 20. Fig. 18 is a cross-sectional view taken along line C1-C2 in Figs. 19 and 20. Fig. 19 is a cross-sectional view taken along line E1-E2 in Figs. 16 to 18. Fig. 20 is a cross-sectional view taken along line F1-F2 in Figs. 16 to 18.

[0054] 16 to 20, the semiconductor device 113 according to this embodiment further includes a second conductive member 62 and a second member 58b. The third electrode 53 includes a first electrode portion 53a and a second electrode portion 53b. The remaining configuration of the semiconductor device 113 may be similar to that of the semiconductor devices 110 to 112.

[0055] In the semiconductor device 113, the second conductive member 62 includes a fourth conductive region 62d, a fifth conductive region 62e, and a sixth conductive region 62f. The boundaries between these conductive regions may be unclear. As shown in FIG. 16, the fourth conductive region 62d is located between the first conductive region 61a and the second partial region 11b in the second direction D2. The position of the fourth conductive region 62d in the first direction D1 is between the position of the third partial region 11c in the first direction D1 and the position of the second electrode portion 53b in the first direction D1. As shown in FIG. 20, the fifth conductive region 62e is located between the fourth conductive region 62d and the sixth conductive region 62f in the third direction D3.

[0056] As shown in FIG. 19, the second member 58b is provided between the second electrode portion 53b and the connection member 55M in the third direction D3.

[0057] As shown in FIG. 17, the position of the fifth conductive region 62e in the first direction D1 is between the position of the third partial region 11c in the first direction D1 and the position of the second member 58b in the first direction D1.

[0058] The second member 58b contains an element different from the element contained in the fifth conductive region 62e. For example, the second conductive region 61b contains the first element described above. The second member 58b contains the first element and the second element described above. The second portion 58b contains at least one of silicon and SiC.

[0059] A portion of the insulating member 41 is provided between the second conductive member 62 and the second member 58b. For example, the insulating member 41 includes first to fifth insulating regions 41a to 41e. The first insulating region 41a is provided between the first semiconductor portion 13a and the first electrode portion 53a, and between the third semiconductor portion 12c and the first electrode portion 53a. The second insulating region 41b is provided between the second electrode portion 53b and the second semiconductor portion 13b, and between the second electrode portion 53b and the fourth semiconductor portion 12d. The third insulating region 41c is provided between the first conductive member 61 and the first electrode portion 53a. The fourth insulating region 41d is provided between the first electrode portion 53a and the second electrode portion 53b. The fifth insulating region 41e is provided between the second conductive member 62 and the second electrode portion 53b (see FIG. 16).

[0060] The second member 58b functions as, for example, a high resistance region. In the semiconductor device 113, for example, the mirror period is shortened. For example, loss can be suppressed. According to the embodiment, a semiconductor device capable of reducing loss can be provided.

[0061] An example of the results of simulation of the characteristics of the semiconductor device will be described below. 21(a) to 21(f) are schematic cross-sectional views illustrating semiconductor devices. These figures show the simulation model.

[0062] As shown in FIG. 21(a), in the first configuration CF1, the first conductive member 61 is not provided. The third electrode 53 (first electrode portion 53a and second electrode portion 53b) is electrically connected to a gate drive circuit 71. A resistance Rg exists between the third electrode 53 and the gate drive circuit 71. The resistance Rg is, for example, substantially the resistance of the current path between the third electrode 53 and the connection member 55M. The third conductive member 63 is electrically connected to the second electrode 52 (or the third semiconductor region 13).

[0063] 21(b), in the second configuration CF2, a first conductive member 61 is provided. The first conductive member 61 is electrically connected to a gate drive circuit 71. The same resistance Rg exists in both the current path between the first conductive member 61 and the gate drive circuit 71 and the current path between the third electrode 53 and the gate drive circuit 71.

[0064] 21(c), the third configuration CF3 is provided with a first conductive member 61. The first conductive member 61 is electrically connected to the second electrode 52 (or the third semiconductor region 13).

[0065] 21(d), a fourth configuration CF4 includes a first conductive member 61. A resistance Rg2 exists in the current path between the first conductive member 61 and the gate drive circuit 71. A resistance Rg2 and a resistance Rg1 exist in the current path between the third electrode 53 and the gate drive circuit 71. The resistance Rg1 corresponds to the resistances of the first member 58a and the second member 58b. The fourth configuration CF4 corresponds to, for example, the semiconductor device 111.

[0066] As shown in FIG. 21(e), in the fifth configuration CF5, a resistance Rg2 exists in the current path between the first conductive member 61 and the gate drive circuit 71. A resistance Rg2 and a resistance Rg1 exist in the current path between the third electrode 53 and the gate drive circuit 71. The resistance Rg1 corresponds to the resistance of the first member 58a and the second member 58b. In the fifth configuration CF5, the first conductive member 61 overlaps with the first electrode portion 53a and the second electrode portion 53b. The fifth configuration CF5 corresponds to, for example, the semiconductor device 112.

[0067] 21(f), the sixth configuration CF6 includes a first conductive member 61 and a second conductive member 62. A resistance Rg2 exists in the current path between the first conductive member 61 and the gate drive circuit 71. A resistance Rg2 exists in the current path between the second conductive member 62 and the gate drive circuit 71. A resistance Rg2 and a resistance Rg1 exist in the current path between the third electrode 53 and the gate drive circuit 71. The resistance Rg1 corresponds to the resistance of the first member 58a and the second member 58b. The sixth configuration CF6 corresponds to, for example, the semiconductor device 113.

[0068] 22(a), 22(b), 23(a) and 23(b) are graphs illustrating the characteristics of the semiconductor device. These graphs illustrate the characteristics when the surge voltage Vsurge is 20 V. For example, in the first configuration CF1, the resistance Rg is 40 Ω. For example, in the fifth configuration CF5, the resistance Rg1 is 50 Ω, and the resistance Rg2 is 1 Ω.

[0069] The vertical axis of Fig. 22(a) is the loss E off Loss E off is a value when the surge voltage Vsurge is 20 V. As shown in FIG. 22(a), the fourth to sixth configurations CF4 to CF6 have a smaller loss E off is obtained.

[0070] The vertical axis of Figure 22(b) is the breakdown voltage V DSS The fourth to sixth structures CF4 to CF6 have a high breakdown voltage V equal to or higher than that of the first to third structures CF1 to CF3. DSS is obtained.

[0071] 23(a) is the on-resistance RonA. In the fifth configuration CF5 and the sixth configuration CF6, a lower on-resistance RonA is obtained than in the first to third configurations CF1 to CF3.

[0072] The vertical axis of Figure 23(b) is the performance index R on E offThe fourth to sixth configurations CF4 to CF6 have a lower figure of merit R than the first to third configurations CF1 to CF3. on E off is obtained.

[0073] In this way, in the fourth to sixth configurations CF4 to CF6, higher characteristics can be obtained compared to the first to third configurations CF1 to CF3. In the fourth to sixth configurations CF4 to CF6, for example, a small loss E off is obtained.

[0074] FIG. 24 is a graph illustrating the characteristics of the semiconductor device. The horizontal axis of Figure 24 is the surge voltage Vsurge, and the vertical axis is the loss E off As shown in FIG. 24, in the fourth to sixth configurations CF4 to CF6, the loss E off and the surge voltage Vsurge trade-off can be improved.

[0075] 25 to 28 are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. 25 to 28, the semiconductor devices 110a to 113a according to the embodiment include a fourth semiconductor region 14. Except for this, the configuration of the semiconductor devices 110a to 113a may be similar to that of the semiconductor devices 110 to 113.

[0076] The fourth semiconductor region 14 is provided between the first electrode 51 and the first semiconductor region 11. The fourth semiconductor region 14 is of the second conductivity type. The semiconductor devices 110a to 113a are, for example, IGBTs. The semiconductor devices 110a to 113a can also reduce losses. For example, the loss E off and the surge voltage Vsurge trade-off can be improved.

[0077] (Second embodiment) The second embodiment relates to a method for manufacturing a semiconductor device. An example of a method for manufacturing a semiconductor device 111 will be described below.

[0078] 29(a) to 29(d), 30(a) to 30(d), and 31(a) to 31(d) are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the second embodiment.

[0079] As shown in FIG. 29(a), a first trench 10A is formed in a first conductivity type first semiconductor region 11 (first semiconductor member 10M). The first trench 10A extends along the third direction D3. As already explained, the third direction D3 is, for example, the Y-axis direction. The third direction D3 intersects with a plane including the first direction D1 and the second direction D2. The first direction D1 is the direction from the lower surface 10a of the first semiconductor member 10M to the upper surface 10b of the semiconductor member 10M. The second direction D2 intersects with the first direction D1. The first direction D1 is, for example, the Z-axis direction. The second direction D2 is, for example, the X-axis direction.

[0080] As shown in FIG. 29(b), an insulating film 41F is formed inside the first trench 10A and on the first semiconductor member 10M. At least a portion of the insulating film 41F becomes the insulating member 41. Furthermore, a conductive material (e.g., polysilicon containing impurities) is buried in the remaining space of the first trench 10A. This results in a third conductive member 63.

[0081] 29(c), an insulating film 42F is formed in the remaining space of the first trench 10A and on the insulating film 41F. The insulating films 41F and 42F may be made of the same material, for example. The insulating films 41F include, for example, silicon oxide.

[0082] 29(d), part of the insulating film 42F is removed, thereby exposing the insulating film 41F and the first semiconductor member 10M.

[0083] 30(a), the insulating film 42F is removed, and the third conductive member 63 is exposed in the third trench 10C formed inside the first trench 10A.

[0084] 30(b), an insulating film 43F is formed inside the first trench 10A and on the first semiconductor member 10M. The insulating film 43F becomes part (the first insulating region 41a and the second insulating region 41b) of the insulating member 41. By forming the insulating film 43F, the second trench 10B is formed.

[0085] A conductive film 61F is formed in the remaining space of the second trench 10B and on the insulating film 43F. The conductive film 61F includes, for example, at least one of silicon and SiC. The conductive film 61F includes, for example, polysilicon. The conductive film 61F includes the first element. A second semiconductor region 12 of the second conductivity type and a third semiconductor region 13 of the first conductivity type are formed. These semiconductor regions can be formed, for example, by introducing impurity ions (e.g., ion implantation). This results in a semiconductor member 10. The second semiconductor region 12 is located between the first semiconductor region 11 and the third semiconductor region 13 in the first direction D1. The bottom surface 10a and top surface 10b of the first semiconductor member 10M correspond to the bottom surface 10a and top surface 10b of the semiconductor member 10.

[0086] 30(c), a portion of the conductive film 61F is removed, thereby obtaining the first electrode portion 53a, the second electrode portion 53b, and the first conductive region 61a.

[0087] 30(d) illustrates a cross section different from the cross section shown in FIG. 30(c) in the third direction D3. By removing a portion of the conductive film 61F, conductive portions 59a, 59b, and second conductive region 61b are obtained. As will be described later, conductive portions 59a and 59b become first member 58a and second member 58b.

[0088] Fig. 31(a) is a cross-sectional view taken at a position corresponding to Fig. 30(c). Fig. 31(b) is a cross-sectional view taken at a position corresponding to Fig. 30(d). As shown in Figs. 31(a) and 31(b), an insulating film 44F is formed in the remaining space of the trench and on the first electrode portion 53a, the second electrode portion 53b, the conductive portion 59a, and the conductive portion 59b. The insulating film 44F becomes part of the insulating member 41.

[0089] FIG. 31(c) is a cross-sectional view at a position corresponding to FIG. 30(c). FIG. 31(d) is a cross-sectional view at a position corresponding to FIG. 30(d). As shown in FIG. 31(d), a second element EL2 is introduced into the conductive portion 59a and the conductive portion 59b. For example, the second element EL2 is ion-implanted. The introduction of the second element EL2 increases the electrical resistance of the conductive portion 59a and the conductive portion 59b. This results in the first member 58a and the second member 58b. The second element EL2 does not substantially reach the second conductive region 61b. The second conductive region 61b does not substantially contain the second element EL2.

[0090] 31(c), the second element EL2 is not introduced into the first electrode portion 53a and the second electrode portion 53b. For example, a mask member M1 or the like may be used to prevent the second element EL2 from reaching the first electrode portion 53a and the second electrode portion 53b. After the step of introducing the second element EL2, the mask member M1 is removed.

[0091] Thereafter, electrodes are formed as appropriate, thereby obtaining the semiconductor device 111. According to the method for manufacturing a semiconductor device according to the embodiment, it is possible to provide a method for manufacturing a semiconductor device that can reduce loss.

[0092] As described above, in the above manufacturing method, a first conductive film 65F extending along the third direction D3 is formed inside the second trench 10B provided in the insulating member 41 (see FIGS. 30(c) and 30(d)). The insulating member 41 is provided inside the first trench 10A provided in the semiconductor member 10. The third direction D3 intersects a plane including the first direction D1 and the second direction D2. The first direction D1 is the direction from the lower surface 10a of the semiconductor member 10 to the upper surface 10b of the semiconductor member 10. The second direction D2 intersects the first direction D1 (see FIGS. 30(c) and 30(d)). For example, the first conductive region 61a (first conductive portion 65A) and the conductive portion 59a (second conductive portion 65B) are included. The semiconductor member 10 includes a first semiconductor region 11 of a first conductivity type, a second semiconductor region 12 of a second conductivity type, and a third semiconductor region 13 of the first conductivity type. The second semiconductor region 12 is located between the first semiconductor region 11 and the third semiconductor region 13 in a first direction D1. The first conductive portion 65A is located between two regions of the second semiconductor region 12 and between two regions of the third semiconductor region 13 in a second direction D2. The second conductive portion 65B is located between two regions of the first semiconductor region 11 in the second direction D2. The first conductive film 65F includes a semiconductor and a first element. The semiconductor includes at least one of silicon and SiC. For example, the semiconductor includes polysilicon. The first element is one of the first conductivity type and the second conductivity type.

[0093] As shown in Fig. 30(c), the first conductive portion 65A includes a first conductive film region (first electrode portion 53a). As shown in Fig. 30(d), the first conductive portion 65A includes a second conductive film region (conductive portion 59a). The direction from the first conductive film region (first electrode portion 53a) to the second conductive film region (conductive portion 59a) is along the third direction D3.

[0094] In the manufacturing method according to the embodiment, as shown in FIG. 31(d), a second element EL2 of the other of the first and second conductivity types is introduced into the second conductive film region (conductive portion 59a). As shown in FIG. 31(c), the introduction of the second element EL2 includes not introducing the second element EL2 into the first conductive film region (first electrode portion 53a). This allows the first member 58a to be selectively formed.

[0095] In an embodiment, introducing the second element EL2 includes not introducing the second element EL2 into the second conductive portion 65B. The first element includes one of a third element and a fourth element. The second element includes the other of the third element and the fourth element. The third element includes at least one selected from the group consisting of phosphorus, arsenic, and antimony. The fourth element includes at least one selected from the group consisting of boron, aluminum, and gallium.

[0096] In the above embodiment, the first electrode 51 may include, for example, at least one selected from the group consisting of aluminum, titanium, nickel, and gold. The second electrode 52 may include, for example, at least one selected from the group consisting of aluminum, titanium, nickel, and gold. The third electrode 53 may include, for example, polysilicon. The first to third conductive members 61 to 63 may include, for example, polysilicon. The first insulating member 41 may include, for example, at least one selected from the group consisting of silicon oxide, silicon nitride, and silicon oxynitride.

[0097] The embodiment may include the following configurations (e.g., technical solutions). (Configuration 1) A first electrode; A semiconductor member including a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type; the first semiconductor region is between the first electrode and the third semiconductor region, and the first semiconductor region includes a first partial region, a second partial region, and a third partial region; the second semiconductor region is between the first semiconductor region and the third semiconductor region; the third semiconductor region includes a first semiconductor portion and a second semiconductor portion, and a second direction from the first semiconductor portion to the second semiconductor portion intersects with a first direction from the first electrode to the third semiconductor region; the second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion, and a direction from the third semiconductor portion to the fourth semiconductor portion is along the second direction; the third semiconductor portion is located between the first portion region and the first semiconductor portion in the first direction; the fourth semiconductor portion is located between the second portion region and the second semiconductor portion in the first direction, the semiconductor member, wherein a position of the third partial region in the second direction is between a position of the first partial region in the second direction and a position of the second partial region in the second direction; a second electrode electrically connected to the third semiconductor region; a third electrode including a first electrode portion, the first electrode portion being located between the first semiconductor portion and the second semiconductor portion and between the third semiconductor portion and the fourth semiconductor portion in the second direction; The first conductive region, the second conductive region, and the third conductive region are included. Mu-th a first conductive member, wherein the first conductive region is between the first partial region and the second partial region in the second direction, a position of the first conductive region in the first direction is between a position of the third partial region in the first direction and a position of the first electrode portion in the first direction, and the second conductive region is between the first conductive region and the third conductive region in a third direction intersecting a plane including the first direction and the second direction; a connecting member electrically connected to the first conductive member, the connecting member extending from the third conductive region to the connecting member being aligned with the first direction; a first member provided between the first electrode portion and the connection member in the third direction, wherein a position of the second conductive region in the first direction is between a position of the third portion region in the first direction and a position of the first member in the first direction, and the first member contains an element different from an element contained in the second conductive region; insulating members provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, between the first conductive member and the third electrode, and between the first conductive member and the first member; A semiconductor device comprising:

[0098] (Configuration 2) the second conductive region includes a first element; the first component includes the first element and the second element, the first element includes one of a third element and a fourth element, the second element includes the other of the third element and the fourth element, the third element includes at least one selected from the group consisting of phosphorus, arsenic, and antimony; 2. The semiconductor device of configuration 1, wherein the fourth element includes at least one selected from the group consisting of boron, aluminum, and gallium.

[0099] (Configuration 3) the second conductive region contains phosphorus; 2. The semiconductor device of claim 1, wherein the first component includes phosphorus and boron.

[0100] (Configuration 4) 4. The semiconductor device of claim 2, wherein the second conductive region and the first member include silicon.

[0101] (Configuration 5) 5. The semiconductor device according to any one of configurations 1 to 4, wherein the second conductive region has a higher conductivity than the first member.

[0102] (Configuration 6) The insulating member is a first insulating region provided between the first semiconductor portion and the first electrode portion and between the third semiconductor portion and the first electrode portion; a second insulating region provided between the first electrode portion and the second semiconductor portion and between the first electrode portion and the fourth semiconductor portion; a third insulating region provided between the first conductive member and the first electrode portion; 6. The semiconductor device according to any one of configurations 1 to 5, comprising:

[0103] (Configuration 7) the third electrode further includes a second electrode portion; the second electrode portion is located between the first electrode portion and the second semiconductor portion and between the first electrode portion and the fourth semiconductor portion in the second direction; 6. The semiconductor device according to any one of configurations 1 to 5, wherein a portion of the insulating member is located between the first electrode portion and the second electrode portion.

[0104] (Configuration 8) Further comprising a second member; the second member is provided between the second electrode portion and the connection member in the third direction, the second member contains an element different from the element contained in the second conductive region, 8. The semiconductor device according to claim 7, wherein a portion of the insulating member is provided between the second conductive region and the second member.

[0105] (Configuration 9) The insulating member is a first insulating region provided between the first semiconductor portion and the first electrode portion and between the third semiconductor portion and the first electrode portion; a second insulating region provided between the second electrode portion and the second semiconductor portion and between the second electrode portion and the fourth semiconductor portion; a third insulating region provided between the first conductive member and the first electrode portion and between the first conductive member and the second electrode portion; a fourth insulating region provided between the first electrode portion and the second electrode portion; 9. The semiconductor device according to configuration 7 or 8, comprising:

[0106] (Configuration 10) The first conductive region The aforementioned10. The semiconductor device according to any one of configurations 7 to 9, wherein the position in the second direction is between the position of the first electrode portion in the second direction and the position of the second electrode portion in the second direction.

[0107] (Configuration 11) a portion of the first conductive region overlaps with the portion of the insulating member in the first direction; 10. The semiconductor device according to any one of configurations 7 to 9, wherein another portion of the first conductive region overlaps with the first electrode portion and the second electrode portion in the first direction.

[0108] (Configuration 12) A second conductive member; A second member; Furthermore, the second conductive member includes a fourth conductive region, a fifth conductive region, and a sixth conductive region; The aforementioned a fourth conductive region is located between the first conductive region and the second partial region in the second direction, a position of the fourth conductive region in the first direction is located between a position of the third partial region in the first direction and a position of the second electrode portion in the first direction, and the fifth conductive region is located between the fourth conductive region and the sixth conductive region in the third direction; the second member is provided between the second electrode portion and the connection member in the third direction, a position of the fifth conductive region in the first direction is between a position of the third partial region in the first direction and a position of the second member in the first direction; the second member contains an element different from an element contained in the fifth conductive region, 8. The semiconductor device according to claim 7, wherein a portion of the insulating member is provided between the second conductive member and the second member.

[0109] (Configuration 13) The insulating member is a first insulating region provided between the first semiconductor portion and the first electrode portion and between the third semiconductor portion and the first electrode portion; a second insulating region provided between the second electrode portion and the second semiconductor portion and between the second electrode portion and the fourth semiconductor portion; a third insulating region provided between the first conductive member and the first electrode portion; a fourth insulating region provided between the first electrode portion and the second electrode portion; a fifth insulating region provided between the second conductive member and the second electrode portion; 13. The semiconductor device of claim 12, comprising:

[0110] (Configuration 14) Further comprising a third conductive member; a position of the third conductive member in the first direction is between a position of the third partial region in the first direction and a position of the first conductive member in the first direction; The semiconductor device according to any one of configurations 1 to 13, wherein the third conductive member is electrically connected to the second electrode or the third conductive member can be electrically connected to the second electrode.

[0111] (Configuration 15) The second conductive region does not contain the second element, or 15. The semiconductor device according to any one of configurations 1 to 14, wherein the concentration of the second element in the second conductive region is 1 / 10 or less of the concentration of the second element in the first member.

[0112] (Configuration 16) The first electrode portion does not contain the second element, or 16. The semiconductor device according to any one of configurations 1 to 15, wherein the concentration of the second element in the first electrode portion is 1 / 10 or less of the concentration of the second element in the first member.

[0113] (Configuration 17) 17. The semiconductor device according to any one of configurations 1 to 16, wherein the first member electrically connects the first electrode portion to the connection member.

[0114] (Configuration 18) a first conductive film extending along a third direction is formed inside a second trench provided in an insulating member, the insulating member is provided inside a first trench provided in a semiconductor member, the third direction intersects with a plane including the first direction and the second direction, the first direction is a direction from a lower surface of the semiconductor member to an upper surface of the semiconductor member, the second direction intersects with the first direction, the first conductive film includes a first conductive portion and a second conductive portion, the semiconductor member includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type, is between the first semiconductor region and the third semiconductor region in the first direction, the first conductive portion is between two regions of the second semiconductor region and between two regions of the third semiconductor region in the second direction, the second conductive portion is between two regions of the first semiconductor region in the second direction, the first conductive film includes a semiconductor and a first element of one of the first conductivity type and the second conductivity type, the first conductive portion includes a first conductive film region and a second conductive film region, and the direction from the first conductive film region to the second conductive film region is along the third direction, A method for manufacturing a semiconductor device, comprising: introducing a second element of the other of the first conductivity type and the second conductivity type into the second conductive film region; and the introduction of the second element includes not introducing the second element into the first conductive film region.

[0115] (Configuration 19) 19. The method of claim 18, wherein the introduction of the second element includes not introducing the second element into the second conductive portion.

[0116] (Configuration 20) the first element includes one of a third element and a fourth element, the second element includes the other of the third element and the fourth element, the third element includes at least one selected from the group consisting of phosphorus, arsenic, and antimony; 20. The method of claim 19, wherein the fourth element includes at least one selected from the group consisting of boron, aluminum, and gallium.

[0117] According to the embodiment, it is possible to provide a semiconductor device capable of reducing loss and a method for manufacturing the same.

[0118] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configurations of the elements included in the semiconductor device, such as the semiconductor member, semiconductor region, conductive member, electrode, and insulating member, are within the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting them from known ranges.

[0119] Furthermore, any combination of two or more elements of each specific example within the scope of technical feasibility is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0120] In addition, all semiconductor devices that can be implemented by a person skilled in the art by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also fall within the scope of the present invention as long as they include the gist of the present invention.

[0121] In addition, within the scope of the concept of the present invention, a person skilled in the art may come up with various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0122] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0123] 10...semiconductor member, 10M...first semiconductor member, 10A-10C...first to third trenches, 10T...trench, 10a...lower surface, 10b...upper surface, 11-14...first to fourth semiconductor regions, 11a-11e...first to fifth partial regions, 12c, 12d...third and fourth semiconductor portions, 13a, 13b...first and second semiconductor portions, 41...insulating member, 41F-44F...insulating film, 41a-42e...first to fifth insulating regions, 51-53...first to third electrodes, 52L...conductive layer for second electrode, 52T...terminal, 52a...contact region, 53a, 53b...first and second electrode portions, 55M...connecting member, 58a, 58b...first and second members, 59a, 59b...conductive portions, 61 to 63...first to third conductive members, 61F...conductive film, 61a to 61c...first to third conductive regions, 62d to 62f...fourth to sixth conductive regions, 63L...wiring, 63T...terminal, 65A, 65B...first and second conductive portions, 65F...conductive film, 71...gate drive circuit, 110 to 113, 110a to 113a...semiconductor device, CF1 to CF6...first to sixth configurations, D1 to D3...first to third directions, EL2...second element, M1...mask member, Rg, Rg1, Rg2...resistance, RonA...on resistance, RonEoff...figure of merit, Vsurge...surge voltage, V DSS …pressure resistance

Claims

1. A first electrode; A semiconductor member including a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type; the first semiconductor region is located between the first electrode and the third semiconductor region, and the first semiconductor region includes a first partial region, a second partial region, and a third partial region; the second semiconductor region is between the first semiconductor region and the third semiconductor region, the third semiconductor region includes a first semiconductor portion and a second semiconductor portion, and a second direction from the first semiconductor portion to the second semiconductor portion intersects with a first direction from the first electrode to the third semiconductor region; the second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion, and a direction from the third semiconductor portion to the fourth semiconductor portion is along the second direction; the third semiconductor portion is located between the first portion region and the first semiconductor portion in the first direction; the fourth semiconductor portion is located between the second portion region and the second semiconductor portion in the first direction; The semiconductor member, wherein a position of the third partial region in the second direction is between a position of the first partial region in the second direction and a position of the second partial region in the second direction; a second electrode electrically connected to the third semiconductor region; a third electrode including a first electrode portion, the first electrode portion being located between the first semiconductor portion and the second semiconductor portion and between the third semiconductor portion and the fourth semiconductor portion in the second direction; a first conductive member including a first conductive region, a second conductive region, and a third conductive region, wherein the first conductive region is located between the first partial region and the second partial region in the second direction, a position of the first conductive region in the first direction is located between a position of the third partial region in the first direction and a position of the first electrode portion in the first direction, and the second conductive region is located between the first conductive region and the third conductive region in a third direction intersecting a plane including the first direction and the second direction; a connecting member electrically connected to the first conductive member, the connecting member extending from the third conductive region to the connecting member being aligned with the first direction; a first member provided between the first electrode portion and the connection member in the third direction, wherein a position of the second conductive region in the first direction is between a position of the third portion region in the first direction and a position of the first member in the first direction, and the first member contains an element different from an element contained in the second conductive region; Insulating members provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, between the first conductive member and the third electrode, and between the first conductive member and the first member; Equipped with the second conductive region includes a first element; the first member includes the first element and the second element, the first element includes one of a third element and a fourth element, the second element includes the other of the third element and the fourth element, the third element includes at least one selected from the group consisting of phosphorus, arsenic, and antimony; the fourth element includes at least one selected from the group consisting of boron, aluminum, and gallium; the third electrode further includes a second electrode portion; the second electrode portion is located between the first electrode portion and the second semiconductor portion and between the first electrode portion and the fourth semiconductor portion in the second direction; A semiconductor device, wherein a portion of the insulating member is located between the first electrode portion and the second electrode portion.

2. Further comprising a second member; the second member is provided between the second electrode portion and the connection member in the third direction, the second member contains an element different from the element contained in the second conductive region, The semiconductor device according to claim 1 , wherein a portion of said insulating member is provided between said second conductive region and said second member.

3. 3. The semiconductor device according to claim 1, wherein a position of the first conductive region in the second direction is between a position of the first electrode portion in the second direction and a position of the second electrode portion in the second direction.

4. a portion of the first conductive region overlaps with the portion of the insulating member in the first direction; The semiconductor device according to claim 1 , wherein another part of said first conductive region overlaps with said first electrode portion and said second electrode portion in said first direction.

5. A second conductive member; A second member; Furthermore, the second conductive member includes a fourth conductive region, a fifth conductive region, and a sixth conductive region; the fourth conductive region is located between the first conductive region and the second partial region in the second direction, a position of the fourth conductive region in the first direction is located between a position of the third partial region in the first direction and a position of the second electrode portion in the first direction, and the fifth conductive region is located between the fourth conductive region and the sixth conductive region in the third direction; the second member is provided between the second electrode portion and the connection member in the third direction, a position of the fifth conductive region in the first direction is between a position of the third partial region in the first direction and a position of the second member in the first direction; the second member contains an element different from an element contained in the fifth conductive region, The semiconductor device according to claim 1 , wherein a portion of said insulating member is provided between said second conductive member and said second member.

6. A first electrode; A semiconductor member including a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type; the first semiconductor region is located between the first electrode and the third semiconductor region, and the first semiconductor region includes a first partial region, a second partial region, and a third partial region; the second semiconductor region is between the first semiconductor region and the third semiconductor region, the third semiconductor region includes a first semiconductor portion and a second semiconductor portion, and a second direction from the first semiconductor portion to the second semiconductor portion intersects with a first direction from the first electrode to the third semiconductor region; the second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion, and a direction from the third semiconductor portion to the fourth semiconductor portion is along the second direction; the third semiconductor portion is located between the first portion region and the first semiconductor portion in the first direction; the fourth semiconductor portion is located between the second portion region and the second semiconductor portion in the first direction; The semiconductor member, wherein a position of the third partial region in the second direction is between a position of the first partial region in the second direction and a position of the second partial region in the second direction; a second electrode electrically connected to the third semiconductor region; a third electrode including a first electrode portion, the first electrode portion being located between the first semiconductor portion and the second semiconductor portion and between the third semiconductor portion and the fourth semiconductor portion in the second direction; a first conductive member including a first conductive region, a second conductive region, and a third conductive region, wherein the first conductive region is located between the first partial region and the second partial region in the second direction, a position of the first conductive region in the first direction is located between a position of the third partial region in the first direction and a position of the first electrode portion in the first direction, and the second conductive region is located between the first conductive region and the third conductive region in a third direction intersecting a plane including the first direction and the second direction; a connecting member electrically connected to the first conductive member, the connecting member extending from the third conductive region to the connecting member being aligned with the first direction; a first member provided between the first electrode portion and the connection member in the third direction, wherein a position of the second conductive region in the first direction is between a position of the third portion region in the first direction and a position of the first member in the first direction, and the first member contains an element different from an element contained in the second conductive region; Insulating members provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, between the first conductive member and the third electrode, and between the first conductive member and the first member; a third conductive member; Equipped with the second conductive region includes a first element; the first member includes the first element and the second element, the first element includes one of a third element and a fourth element, the second element includes the other of the third element and the fourth element, the third element includes at least one selected from the group consisting of phosphorus, arsenic, and antimony; the fourth element includes at least one selected from the group consisting of boron, aluminum, and gallium; a position of the third conductive member in the first direction is between a position of the third partial region in the first direction and a position of the first conductive member in the first direction; The semiconductor device, wherein the third conductive member is electrically connected to the second electrode or the third conductive member is capable of being electrically connected to the second electrode.

7. 7. The semiconductor device according to claim 1, wherein the second conductive region and the first member contain silicon.

8. A first electrode; A semiconductor member including a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type; the first semiconductor region is located between the first electrode and the third semiconductor region, and the first semiconductor region includes a first partial region, a second partial region, and a third partial region; the second semiconductor region is between the first semiconductor region and the third semiconductor region, the third semiconductor region includes a first semiconductor portion and a second semiconductor portion, and a second direction from the first semiconductor portion to the second semiconductor portion intersects with a first direction from the first electrode to the third semiconductor region; the second semiconductor region includes a third semiconductor portion and a fourth semiconductor portion, and a direction from the third semiconductor portion to the fourth semiconductor portion is along the second direction; the third semiconductor portion is located between the first portion region and the first semiconductor portion in the first direction; the fourth semiconductor portion is located between the second portion region and the second semiconductor portion in the first direction; The semiconductor member, wherein a position of the third partial region in the second direction is between a position of the first partial region in the second direction and a position of the second partial region in the second direction; a second electrode electrically connected to the third semiconductor region; a third electrode including a first electrode portion, the first electrode portion being located between the first semiconductor portion and the second semiconductor portion and between the third semiconductor portion and the fourth semiconductor portion in the second direction; a first conductive member including a first conductive region, a second conductive region, and a third conductive region, wherein the first conductive region is located between the first partial region and the second partial region in the second direction, a position of the first conductive region in the first direction is located between a position of the third partial region in the first direction and a position of the first electrode portion in the first direction, and the second conductive region is located between the first conductive region and the third conductive region in a third direction intersecting a plane including the first direction and the second direction; a connecting member electrically connected to the first conductive member, the connecting member extending from the third conductive region to the connecting member being aligned with the first direction; a first member provided between the first electrode portion and the connection member in the third direction, wherein a position of the second conductive region in the first direction is between a position of the third portion region in the first direction and a position of the first member in the first direction, and the first member contains an element different from an element contained in the second conductive region; Insulating members provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, between the first conductive member and the third electrode, and between the first conductive member and the first member; Including, the second conductive region includes a first element; the first member includes the first element and the second element, the first element includes one of a third element and a fourth element, the second element includes the other of the third element and the fourth element, the third element includes at least one selected from the group consisting of phosphorus, arsenic, and antimony; The fourth element includes at least one element selected from the group consisting of boron, aluminum, and gallium, a first conductive film extending along the third direction is formed inside a second trench provided in an insulating layer that becomes a part of the insulating member, the insulating layer that becomes a part of the insulating member is provided inside a first trench provided in a member that becomes a part of the semiconductor member, the first conductive film includes a first conductive portion and a second conductive portion, the second semiconductor region is between the first semiconductor region and the third semiconductor region in the first direction, the first conductive portion is between two regions of the second semiconductor region and between two regions of the third semiconductor region in the second direction, the second conductive portion is between two regions of the first semiconductor region in the second direction, the first conductive film includes a semiconductor and the first element, the first conductive portion includes a first conductive film region and a second conductive film region, and the direction from the first conductive film region to the second conductive film region is along the third direction, A method for manufacturing a semiconductor device, comprising: introducing the second element into the second conductive film region; and the introducing of the second element includes not introducing the second element into the first conductive film region.

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