HDP Sacrificial Carbon Gap Filler

Abstract

A method is described for filling substrate features with carbon gap-fill while leaving voids. The method includes flowing a process gas into a high-density plasma chemical vapor deposition (HDP-CVD) chamber, the chamber housing a substrate having at least one feature, the process gas including a carbohydrate reactant, generating a plasma, and depositing a carbon film.

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure generally relate to methods for filling features of a substrate. Specifically, embodiments of the present disclosure are directed to methods for filling features with carbon using a high-density plasma chemical vapor deposition (HDP CVD) chamber. [Background technology]

[0002] In the fabrication of microelectronic devices, filling narrow trenches with aspect ratios (AR) greater than 10:1 without voids is required for many applications. One application is for shallow trench isolation (STI). In this application, films must be of high quality (e.g., have a wet etch rate ratio of less than 2) with extremely low leakage across the trench. One method that has been successful in the past is flowable CVD. In this method, oligomers are carefully formed in the gas phase, condense on the surface, and then "flow" into the trench. However, the as-deposited films are of very poor quality and require processing steps such as water vapor annealing and UV curing.

[0003] Ultra-high density storage devices can be fabricated using three-dimensional (3D) stacked memory structures. For example, a 3D NAND stacked memory device can be formed from an array of alternating conductive and dielectric layers. Memory holes are formed through the memory layers, and NAND strings are formed by filling the memory holes with an appropriate material. As the dimensions of the structures decrease and the aspect ratios increase, post-curing methods for as-deposited films become more challenging.

[0004] Both logic and memory applications require a carbon gap-fill process. Carbon materials can be removed using plasma etching without affecting the underlying materials. In multi-layer 3D NAND fabrication, a sacrificial memory hole plug process is desirable to protect the bottom-layer memory holes and allow the deposition of top layers on top of the bottom layer. Such a process must meet the requirements of throughput, dry etch removability, and high-temperature (~850°C) stability. Current amorphous silicon (aSi) sacrificial fill has multiple integration challenges. Therefore, there is a need for a gap-fill process that provides high-temperature stable amorphous carbon materials. Summary of the Invention

[0005] One or more embodiments of the present disclosure are directed to a method of depositing a film. The method includes flowing a process gas into a high-density plasma chemical vapor deposition (HDP-CVD) chamber, the chamber containing a substrate having at least one feature, the process gas including a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 2:1 or less and one or more of hydrogen (H), helium (He), and argon (Ar), the substrate being processed at a temperature ranging from about 400° C. to about 650° C. and a pressure less than about 50 mTorr, generating a plasma with a source RF, ions being accelerated with a bias RF, and depositing a carbon film having voids within the at least one feature. RF energy is inductively coupled into the chamber through a coil to generate the high-density plasma.

[0006] Another embodiment of the present disclosure is directed to a method of forming a membrane. The method includes flowing a process gas into a high-density plasma chemical vapor deposition (HDP-CVD) chamber, the chamber containing a substrate having a substrate surface, the process gas including a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 2:1 or less and one or more of hydrogen (H), helium (He), and argon (Ar); generating a plasma with a source RF; ions accelerated with a bias RF; and depositing a carbon film on the substrate surface having at least one feature thereon, the at least one feature extending a feature depth from the substrate surface to a bottom surface, the at least one feature having a width defined by a first sidewall and a second sidewall, the first film being deposited on the substrate surface, on the first sidewall, the second sidewall, and on the bottom surface of the at least one feature, the carbon film having a void located within the width of the feature at a first distance from the bottom surface of the feature.

[0007] Another embodiment of the present disclosure is directed to a method of manufacturing a memory device. In one or more embodiments, the method includes forming a film stack on a substrate, the film stack including multiple alternating layers of a first material and a second material, the film stack having a stack thickness; etching the film stack to form a memory hole opening extending a depth from a top surface to a bottom surface of the film stack, the memory hole opening having a width defined by a first sidewall and a second sidewall; loading the substrate into a high-density plasma-enhanced chemical vapor deposition (HDP-CVD) chamber; and discharging a process gas into the high-density plasma-enhanced chemical vapor deposition (HDP-CVD) chamber. D) flowing a process gas into the chamber, the process gas comprising a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 2:1 or less and one or more of hydrogen (H), helium (He), and argon (Ar), wherein the film stack is at a temperature in the range of about 400°C to about 650°C and a pressure of less than about 50 mTorr; and depositing a carbon film on the film stack surface and on a first sidewall, a second sidewall, and a bottom surface of the memory hole opening, wherein the carbon film has a void located within a width of the memory hole opening at a first distance from the bottom surface of the memory hole opening. [Brief explanation of the drawings]

[0008] In order that the above-mentioned features of the present disclosure may be understood in detail, a particular description of the present disclosure, briefly summarized above, will be made by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the present disclosure may admit of other equally effective embodiments, and therefore, that the accompanying drawings illustrate only typical embodiments of the present disclosure and should not be considered as limiting the scope of the present disclosure.

[0009] [Figure 1A-B] 1 is a cross-sectional view of a substrate according to one or more embodiments of the present disclosure. [Figure 1C-D] 1 is a cross-sectional view of a substrate according to one or more embodiments of the present disclosure. [Figure 2A] 1 is a cross-sectional view of a substrate according to one or more embodiments of the present disclosure. [Figure 2B] 1 is a cross-sectional view of a substrate according to one or more embodiments of the present disclosure. [Figure 2C] 1 is a cross-sectional view of a substrate according to one or more embodiments of the present disclosure. [Figure 2D] 1 is a cross-sectional view of a substrate according to one or more embodiments of the present disclosure. [Figure 2E] 1 is a cross-sectional view of a substrate according to one or more embodiments of the present disclosure. [Figure 3] 1 illustrates a process flow according to one or more embodiments of the present disclosure. [Figure 4A] 1 illustrates a high density plasma chemical vapor deposition (HDP-CVD) system according to one or more embodiments. [Figure 4B] FIG. 4C is a cross-sectional view of a gas ring that can be used in the high-density plasma chemical vapor deposition (HDP-CVD) of FIG. 4B. DETAILED DESCRIPTION OF THE INVENTION

[0010] Before describing several example embodiments of the present disclosure, it is to be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description. The present disclosure is capable of other embodiments and of being practiced or carried out in various ways.

[0011] As used herein, the term "about" means approximately or approximately, and refers to a variation of no more than ±15% of the numerical value with respect to a given numerical value or range. For example, values ​​that vary by ±14%, ±10%, ±5%, ±2%, or ±1% meet the definition of about.

[0012] As used herein and in the claims, the terms "substrate" and "wafer" are used interchangeably and both refer to a surface or a portion of a surface upon which a process acts. As will also be understood by those skilled in the art, a reference to a substrate can also refer to only a portion of a substrate, unless the context dictates otherwise. Additionally, a reference to deposition on a substrate can refer to both a bare substrate and a substrate having one or more films or features deposited or formed thereon.

[0013] As used herein, "substrate" refers to any substrate or any material surface formed on a substrate on which a film treatment is performed during a manufacturing process. For example, substrate surfaces on which treatment can be performed include materials such as silicon, silicon oxide, strained silicon, silicon-on-insulator (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, but are not limited to, semiconductor wafers. Substrates may be exposed to pretreatment processes to polish, etch, reduce, oxidize, hydroxylate (or otherwise create or graft target chemical moieties to impart chemical functionality), anneal, and / or bake the substrate surface. In addition to film treatment directly on the surface of the substrate itself, the present disclosure also allows any of the disclosed film treatment steps to be performed on underlayers formed on the substrate, which are disclosed in more detail below. The term "substrate surface" is intended to include such underlying layers, as the context indicates. Thus, for example, if a film / layer or partial film / layer is being deposited on a substrate surface, the exposed surface of the newly deposited film / layer is the substrate surface. What a given substrate surface includes will vary depending on what film is being deposited and the particular chemistry used.

[0014] V-NAND structures or 3D-NAND structures are used in flash memory applications. V-NAND devices are vertically stacked NAND structures in which many cells are arranged in blocks. As used herein, the term "3D NAND" refers to electronic (solid-state) non-volatile computer storage memory in which memory cells are stacked in multiple layers. 3D NAND memory typically includes multiple memory cells that include floating gate transistors. Traditionally, 3D NAND memory cells include multiple NAND memory structures organized three-dimensionally around bit lines.

[0015] A key step in 3D NAND technology is the ability to vertically deposit additional layers to improve performance. Multi-layer 3D NAND fabrication requires a sacrificial memory hole plug process to protect the bottom-layer memory holes. The memory holes need to be filled with specific materials and planarized before the next process. Such processes must meet requirements for throughput, dry etch removability, and high-temperature (e.g., 850°C) stability.

[0016] Other approaches include amorphous silicon-based processes or other amorphous carbon-based processes. Amorphous silicon materials require wet removal processes that adversely affect the oxide / nitride stack. Other amorphous carbon materials suffer from low deposition rates, slow throughput, and instability at high temperatures.

[0017] Embodiments of the present disclosure provide methods for depositing films (e.g., amorphous carbon (aC)) within small dimension, high aspect ratio (AR) features using a high-density plasma chemical vapor deposition (HDP-CVD) chamber. Some embodiments provide sacrificial carbon films that advantageously fill small dimension, high AR trenches while leaving voids within the trenches / features. The sacrificial carbon films of one or more embodiments have high thermal stability at annealing temperatures.

[0018] Provided herein are methods for gap filling using high-density plasma chemical vapor deposition (HDP CVD). According to various embodiments, a carbon-containing film, such as an amorphous carbon film, is deposited into a gap in a substrate by HDP CVD to fill the gap. In one or more embodiments, the method may include using a low hydrogen content process gas during HDP CVD deposition to provide gap filling. The amorphous carbon material of one or more embodiments can be easily removed via oxygen (O) plasma, eliminating any impact on the oxide / nitride stack.

[0019] In one or more embodiments, the feature is selected from a trench, a via, a wordline slit, and a memory hole. In a specific embodiment, the feature is a memory hole. In a very specific embodiment, the feature is a memory hole in a NAND device. In one or more embodiments, the feature is filled, i.e., gap-filled. In some embodiments, the gap-fill is performed by HDP CVD.

[0020] High-density plasma chemical vapor deposition (HDP CVD) is a directional CVD process that involves directing charged precursor species toward a substrate. As used herein, high-density plasma chemical vapor deposition (HDP-CVD) is distinct from plasma-enhanced chemical vapor deposition, also known as PECVD. HDP-CVD reactors typically use inductively coupled plasmas, while PECVD reactors typically use capacitively coupled plasmas. The HDP-CVD process conditions and resulting films are distinct PECVD processes. For example, the various HDP reactors described herein are suitable for 10 17 ions / m 3 Plasma densities exceeding, e.g., 10 17 ions / m 3 From 10 19 ions / m 3 In contrast, PECVD processes operate at much lower plasma densities, e.g., 10 14 ions / m 3From 10 16 ions / m 3 and operates at much higher pressures.

[0021] An HDP reactor can ignite a plasma at a plasma frequency of 2 MHz for the coil and 13.56 MHz for the pedestal on which the wafer is placed. In contrast, a capacitively coupled plasma reactor uses a plasma frequency of 13.56 MHz to generate the plasma, with 2 MHz applied to the showerhead or pedestal. The ion energy in an HDP reactor is greater than in a PECVD reactor. As a result, the film composition and properties of films deposited in an HDP-CVD reactor are different from those deposited in a PECVD reactor. For carbon-based gap fill, the lower plasma density in a PECVD reactor generally cannot generate sufficient dissociation to enable high throughput.

[0022] In one or more embodiments, the substrate temperature during processing may range from about 400° C. to about 650° C., or from about 510° C. to about 650° C. In one or more embodiments, the chamber pressure is maintained below 50 mTorr, or below 40 mTorr, or below 30 mTorr, or below 20 mTorr, or below 10 mTorr. In one or more embodiments, the substrate temperature is controlled by the density of the ionic species, the pressure, and the bias power.

[0023] In one or more embodiments, a high-frequency RF power source or other source can be used to bias the substrate. The substrate is typically biased during deposition operations to direct deposition downward toward the bottom of a feature, such as a memory hole. In one or more embodiments, the bias power during HDP CVD ranges from about 0 to 9500 W, with the bias power increasing with substrate surface area. In one or more embodiments, the bias power and pressure are important for manipulating the size and location of voids.

[0024] FIG. 1A is a partial cross-sectional view of an electronic device 100 according to one or more embodiments. In some embodiments, a substrate 102 having a feature 106 is provided for processing in an HDP-CVD processing chamber 101. As used herein and in the claims, the term "provided" means that the substrate is made available for processing (e.g., placed in a processing chamber). While this figure shows a substrate with a single feature for illustrative purposes, one of ordinary skill in the art will understand that multiple features may be present. The feature 106 may have any suitable shape, including, but not limited to, a trench and a cylindrical via. As used in this context, the term "feature" refers to any irregular shape intentionally formed in a surface. Suitable examples of features include, but are not limited to, trenches, word line slits, and memory holes having a top, two sidewalls, and a bottom, as well as peaks having a top and two sidewalls. The feature may have any suitable aspect ratio (the ratio of the depth of the feature to the width of the feature). In some embodiments, the aspect ratio is greater than or equal to about 5:1, 10:1, 15:1, 20:1, 25:1, 30:1, 35:1, 40:1, 45:1, 50:1, 55:1, 60:1, 65:1, 70:1, 75:1, 80:1, 85:1, 90:1, 95:1, or 100:1.

[0025] In one or more embodiments, the substrate 102 has a substrate surface 120. The at least one feature 106 forms an opening in the substrate surface 120. The at least one feature 106 has a feature depth D from the substrate surface 120 to the bottom surface 112. f In one or more embodiments, at least one feature has a depth D f ranges from about 50 nm to about 10,000 nm.

[0026] At least one feature 106 has a first sidewall 114 and a second sidewall 116 that define a width W of the at least one feature 106. The open area formed by the sidewalls 114, 116 and the bottom surface 112 is also referred to as a gap. In one or more embodiments, the width W is determined by the depth D of the at least one feature 106. f In other embodiments, the width W is greater at the top of the at least one feature 106 than the width W at the bottom surface 112 of the at least one feature 106.

[0027] In one or more embodiments, at least one feature 106 comprises a memory hole or a wordline slit. Thus, in one or more embodiments, substrate 102 comprises a memory device or logic device, such as NAND, VNAND, or DRAM.

[0028] 1B-1D, in one or more embodiments, a carbon film 108 is formed over a substrate surface 120 and over the walls 114, 116 and bottom 112 of at least one feature 106. As shown in FIGS. 1B-1D, in one or more embodiments, the carbon film 108 has voids 122 located within a width W of the at least one feature 106.

[0029] In some embodiments, the carbon film 108 is a continuous film. As used herein, the term "continuous" refers to a layer that covers the entire exposed surface without gaps or bare areas that expose material underlying the deposited layer. A continuous layer may have gaps or bare areas that have a surface area that is less than about 1% of the total surface area of ​​the film.

[0030] In one or more embodiments, a substrate 102 having at least one feature 106 formed thereon is placed in an HDP-CVD chamber 101 for processing. Referring to FIG. 1B , in one or more embodiments, a carbon film 108 is formed on the substrate surface 120 and the walls 114, 116 and bottom 112 of the at least one feature 106.

[0031] In one or more embodiments, the carbon film 108 is formed by flowing a process gas into a high-density plasma chemical vapor deposition (HDP-CVD) chamber 101. In one or more embodiments, the process gas includes a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 2:1 or less and one or more of hydrogen (H), helium (He), and argon (Ar). In some embodiments, the process gas includes a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 1:1 or less.

[0032] In some embodiments, the carbohydrate reactant comprises one or more of an alkene and an alkyne. As used herein, the term "alkene" refers to a carbohydrate containing a carbon-carbon double bond. An alkene is an acyclic carbohydrate having only one double bond. As used herein, the term "alkyne" refers to an unsaturated carbohydrate containing at least one carbon-carbon triple bond. In one or more embodiments, the carbohydrate reactant is selected from the group consisting of acetylene (C2H2), propylene (C3H6), ethylene (C2H4), and methylacetylene (C3H4).

[0033] Non-limiting examples of carbohydrate process gases for depositing carbon films include acetylene (C2H2) / hydrogen (H2) / helium (He) / argon (Ar), propylene (C3H6) / hydrogen (H2) / helium (He) / argon (Ar), ethylene (C2H4) / hydrogen (H2) / helium (He) / argon (Ar), and methylacetylene (C3H4) / hydrogen (H2) / helium (He) / argon (Ar).

[0034] A carbon film 108 is then deposited into the features 106, forming on the sidewalls 114, 116 and bottom 112, but leaving a void 122 in at least one feature 106. According to various embodiments, filling the gaps can be performed in a single deposition or in multiple depositions.

[0035] In one or more embodiments, gap filling can be provided by using a carbohydrate process gas in HDP CVD deposition. This is shown schematically in Figures 1A through 1D, which show cross-sectional views of a feature 106 filled with a carbon film 108 during the deposition stage. As deposition progresses, cusping 110 results from redeposition and preferential growth. This closes off the top of the feature 106, and then a void 122 results.

[0036] The voids 122 are illustrated as rectangular openings in the carbon film 108. However, one skilled in the art will understand that this is for illustrative purposes only. The shape and size of the voids 122 can vary.

[0037] In one or more embodiments, the carbohydrate process gas is flowed into the HDP-CVD processing chamber at a flow rate ranging from about 10 sccm to about 150 sccm, including from about 15 sccm to about 135 sccm. Cubic centimeters per minute (sccm) is the rate at which a given fluid, typically a gas, flows at standard conditions of temperature and pressure. 3 It is a unit of flow rate measurement that indicates the flow rate (flows per minute).

[0038] In one or more embodiments, argon (Ar) is introduced / flowed into the HDP-CVD chamber at a flow rate ranging from about 40 sccm to about 60 sccm. In one or more embodiments, hydrogen (H) is introduced / flowed into the HDP-CVD chamber at a flow rate ranging from about 0 sccm to about 500 sccm, including from about 0 sccm to about 300 sccm and from about 0 sccm to about 200 sccm. In one or more embodiments, helium (He) is introduced / flowed into the HDP-CVD chamber at a flow rate ranging from about 0 sccm to about 500 sccm and from about 0 sccm to about 300 sccm.

[0039] In one or more embodiments, the substrate is processed at a temperature ranging from about 400° C. to about 650° C. and a pressure of less than about 50 mTorr. In some embodiments, the pressure is less than about 40 mTorr, or less than about 30 mTorr, or less than about 20 mTorr, or less than about 10 mTorr.

[0040] After process gases are flowed into the HDP-CVD chamber, a plasma is generated to form a carbon film 108 in at least one feature 106 and on the substrate surface 122 .

[0041] In one or more embodiments, the carbon film 108 has good thermal stability. After annealing the carbon film 108 at a temperature of 800° C. or higher for 1 hour, the carbon film 108 has a shrinkage of less than 15%. In some embodiments, the carbon film 108 has a shrinkage of less than 10%.

[0042] 2A through 2E are partial cross-sectional views of a memory device 200, e.g., a NAND device, according to one or more embodiments. In some embodiments, a substrate 202 having features 214 is provided for processing in an HDP-CVD processing chamber 201. The features 214 may have any suitable shape, including, but not limited to, trenches and cylindrical vias. The term "feature," as used in this context, refers to any irregular shape intentionally formed on a surface. Suitable examples of features include, but are not limited to, trenches, word lines, and memory holes having a top, two sidewalls, and a bottom, as well as peaks having a top and two sidewalls. The features may have any suitable aspect ratio (the ratio of the depth of the feature to the width of the feature). In some embodiments, the aspect ratio is about 5:1, 10:1, 15:1, 20:1, 25:1, 30:1, 35:1, 40:1, 45:1, 50:1, 55:1, 60:1, 65:1, 70:1, 75:1, 80:1, 85:1, 90:1, 95:1, or 100:1 or more. In one or more embodiments, the feature 214 comprises a memory hole.

[0043] In one or more embodiments, the substrate 202 has a substrate surface 222. The at least one feature 214 forms an opening in the substrate surface 222. The at least one feature 214 has a feature depth D from the substrate surface 222 to the bottom surface 220. m At least one feature 214 extends over a width W of the at least one feature 214. m In one or more embodiments, the width W m is the depth D of at least one feature 214 m In other embodiments, the width W m is the width W at the top of the at least one feature 214 and the width W at the bottom surface 220 of the at least one feature 214 m is greater than.

[0044] In one or more embodiments, at least one feature 214 comprises a memory hole or a wordline slit. Thus, in one or more embodiments, device 200 comprises a memory device or a logic device, such as NAND, VNAND, or DRAM.

[0045] In one or more embodiments, device 200 includes a film stack including multiple alternating layers of a first material 210 and a second material 212 deposited on a semiconductor substrate 202. In one or more embodiments, first material 210 and second material 212 each include one or more of an oxide material, a nitride material, and a polysilicon material. In a particular embodiment, first material 210 deposited on semiconductor substrate 202 is a nitride material and second material 212 is an oxide material.

[0046] The semiconductor substrate 202 can be any suitable substrate material. In one or more embodiments, the semiconductor substrate 202 includes a semiconductor material, such as silicon (Si), carbon (C), germanium (Ge), silicon germanium (SiGe), gallium arsenide (GaAs), indium phosphate (InP), indium gallium arsenide (InGaAs), indium aluminum arsenide (InAlAs), germanium (Ge), silicon germanium (SiGe), copper indium gallium selenide (CIGS), other semiconductor materials, or any combination thereof. In one or more embodiments, the semiconductor substrate 102 includes one or more of silicon (Si), germanium (Ge), gallium (Ga), arsenic (As), indium (In), phosphorus (P), copper (Cu), or selenium (Se). Although some examples of materials from which substrate 202 may be formed are described herein, any material that may serve as a foundation upon which passive and active electronic devices (e.g., transistors, memory, capacitors, inductors, resistors, switches, integrated circuits, amplifiers, optoelectronic devices, or any other electronic device) may be built may fall within the spirit and scope of the present disclosure.

[0047] 2A-2C are partial cross-sectional views of processing of memory device 200 according to one or more embodiment methods. FIG. 3 is a process flow diagram of a processing method 300 according to one or more embodiments of the present disclosure. With reference to FIGS. 2A-2C and 3, in one or more embodiments, at least one feature 214 is formed on substrate 202. In some embodiments, substrate 202 is provided for processing prior to operation 302. In one or more embodiments, substrate 202 includes at least one feature 214 already formed thereon. In other embodiments, in operation 302, at least one feature 214 is formed on substrate 202. In one or more embodiments, the at least one feature is formed to a depth, D, of the feature from substrate surface 222 to bottom surface 220. m and at least one feature extends over a width W defined by a first sidewall 216 and a second sidewall 218. m It has.

[0048] In one or more embodiments, in operation 304, the substrate 202 having the film stack 204 formed thereon is placed in the HDP-CVD chamber 201 for processing. Referring to Figure 2B, in one or more embodiments, a carbon film 208 is formed on the substrate surface 222 and on the walls 216, 218 and bottom 220 of at least one feature 214.

[0049] In one or more embodiments, the carbon film 208 is formed by flowing a process gas into a high-density plasma chemical vapor deposition (HDP-CVD) chamber 101. In one or more embodiments, the process gas includes a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 2:1 or less and one or more of hydrogen (H), helium (He), and argon (Ar). In some embodiments, the process gas includes a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 1:1 or less.

[0050] In some embodiments, the carbohydrate reactant comprises one or more of an alkene and an alkyne. As used herein, the term "alkene" refers to a carbohydrate containing a carbon-carbon double bond. An alkene is an acyclic carbohydrate having only one double bond. As used herein, the term "alkyne" refers to an unsaturated carbohydrate containing at least one carbon-carbon triple bond. In one or more embodiments, the carbohydrate reactant is selected from the group consisting of acetylene (C2H2), propylene (C3H6), ethylene (C2H4), and methylacetylene (C3H4).

[0051] Non-limiting examples of carbohydrate process gases for depositing carbon films include acetylene (C2H2) / hydrogen (H2) / helium (He) / argon (Ar), propylene (C3H6) / hydrogen (H2) / helium (He) / argon (Ar), ethylene (C2H4) / hydrogen (H2) / helium (He) / argon (Ar), and methylacetylene (C3H4) / hydrogen (H2) / helium (He) / argon (Ar).

[0052] A carbon film 208 is then deposited into the memory hole 214, forming on the sidewalls 216, 218 and bottom 220, but leaving a void 240 in the memory hole 214. According to various embodiments, filling the gaps can be performed in a single deposition or multiple depositions.

[0053] 2C as rectangular openings in carbon film 208. However, one skilled in the art will appreciate that this is for illustrative purposes only. The shape and size of voids 240 can vary.

[0054] In one or more embodiments, gap filling can be provided by using a carbohydrate process gas in HDP CVD deposition. This is shown schematically in FIGS. 2A through 2C, which are cross-sectional views of a feature 214 being filled with a carbon film 208 during a deposition step using HDP-CVD. Referring to FIG. 2B, as deposition progresses, a cusp 206 forms. This closes the top of the memory hole 214, and then a void 240 forms. Without intending to be bound by theory, filling the memory hole 214 and intentionally creating the void 240 allows for easier removal of the carbon film 208 later in the fabrication of NAND devices. Memory holes are high-aspect ratio structures, with a depth much greater than their width. If the memory hole 214 were completely filled with the carbon film 208, removing the film would require significant time and could damage the device during removal. If the carbon film 208 is present only on the memory holds 214, there will be voids 240 below, allowing the solvent or plasma to penetrate into the voids 240, making it easier to remove the carbon film 208.

[0055] In one or more embodiments, the carbohydrate is flowed into the HDP-CVD processing chamber at a flow rate ranging from about 10 sccm to about 150 sccm, including from about 15 sccm to about 135 sccm. Cubic centimeters per minute (sccm) is the cubic centimeters per minute (cm) of a given fluid, typically a gas, at standard conditions of temperature and pressure. 3It is a unit of flow rate measurement that indicates the flow rate (flows per minute).

[0056] In one or more embodiments, argon (Ar) is introduced / flowed into the HDP-CVD chamber at a flow rate ranging from about 40 sccm to about 60 sccm. In one or more embodiments, hydrogen (H) is introduced / flowed into the HDP-CVD chamber at a flow rate ranging from about 0 sccm to about 500 sccm, including from about 0 sccm to about 300 sccm and from about 0 sccm to about 200 sccm. In one or more embodiments, helium (He) is introduced / flowed into the HDP-CVD chamber at a flow rate ranging from about 0 sccm to about 500 sccm and from about 0 sccm to about 300 sccm.

[0057] In one or more embodiments, the device 200 is processed at a temperature ranging from about 400° C. to about 650° C. and a pressure of less than about 50 mTorr. In some embodiments, the pressure is less than about 40 mTorr, or less than about 30 mTorr, or less than about 20 mTorr, or less than about 10 mTorr.

[0058] In one or more embodiments, the carbon film 208 has good thermal stability. After annealing the carbon film 208 at a temperature of 800° C. or higher for 1 hour, the carbon film 208 has a shrinkage of less than 20%. In some embodiments, the carbon film 208 has a shrinkage of less than 15%. In some embodiments, the carbon film 208 has a shrinkage of less than 10%.

[0059] As shown in FIG. 2C, in one or more embodiments, the carbon film 208 has a width W m The void 240 is located within the void.

[0060] At decision point 310, it is determined whether the desired film properties of the carbon film 208 have been achieved. If the desired properties have been achieved, the device 200 is provided for further processing in operation 312. If the desired properties have not been achieved, the process returns to operation 306, where the substrate is again exposed to a carbohydrate treatment gas.

[0061] 2D and 2E are partial cross-sectional views of memory device 200 according to one or more embodiments. In operation 312, device 200 can be subjected to various post-processing methods. For example, referring to FIG. 2D, carbon film 208 is etched or planarized so that carbon film 208 is substantially flush with top surface 222 of device 200. Carbon film 208 can be etched or planarized by any suitable process known to those skilled in the art, including, but not limited to, chemical mechanical polishing (CMP), wet etching, plasma-based sputter etching, chemical etching, Siconi® etching, reactive ion etching (RIE), and high-density plasma (HDP) etching. In some embodiments, etching carbon film 208 includes exposing carbon film 208 to an etching chemistry including one or more of NF, Cl, HBr, C, F, C, F, H, Ar, He, or N. In one or more embodiments, the carbon film 208 is planarized by chemical mechanical polishing (CMP).

[0062] 2E, a film 232 is deposited on top surface 222 and on top of carbon film 208. In one or more embodiments, film 232 can be composed of any suitable material. In some embodiments, film 232 is silicon nitride (SiN) or silicon oxide (SiO x ) In one or more embodiments, film 232 is formed by atomic layer deposition or plasma enhanced chemical vapor deposition (PECVD). In one or more embodiments, film 232 covers gap-filling carbon film 208 and reduces shrinkage of the underlying gap-filling carbon film 208 during annealing. In one or more embodiments, film 232 may be removed after annealing.

[0063] According to one or more embodiments, device 200 is subjected to processing prior to and / or after layer formation, which processing can be performed in the same chamber or in one or more separate processing chambers.

[0064] The method of one or more embodiments may be implemented in an HDP-CVD reactor. Such a reactor can take many different forms. Typically, the apparatus will include one or more chambers or "reactors" (sometimes including multiple stations) suitable for substrate processing, housing one or more substrates. Each chamber may house one or more substrates for processing. The one or more chambers maintain the substrates in one or more defined positions (with or without in-position movement, e.g., rotation, vibration, or other agitation). During processing, each substrate is held in place by a pedestal, vacuum chuck, and / or electrostatic chuck. For certain operations in which the substrate is heated, the apparatus may include a heater, such as a hot plate. One example of a suitable reactor is the CENTURA ULTIMA® HDP-CVD chamber / system available from Applied Materials, Inc. of Santa Clara, California.

[0065] An overview of an HDP-CVD chamber / system is provided below in connection with Figures 4A and 4B. Figure 4A shows a schematic diagram of one embodiment of such an HDP-CVD system 610. System 610 includes a chamber 613, a vacuum system 670, a source plasma system 680A, a substrate bias plasma system 680B, a gas delivery system 633, and a remote plasma cleaning system 650.

[0066] The upper portion of chamber 613 includes a dome 614, which is fabricated from a ceramic dielectric material such as aluminum oxide or aluminum nitride. Dome 614 defines the upper boundary of a plasma processing region 616. Plasma processing region 616 is bounded at the bottom by the upper surface of a substrate 617 and a substrate support member 618.

[0067] A heater plate 623 and a cooling plate 624 overlie and are thermally coupled to the dome 614. The heater plate 623 and the cooling plate 624 allow control of the dome temperature within about ±10°C over a range from about 400°C to about 650°C. This allows optimization of the dome temperature for various processes. For example, for cleaning or etching processes, it may be desirable to maintain the dome at a higher temperature than for deposition processes. Precise control of the dome temperature also reduces the number of flakes or particles in the chamber and improves adhesion between the deposited layer and the substrate.

[0068] The lower portion of the chamber 613 includes a body member 622, which connects the chamber to the vacuum system. A base 621 of the substrate support member 618 is mounted on the body member 622 and forms a continuous inner surface therewith. Substrates are transferred into and out of the chamber 613 by a robot blade (not shown) through an insertion / removal opening (not shown) in the side of the chamber 613. Lift pins (not shown) are raised and then lowered under the control of a motor (not shown) to move the substrate from the robot blade at an upper loading position 657 to a lower processing position 656 where the substrate is positioned on a substrate receiving portion 619 of the substrate support member 618. The substrate receiving portion 619 includes an electrostatic chuck 620 that secures the substrate to the substrate support member 618 during substrate processing. In certain embodiments, the substrate support member 618 is fabricated from an aluminum oxide or aluminum ceramic material.

[0069] Vacuum system 670 includes a throttle body 625 that houses a twin-blade throttle valve 626 and is attached to a gate valve 627 and turbomolecular pump 628. Note that throttle body 625 minimizes obstructions to gas flow, allowing for symmetric pumping. Gate valve 627 can isolate pump 628 from throttle body 625 and can also control chamber pressure by restricting the exhaust flow capacity when throttle valve 626 is fully open. The throttle valve, gate valve, and turbomolecular pump configuration allows for precise and stable control of chamber pressure from approximately 1 milliTorr to approximately 2 Torr.

[0070] The source plasma system 680A includes a top coil 629 and a side coil 630 mounted on the dome 614. A symmetrical ground shield (not shown) reduces electrical coupling between the coils. The top coil 629 is powered by a top source RF (SRF) generator 631A, and the side coil 630 is powered by a side SRF generator 631B, allowing independent power levels and operating frequencies for each coil. This dual-coil system allows control of the radial ion density within the chamber 613, thereby improving plasma uniformity. The side coil 630 and top coil 629 are typically inductively driven and do not require complementary electrodes. In a specific embodiment, the top source RF generator 631A provides up to 10,000 watts of RF power at a nominal frequency of 2 MHz, and the side source RF generator 631B provides up to 10,500 watts of RF power at a nominal frequency of 2 MHz. To improve plasma generation efficiency, the operating frequencies of the top and side RF generators may be offset from the nominal operating frequency (eg, to 1.7-1.9 MHz and 1.9-2.1 MHz, respectively).

[0071] The substrate bias plasma system 680B includes a bias RF ("BRF") generator 631C and a bias matching network 632C. The bias plasma system 680B capacitively couples the substrate portion 617 to the body member 622, which acts as a complementary electrode. The bias plasma system 680B functions to enhance the transport of plasma species (e.g., ions) generated by the source plasma system 680A to the substrate surface. In a specific embodiment, the substrate bias RF generator provides up to 10,000 watts of RF power at a frequency of approximately 13.56 MHz.

[0072] RF generators 631A and 631B include digitally controlled synthesizers. Each generator includes an RF control circuit (not shown) that measures the power reflected from the chamber and coil back to the generator and adjusts the operating frequency to achieve the lowest reflected power, as would be understood by one skilled in the art. RF generators are typically designed to operate with a load having a characteristic impedance of 50 ohms. RF power can also be reflected from loads with a different characteristic impedance than the generator. This can reduce the power delivered to the load. Furthermore, power reflected from the load back to the generator can overload and damage the generator. Because the impedance of a plasma can range from less than 5 ohms to over 900 ohms, depending on the plasma ion density, among other factors, and reflected power can be a function of frequency, adjusting the generator frequency in response to the reflected power increases the power delivered from the RF generator to the plasma and protects the generator. Another method for reducing reflected power and improving efficiency is to use a matching network.

[0073] Matching networks 632A and 632B match the output impedance of generators 631A and 631B to their respective coils 629 and 630. The RF control circuit can tune both matching networks by changing the values ​​of the capacitors in the matching networks in response to load changes, matching the generators to the load. The RF control circuit can tune the matching networks when the power reflected from the load back to the generator exceeds a certain limit. One way to provide a constant match, effectively disabling the RF control circuit from tuning the matching networks, is to set a reflected power limit above any predicted value of reflected power. This can help stabilize the plasma under some conditions by holding the matching networks constant for their current conditions.

[0074] Other means can also help stabilize the plasma. For example, an RF control circuit can be used to determine the power delivered to the load (plasma), and the generator output power can be increased or decreased to keep the delivered power substantially constant during layer deposition.

[0075] A gas supply system 633 provides gases from multiple sources 634A-634E via gas supply lines 638 (only some of which are shown) to the chamber for processing a substrate. As will be appreciated by those skilled in the art, the actual sources used for sources 634A-634E and the actual connections of supply lines 638 to chamber 613 will vary depending on the deposition and cleaning processes being performed in chamber 613. Gases are introduced into chamber 613 through a gas ring 637 and / or a top nozzle 645. A simplified partial cross-sectional view of chamber 613 is shown showing further details of gas ring 637.

[0076] In one embodiment, first and second gas sources 634A and 634B, and first and second gas flow controllers 635A′ and 635B′, provide gases via gas supply lines 638 (only some of which are shown) to a ring plenum 636 within a gas ring 637. The gas ring 637 has multiple source gas nozzles 639 (only one of which is shown for illustrative purposes) that provide uniform gas flow across the substrate. Nozzle length and nozzle angle can be varied to enable custom tuning of the uniformity profile and gas utilization efficiency for specific processes within individual chambers. In a specific embodiment, the gas ring 637 has 12 source gas nozzles made from aluminum oxide ceramic.

[0077] Gas ring 637 also has multiple oxidizer gas nozzles 640 (only one of which is shown), which in one embodiment are flush with and shorter than source gas nozzles 639 and, in one embodiment, receive gas from body plenum 641. In some embodiments, it is desirable not to mix the source gas and oxidizer gas before injecting the gases into chamber 613. In other embodiments, an opening (not shown) may be provided between body plenum 641 and gas ring plenum 636 so that the oxidizer gas and source gas may be mixed prior to injecting the gases into chamber 613. In one embodiment, third gas source 634C, fourth gas source 634D, and fifth gas source 634D′ and third gas flow controller 635C and fourth gas flow controller 635D′ provide gas to body plenum 636 via gas supply line 638. Additional valves, such as 643B (other valves not shown), may shut off gas from the gas flow controllers to the chamber. In implementations of some embodiments of the invention, source 634A includes a carbohydrate source, source 634B includes a molecular hydrogen (H) source, source 634C includes a helium (He) source, and source 634D includes an argon (Ar) source.

[0078] In embodiments in which flammable, toxic, or corrosive gases are used, it may be desirable to remove gas remaining in the gas supply line after deposition. This can be accomplished using a three-way valve, e.g., valve 643B, that isolates chamber 613 from supply line 638A and vents supply line 638A, e.g., to vacuum foreline 644. As shown in FIG. 4A , other similar valves, e.g., 643A and 643C, can be incorporated on the other gas supply lines. Such three-way valves can be located as close to chamber 613 as practical to minimize the volume of unvented gas supply line (between the three-way valve and the chamber). Additionally, two-way (on / off) valves (not shown) can be located between the mass flow controller (“MFC”) and the chamber, or between the gas source and the MFC.

[0079] Referring again to FIG. 4A , the chamber 613 also has a top nozzle 645 and a top vent 646. The top nozzle 645 and the top vent 646 allow independent control of the upward and side flow of gas, thereby improving film uniformity and enabling fine-tuning of film deposition and doping parameters. The top vent 646 is an annular opening around the top nozzle 645. In one embodiment, a first gas source 634A supplies the source gas nozzle 639 and the top nozzle 645. The source nozzle MFC 635A′ controls the amount of gas supplied to the source gas nozzle 639, and the top nozzle MFC 1035A controls the amount of gas supplied to the top gas nozzle 645. Similarly, two MFCs 635B and 635B′ can be used to control the flow of oxygen from a single oxygen source, such as source 634B, to both the top vent 646 and the oxidizer gas nozzle 640. In some embodiments, oxygen is not supplied to the chamber from either side nozzle. The gases supplied to the top nozzle 645 and top vent 646 may be kept separate prior to flowing the gases into the chamber 613, or the gases may be mixed in the top plenum 648 before flowing into the chamber 613. Separate sources of the same gas may be used to supply different portions of the chamber.

[0080] A remote microwave-generated plasma cleaning system 650 is provided for periodically cleaning deposition residues from chamber components. The cleaning system includes a remote microwave generator 651 that creates a plasma from a cleaning gas source 634E (e.g., molecular fluorine, nitrogen trifluoride, other fluorocarbons, or equivalents) in a reactor cavity 653. Reactive species resulting from this plasma are transported to the chamber 613 through a cleaning gas inlet 654 via an applicator tube 655. The materials used to contain the cleaning plasma (e.g., the cavity 653 and the applicator tube 655) must be resistant to attack by the plasma. The distance between the reactor cavity 653 and the inlet 654 should be kept as short as practical, as the concentration of desirable plasma species may decrease with distance from the reactor cavity 653. Generating the cleaning plasma in the remote cavity allows for efficient microwave generator use and does not expose chamber components to the temperature, radiation, or irradiation of a glow discharge that may be present in an in situ formed plasma. As a result, relatively sensitive components such as the electrostatic chuck 620 do not need to be covered with a dummy wafer or otherwise protected, as may be required for in-situ plasma cleaning processes. In Figure 4A, the plasma cleaning system 650 is located above the chamber 613, although other locations may alternatively be used.

[0081] A baffle 661 can be provided adjacent to the top nozzle to direct the flow of source gas supplied through the top nozzle into the chamber and to direct the flow of remotely generated plasma. Source gas supplied through the top nozzle 645 is directed into the chamber through the central passage 662, and remotely generated plasma species provided through the cleaning gas inlet 654 are directed to the sides of the chamber by the baffle 661. [Example]

[0082] Example 1: The oxynitride film stack with the memory hole was placed in an HDP CVD processing chamber. A He / Ar / C2H2 process gas was flowed into the processing chamber. The substrate was maintained at a temperature of 500°C and a pressure of 3 mTorr. Plasma was generated using an RF source. A layer of amorphous carbon (aC) was formed in the memory hole of the substrate. Voids were left in the memory hole. The substrate was annealed at a temperature of 800°C for 1 hour. The carbon film survived the 800°C annealing with a shrinkage of ≥ 25%.

[0083] Example 2: The oxynitride film stack with the memory hole was placed in an HDP CVD processing chamber. A He / Ar / C2H2 process gas was flowed into the processing chamber. The substrate was maintained at a temperature of 550°C and a pressure of 10 mTorr. Plasma was generated using an RF source. A layer of amorphous carbon (aC) was formed in the memory hole of the substrate. Voids were left in the memory hole. The substrate was annealed at a temperature of 800°C for 1 hour. The carbon film survived the 800°C annealing with a shrinkage of 15.5%.

[0084] Example 3: The oxynitride film stack with memory holes was placed in an HDP CVD processing chamber. A process gas of H2 / He / Ar / C2H2 was flowed into the processing chamber. The substrate was maintained at a temperature of 592°C and a pressure of 4.2 mTorr. Plasma was generated using an RF source. A layer of amorphous carbon (aC) was formed in the memory holes of the substrate. Voids were left in the memory holes. The substrate was annealed at a temperature of 800°C for 1 hour. The carbon film survived the 800°C annealing with shrinkage of <10%.

[0085] The process of Example 3 has greater process margins in terms of pressure, gap filling, and thermal stability than the processes of Examples 1 and 2. The carbon film formed in Example 3 exhibits <10% shrinkage after annealing at 800°C for 1 hour.

[0086] Spatially relative terms such as "lower," "below," "below," "upper," and "above" may be used herein for convenience of description to describe the relationship of one element or feature to one or more other elements or features shown in the figures. It should be understood that these spatially relative terms are intended to encompass different orientations or operations of the device in use or operation in addition to the orientation shown in the figures. For example, if a device in the figures were turned over, elements described as "below" or "below" other elements or features would now be "above" the other elements or features. Thus, the exemplary term "lower" can encompass both an orientation of above and below. A device may also be oriented differently (rotated 90 degrees or at other orientations), and the spatially relative descriptions used herein interpreted accordingly.

[0087] The use of the terms "a," "an," and "the" and similar referents in the context of describing the materials and methods described herein (particularly in the context of the claims) should be construed to cover both the singular and the singular, unless otherwise indicated herein or clearly contradicted by context. The recitation of ranges of values ​​herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range, unless otherwise indicated herein, and each separate value is incorporated herein as if it were individually listed herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or clearly contradicted by context. The use of any and all examples, or exemplary language (e.g., "such as") provided herein, is intended merely to better clarify the materials and methods and does not impose a limitation on scope unless otherwise claimed. No language in the specification should be construed as indicating any element not claimed as essential to the practice of the disclosed materials and methods.

[0088] Throughout this specification, references to "one embodiment," "some embodiments," "one or more embodiments," or "an embodiment" mean that a particular feature, structure, material, or characteristic described in connection with an embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of the phrases "in one or more embodiments," "some embodiments," "in one embodiment," or "in an embodiment" in various places throughout this specification do not necessarily refer to the same embodiment of the present disclosure. In one or more embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner.

[0089] Although the disclosure herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed method and apparatus without departing from the spirit and scope of the disclosure. Therefore, the disclosure is intended to cover such modifications and variations provided they come within the scope of the appended claims and their equivalents.

Claims

1. 1. A method of forming a film, comprising:

1. Flowing a process gas into a high density plasma chemical vapor deposition (HDP-CVD) chamber, the chamber containing a substrate having at least one feature, the process gas comprising a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 2:1 or less, and a hydrogen (H ２ flowing a process gas into the chamber, the process gas comprising one or more of nitrogen (N), helium (He), and argon (Ar), wherein the substrate is processed at a temperature in the range of 400° C. to 650° C. and a pressure less than 50 mTorr; generating a plasma; depositing a carbon film in the at least one feature, the carbon film having voids in the at least one feature; A method comprising:

2. 10. The method of claim 1, wherein the carbohydrate reactant comprises one or more of an alkene and an alkyne.

3. The carbohydrate reactant is acetylene (C ２ H ２ ), propylene (C ３ H ６ ), ethylene (C ２ H ４ ), and methylacetylene (C ３ H ４ 3. The method of claim 2, wherein the hydroxybenzoate is selected from the group consisting of:

4. The method of claim 1 , wherein the carbon film comprises an amorphous carbon (aC) film.

5. The method of claim 1 , wherein the at least one feature is selected from one or more of a trench, a via, a wordline slit, and a memory hole.

6. The method of claim 5 , wherein the at least one feature has an aspect ratio of 50:1 or greater.

7. 6. The method of claim 5, wherein the at least one feature extends a feature depth from a top surface to a bottom surface of the substrate and has a width defined by a first sidewall and a second sidewall, the carbon film is deposited on the top surface, the first sidewall, the second sidewall, and the bottom surface, and the void is located within the width of the at least one feature at a first distance from the bottom surface of the feature.

8. 1. A method of forming a film, comprising:

1. Flowing a process gas into a high density plasma chemical vapor deposition (HDP-CVD) chamber, the chamber containing a substrate having a substrate surface, the process gas comprising a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 2:1 or less and a hydrogen (H ２ flowing a process gas into the chamber, the process gas comprising one or more of: nitrogen (N), helium (He), and argon (Ar); generating a plasma; depositing a carbon film on the substrate surface, the substrate surface having at least one feature thereon, the at least one feature extending a depth from the substrate surface to a bottom surface, the at least one feature having a width defined by a first sidewall and a second sidewall, the carbon film being deposited on the substrate surface and the first sidewall, the second sidewall, and the bottom surface of the at least one feature, the carbon film having a void located within the width of the feature at a first distance from the bottom surface of the feature; A method comprising:

9. etching or planarizing the carbon film so that the carbon film is substantially flush with the substrate surface; and forming a silicon nitride (SiN) or silicon oxide (SiO ｘ 9. The method of claim 8, further comprising depositing a second film comprising one or more of the following on the substrate surface and on top of the carbon film:

10. 9. The method of claim 8, wherein the substrate is processed at a temperature in the range of 400° C. to 640° C. and a pressure less than 50 mTorr.

11. The carbohydrate reactant is acetylene (C ２ H ２ ), propylene (C ３ H ６ ), ethylene (C ２ H ４ ), and methylacetylene (C ３ H ４ 9. The method of claim 8, wherein the hydroxybenzoate is selected from the group consisting of:

12. The method of claim 8, wherein the carbon film comprises an amorphous carbon (aC) film.

13. The method of claim 9 , further comprising annealing the substrate, wherein the second film reduces shrinkage of the carbon film during annealing.

14. The method of claim 8 , wherein the features have an aspect ratio of 10:1 or greater.

15. The method of claim 8 , wherein the depth of the at least one feature is in the range of 50 nm to 10,000 nm.

16. 1. A method of manufacturing a memory device, comprising: forming a film stack on a substrate, the film stack including a plurality of alternating layers of a first material and a second material, the film stack having a stack thickness; etching the film stack to form a memory hole opening extending to a depth from a top surface to a bottom surface of the film stack, the memory hole opening having a width defined by a first sidewall and a second sidewall; loading the substrate into a high density plasma chemical vapor deposition (HDP-CVD) chamber; flowing a process gas into the high density plasma chemical vapor deposition (HDP-CVD) chamber, the process gas comprising a carbohydrate reactant having a hydrogen to carbon (H:C) ratio of 2:1 or less and a hydrogen (H ２ flowing a process gas into the chamber, the process gas comprising one or more of nitrogen (N), helium (He), and argon (Ar), wherein the substrate is processed at a temperature in the range of 400° C. to 650° C. and a pressure less than 50 mTorr; depositing a carbon film on the top surface of the film stack and on the first sidewall, the second sidewall, and the bottom surface of the memory hole opening, the carbon film having a void located within the width of the memory hole opening at a first distance from the bottom surface of the memory hole opening; A method comprising:

17. 17. The method of claim 16, further comprising etching or planarizing the carbon film so that the carbon film is substantially flush with the top surface of the film stack, and depositing a second film on the top surface of the film stack and on the top surface of the carbon film.

18. The carbohydrate reactant is acetylene (C ２ H ２ ), propylene (C ３ H ６ ), ethylene (C ２ H ４ ), and methylacetylene (C ３ H ４ 17. The method of claim 16, wherein the compound is selected from the group consisting of:

19. The second film is silicon nitride (SiN) or silicon oxide (SiO ｘ 20. The method of claim 17, comprising one or more of:

20. 17. The method of claim 16, wherein the first material and the second material each comprise one or more of an oxide material, a nitride material, and a polysilicon material.

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