Cooling structure for wiring board

Abstract

To provide a cooling structure for a wiring board with improved heat dissipation efficiency while suppressing the increase of manufacturing costs.SOLUTION: Provided is a cooling structure for a wiring board on which a semiconductor integrated circuit is mounted. A metal layer of a wide wiring pattern with multiple potentials is exposed on an end surface of the wiring board, and a heat sink with a different potential for each potential of the wide wiring pattern is connected to the metal layers of the multiple wide wiring patterns exposed on the end surface to dissipate heat generated by the semiconductor integrated circuit mounted on the wiring board from the heat sink.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a cooling structure for a wiring board on which heat-generating components are mounted. [Background technology]

[0002] The increase in power consumption due to the increased speed of semiconductor integrated circuits has led to a significant increase in heat generation, and the cooling method of placing a heat sink in contact with the semiconductor integrated circuit mounted on a wiring board is no longer able to keep up. Another method is to cool the semiconductor integrated circuit by immersing the entire wiring board in an insulating liquid, but in this case it is necessary to cover the entire board and seal it to prevent the liquid from leaking, which creates the problem of a large-scale device configuration.

[0003] Semiconductor integrated circuits have the problem of malfunctioning when exposed to high temperatures, so there is a demand for a cooling method that can further increase the cooling efficiency in addition to dissipating heat from the top surface of the semiconductor integrated circuit.

[0004] As a conventional cooling structure for a wiring board, Patent Document 1 proposes a technology in which a heat dissipation layer is provided on the wiring board, the heat dissipation layer is exposed to the outside of the wiring board, and a heat sink is connected to the heat dissipation layer to enhance the heat dissipation effect. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 4-257286 Summary of the Invention [Problem to be solved by the invention]

[0006] However, the technology of Patent Document 1 requires the manufacture of a wiring board with a structure in which a heat dissipation layer dedicated to heat dissipation is added to a conventional wiring board, and there is a problem in that the addition of the heat dissipation layer increases the manufacturing cost of the wiring board.

[0007] An object of the present invention is to solve the above problems and to provide a cooling structure for a wiring board that suppresses an increase in manufacturing costs and improves heat dissipation efficiency. [Means for solving the problem]

[0008] In order to solve the above-mentioned problems, the present invention provides a cooling structure for a wiring board on which a semiconductor integrated circuit is mounted, characterized in that metal layers of wide wiring patterns of multiple potentials are exposed on the end surfaces of the wiring board, and heat sinks of different potentials are connected to the metal layers of the multiple wide wiring patterns exposed on the end surfaces, for each potential of the wide wiring patterns, so that heat generated by the semiconductor integrated circuit mounted on the wiring board is dissipated from the heat sinks.

[0009] With this configuration, the present invention has the effect of efficiently cooling the semiconductor integrated circuit that generates heat.

[0010] The present invention also provides a cooling structure for the above-mentioned wiring board, characterized in that the metal layers of the wide wiring patterns of multiple potentials exposed on the end surface of the wiring board are exposed on different layers, and multiple heat sinks connected to the multiple metal layers on different layers on the end surface of the wiring board are insulated by a heat sink insulating layer.

[0011] The present invention also provides the above-mentioned wiring board cooling structure, comprising: and a heat sink in contact with the wiring pattern on the surface of the wiring board. [Effects of the Invention]

[0012] The cooling structure for a wiring board according to the present invention has a configuration in which metal layers of wide wiring patterns of multiple potentials are exposed on the end surface of the wiring board, and heat sinks of different potentials are connected to the metal layers of the multiple wide wiring patterns exposed on the end surface for each potential of the wide wiring patterns.

[0013] With this configuration, the present invention has the effect of efficiently cooling the semiconductor integrated circuit that generates heat, by cooling the semiconductor integrated circuit mounted on the wiring board with a heat sink in contact with the semiconductor integrated circuit, and also with a heat sink in contact with the wiring pattern on the surface of the wiring board, and further with a heat sink in contact with the metal layer of the wide wiring pattern exposed on the end face of the wiring board. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a cross-sectional view illustrating a cooling structure for a wiring board according to a first embodiment of the present invention. [Figure 2] 1A to 1C are plan views illustrating a manufacturing process of the wiring board according to the first embodiment of the present invention. [Figure 3] 1A to 1C are cross-sectional views (part 1) illustrating a manufacturing process of the wiring board according to the first embodiment of the present invention. [Figure 4] 5A to 5C are cross-sectional views (part 2) illustrating the manufacturing process of the wiring board according to the first embodiment of the present invention. [Figure 5] 10A to 10C are cross-sectional views (part 1) illustrating a manufacturing process of a wiring board according to a second embodiment of the present invention. [Figure 6] 10A to 10C are cross-sectional views (part 2) illustrating the manufacturing process of the wiring board according to the second embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0015] First Embodiment A first embodiment of the present invention will be described with reference to Figures 1 to 4. Figure 1 is a schematic cross-sectional view of a wiring board according to the first embodiment of the present invention.

[0016] 1(a), the wiring board has a wide wiring pattern 4c and other wiring patterns 4d formed on the upper and lower layers of a core substrate 1 such as an organic substrate, an interlayer insulating resin layer 6 covering the wide wiring pattern 4c and other patterns, via holes 7 formed in holes penetrating the interlayer insulating resin layer 6, a wiring pattern 8 on the outer layer of the interlayer insulating resin layer 6, and a surface insulating resin layer 9 covering the wiring pattern 8. The wiring board also has edge plating 4b connected to the wide wiring pattern 4c, such as a ground pattern or power supply pattern, formed over a large area of ​​the core substrate 1. As shown in FIG. 1(b), a heat sink 10 is fixed in contact with the edge plating 4b of the wiring board.

[0017] As a result, heat generated by the semiconductor integrated circuit is conducted to the heat sink 10 via the wide wiring pattern 4c and dissipated from the heat sink 10. This cooling mechanism has the effect of efficiently cooling the semiconductor integrated circuit that is generating heat.

[0018] The end surface plating 4b of the wiring board can be formed on the four sides of the wiring board, and heat sinks 10 insulated from each other can be placed on the four sides of the wiring board, or the heat sink 10 can be placed on only one side of the wiring board.

[0019] (Method of manufacturing a wiring board) This wiring board is manufactured through the steps described with reference to the plan view of FIG. 2 and the cross-sectional views of FIGS.

[0020] (Process 1) First, as shown in the plan view of FIG. 2 and the cross-sectional view of FIG. 3(a), through holes 2 are formed in a resin core substrate 1 by drilling, and slits 3 are formed along the outline of the wiring board by NC router processing.

[0021] (Process 2) Next, as shown in the cross-sectional view of Figure 3(b), a copper electroplated film 4 is formed on the surface of the core substrate 1, the wall surfaces of the through holes 2, and the wall surfaces of the slits 3. The electroplated film 4 forms through-hole plating 4a on the wall surfaces of the through holes 2, and edge plating 4b on the wall surfaces of the slits 3.

[0022] (Step 3) Next, as shown in FIG. 3(c), a hole filling material 5 is filled into the through hole 2 where the through-hole plating 4a has been formed.

[0023] (Step 4) 3(d), wide wiring patterns 4c and other wiring patterns 4d are formed by patterning and etching the copper electroplating film on the front and back surfaces of the core substrate 1. During this patterning, the wide wiring patterns 4c, such as large-area ground patterns and power supply patterns, are formed by electrically connecting them to the edge plating 4b formed on the wall surfaces of the slits 3.

[0024] (Step 5) Next, as shown in FIG. 4(e), an interlayer insulating resin layer 6 is formed to cover the exposed surface of the core substrate 1, the wide wiring pattern 4c, the other wiring patterns 4d, and the hole filling material 5.

[0025] (Step 6) Next, holes are formed in the interlayer insulating resin layer 6 so as to reach the wide wiring pattern 4c.

[0026] (Step 7) Next, as shown in Figure 4(f), copper electroplating is formed on the hole and the entire surface of the interlayer insulating resin layer 6, and the electroplating layer is etched to form an outer layer wiring pattern 8 that is electrically connected to the wide wiring pattern 4c through the via hole 7.

[0027] (Step 8) Next, as shown in FIG. 4(g), a pattern of a surface insulating resin layer 9 is formed to cover the exposed surface of the interlayer insulating resin layer 6 of the wiring board and the wiring pattern 8.

[0028] (Step 9) This wiring board is separated from the end piece at the slit 3 in the core substrate 1 shown in the plan view of Figure 2, thereby completing the wiring board of Figure 1(a) with the end surface plating 4b portion of the slit 3 as the outer edge.

[0029] (Step 10) 1(b), a first heat sink 10a is fixed in contact with a first edge plating 4b1 at the outer edge of the wiring board shown in Fig. 1(a). Also, a second heat sink 10b is fixed in contact with a second edge plating 4b2 at a different potential from the first edge plating 4b1.

[0030] A plurality of heat sinks 10 (a first heat sink 10a and a second heat sink 10b) that are not electrically connected to each other By connecting the heat sink 10b to the edge plating 4b of different potentials (first edge plating 4b1 and second edge plating 4b2), the wide wiring pattern 4c of different potentials is electrically connected to the electrically isolated heat sink 10 of different potentials.

[0031] It is desirable that the heat sink 10 connected to the wide wiring pattern 4c at the ground potential is also connected to the ground of a housing (not shown) in which the wiring board is installed.

[0032] Heat generated by the semiconductor integrated circuit mounted on the wiring board is conducted to the wide wiring pattern 4c of the wiring board. The heat is then conducted to the heat sink 10, which is in contact with the edge plating 4b electrically connected to the wide wiring pattern 4c, and is cooled by the heat sink 10. This cooling mechanism has the effect of efficiently cooling the semiconductor integrated circuit that is generating heat.

[0033] In addition, another heat sink is brought into contact with the semiconductor integrated circuit (not shown) to cool the semiconductor integrated circuit. Furthermore, the wiring pattern 8 is exposed on the surface of the wiring board and brought into contact with the heat sink to cool the semiconductor integrated circuit via the wiring pattern 8.

[0034] <Second embodiment> A second embodiment of the present invention will be described with reference to the cross-sectional views of Figures 5 and 6. As shown in Figure 6(h), the wiring board has a substrate on which a wide wiring pattern 22 of a first potential, a wide wiring pattern 23 of a second potential, and other wiring patterns 24 are formed on upper and lower layers of a core substrate 1 such as an organic substrate, and an interlayer insulating resin layer 25 covering these wiring patterns is laminated, and has an electroplated film 27 formed on the wall surface of a through hole 26 penetrating the substrate, a wiring pattern 28 on the outer layer of the interlayer insulating resin layer 25, and a surface insulating resin layer 29 covering the wiring pattern 28.

[0035] The metal layers of the wide wiring pattern 22 of the first potential and the wide wiring pattern 23 of the second potential, such as a ground pattern or a power supply pattern formed over a wide area, are exposed at the end surface of the wiring board.

[0036] 6(i), an upper-layer heat sink 10c is brought into contact with the metal layer of a wide wiring pattern 22 of a first potential exposed on the end surface of the wiring board, and a lower-layer heat sink 10d is brought into contact with the metal layer of a wide wiring pattern 23 of a second potential. The upper-layer heat sink 10c and the lower-layer heat sink 10d are insulated and bonded together by a heat sink insulating material 11 to form an integrated heat sink 10.

[0037] Since the upper heat sink 10c and the lower heat sink 10d are insulated and electrically separated, there is an effect that the wide wiring pattern 22 of a first potential that the upper heat sink 10c contacts and the wide wiring pattern 23 of a second potential that the lower heat sink 10d, which has a different potential, contacts can be used while being electrically separated.

[0038] With this structure, heat generated by the semiconductor integrated circuit is thermally conducted to the heat sink 10 via two wide wiring patterns with different potentials, namely, the wide wiring pattern 22 with a first potential and the wide wiring pattern 23 with a second potential, and is then dissipated from the heat sink 10. This cooling mechanism, which conducts thermoelectric power to the heat sink 10 via a plurality of wide wiring patterns with different potentials to cool the semiconductor integrated circuit, has the effect of efficiently cooling the semiconductor integrated circuit that is generating heat.

[0039] The semiconductor integrated circuit (not shown) is cooled by contacting another heat sink with the wiring pattern 28 exposed on the surface of the wiring board and contacting the heat sink, thereby cooling the semiconductor integrated circuit via the wiring pattern 28.

[0040] (Method of manufacturing a wiring board) This wiring board is manufactured through the steps described with reference to the cross-sectional views of FIGS. (Process 1) First, as shown in FIG. 5(a), a substrate is prepared in which metal layers 21 are formed on both sides of a resin core substrate 1.

[0041] Next, as shown in FIG. 5(b), the metal layer 21 is patterned and etched to form a wide wiring pattern 22 of a first potential, a wide wiring pattern 23 of a second potential, and other wiring patterns 24.

[0042] (Process 2) Next, as shown in FIG. 5(c), interlayer insulating resin layers 25 are laminated on both sides of the core substrate 1.

[0043] (Step 3) Next, as shown in FIG. 5(d), the substrate is drilled to form through-holes 26.

[0044] (Step 4) Next, as shown in FIG. 5(e), an electroplated copper film 27 is formed on the surface of the substrate and the wall surfaces of the through-holes .

[0045] (Step 5) Next, as shown in FIG. 6(f), the copper electroplated film on the front and back surfaces of the substrate is patterned and etched to form a wiring pattern 28.

[0046] (Step 6) Next, as shown in FIG. 6(g), a pattern of a surface insulating resin layer 29 is formed to cover the exposed surface of the interlayer insulating resin layer 25 of the substrate and the wiring pattern .

[0047] (Step 7) Next, by cutting the substrate at the cutting portion 30 in Figure 6(g), a wiring substrate is completed in which the cross sections of the metal layers of the wide wiring pattern 22 of the first potential and the wide wiring pattern 23 of the second potential are exposed at the edge surfaces of the substrate's outer shape, as shown in Figure 6(h).

[0048] (Step 10) 6(i), the heat sink 10, in which the upper-layer heat sink 10c and the lower-layer heat sink 10d are bonded together and insulated by the heat sink insulating material 11, is brought into contact with the cross sections of the metal layers of the first-potential wide wiring pattern 22 and the second-potential wide wiring pattern 23 exposed at the outer edge surface of the wiring board 10 and fixed in place. The upper-layer heat sink 10c and the lower-layer heat sink 10d, which are not electrically connected, are connected to the first-potential wide wiring pattern 22 and the second-potential wide wiring pattern 23, which are at different potentials. This allows the first-potential wide wiring pattern 22 and the second-potential wide wiring pattern 23, which are at different potentials, to be connected to the heat sink 10.

[0049] Heat generated by a semiconductor integrated circuit mounted on the wiring board is thermally conducted to the wide wiring pattern 22 of the first potential and the wide wiring pattern 23 of the second potential on the wiring board. The heat is then conducted to the upper-layer heat sink 10c and the lower-layer heat sink 10d electrically connected to them, and is cooled by the heat sink 10. This cooling mechanism has the effect of efficiently cooling the semiconductor integrated circuit generating heat via the wide wiring patterns of multiple different potentials.

[0050] In the above embodiment, the heat sink 10 is in contact with the metal layer at the end of the wide wiring pattern exposed on the end surface of the wiring board, but the heat sink 10 and the metal layer at the end of the wide wiring pattern can also be joined with solder or a conductive paste such as silver paste. Also, the heat sink 10 can be thermally connected to the metal layer at the end of the wide wiring pattern exposed on the end surface of the wiring board via grease with high thermal conductivity.

[0051] The heat sink 10 can be attached to all four end faces of the wiring board, or it can be attached to only one end face of the wiring board. [Explanation of symbols]

[0052] 1. Core substrate 2. Through hole 3. End face through hole 4. Electroplated film 4a···Through hole 4b, 4b1, 4b2...End face plating pattern 4c Wide heat dissipation pattern 4d...Other wiring patterns 5. Filling material (for heat dissipation through holes) 6. Interlayer insulating resin layer 7. Beer Hall 8 (mounting) pad 9. Solder resist layer 10a, 10b Heat sink 10c···Upper heat sink 10d Lower heat sink 11. Heat sink insulation material 22....First potential wide wiring pattern 23... Wide wiring pattern of second potential 24 Other wiring patterns 25...Interlayer insulating resin layer 26...Through hole 27. Electroplated Film 28. Wiring pattern 29. Surface insulating resin layer

Claims

1. A cooling structure for a wiring substrate on which a semiconductor integrated circuit is mounted, A wide wiring pattern formed on the surface of a core substrate of the wiring board, Each potential of the wide wiring pattern is connected to a metal layer formed across the thickness direction of the end surface of the core substrate, A cooling structure for a wiring board, characterized in that the metal layer is connected to a heat sink of a different potential for each potential of the wide wiring pattern, thereby dissipating heat generated by a semiconductor integrated circuit mounted on the wiring board from the heat sink.

2. A cooling structure for a wiring board according to claim 1, a heat sink that can be brought into contact with the semiconductor integrated circuit and a heat sink that can be brought into contact with the wiring pattern on the surface of the wiring substrate; A cooling structure for a wiring board.

3. A method for manufacturing a cooling structure for a wiring board according to claim 1, comprising: a first step of forming a slit penetrating the core substrate at a position along the outline of the wiring board; a second step of forming a metal layer on the surface of the core substrate and on the wall surfaces of the slits; a third step of patterning the metal layer on the surface of the core substrate to form the wide wiring pattern; a fourth step of electrically connecting the wide wiring pattern and the metal layer on the wall surface of the slit; a fifth step of cutting the wiring board into pieces having a shape including the slits of the core board on an end surface thereof; A method for manufacturing a cooling structure for a wiring board comprising:

4. A method for manufacturing a cooling structure for a wiring board according to claim 3, comprising: forming an interlayer insulating layer covering the wide wiring pattern after the third step; forming a via hole in the interlayer insulating layer that reaches the wide wiring pattern; a step of forming an outer layer wiring pattern electrically connected to the wide wiring pattern through the via hole; A method for manufacturing a cooling structure for a wiring board comprising:

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