Overcurrent protection circuit, semiconductor device, electronic device, vehicle

Abstract

To provide a high-precision overcurrent protection circuit.SOLUTION: An overcurrent protection circuit 34 includes: a first transistor M1 and a second transistor M2 configured to form an amplifier input stage that receives an input of a detection signal Vs according to a monitoring target current IOUT; and a third transistor M3 configured to form an amplifier output stage that generates a current output signal Ic according to a difference between the detection signal Vs and a reference signal Vref and causes the current output signal Ic to be negatively fed back to the amplifier input stage. The monitoring target current IOUT is limited on the basis of the current output signal Ic output from the third transistor M3.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The invention disclosed in this specification relates to an overcurrent protection circuit, and a semiconductor device, electronic device, and vehicle using the same. [Background technology]

[0002] The applicant of the present application has proposed many new technologies relating to semiconductor devices such as in-vehicle IPDs (intelligent power devices) (see, for example, Patent Document 1).

[0003] Furthermore, for example, Patent Documents 2 and 3 can be cited as examples of related art of overcurrent protection circuits incorporated into semiconductor devices. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2017 / 187785 [Patent Document 2] U.S. Patent No. 9,787,180 [Patent Document 3] U.S. Patent No. 9,966,943 Summary of the Invention [Problem to be solved by the invention]

[0005] However, conventional overcurrent protection circuits have room for improvement in terms of detection accuracy.

[0006] In particular, in recent years, automotive ICs have been required to comply with ISO26262 (an international standard for functional safety related to electrical and electronic components in automobiles), making it important for automotive IPDs to be designed with higher reliability.

[0007] In view of the above-mentioned problems discovered by the inventors of the present application, the invention disclosed in this specification aims to provide a highly accurate overcurrent protection circuit, and a semiconductor device, electronic device, and vehicle using the same. [Means for solving the problem]

[0008] For example, the overcurrent protection circuit disclosed in this specification includes a first transistor and a second transistor configured to form an amplifier input stage that receives an input of a detection signal corresponding to a current to be monitored, and a third transistor configured to form an amplifier output stage that generates a current output signal corresponding to the difference between the detection signal and a reference signal and negatively feeds the current output signal back to the amplifier input stage, and limits the current to be monitored based on the current output signal output from the third transistor.

[0009] Still other features, elements, steps, advantages, and characteristics will become more apparent from the detailed description that follows and the accompanying drawings related thereto. [Effects of the Invention]

[0010] According to the invention disclosed in this specification, it is possible to provide a highly accurate overcurrent protection circuit, and a semiconductor device, electronic device, and vehicle using the same. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of an electronic device equipped with a semiconductor device. [Figure 2] FIG. 2 is a block circuit diagram showing the electrical structure of the semiconductor device. [Figure 3] FIG. 3 is a diagram showing a first embodiment of an overcurrent protection circuit. [Figure 4] FIG. 4 is a diagram showing a second embodiment of the overcurrent protection circuit. [Figure 5] FIG. 5 is an external view showing an example of the configuration of a vehicle. DETAILED DESCRIPTION OF THE INVENTION

[0012] <Electronic equipment> 1 is a diagram showing an example of the configuration of an electronic device including a semiconductor device. The electronic device A of this configuration example includes a semiconductor device 1, a DC power supply 2, and a load 3.

[0013] The semiconductor device 1 is a high-side switch IC (a type of IPD) that connects / disconnects a DC power supply 2 and a load 3, and is composed of an integrated power MISFET (metal insulator semiconductor field effect transistor) 9 and a control IC (integrated circuit) 10.

[0014] The semiconductor device 1 also includes a plurality of external electrodes as means for establishing electrical connection with the outside of the device. Referring to the figure, the semiconductor device 1 includes a drain electrode 11 (corresponding to a power supply electrode VBB), a source electrode 12 (corresponding to an output electrode OUT), and a reference voltage electrode 14 (corresponding to a ground electrode GND).

[0015] The power MISFET 9 is an example of an insulated gate power transistor (=output transistor), and functions as a high-side switch element that connects / disconnects the drain electrode 11 and the source electrode 12.

[0016] The control IC 10 includes a plurality of functional circuits for realizing various functions, including, for example, a circuit for generating a gate control signal VG for driving and controlling the power MISFET 9 based on an external electrical signal.

[0017] The drain electrode 11 transmits a power supply voltage VB to the drain of the power MISFET 9 and various circuits in the control IC 10. The source electrode 12 is connected to the source of the power MISFET 9 and transmits an output voltage VOUT and an output current IOUT to the load 3. Note that a signal line (e.g., a wire harness) laid between the source electrode 12 and the load 3 generally has an inductance component L (and a resistance component). The input electrode 13 transmits an input voltage (=input signal IN) for driving the control IC 10. The reference voltage electrode 14 transmits a reference voltage (e.g., ground voltage) to the control IC 10. Note that a resistance component R generally exists between the reference voltage electrode 14 and the ground terminal.

[0018] <Semiconductor device> Fig. 2 is a block circuit diagram showing the electrical structure of the semiconductor device 1 shown in Fig. 1. The following description will be given taking as an example a case where the semiconductor device 1 is mounted on a vehicle. When mounted on a vehicle, the semiconductor device 1 can be used as a high-side switch for controlling the supply of electricity to a light source such as a bulb lamp or an LED (light emitting diode) lamp, or to other types of electronic control devices.

[0019] The semiconductor device 1 includes a drain electrode 11 , a source electrode 12 , an input electrode 13 , a reference voltage electrode 14 , an enable electrode 15 , a sense electrode 16 , a gate control wiring 17 , a power MISFET 9 , and a control IC 10 .

[0020] The drain electrode 11 (=power supply electrode VBB) is connected to a DC power supply 2. The drain electrode 11 provides a power supply voltage VB to the power MISFET 9 and the control IC 10. The power supply voltage VB may be 10 V or more and 20 V or less. On the other hand, the source electrode 12 (=output electrode OUT) is connected to a load 3.

[0021] The input electrode 13 (=input electrode IN) may be connected to an MCU (micro controller unit), a DC / DC converter, an LDO (low drop out) regulator, etc. The input electrode 13 provides an input voltage to the control IC 10. The input voltage may be between 1 V and 10 V. The reference voltage electrode 14 is connected to a reference voltage wiring (ground terminal). The reference voltage electrode 14 provides a reference voltage to the power MISFET 9 and the control IC 10.

[0022] The enable electrode 15 may be connected to an MCU. An electrical signal for enabling or disabling some or all of the functions of the control IC 10 is input to the enable electrode 15. The sense electrode 16 transmits an electrical signal for detecting an abnormality in the control IC 10 to an external device. The sense electrode 16 may be pulled up or down by a resistor.

[0023] The gate of the power MISFET 9 is connected to a control IC 10 (a gate control circuit 25 described later) via a gate control wiring 17. The drain of the power MISFET 9 is connected to a drain electrode 11. The source of the power MISFET 9 is connected to the control IC 10 (a current detection circuit 27 described later) and a source electrode 12.

[0024] The control IC 10 includes a sensor MISFET 21 , an input circuit 22 , a current / voltage control circuit 23 , a protection circuit 24 , a gate control circuit 25 , an active clamp circuit 26 , a current detection circuit 27 , a power supply reverse connection protection circuit 28 , and an abnormality detection circuit 29 .

[0025] The gate of the sensor MISFET 21 is connected to the gate control circuit 25. The drain of the sensor MISFET 21 is connected to the drain electrode 11. The source of the sensor MISFET 21 is connected to the current detection circuit 27.

[0026] The input circuit 22 is connected to the input electrode 13 and the current / voltage control circuit 23. The input circuit 22 may include a Schmitt trigger circuit. The input circuit 22 shapes the waveform of the electrical signal applied to the input electrode 13. The signal generated by the input circuit 22 is input to the current / voltage control circuit 23.

[0027] The current / voltage control circuit 23 is connected to the protection circuit 24, the gate control circuit 25, the power supply reverse connection protection circuit 28, and the abnormality detection circuit 29. The current / voltage control circuit 23 may include a logic circuit.

[0028] The current / voltage control circuit 23 generates various voltages in response to the electrical signals from the input circuit 22 and the protection circuit 24. In this embodiment, the current / voltage control circuit 23 includes a drive voltage generation circuit 30, a first constant voltage generation circuit 31, a second constant voltage generation circuit 32, and a reference voltage / reference current generation circuit 33.

[0029] The drive voltage generation circuit 30 generates a drive voltage for driving the gate control circuit 25. The drive voltage may be set to a value obtained by subtracting a predetermined value from the power supply voltage VB. The drive voltage generation circuit 30 may generate a drive voltage between 5V and 15V, which is obtained by subtracting 5V from the power supply voltage VB. The drive voltage is input to the gate control circuit 25.

[0030] The first constant voltage generating circuit 31 generates a first constant voltage for driving the protection circuit 24. The first constant voltage generating circuit 31 may include a Zener diode or a regulator circuit (here, a Zener diode). The first constant voltage may be equal to or greater than 1 V and equal to or less than 5 V. The first constant voltage is input to the protection circuit 24 (more specifically, to the open load detection circuit 35, etc., which will be described later).

[0031] The second constant voltage generating circuit 32 generates a second constant voltage for driving the protection circuit 24. The second constant voltage generating circuit 32 may include a Zener diode or a regulator circuit (here, a regulator circuit). The second constant voltage may be equal to or greater than 1 V and equal to or less than 5 V. The second constant voltage is input to the protection circuit 24 (more specifically, an overheat protection circuit 36 ​​and an undervoltage lockout circuit 37, which will be described later).

[0032] The reference voltage / reference current generating circuit 33 generates a reference voltage and a reference current for various circuits. The reference voltage may be 1 V or more and 5 V or less. The reference current may be 1 mA or more and 1 A or less. The reference voltage and the reference current are input to the various circuits. If the various circuits include a comparator, the reference voltage and the reference current may be input to the comparator.

[0033] The protection circuit 24 is connected to the current / voltage control circuit 23, the gate control circuit 25, the abnormality detection circuit 29, the source of the power MISFET 9, and the source of the sensor MISFET 21. The protection circuit 24 includes an overcurrent protection circuit 34, an open load detection circuit 35, an overheat protection circuit 36, and an undervoltage malfunction suppression circuit 37.

[0034] The overcurrent protection circuit 34 protects the power MISFET 9 from an overcurrent. The overcurrent protection circuit 34 is connected to the gate control circuit 25 and the source of the sensor MISFET 21. The overcurrent protection circuit 34 may include a current monitor circuit. A signal generated by the overcurrent protection circuit 34 is input to the gate control circuit 25 (more specifically, to a drive signal output circuit 40, which will be described later).

[0035] The open load detection circuit 35 detects a short state and an open state of the power MISFET 9. The open load detection circuit 35 is connected to the current / voltage control circuit 23 and the source of the power MISFET 9. A signal generated by the open load detection circuit 35 is input to the current / voltage control circuit 23.

[0036] The overheat protection circuit 36 ​​monitors the temperature of the power MISFET 9 and protects the power MISFET 9 from an excessive temperature rise. The overheat protection circuit 36 ​​is connected to the current / voltage control circuit 23. The overheat protection circuit 36 ​​may include a temperature-sensing device such as a temperature-sensing diode or a thermistor. A signal generated by the overheat protection circuit 36 ​​is input to the current / voltage control circuit 23.

[0037] The low voltage malfunction suppression circuit 37 suppresses malfunction of the power MISFET 9 when the power supply voltage VB is less than a predetermined value. The low voltage malfunction suppression circuit 37 is connected to the current / voltage control circuit 23. A signal generated by the low voltage malfunction suppression circuit 37 is input to the current / voltage control circuit 23.

[0038] The gate control circuit 25 controls the on and off states of the power MISFET 9 and the on and off states of the sensor MISFET 21. The gate control circuit 25 is connected to the current / voltage control circuit 23, the protection circuit 24, the gate of the power MISFET 9, and the gate of the sensor MISFET 21.

[0039] The gate control circuit 25 outputs a gate control signal VG to the gate control wiring 17 in response to an electrical signal from the current / voltage control circuit 23 and an electrical signal from the protection circuit 24. The gate control signal VG is input to the gate of the power MISFET 9 and the gate of the sensor MISFET 21 via the gate control wiring 17. Specifically, the gate control circuit 25 controls the gate control signal VG in response to an electrical signal (input signal) applied to the input electrode 13 to turn the power MISFET 9 on / off.

[0040] More specifically, the gate control circuit 25 includes an oscillation circuit 38, a charge pump circuit 39, and a drive signal output circuit 40. The oscillation circuit 38 oscillates in response to an electrical signal from the current / voltage control circuit 23, and generates a predetermined electrical signal. The electrical signal generated by the oscillation circuit 38 is input to the charge pump circuit 39. The charge pump circuit 39 generates a boost voltage VCP based on the electrical signal from the oscillation circuit 38. The boost voltage VCP generated by the charge pump circuit 39 is input to the drive signal output circuit 40.

[0041] The drive signal output circuit 40 operates by receiving the boosted voltage VCP output from the charge pump circuit 39, and generates a gate control signal VG in response to an electrical signal from the protection circuit 24 (more specifically, the overcurrent protection circuit 34). The gate control signal VG is input to the gate of the power MISFET 9 and the gate of the sensor MISFET 21 via gate control wiring 17. The sensor MISFET 21 and the power MISFET 9 are simultaneously controlled by a gate control circuit 25.

[0042] The active clamp circuit 26 protects the power MISFET 9 from back electromotive force. The active clamp circuit 26 is connected to the drain electrode 11, the gate of the power MISFET 9, and the gate of the sensor MISFET 21. The active clamp circuit 26 may include a plurality of diodes.

[0043] The active clamp circuit 26 may include a plurality of diodes connected together in a forward bias. The active clamp circuit 26 may include a plurality of diodes connected together in a reverse bias. The active clamp circuit 26 may include a plurality of diodes connected together in a forward bias and a plurality of diodes connected together in a reverse bias.

[0044] The multiple diodes may include p-n junction diodes, Zener diodes, or a combination of p-n junction diodes and Zener diodes. The active clamp circuit 26 may include multiple Zener diodes connected to each other in a biased manner. The active clamp circuit 26 may include a Zener diode and a p-n junction diode connected to each other in a reverse biased manner.

[0045] The current detection circuit 27 detects the currents flowing through the power MISFET 9 and the sensor MISFET 21. The current detection circuit 27 is connected to the protection circuit 24, the abnormality detection circuit 29, the source of the power MISFET 9, and the source of the sensor MISFET 21. The current detection circuit 27 generates a current detection signal in response to the electrical signal (=output current IOUT) generated by the power MISFET 9 and the electrical signal (=sense current exhibiting the same behavior as the output current IOUT) generated by the sensor MISFET 21. The current detection signal is input to the abnormality detection circuit 29.

[0046] The power supply reverse connection protection circuit 28 protects the current / voltage control circuit 23, the power MISFET 9, etc. from reverse voltage when the DC power supply 2 is reverse connected. The power supply reverse connection protection circuit 28 is connected to the reference voltage electrode 14 and the current / voltage control circuit 23.

[0047] Abnormality detection circuit 29 monitors the voltage of protection circuit 24. Abnormality detection circuit 29 is connected to current / voltage control circuit 23, protection circuit 24, and current detection circuit 27. If an abnormality (such as a voltage fluctuation) occurs in any of overcurrent protection circuit 34, open load detection circuit 35, overheat protection circuit 36, and low voltage malfunction suppression circuit 37, abnormality detection circuit 29 generates an abnormality detection signal corresponding to the voltage of protection circuit 24 and outputs it to the outside.

[0048] More specifically, the abnormality detection circuit 29 includes a first multiplexer circuit 41 and a second multiplexer circuit 42. The first multiplexer circuit 41 includes two input sections, one output section, and one selection control input section. The protection circuit 24 and the current detection circuit 27 are connected to the input sections of the first multiplexer circuit 41. The second multiplexer circuit 42 is connected to the output section of the first multiplexer circuit 41. The current / voltage control circuit 23 is connected to the selection control input section of the first multiplexer circuit 41.

[0049] The first multiplexer circuit 41 generates an abnormality detection signal in response to the electrical signal from the current / voltage control circuit 23, the voltage detection signal from the protection circuit 24, and the current detection signal from the current detection circuit 27. The abnormality detection signal generated by the first multiplexer circuit 41 is input to the second multiplexer circuit 42.

[0050] The second multiplexer circuit 42 includes two inputs and one output. The inputs of the second multiplexer circuit 42 are connected to the output of the second multiplexer circuit 42 and the enable electrode 15. The output of the second multiplexer circuit 42 is connected to the sense electrode 16.

[0051] When an MCU is connected to enable electrode 15 and a pull-up or pull-down resistor is connected to sense electrode 16, an ON signal is input from the MCU to enable electrode 15, and an abnormality detection signal is extracted from sense electrode 16. The abnormality detection signal is converted into an electrical signal by the resistor connected to sense electrode 16. An abnormal state of semiconductor device 1 is detected based on this electrical signal.

[0052] <Considerations on overcurrent detection accuracy> The semiconductor device 1 described above is an electronic circuit for controlling the power supply to a load, and is equipped with an intelligent protection function inside the device. For example, the output current IOUT supplied to the load 3 is limited to an upper limit value or less by an overcurrent protection circuit 34.

[0053] As the number of electrical or electronic loads installed in a vehicle increases, the need for in-vehicle IPDs with lower on-resistance increases to reduce their power consumption and improve overall vehicle efficiency. As a result, as the nominal amperage of the load increases, the need for more accurate overcurrent detection and more advanced overcurrent protection also increases.

[0054] However, almost all overcurrent protection circuits monolithically implemented in typical automotive IPDs use a current limit comparator. In a current limit comparator, the upper limit (limit threshold) of overcurrent is internally defined based on the base-emitter voltage difference ΔVbe of a bipolar transistor or the gate-source voltage difference ΔVgs of a MOS transistor. Therefore, the accuracy of overcurrent detection is not necessarily high (less than ±30%).

[0055] In the following, in consideration of the above considerations, a first embodiment of the overcurrent protection circuit 34 that can detect and limit overcurrent with high accuracy will be proposed.

[0056] <Overcurrent Protection Circuit (First Embodiment)> 3 is a diagram showing a first embodiment of an overcurrent protection circuit 34. The overcurrent protection circuit 34 of the first embodiment is a type of abnormality protection circuit that monitors an output current IOUT flowing through a power MISFET 9 (corresponding to an output transistor) and limits the output current IOUT to a predetermined upper limit or less, and includes transistors M1 to M7 (in this diagram, transistors M1 to M3, M6, and M7 are N-channel MISFETs, and transistors M4 and M5 are P-channel MISFETs), current sources CS1 to CS3, and resistors R1 and R2.

[0057] A first terminal of each of the current sources CS1 and CS2 is connected to a terminal to which the boost voltage VCP is applied. A second terminal of the current source CS1 and the drain of the transistor M1 are connected to the gate of the transistor M3. A second terminal of the current source CS2 and the drain of the transistor M2 are connected to the gates of the transistors M1 and M2.

[0058] The source of the transistor M1 and a first terminal of the resistor R1 are connected to the source of the sensor MISFET 21. The first terminal of the resistor R1 corresponds to the application terminal of the detection signal Vs. The sources of the transistors M2 and M3 are connected to the first terminal of the resistor R2. The first terminal of the resistor R2 corresponds to the application terminal of the reference signal Vref. The second terminals of the resistors R1 and R2 are connected to the application terminal (=source electrode 12) of the output voltage VOUT.

[0059] The sources of the transistors M4 and M5 are connected to the application terminal of the boost voltage VCP. The gates of the transistors M4 and M5 are connected to the drain of the transistor M4. The drain of the transistor M4 is connected to the drain of the transistor M3. The drain of the transistor M3 corresponds to the output terminal of the current output signal Ic.

[0060] The sources of the transistors M6 and M7 are connected to the application terminal of the output voltage VOUT. The gates of the transistors M6 and M7 are connected to the drain of the transistor M6. The drain of the transistor M6 is connected to the drain of the transistor M5. The drain of the transistor M6 corresponds to the output terminal of the mirror current Im.

[0061] A first terminal of the current source CS3 is connected to a terminal to which the boost voltage VCP is applied, and a second terminal of the current source CS3 and the drain of the transistor M7 are connected to a terminal to which the gate control signal VG is applied (=the gate of the power MISFET 9).

[0062] Among the above components, transistors M1 and M2 correspond to first and second transistors configured to form, together with current sources CS1 and CS2, the input stage of a current output amplifier AMP, which operates as a one-stage OTA (operational transconductance amplifier) ​​with an appropriate common-mode input voltage range via its source-connected input.

[0063] The transistor M1 receives an input of a detection signal Vs corresponding to the output current I. Referring to the figure, a detection signal Vs (=(Is+Ig)×R1) corresponding to the sense current Is (=IOUT / N, where N>1) flowing through the sensor MISFET 21 is applied to the source of the transistor M1.

[0064] The transistor M2 generates a gate bias for the transistor M1 to appropriately compensate for the Vgs offset of the transistor M1. Referring to this figure, a reference signal Vref (=Ig×R2) is applied to the source of the transistor M2.

[0065] The transistor M3 corresponds to a third transistor configured to form the output stage of the current output amplifier AMP. Referring to this figure, the output stage of the current output amplifier AMP generates a current output signal Ic corresponding to the difference between the detection signal Vs and the reference signal Vref, and negatively feeds the current output signal Ic back to the input stage of the current output amplifier AMP. Providing such a negative feedback path improves the matching between the transistors M1 and M2 that form the input stage of the current output amplifier AMP.

[0066] The current output signal Ic starts to flow when the detection signal Vs becomes equal to the reference signal Vref, that is, when the following equation (1) is established.

[0067] {(IOUT / N)+Ig}*R1 = Ig*R2 … (1)

[0068] The current output signal Ic flowing at this time is expressed by the following equation (2).

[0069] Ic = (IOUT / N)*(R1 / R2)-Ig … (2)

[0070] As can be seen from the above equation (2), the current output signal Ic contains detection information of the output current IOUT.

[0071] The current source CS1 corresponds to a first current source that is connected between the application terminal (corresponding to the first potential node) of the boosted voltage VCP and the drain of the transistor M1 and is configured to generate a predetermined reference current Ig.

[0072] The current source CS2 corresponds to a second current source that is connected between the application terminal of the boost voltage VCP and the drain of the transistor M2 and is configured to generate a predetermined reference current Ig.

[0073] The resistor R1 corresponds to a first resistor that is configured to be connected between the source of the transistor M1 and the application terminal (corresponding to the second potential node) of the output voltage VOUT. The resistor R1 can also be understood as a sense resistor that converts the sense current Is (=current signal) into a detection signal Vs (=voltage signal).

[0074] The resistor R2 corresponds to a second resistor configured to be connected between the source of the transistor M2 and the application terminal of the output voltage VOUT.

[0075] The transistors M4 and M5 correspond to a current mirror CM1 that generates a mirror current Im (=P×Ic) by replicating the current output signal Ic output from the drain of the transistor M3 at a predetermined mirror ratio P (where P≧1).

[0076] The transistors M6 and M7 correspond to a current mirror CM2 that generates a current limit signal Ilmt (=M×Im) by replicating the mirror current Im output from the drain of the transistor M5 at a predetermined mirror ratio M (where M≧1).

[0077] That is, the transistors M4 to M7 have the roles of a current mirror and a current gain.

[0078] The current source CS3 corresponds to a third current source that is connected between the application terminal of the boost voltage VCP and the application terminal of the gate control signal VG (=the gate of the power MISFET 9) and is configured to generate a gate charge signal Ichg (=K×Ig, where K≧1) for turning on the power MISFET 9. Note that the current source CS3 can also be understood as a component of the gate control circuit 25, rather than a component of the overcurrent protection circuit 34.

[0079] The current limiting signal Ilmt is a current signal that flows from the node to which the gate control signal VG is applied via the transistor M7 to the node to which the output voltage VOUT is applied. Therefore, when the current limiting signal Ilmt flows, the gate control signal VG is pulled down. As a result, the on-resistance of the power MISFET 9 is increased, thereby limiting the output current IOUT.

[0080] In this way, the overcurrent protection circuit 34 of this embodiment limits the output current IOUT by controlling the gate control signal VG of the power MISFET 9 based on the current limit signal Ilmt (and therefore the current output signal Ic).

[0081] In particular, in the overcurrent protection circuit 34 of this embodiment, the input stage that receives the detection result of the output current I operates as an operational amplifier (more specifically, an OTA) rather than a comparator, which improves the detection accuracy of the output current I compared to a configuration that uses a comparator.

[0082] Furthermore, since a local negative feedback path is established using the transistor M3, the matching of the input pair (=transistors M1 and M2) is improved, improving the characteristics of the entire circuit.

[0083] In the overcurrent protection circuit 34 of this embodiment, the limit on the output current IOUT is achieved when the following equation (3) is satisfied.

[0084] Ilmt = Ichg ⇔ P*M*Ic = K*Ig ⇔ IOUT = {(K+M*P) / (M*P)}*N*(R2 / R1)*Ig … (3)

[0085] Here, the reference signal Vref (corresponding to the threshold of the detection signal Vs at which the current output signal Ic starts to flow) used as the threshold for overcurrent limiting is generated using the reference current Ig used to generate the gate charge signal Ichg, thereby enabling highly accurate output current limiting.

[0086] In the overcurrent protection circuit 34 of this embodiment, MISFETs are used as the transistors M1 and M2 that form the input stage of the current output amplifier AMP, but the transistors M1 and M2 may be replaced with bipolar transistors, for example.

[0087] Furthermore, the current output amplifier AMP is not limited to a one-stage OTA, and other types of regulation operational amplifiers may be used. Also, the topology for detecting and adjusting the output current IOUT is not limited to the above-mentioned circuit configuration.

[0088] <Considerations on inrush current control and short circuit robustness> Some common loads used today in automobiles and elsewhere exhibit capacitive behavior (e.g., light bulbs), while others are specifically designed to draw large transient currents (so-called inrush currents) when capacitive storage devices are first activated (e.g., power supplies, airbags).

[0089] Such inrush currents must be handled correctly by the on-board IPD to avoid unnecessary overcurrent protection, which could prevent the load from starting up properly or even fail to start at all. For example, bulb lamps that may be connected as loads have thermal inertia and need to warm up before reaching their nominal current operation.

[0090] Also, for example, in an airbag system, a capacitive charge reservoir can draw a significant inrush current during start-up, and limiting this inrush current as an abnormal overcurrent could result in catastrophic failure of the airbag system.

[0091] However, the above-mentioned inrush current may exceed the maximum current capability of the automotive IPD in a steady state (for example, the maximum current capability for a short-circuit event defined in AEC-Q100-012). Therefore, the overcurrent protection circuit must allow the inrush current that flows during startup (or when the device is active), while also appropriately limiting the overcurrent when it occurs in a steady state.

[0092] In view of the above considerations, a second embodiment of the overcurrent protection circuit 34 will be proposed below, which is capable of detecting overcurrent with high accuracy while achieving both inrush current control and short-circuit robustness.

[0093] <Overcurrent Protection Circuit (Second Embodiment)> 4 is a diagram showing a second embodiment of the overcurrent protection circuit 34. The overcurrent protection circuit 34 of the second embodiment is based on the first embodiment (FIG. 3) and further includes an offset control unit OC. Therefore, the same reference numerals as in FIG. 3 are used to denote the components already mentioned, and redundant explanations will be omitted. The following description will focus on the characteristic features of the second embodiment.

[0094] The offset control unit OC is a circuit unit that controls an offset signal (details of which will be described later) that is added to the current limiting signal Ilmt, and includes current sources CS4 and CS5 and a switch SW.

[0095] The current source CS4 corresponds to a fourth current source that is connected between the application terminal of the boost voltage VCP and the drain of the transistor M5 and is configured to generate the upper offset current IH (=i×Ig).

[0096] The current source CS4 corresponds to a fifth current source that is connected between the drain of the transistor M5 and the application terminal of the output voltage VOUT and is configured to generate a lower offset current IL (=j×Ig).

[0097] The switch SW is connected in series with the current source CS4 between the application terminal of the boost voltage VCP and the transistor M5, and turns on / off the current path of the upper offset current IH.

[0098] In the overcurrent protection circuit 34 of this embodiment, when the switch SW is off, the limit on the output current IOUT is achieved when the following equation (4) is satisfied.

[0099] Ilmt = Ichg ⇔ M*(P*Ic-j*Ig) = K*Ig ⇔ IOUT = {(K+M*P+M*j) / (M*P)}*N*(R2 / R1)*Ig … (4)

[0100] Therefore, for example, if K=5M, P=5, and j=14, the output current IOUT is limited so that IOUT=(24 / 5)*N*(R2 / R1)*Ig holds.

[0101] On the other hand, when the switch SW is on, the limit on the output current IOUT is achieved when the following equation (5) is established.

[0102] Ilmt = Ichg ⇔ M*(P*Ic+i*Ig-j*Ig) = K*Ig ⇔ IOUT = [{K+M*P+M*(ji)} / (M*P)]*N*(R2 / R1)*Ig … (5)

[0103] Therefore, for example, if K=5M, P=5, i=12, and j=14, the output current IOUT is limited so that IOUT=(12 / 5)*N*(R2 / R1) holds.

[0104] That is, by controlling the on / off of the switch SW, the upper limit of the output current IOUT can be arbitrarily switched without affecting the detection accuracy of the entire overcurrent protection circuit 34. Therefore, it is possible to achieve both inrush current control and short-circuit robustness while detecting overcurrent with high accuracy.

[0105] For example, in accordance with the above numerical setting example, the upper limit value of the output current IOUT set when the switch SW is in the on state is reduced to half of the upper limit value of the output current IOUT set when the switch SW is in the off state.

[0106] Of course, the above-mentioned numerical setting example is merely an example, and it goes without saying that similar effects can be obtained by setting other numerical values. Furthermore, the upper offset current IH and the lower offset current IL are not limited to fixed values, and may be variable values ​​depending on, for example, the elapsed time after power-on or the drain-source voltage of the power MISFET 9.

[0107] The switch SW may be turned off for a predetermined fixed time (or any variable time) after starting to supply the output current IOUT to the capacitive load 3, and then turned on. By performing such on / off control, it is possible to both tolerate an inrush current during warm-up of a bulb lamp, for example, and limit an overcurrent in a steady state.

[0108] The inrush current flowing through the capacitive load 3 is transient, and the time period for which it should be tolerated is short (several tens of milliseconds after power-on). The upper limit of the output current IOUT, which is set when the switch SW is in the off state, may be set to an appropriate value taking into account the breakdown voltage of the power MISFET 9.

[0109] Furthermore, instead of the above-described timer control, the switch SW may be turned on / off in response to the detection result of the drain-source voltage of the power MISFET 9. Specifically, the switch SW may be turned on when the drain-source voltage of the power MISFET 9 is higher than a predetermined threshold voltage. Such on / off control can lower the upper limit of the output current IOUT when a ground fault of the source electrode 12 is suspected. Therefore, excessive short-circuit current is appropriately limited, thereby improving the safety of the semiconductor device 1.

[0110] Furthermore, the overcurrent protection circuit 34 of this embodiment does not require a complex architecture such as a memory circuit, and can achieve both inrush current control and short-circuit robustness with a relatively simple and low-cost circuit configuration.

[0111] <Application to vehicles> 5 is an external view showing an example of the configuration of a vehicle X. The vehicle X of this example is equipped with a battery (not shown in this figure) and various electronic devices X11 to X18 that operate by receiving power supply from the battery.

[0112] Vehicle X includes not only engine vehicles but also electric vehicles (battery electric vehicles (BEVs), hybrid electric vehicles (HEVs), plug-in hybrid electric vehicles (PHEVs / PHVs), or xEVs such as fuel cell electric vehicles (FCEVs / FCVs)).

[0113] It should be noted that the mounting positions of the electronic devices X11 to X18 in this figure may differ from the actual positions for the sake of convenience.

[0114] The electronic device X11 is an electronic control unit that performs engine-related controls (such as injection control, electronic throttle control, idling control, oxygen sensor heater control, and auto-cruise control) or motor-related controls (such as torque control and power regeneration control).

[0115] The electronic device X12 is a lamp control unit that controls the turning on and off of HID (high intensity discharged lamp) and DRL (daytime running lamp).

[0116] The electronic device X13 is a transmission control unit that controls transmission-related functions.

[0117] The electronic device X14 is a braking unit that performs control related to the movement of the vehicle X (ABS (anti-lock brake system) control, EPS (electric power steering) control, electronic suspension control, etc.).

[0118] The electronic device X15 is a security control unit that controls the operation of door locks, burglar alarms, and the like.

[0119] The electronic device X16 is an electronic device that is installed in the vehicle X at the time of shipment from the factory as a standard equipment or a manufacturer option, such as a wiper, an electric door mirror, a power window, a damper (shock absorber), an electric sunroof, and an electric seat.

[0120] The electronic device X17 is an electronic device that is optionally installed in the vehicle X as a user option, such as an in-vehicle A / V (audio / visual) device, a car navigation system, and an ETC (electronic toll collection system).

[0121] The electronic device X18 is an electronic device equipped with a high-voltage motor, such as an in-vehicle blower, oil pump, water pump, or battery cooling fan.

[0122] The electronic device A described above can be understood as any of the electronic devices X11 to X18. That is, the semiconductor device 1 described above can be incorporated into any of the electronic devices X11 to X18.

[0123] <Summary> The various embodiments described above will be generally described below.

[0124] For example, the overcurrent protection circuit disclosed in this specification includes a first transistor and a second transistor configured to form an amplifier input stage that receives an input of a detection signal corresponding to a current to be monitored, and a third transistor configured to form an amplifier output stage that generates a current output signal corresponding to the difference between the detection signal and a reference signal and negatively feeds the current output signal back to the amplifier input stage, and is configured (first configuration) to limit the current to be monitored based on the current output signal output from the third transistor.

[0125] In addition, in the overcurrent protection circuit according to the first configuration, the first main electrode of the first transistor may be connected to the control electrode of the third transistor, the first main electrode of the second transistor may be connected to the control electrodes of the first transistor and the second transistor, the first main electrode of the third transistor may be connected to the output node of the current output signal, the second main electrode of the first transistor may be connected to the application terminal of the detection signal, and the second main electrode of the second transistor may be connected to the second main electrode of the third transistor (second configuration).

[0126] In addition, the overcurrent protection circuit according to the second configuration may be configured (third configuration) further including a first current source connected between a first potential node and the first main electrode of the first transistor and configured to generate a reference current, and a second current source connected between the first potential node and the first main electrode of the second transistor and configured to generate the reference current.

[0127] In addition, the overcurrent protection circuit according to the second or third configuration may be configured (fourth configuration) further including a first resistor configured to be connected between the second main electrode of the first transistor and a second potential node, and a second resistor configured to be connected between the second main electrode of the second transistor and the second potential node.

[0128] Moreover, the overcurrent protection circuit according to any one of the first to fourth configurations may be configured (fifth configuration) to further include a current mirror configured to generate a current limiting signal by replicating the current output signal.

[0129] Moreover, the overcurrent protection circuit according to the fifth configuration may be configured (sixth configuration) to further include an offset control section configured to control an offset signal added to the current limiting signal.

[0130] Furthermore, for example, the semiconductor device disclosed in this specification is configured (seventh configuration) to include an output transistor and an overcurrent protection circuit having any of the first to sixth configurations, configured so that the output current flowing through the output transistor is the current to be monitored.

[0131] In addition, in the semiconductor device according to the seventh configuration, the overcurrent protection circuit may be configured (eighth configuration) to limit the output current by controlling a drive signal of the output transistor based on the current output signal.

[0132] Furthermore, for example, the electronic device disclosed in this specification has a configuration (ninth configuration) including a semiconductor device according to the seventh or eighth configuration.

[0133] Furthermore, for example, the vehicle disclosed in this specification is configured (tenth configuration) to include the electronic device according to the ninth configuration.

[0134] <Other variations> In addition to the above-described embodiments, the various technical features disclosed in this specification can be modified in various ways without departing from the spirit of the technical creation. For example, bipolar transistors can be substituted with MOS field-effect transistors, or the logic levels of various signals can be inverted. In other words, the above-described embodiments are illustrative in all respects and should not be considered limiting. The technical scope of the present invention is defined by the claims, and should be understood to include all modifications that fall within the meaning and scope of the claims. [Explanation of symbols]

[0135] 1. Semiconductor device (high-side switch IC) 2 DC power supply 3. Load 9 Power MISFET (output transistor) 10 Control IC 11 Drain electrode (power electrode) 12 Source electrode (output electrode) 13 Input electrode 14 Reference voltage electrode 15 Enable electrode 16 Sense electrode 17 Gate control wiring 21 Sensor MISFET 22 Input circuit 23 Current / Voltage Control Circuit 24 Protection circuit 25 Gate control circuit 26 Active clamp circuit 27 Current detection circuit 28 Power supply reverse connection protection circuit 29 Abnormality detection circuit 30 Drive voltage generation circuit 31 First constant voltage generating circuit 32 Second constant voltage generating circuit 33 Reference voltage and reference current generation circuit 34 Overcurrent protection circuit 35 Open load detection circuit 36 Overheat protection circuit 37 Undervoltage lockout circuit 38 Oscillator Circuit 39 Charge pump circuit 40 Drive signal output circuit 41 First multiplexer circuit 42 Second multiplexer circuit A Electronic equipment AMP Current output amplifier CM1, CM2 current mirror CS1~CS5 Current source L inductance component M1 to M3, M6, M7 transistors (N-channel MISFET) M4, M5 transistors (P-channel MISFET) OC offset control section R resistance component R1, R2 resistance SW switch X vehicle X11~X18 Electronic equipment

Claims

1. A first transistor configured such that a source or an emitter is connected to an application terminal of a detection signal corresponding to a monitored current; a second transistor having a source or an emitter connected to a reference signal application terminal and a drain or a collector and a gate or a base connected to the gate or the base of the first transistor; a third transistor having a gate or a base connected to the drain or a collector of the first transistor and a source or an emitter connected to the reference signal application terminal, configured to output a current output signal from the drain or the collector according to a difference between the detection signal and the reference signal; a first resistor configured to be connected between the source or emitter of the first transistor and a second potential node; a second resistor configured to be connected between the source or emitter of the second transistor and the second potential node; Equipped with an overcurrent protection circuit that limits the monitored current based on the current output signal output from the third transistor;

2. a first current source connected between a first potential node and the drain or collector of the first transistor and configured to generate a reference current; a second current source connected between the first potential node and the drain or collector of the second transistor and configured to generate the reference current; 10. The overcurrent protection circuit of claim 1, further comprising:

3. 3. The overcurrent protection circuit of claim 1, further comprising a current mirror configured to multiply the current output signal by a predetermined mirror ratio to generate a current limit signal.

4. The overcurrent protection circuit of claim 3 , further comprising an offset control unit configured to control an offset signal that raises or lowers the current limit signal.

5. an output transistor; an overcurrent protection circuit according to any one of claims 1 to 4, configured to monitor an output current flowing through the output transistor; A semiconductor device comprising:

6. 6. The semiconductor device according to claim 5, wherein said overcurrent protection circuit limits said output current by controlling a drive signal for said output transistor based on said current output signal.

7. An electronic device comprising the semiconductor device according to claim 5 or 6.

8. A vehicle comprising the electronic device according to claim 7.

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