Semiconductor inspection device and semiconductor inspection method

Abstract

To provide a technique capable of suppressing deterioration in measurement accuracy even if leakage current occurs from a through hole by dielectric absorption in a semiconductor test.SOLUTION: A semiconductor device includes a first slit 25 which is provided to penetrate through a second dielectric 24 and a guard pattern 21, and which separates into a plurality of test parts 26a, 26b, 26c, 26d such that an emitter force electrode 14 and a gate force electrode 16, an emitter sense electrode 15 and a gate sense electrode 17, a guard electrode 13, and the guard pattern 21 are included, at least one by one, in each of the test parts 26a, 26b, 26c, 26d. Each through hole 20 is provided directly above each guard electrode 13. A plurality of the through holes 20 do not surround, in top view, the emitter force electrode 14 and the gate force electrode 16 as force electrodes, and the emitter sense electrode 15 and the gate sense electrode 17 as sense electrodes.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor inspection device and a semiconductor inspection method. [Background technology]

[0002] A probe card included in a conventional semiconductor testing device has guard lines formed on the front side thereof so as to surround the force lines and sense lines. Meanwhile, a guard line consisting of a wedge-shaped wiring pattern is formed on the back side of the probe card so as to correspond to the guard line on the front side. The guard lines on the front and back sides are connected by a plurality of through holes, which are formed so as to surround the force lines and sense lines (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2-222156 Summary of the Invention [Problem to be solved by the invention]

[0004] However, conventional probe cards have areas between multiple through holes where no guard lines exist, so the voltage discharged to zero after a short circuit of the test voltage gradually rises due to dielectric absorption. As a result, leakage current occurs from the through holes between the force lines and sense lines located around the guard lines. Because multiple through holes surround the force lines and sense lines, the distances from the multiple through holes to the force electrodes connected to the force lines and the sense electrodes connected to the sense lines are short, adversely affecting measurement. This results in a problem of reduced measurement accuracy.

[0005] Therefore, an object of the present disclosure is to provide a technology that can suppress a decrease in measurement accuracy even when leakage current occurs from a through-hole due to dielectric absorption during semiconductor inspection. [Means for solving the problem]

[0006] A semiconductor inspection device according to the present disclosure is a semiconductor inspection device that performs electrical inspections on a plurality of devices under test, which are a plurality of semiconductor chips formed on a semiconductor wafer, and includes a first dielectric, a second dielectric provided on the lower surface of the first dielectric via a guard pattern, a force electrode provided on the lower surface of the second dielectric and applying a voltage to at least one of the devices under test, a sense electrode provided on the lower surface of the second dielectric and measuring a signal from at least one of the devices under test to which a voltage has been applied by the force electrode, and a guard electrode that has the same potential as the force electrode and is electrically connected to the guard pattern via a through hole provided in the second dielectric. 、 a plurality of the force electrodes, the sense electrodes, the guard electrodes, and the guard patterns are provided, and the semiconductor inspection device further comprises a first slit that penetrates the second dielectric and the guard patterns and separates the force electrodes, the sense electrodes, the guard electrodes, and the guard patterns into a plurality of sections, each section including at least one of the force electrodes, the sense electrodes, the guard electrodes, and the guard patterns; a conductor is provided on a side surface of the second dielectric in each of the sections; Each of the through holes is provided directly above a corresponding one of the guard electrodes, and the plurality of through holes do not surround the force electrodes and the sense electrodes in top view. [Effects of the Invention]

[0007] According to the present disclosure, since each through-hole is distant from each force electrode and each sense electrode, even if a leakage current occurs from the through-hole due to dielectric absorption, the adverse effect on measurement is suppressed compared to when multiple through-holes surround the force electrode and the sense electrode, thereby suppressing a decrease in measurement accuracy in semiconductor testing. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 2 is a bottom view of the semiconductor inspection device according to the first embodiment. [Figure 2] 2 is an enlarged bottom view of the periphery of an inspection unit provided in the semiconductor inspection device according to the first embodiment. FIG. [Figure 3] FIG. 3 is a cross-sectional view taken along line AA in FIG. 2. [Figure 4] FIG. 3 is a cross-sectional view taken along line BB in FIG. 2. [Figure 5] 3 is a part of a flowchart showing a semiconductor inspection method according to the first embodiment. [Figure 6] 10 is the remaining part of the flowchart showing the semiconductor inspection method according to the first embodiment. [Figure 7] 10 is an enlarged bottom view of the periphery of an inspection unit provided in the semiconductor inspection device according to the second embodiment. FIG. [Figure 8] FIG. 8 is a cross-sectional view taken along line CC in FIG. [Figure 9] FIG. 8 is a cross-sectional view taken along the line DD in FIG. 7. [Figure 10] 11 is an enlarged bottom view of the periphery of an inspection unit provided in the semiconductor inspection device according to the third embodiment. FIG. [Figure 11] FIG. 11 is a cross-sectional view taken along the line EE in FIG. [Figure 12] FIG. 11 is a cross-sectional view taken along the line FF in FIG. [Figure 13] FIG. 10 is an enlarged bottom view of the periphery of an inspection unit provided in the semiconductor inspection device according to the fourth embodiment. [Figure 14] FIG. 14 is a cross-sectional view taken along line GG in FIG. 13. [Figure 15] FIG. 14 is a cross-sectional view taken along line HH in FIG. 13. DETAILED DESCRIPTION OF THE INVENTION

[0009] <First Embodiment> <Configuration of semiconductor inspection equipment> The first embodiment will be described below with reference to the drawings. FIG. 1 is a bottom view of a semiconductor inspection device according to the first embodiment. FIG. 2 is an enlarged bottom view of the vicinity of inspection units 26a, 26b provided in the semiconductor inspection device according to the first embodiment. FIG. 3 is a cross-sectional view taken along line AA in FIG. 2. FIG. 4 is a cross-sectional view taken along line BB in FIG. 2. Note that in FIG. 2, the chuck 3 and semiconductor wafer 1 have been removed to make it easier to see the bottom structure of the semiconductor inspection device, and the semiconductor chip 2 and the portion of the needle 19 extending toward the semiconductor chip 2 are shown by dotted lines.

[0010] In FIG. 1, the X direction, Y direction, and Z direction are perpendicular to one another. The X direction, Y direction, and Z direction shown in the following figures are also perpendicular to one another. Hereinafter, the direction including the X direction and the −X direction opposite to the X direction will also be referred to as the “X-axis direction.” Hereinafter, the direction including the Y direction and the −Y direction opposite to the Y direction will also be referred to as the “Y-axis direction.” Hereinafter, the direction including the Z direction and the −Z direction opposite to the Z direction will also be referred to as the “Z-axis direction.”

[0011] As shown in Fig. 1, the semiconductor inspection device is an apparatus that performs electrical inspections on a plurality of semiconductor chips 2 formed on a semiconductor wafer 1. The semiconductor inspection device includes a chuck 3, a main body 6, a power supply 4, and a tester 5. The semiconductor inspection device further includes a control unit 50 that controls each unit of the semiconductor inspection device.

[0012] The chuck 3 is formed in a disk shape. The semiconductor wafer 1 is placed on the upper surface (surface in the Z direction) of the chuck 3. Although not shown, holes or grooves are provided in the upper surface (surface in the Z direction) of the chuck 3, to which air pipes (not shown) are connected. The back surface (surface in the -Z direction) of the semiconductor wafer 1 is sucked with air from the air pipes, thereby holding the semiconductor wafer 1. The chuck 3 is also provided so as to be movable in the X-axis, Y-axis, and Z-axis directions by a moving means such as a motor (not shown).

[0013] The plurality of semiconductor chips 2 formed on the semiconductor wafer 1 are semiconductor elements having a vertical structure, such as power semiconductor elements, etc. Here, the plurality of semiconductor chips 2 correspond to the plurality of elements under test.

[0014] As shown in FIGS. 1 to 3, in the semiconductor inspection device, the focus of a camera (not shown) is aligned with the tip of a needle 19 provided in a main body 30, thereby aligning the position of the tip of the needle 19 with the center of the camera. A control unit 50 corrects the position of the tip of the needle 19 so that the tip of the needle 19 contacts the inside of an electrode of a semiconductor wafer 1 by moving a chuck 3 using a moving means (not shown). The control unit 50 brings the needle 19 into contact with the opposing semiconductor chip 2, and then, in response to a command from a tester 5, applies a small current from a power supply 4 to confirm that the needle 19 and the semiconductor chip 2 are electrically connected. When a voltage is applied from the power supply 4 to the chuck 3, the entire back surface (the surface in the -Z direction) of the semiconductor wafer 1 becomes the collector potential.

[0015] The control unit 50 applies a voltage from the power supply 4 to the semiconductor chip 2 in response to a command from the tester 5, thereby conducting an electrical test of the semiconductor chip 2. The electrical test may involve measuring multiple semiconductor chips 2 simultaneously, or measuring the semiconductor chips 2 one by one.

[0016] Next, we will explain the main body 6. As shown in Figures 2 to 4, the main body 6 includes a first dielectric 23, a second dielectric 24, a guard pattern 21, an emitter force electrode 14, an emitter sense electrode 15, a gate force electrode 16, a gate sense electrode 17, a needle 19, a guard electrode 13, a through hole 20, and a first slit 25.

[0017] A second dielectric 24 is provided on the lower surface (surface in the -Z direction) of the first dielectric 23 via a guard pattern 21. In other words, the guard pattern 21 is provided over the entire surface between the first dielectric 23 and the second dielectric 24, and the first dielectric 23 and the second dielectric 24 are not in direct contact with each other.

[0018] The material of the first dielectric 23 and the second dielectric 24 is preferably an insulator such as FR4 (Flame Retardant Type 4), which is used as a material for printed circuit boards. The materials of the first dielectric 23 and the second dielectric 24 may also be different. The guard pattern 21 is formed from copper foil using general printed circuit board photolithography technology. The guard pattern 21 can also be manufactured using a layered manufacturing method such as additive manufacturing.

[0019] The emitter force electrode 14, the emitter sense electrode 15, the gate force electrode 16, and the gate sense electrode 17 are provided on the lower surface (surface in the -Z direction) of the second dielectric 24, and are arranged in this order from the -X direction to the X direction. The guard electrode 13 is provided on the lower surface (surface in the -Z direction) of the second dielectric 24 closer to the end (in the Y-axis direction) than the emitter force electrode 14.

[0020] The guard electrode 13 and the guard pattern 21 are electrically connected by a through hole 20. A guard line 9 is connected to the guard electrode 13, and an emitter force line 8 is connected to the emitter force electrode 14. An emitter sense line 10 is connected to the emitter sense electrode 15, and a gate force line 11 is connected to the gate force electrode 16. Furthermore, a gate sense line 12 is connected to the gate sense electrode 17.

[0021] The emitter force line 8 and the guard line 9 do not have to be connected, or the emitter force line 8 and the guard line 9 may be connected to the guard electrode 13 and the emitter force electrode 14. For example, when a voltage is applied to the emitter force line 8, it is sufficient that the voltage applied to the semiconductor chip 2 via the needle 19 and the voltage applied to the guard pattern 21 have the same potential. The guard line 9 may be used based on the GND reference in addition to being used based on the emitter reference.

[0022] The base ends of three needles 19 are connected to the emitter force electrode 14, and the base ends of the needles 19 are connected to each of the emitter sense electrode 15, the gate force electrode 16, and the gate sense electrode 17.

[0023] 1 and 2, four inspection units 26a, 26b, 26c, and 26d are provided on the lower surface (surface in the -Z direction) of the main body 6. A rectangular through-hole 7 is provided in the main body 6 between the inspection units 26a, 26b and the inspection units 26c, 26d.

[0024] As shown in FIGS. 1 to 4, a first slit 25 is provided on the underside (-Z direction) of the main body 6, penetrating the second dielectric 24 and the guard pattern 21. The first slit 25 extends to the middle of the first dielectric 22 in the up-down direction (Z-axis direction). The first slit 25 is formed in a lattice pattern to separate four inspection sections 26a, 26b, 26c, and 26d, and the guard pattern 21 is also separated corresponding to the inspection sections 26a, 26b, 26c, and 26d. That is, the first slit 25 separates the four inspection sections 26a, 26b, 26c, and 26d into a plurality of sections, each containing at least one emitter force electrode 14, one gate force electrode 16, one emitter sense electrode 15, one gate sense electrode 17, one guard electrode 13, and one guard pattern 21.

[0025] The first slit 25 provides a gap in the main body 6, and air is a high insulator with a dielectric constant of 1.0 equivalent to that of a vacuum. Therefore, the inspection portion 25a and the inspection portion 25b are insulated from each other by the air layer in the first slit 25. In particular, by penetrating the guard pattern 21 and the second dielectric 24, better insulation can be achieved compared to when these are not penetrated.

[0026] Generally, when a voltage is applied to a conductor, a voltage is also applied to the surrounding dielectric, which charges up, and then the voltage on the conductor is short-circuited and discharges. This results in a gradual increase in the voltage on the conductor. It is known that this residual voltage is caused by dielectric absorption. The residual voltage causes leakage current and deteriorates the measurement accuracy of adjacent test parts. Therefore, in order to suppress the residual voltage, it is necessary to prevent a potential difference from occurring in the dielectric.

[0027] When a voltage is applied to the emitter force line 8 during measurement by the inspection unit 25a, the emitter force electrode 14 and the guard pattern 21 are at the same potential, which suppresses the dielectric polarization of the second dielectric 24 and the occurrence of leakage current. This eliminates the waiting time until the residual voltage is discharged and shortens the measurement time, improving the productivity of the semiconductor chip 2.

[0028] 2 and 3, each through hole 20 is provided directly above (in the Z direction) each guard electrode 13. Therefore, the multiple through holes 20 do not surround the emitter force electrode 14, the gate force electrode 16, the emitter sense electrode 15, or the gate sense electrode 17 when viewed from above, that is, when viewed from the Z direction. In other words, each through hole 20 is spaced apart from each emitter force electrode 14, each gate force electrode 16, each emitter sense electrode 15, and each gate sense electrode 17.

[0029] <Semiconductor inspection method> Next, a semiconductor inspection method using the semiconductor inspection device will be described. Fig. 5 is a part of a flowchart showing the semiconductor inspection method according to the first embodiment. Fig. 6 is the remaining part of the flowchart showing the semiconductor inspection method according to the first embodiment.

[0030] As shown in FIGS. 5 and 6, first, the semiconductor wafer 1 is removed from the wafer carrier (not shown) using a Bernoulli hand or the like and transferred to the chuck 3. The control unit 50 holds the semiconductor wafer 1 by sucking the back surface (the surface in the Z direction) of the semiconductor wafer 1 into the chuck 3 (step S1). Next, the control unit 50 recognizes the pattern of the semiconductor chip 2 with a camera (not shown). The control unit 50 moves the chuck 3 using a moving means (not shown) to align the positions of the gate electrode 18 of the semiconductor chip 2 with the tips of the needles 19 (step S3). Specifically, in each of the inspection units 26a, 26b, 26c, and 26d, the gate electrode 18 of the semiconductor chip 2 is aligned with the tips of the two needles 19 attached to the gate force electrode 16 and the gate sense electrode 17.

[0031] Next, the control unit 50 moves the chuck 3 using a moving means not shown, so that at each inspection unit 26a, 26b, 26c, and 26d, the six needles 19 contact the electrodes provided on the surface (Z-direction surface) of the semiconductor chip 2 (step S4), and then passes a small current through the emitter force line 8 to measure the voltage (step S5), and checks whether the voltage meets the standard value (step S6).

[0032] If the voltage does not meet the standard value (No in step S6), the operator checks whether the tip of needle 19 is bent (step S7), and if it is bent, replaces needle 19. Then, the process returns to step S6. On the other hand, if the voltage meets the standard value (Yes in step S6), control unit 50 connects shield line 28 to ground (step S8). This discharges the residual voltage due to dielectric absorption.

[0033] Next, the control unit 50 applies a voltage to the emitter force line 8 (step S9), and then determines whether or not to simultaneously measure a plurality of semiconductor chips 2, which are elements under test, in the inspection units 26a, 26b, 26c, and 26d (step S10). That is, it is determined whether or not to simultaneously measure all of the semiconductor chips 2 set in the inspection units 26a, 26b, 26c, and 26d.

[0034] If multiple semiconductor chips 2 are not to be measured simultaneously (No in step S10), the control unit 50 applies a collector voltage to the emitter force lines 8 of the semiconductor chips 2 other than the semiconductor chip 2 being measured (step S15), and measures leakage currents of the sense lines of the semiconductor chip 2 being measured, i.e., the emitter sense lines 10 and the gate sense lines 12 (step S16). The control unit 50 repeats the processes of steps S15 and S16 in the order of the inspection units 26a, 26b, 26c, and 26d until it has measured leakage currents of the sense lines of all semiconductor chips 2 set in the inspection units 26a, 26b, 26c, and 26d (step S17), and then transitions the process to step S14.

[0035] The collector voltage may be applied to the emitter force line 8 only to the semiconductor chip 2 adjacent to the device under test, or may be applied to all semiconductor chips 2 set in the testing unit except for the device under test. In this way, by applying the same voltage as the collector potential to the devices under test other than the device under test, leakage current is suppressed and testing can be performed with high accuracy.

[0036] On the other hand, when multiple semiconductor chips 2 are to be measured simultaneously (Yes in step S10), the control unit 50 causes multiple probes 19 to contact each of the multiple semiconductor chips 2 in the inspection units 26a, 26b, 26c, and 26d (step S11). The control unit 50 applies voltage to the emitter force lines 8 of the multiple semiconductor chips 2 in the inspection units 26a, 26b, 26c, and 26d (step S12), measures leakage currents of the sense lines, i.e., the emitter sense lines 10 and the gate sense lines 12, of all the semiconductor chips 2 set in the inspection units 26a, 26b, 26c, and 26d (step S13), and then proceeds to step S14.

[0037] In step S14, the control unit 50 determines whether all the semiconductor chips 2 on the semiconductor wafer 1 have been measured. If all the semiconductor chips 2 on the semiconductor wafer 1 have not been measured (No in step S14), the control unit 50 moves the chuck 3 using a moving means (not shown) to set unmeasured semiconductor chips 2 on the inspection units 26a, 26b, 26c, and 26d, and then proceeds to step S4. On the other hand, if all the semiconductor chips 2 on the semiconductor wafer 1 have been measured (Yes in step S14), the process ends.

[0038] <Effects> As described above, the semiconductor inspection device of embodiment 1 is a semiconductor inspection device that performs electrical inspections on a plurality of devices under test, which are a plurality of semiconductor chips 2 formed on a semiconductor wafer 1, and is equipped with a first dielectric 23, a second dielectric 24 provided on the lower surface (-Z direction surface) of the first dielectric 23 via a guard pattern 21, an emitter force electrode 14 and a gate force electrode 16 provided on the lower surface (-Z direction surface) of the second dielectric 24 as force electrodes that apply a voltage to at least one device under test, an emitter sense electrode 15 and a gate sense electrode 17 provided on the lower surface (-Z direction surface) of the second dielectric 24 as sense electrodes that measure a signal from at least one device under test to which a voltage is applied by the emitter force electrode 14 and the gate force electrode 16, and a guard electrode 13 that has the same potential as the emitter force electrode 14 and the gate force electrode 16 and is electrically connected to the guard pattern 21 via a through hole 20 provided in the second dielectric 24. A plurality of emitter force electrodes 14 and gate force electrodes 16 are provided as force electrodes, a plurality of emitter sense electrodes 15 and gate sense electrodes 17 as sense electrodes, a plurality of guard electrodes 13, and a plurality of guard patterns 21 are provided. The semiconductor inspection device further includes first slits 25 that penetrate the second dielectric 24 and the guard pattern 21 and separate the plurality of inspection sections 26a, 26b, 26c, and 26d into a plurality of inspection sections 26a, 26b, 26c, and 26d so that each inspection section 26a, 26b, 26c, and 26d includes at least one emitter force electrode 14 and gate force electrode 16 as force electrodes, one emitter sense electrode 15 and gate sense electrode 17 as sense electrodes, one guard electrode 13, and one guard pattern 21. Each through hole 20 is provided directly above a corresponding guard electrode 13, and the plurality of through holes 20 do not surround the emitter force electrode 14 and gate force electrode 16 as force electrodes or the emitter sense electrode 15 and gate sense electrode 17 as sense electrodes in a top view.

[0039] Therefore, because each through-hole 20 is distant from each emitter force electrode 14, each gate force electrode 16, each emitter sense electrode 15, and each gate sense electrode 17, even if leakage current occurs from the through-hole 20 due to dielectric absorption, the adverse effect on measurement is suppressed compared to when multiple through-holes surround the force electrode and sense electrode. This makes it possible to suppress a decrease in measurement accuracy during semiconductor testing. As a result, the yield of semiconductor chips 2 is improved.

[0040] Furthermore, the semiconductor inspection method according to the first embodiment includes the steps of: (a) placing the semiconductor wafer 1 on the chuck 3 of the semiconductor inspection device; (b) aligning the semiconductor wafer 1 with the semiconductor inspection device; (c) determining whether or not to simultaneously measure a plurality of devices under test; (d) applying a voltage to the emitter force electrode 14 and measuring the leakage currents of the plurality of devices under test with the emitter sense electrode 15 if it is determined in (c) that multiple devices will be simultaneously measured; and (e) applying a voltage equal to the collector potential of the device under test to the emitter electrodes of the devices under test other than the device under test under test from the emitter force electrode 14 and measuring the leakage currents of the devices under test with the emitter sense electrode 15 if it is determined in (c) that multiple devices will not be simultaneously measured.

[0041] Therefore, by applying a voltage equal to the collector potential of the device under test to the emitter electrodes of the devices under test other than the device under test that is the target of measurement from the emitter force electrode 14, leakage current can be suppressed and semiconductor testing can be performed with high accuracy. Also, when multiple devices under test are measured simultaneously, the measurement time can be shortened compared to measuring them one by one.

[0042] <Embodiment 2> Next, a semiconductor inspection device according to embodiment 2 will be described. Fig. 7 is an enlarged bottom view of the vicinity of inspection units 26a, 26b provided in the semiconductor inspection device according to embodiment 2. Fig. 8 is a cross-sectional view taken along line CC in Fig. 7. Fig. 9 is a cross-sectional view taken along line DD in Fig. 7. Note that in embodiment 2, the same components as those described in embodiment 1 are given the same reference numerals and descriptions thereof will be omitted.

[0043] 7 to 9, in the second embodiment, a shield pattern 31 is provided on the first dielectric 23. The shield pattern 31 is provided in a region of the first dielectric 23 surrounded by the guard pattern 21 and the first slit 25, and is connected to a ground (not shown).

[0044] When measuring devices one by one, the inspection unit 26a is in a measurement state, while the inspection unit 26b is in a non-measurement state. In this case, for example, the emitter force line 8 is at emitter potential, and the guard pattern 21 is also at emitter potential. In the inspection unit 26b, the back surface (the surface facing the -Z direction) of the semiconductor chip 2 held by the chuck 3 is at collector potential. The difference between this collector potential and the emitter potential of the inspection unit 26a suppresses leakage current. Therefore, a collector potential is applied to the emitter force line 8 of the inspection unit 26b to zero the potential difference between the inspection unit 26b and the inspection unit 26a, and measurement is performed by the inspection unit 26a. At this time, the guard pattern 21 of the inspection unit 26b is at collector potential. The shield pattern 31 makes the collector-emitter potential difference between the guard pattern 21 of the inspection unit 26a and the guard pattern 21 of the inspection unit 26b the same potential as ground, thereby suppressing leakage current.

[0045] As described above, in the semiconductor inspection device according to the second embodiment, the shield pattern 31 is provided on the first dielectric 23. This reduces leakage current from adjacent inspection parts not being measured and shortens the waiting time until the residual voltage is discharged, thereby improving the productivity of the semiconductor chips 2.

[0046] In addition, first slit 25 penetrates guard pattern 21, shield pattern 31, and second dielectric 24, thereby making it possible to further suppress leakage current compared to the case where first slit 25 does not penetrate.

[0047] <Third Embodiment> Next, a semiconductor inspection device according to a third embodiment will be described. Fig. 10 is an enlarged bottom view of the vicinity of inspection units 26a, 26b provided in the semiconductor inspection device according to the third embodiment. Fig. 11 is a cross-sectional view taken along line EE in Fig. 10. Fig. 12 is a cross-sectional view taken along line FF in Fig. 10. Note that in the third embodiment, the same components as those described in the first and second embodiments are designated by the same reference numerals, and description thereof will be omitted.

[0048] 10 to 12, in the third embodiment, a conductor 32 is provided on the side surface of the first slit 25, that is, on the side surface of the second dielectric 24 in each of the inspection portions 26a, 26b, 26c, and 26d. More specifically, the entire side surface of the second dielectric 24 is surrounded by the conductor 32. The conductor 32 is formed by plating.

[0049] The conductor 32 is electrically connected to the guard pattern 21. For example, when a voltage is applied to the emitter force line 8 and it becomes the emitter potential, the emitter force electrode 14 becomes the emitter potential, and the guard pattern 21 and the conductor 32 also become the emitter potential, so that no potential difference occurs in the second dielectric 24.

[0050] As described above, in the semiconductor inspection device according to the third embodiment, the conductor 32 is provided on the side surface of the second dielectric 24 in each of the inspection parts 26a, 26b, 26c, and 26d. This reduces leakage current from adjacent inspection parts not being measured and shortens the waiting time until the residual voltage is discharged, thereby improving the productivity of the semiconductor chips 2.

[0051] The first slit 25 may have a tapered shape that widens from the bottom side (Z direction) toward the opening side (-Z direction). In this case, the widening of the opening side (-Z direction) of the first slit 25 makes it easier for plating to penetrate into the side surface of the first slit 25.

[0052] <Fourth Embodiment> Next, a semiconductor inspection device according to a fourth embodiment will be described. Fig. 13 is an enlarged bottom view of the vicinity of inspection units 26a, 26b provided in the semiconductor inspection device according to the fourth embodiment. Fig. 14 is a cross-sectional view taken along line GG in Fig. 13. Fig. 15 is a cross-sectional view taken along line HH in Fig. 13. Note that in the fourth embodiment, the same components as those described in the first to third embodiments are designated by the same reference numerals, and description thereof will be omitted.

[0053] As shown in FIGS. 13 to 15, the semiconductor inspection device according to the fourth embodiment further includes a second slit 37 that separates the second dielectric 24 into a third dielectric 39 and a fourth dielectric 40.

[0054] The third dielectric 39 is provided on the lower surface (surface in the -Z direction) of the first dielectric 22 via the guard pattern 21. Similarly, the fourth dielectric 40 is provided on the lower surface (surface in the -Z direction) of the first dielectric 23 via the guard pattern 21. The second slit 37 extends from the second dielectric 24 to a part of the first dielectric 22 in the vertical direction (Z-axis direction). Therefore, the third dielectric 39 and the fourth dielectric 40, together with the guard pattern 21 above them (Z direction), are separated by the second slit 37, and the first dielectric 23 is also separated to a part of the first dielectric 23 in the vertical direction (Z-axis direction).

[0055] A guard electrode 13, an emitter force electrode 14, and an emitter sense electrode 15 are disposed on the lower surface (surface in the -Z direction) of the third dielectric 39. A gate force electrode 16, a gate sense electrode 17, and a guard electrode 34 are disposed on the lower surface (surface in the -Z direction) of the fourth dielectric 40.

[0056] The guard pattern 21 on the lower side (-Z direction) of the third dielectric 39 is electrically connected to the emitter force electrode 14 and the emitter sense electrode 15, so there is no potential difference therebetween and no leakage current occurs. Also, the guard pattern 21 on the lower side (-Z direction) of the fourth dielectric 40 is electrically connected to the gate force electrode 16 and the gate sense electrode 17, so there is no potential difference therebetween and no leakage current occurs. Furthermore, the periphery of the second slit 37 is insulated by the air layer created by the second slit 37.

[0057] As described above, the semiconductor inspection device according to the fourth embodiment further includes the second slit 37 that separates the second dielectric 24 into the third dielectric 39 and the fourth dielectric 40. This reduces measurement variations caused by leakage current.

[0058] The first slit 25 and the second slit 37 may have different depths. More specifically, because the leakage current generated in the gate force electrode 16 and the gate sense electrode 17 is smaller than the leakage current generated in the emitter force electrode 14 and the emitter sense electrode 15, the second slit 37 may have a shallower depth than the first slit 25. In this case, the rigidity of the third dielectric 39 and the fourth dielectric 40 can be prevented from decreasing, improving durability when the needle 19 is repeatedly brought into contact with the semiconductor chip 2.

[0059] <Other variations> The shield pattern 31 of the second embodiment may be employed in the semiconductor inspection devices according to the third and fourth embodiments, and the conductor 32 of the third embodiment may be employed in the semiconductor inspection devices according to the second and fourth embodiments.

[0060] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate.

[0061] Various aspects of the present disclosure are summarized below as appendices.

[0062] (Appendix 1) A semiconductor testing apparatus for performing electrical testing on a plurality of devices under test, which are a plurality of semiconductor chips formed on a semiconductor wafer, comprising: a first dielectric; a second dielectric provided on the lower surface of the first dielectric via a guard pattern; a force electrode provided on the lower surface of the second dielectric body and configured to apply a voltage to at least one of the devices under test; a sense electrode provided on the lower surface of the second dielectric body, for measuring a signal from at least one of the devices under test to which a voltage is applied by the force electrode; a guard electrode having the same potential as the force electrode and electrically connected to the guard pattern via a through hole provided in the second dielectric; a plurality of the force electrodes, a plurality of the sense electrodes, a plurality of the guard electrodes, and a plurality of the guard patterns are provided; The semiconductor inspection device further comprises: a first slit formed through the second dielectric and the guard pattern to separate the second dielectric and the guard pattern into a plurality of sections, each section including at least one of the force electrode, the sense electrode, the guard electrode, and the guard pattern; Each of the through holes is provided directly above each of the guard electrodes, The semiconductor inspection device, wherein the plurality of through holes do not surround the force electrodes and the sense electrodes in a top view.

[0063] (Appendix 2) 2. The semiconductor inspection device according to claim 1, wherein the first dielectric is provided with a shielding pattern.

[0064] (Appendix 3) 3. The semiconductor inspection device according to claim 1, wherein a conductor is provided on a side surface of the second dielectric in each of the compartments.

[0065] (Appendix 4) 4. The semiconductor inspection device according to claim 1, further comprising a second slit separating the second dielectric into a third dielectric and a fourth dielectric.

[0066] (Appendix 5) 5. The semiconductor inspection device according to claim 4, wherein the second slit is shallower than the first slit.

[0067] (Appendix 6) 6. The semiconductor inspection device according to any one of claims 1 to 5, wherein the first slit has a tapered shape whose width increases from the bottom side toward the opening side.

[0068] (Appendix 7) A semiconductor inspection method using the semiconductor inspection device according to any one of Supplementary Note 1 to Supplementary Note 6, (a) placing the semiconductor wafer on a chuck of the semiconductor inspection device; (b) aligning the semiconductor wafer with the semiconductor inspection device; (c) determining whether to simultaneously measure a plurality of the devices under test; (d) if it is determined in the step (c) that a plurality of devices are to be measured simultaneously, applying a voltage to the force electrode and measuring the leakage current of the plurality of devices to be measured by the sense electrode; (e) if it is determined in the step (c) that multiple devices are not to be measured simultaneously, a voltage equal to the collector potential of the device under test to be measured is applied from the force electrode to the emitter electrodes of the devices under test other than the device under test to be measured, and a leakage current of the device under test to be measured is measured by the sense electrode; A semiconductor inspection method comprising: [Explanation of symbols]

[0069] 1 semiconductor wafer, 2 semiconductor chip, 3 chuck, 13 guard electrode, 14 emitter force electrode, 15 emitter sense electrode, 16 gate force electrode, 17 gate sense electrode, 20 through hole, 21 guard pattern, 23 first dielectric, 24 second dielectric, 25 first slit, 26a, 26b, 26c, 26d inspection portion, 31 shield pattern, 32 conductor, 37 second slit, 39 third dielectric, 40 fourth dielectric.

Claims

1. A semiconductor testing device that performs electrical testing on a plurality of devices under test, which are a plurality of semiconductor chips formed on a semiconductor wafer, comprising: a first dielectric; a second dielectric provided on a lower surface of the first dielectric via a guard pattern; a force electrode provided on the lower surface of the second dielectric body and configured to apply a voltage to at least one of the devices under test; a sense electrode provided on the lower surface of the second dielectric body, for measuring a signal from at least one of the devices under test to which a voltage is applied by the force electrode; a guard electrode having the same potential as the force electrode and electrically connected to the guard pattern via a through hole provided in the second dielectric, a plurality of the force electrodes, a plurality of the sense electrodes, a plurality of the guard electrodes, and a plurality of the guard patterns are provided; The semiconductor inspection device further comprises: a first slit provided through the second dielectric and the guard pattern, separating the second dielectric and the guard pattern into a plurality of sections, each section including at least one of the force electrode, the sense electrode, the guard electrode, and the guard pattern; a conductor is provided on a side surface of the second dielectric in each of the sections; Each of the through holes is provided directly above each of the guard electrodes, The semiconductor inspection device, wherein the plurality of through holes do not surround the force electrodes and the sense electrodes in a top view.

2. A semiconductor inspection device that performs electrical inspections on a plurality of test devices, which are a plurality of semiconductor chips formed on a semiconductor wafer, comprising: a first dielectric; a second dielectric provided on a lower surface of the first dielectric via a guard pattern; a force electrode provided on the lower surface of the second dielectric body and configured to apply a voltage to at least one of the devices under test; a sense electrode provided on the lower surface of the second dielectric body, for measuring a signal from at least one of the devices under test to which a voltage is applied by the force electrode; a guard electrode having the same potential as the force electrode and electrically connected to the guard pattern via a through hole provided in the second dielectric, a plurality of the force electrodes, a plurality of the sense electrodes, a plurality of the guard electrodes, and a plurality of the guard patterns are provided; The semiconductor inspection device further comprises: a first slit that penetrates the second dielectric and the guard pattern and separates the second dielectric into a plurality of sections, each section including at least one of the force electrode, the sense electrode, the guard electrode, and the guard pattern; a second slit separating the second dielectric into a third dielectric and a fourth dielectric; The second slit is shallower than the first slit, Each of the through holes is provided directly above each of the guard electrodes, The semiconductor inspection device, wherein the plurality of through holes do not surround the force electrodes and the sense electrodes in a top view.

3. 3. The semiconductor inspection device according to claim 1, wherein a shield pattern is provided on the first dielectric.

4. 3. The semiconductor inspection device according to claim 1, wherein the first slit has a tapered shape whose width increases from the bottom side toward the opening side.

5. A semiconductor inspection device that performs electrical inspections on a plurality of test elements, which are a plurality of semiconductor chips formed on a semiconductor wafer, comprising: a first dielectric; a second dielectric provided on a lower surface of the first dielectric via a guard pattern; a force electrode provided on the lower surface of the second dielectric body and configured to apply a voltage to at least one of the devices under test; a sense electrode provided on the lower surface of the second dielectric body, for measuring a signal from at least one of the devices under test to which a voltage is applied by the force electrode; a guard electrode having the same potential as the force electrode and electrically connected to the guard pattern via a through hole provided in the second dielectric, a plurality of the force electrodes, a plurality of the sense electrodes, a plurality of the guard electrodes, and a plurality of the guard patterns are provided; The semiconductor inspection device further comprises: a first slit provided through the second dielectric and the guard pattern, separating the second dielectric and the guard pattern into a plurality of sections, each section including at least one of the force electrode, the sense electrode, the guard electrode, and the guard pattern; Each of the through holes is provided directly above each of the guard electrodes, a plurality of through holes that do not surround the force electrodes and the sense electrodes in a top view; (a) placing the semiconductor wafer on a chuck of the semiconductor inspection device; (b) aligning the semiconductor wafer with the semiconductor inspection device; (c) determining whether to simultaneously measure a plurality of the devices under test; (d) if it is determined in the step (c) that a plurality of devices are to be measured simultaneously, applying a voltage to the force electrode and measuring the leakage current of the plurality of devices to be measured by the sense electrode; (e) if it is determined in the step (c) that multiple devices are not to be measured simultaneously, a voltage equal to the collector potential of the device under test to be measured is applied from the force electrode to the emitter electrodes of the devices under test other than the device under test to be measured, and a leakage current of the device under test to be measured is measured by the sense electrode; A semiconductor inspection method comprising:

6. 6. The semiconductor inspection method according to claim 5, wherein a shield pattern is provided on the first dielectric.

7. 6. The semiconductor inspection method according to claim 5, wherein the first slit has a tapered shape whose width increases from the bottom side toward the opening side.

Images