target

Abstract

To provide a novel oxide semiconductor film.SOLUTION: An oxide semiconductor film includes In, M (M represents Al, Ga, Y, or Sn), and Zn. The oxide semiconductor film has a composition near a solid solution range of a structure of In1+xM1-xO3(ZnO)y (x is a number that satisfies 0<x<0.5, and y approximately represents 1). In particular, the ratio of the number of atoms of In, M, and Zn in the oxide semiconductor film is around In:M:Zn=4:2:3, and when In is 4, M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The invention relates to the manufacture or composition of matter. One aspect of the present invention relates to an oxide semiconductor film or a method for manufacturing the oxide semiconductor film. Another embodiment of the present invention is a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a power storage device, The present invention relates to a device, a storage device, a driving method thereof, or a manufacturing method thereof.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0003] In Non-Patent Document 1, 1-x Ga 1+x O3(ZnO) m (x is -1≦x≦1 It has been stated that there exists a homologous phase represented by m, where m is a natural number. In Non-Patent Document 1, the solid solution range of the homologous phase is For example, the solid solution region of the homologous phase when m = 1 is It is stated that the range is from 0.33 to 0.08, and the homologous phase for m = 2 It has been stated that the solid solution range of is in the range of x from -0.68 to 0.32.

[0004] Also disclosed is a technique for manufacturing a transistor using an In-Ga-Zn-based oxide semiconductor. (See, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-96055 [Non-patent literature]

[0006] [Non-Patent Document 1] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, pp.298-315 Summary of the Invention [Problem to be solved by the invention]

[0007] In Non-Patent Document 1, x Zn y Ga z O w An example is shown, where x, y and z are Zn Compositions near Ga2O4, i.e., values ​​where x, y, and z are close to (x, y, z) = (0, 1, 2) It is described that when the crystal structure has a spinel structure, the spinel structure is likely to be formed or to be mixed. AB2O4 (A and B are metals) is a compound with a spinel-type crystal structure. The compound represented by the formula is known.

[0008] However, a spinel-type crystal structure is formed in the In-Ga-Zn-based oxide semiconductor film, Alternatively, if they are mixed, it may adversely affect the electrical characteristics or reliability of a semiconductor device (e.g., a transistor) having the In-Ga-Zn-based oxide semiconductor film.

[0009] In view of the above problems, one aspect of the present invention is to provide a novel oxide semiconductor film as one of the problems. Alternatively, one aspect of the present invention is to endow a semiconductor device with good electrical characteristics as one of the problems. Alternatively, one aspect of the problem is to provide a highly reliable semiconductor device. Further, one aspect of the problem is to provide a semiconductor device with a novel configuration. Alternatively, [[ID=IA]]one aspect of the problem is to provide a display device with a novel configuration.

[0010] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention is not required to solve all of these problems. Note that other problems will be naturally apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract these other problems from the descriptions in the specification, drawings, claims, etc.

Means for Solving the Problems

[0011] One aspect of the present invention is an oxide semiconductor film containing In, M (where M represents Al, Ga, Y, or Sn), and Zn, wherein the oxide semiconductor film has a composition near the solid solution region of the structure of In 1+x M 1-x O3(Z nO) y (where x is a number satisfying 0 < x < 0.5, and y represents approximately 1). It is an oxide semiconductor film having the composition.

[0012] Also, in the above aspect, it is preferable that x is approximately 0.33.

[0013] In the above embodiment, the ratio of the number of In atoms to the number of M atoms to the number of Zn atoms in the oxide semiconductor film is In :M:Zn=approximately 4:2:3, and when In is 4, M is 1.5 or more and 2.5 or less. and Zn is preferably 2 or more and 4 or less.

[0014] In the above-described embodiment, the oxide semiconductor film is formed by a sputtering apparatus. The sputtering apparatus has a polycrystalline metal oxide target. The composition of the polycrystalline metal oxide target is In:M:Zn=4:2:4.1. When In is 4, M is 1.5 or more and 2.5 or less, and Zn is 3.1 or more and 5.1 or less. It is preferable to have one.

[0015] In the above-described embodiment, the oxide semiconductor film has a crystalline portion, and the crystalline portion has a c-axis orientation. It is preferable to have

[0016] In the above embodiment, the oxide semiconductor film has a hydrogen concentration of 1×10 20 atoms / c m 3 In the above embodiment, the oxide semiconductor film preferably has a region in which the thickness is less than It is preferable to have a region in which the total of In, M, Zn, and O is 99.97 atomic % or more. In the above embodiment, the oxide semiconductor film preferably contains Fe, Ni, and Si in an amount of 0. It is preferred to have a region where the content is less than 0.03 atomic %.

[0017] Another embodiment of the present invention is a compound semiconductor material comprising In and M (M represents Al, Ga, Y, or Sn). ) and Zn, wherein the oxide semiconductor film is a first oxide semiconductor a second oxide semiconductor film on the first oxide semiconductor film, The body membrane is In 1+x M1-x O3(ZnO) y (x is a number satisfying 0 < x < 0.5, and y represents approximately 1.) It is a composition near the solid solution region of the structure, and the second oxide semiconductor film is In M 1+v M 1-v O3(ZnO) w (v is a number satisfying -0.2 ≤ v < 0.2, and w represents approximately 1.) It is a composition near the solid solution region of the structure, and has a region with fewer In atoms than the first oxide semiconductor film oxide semiconductor film.

[0018] In the above aspect, it is preferable that x is approximately 0.33 and v is approximately 0.

[0019] Also, in the above aspect, the atomic number ratio of In, M, and Zn in the first oxide semiconductor film is , In:M:Zn is near 4:2:3, and the atomic number ratio of In, M, and Zn in the second oxide semiconductor film is near In:M:Zn = 1:1:1. When In in the first oxide semiconductor film is 4, it is preferable that M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less .

[0020] <图注>Also, in the above aspect, the first oxide semiconductor film and the second oxide semiconductor film are formed by a sputtering device, and the sputtering device has a first polycrystalline metal oxide target and a second polycrystalline metal oxide target. The first polycrystalline metal oxide target has a composition near In:M:Zn = 4:2:4.1, and the second polycrystalline metal oxide target has a composition near In:M:Zn = 1:1:1.2. When In in the first polycrystalline metal oxide target is 4, it is preferable that M is 1.5 or more and 2.5 or less, and Zn is 3.1 or more and 5.1 or less .

[0021] In the above embodiment, the first oxide semiconductor film has a crystalline portion, and the crystalline portion has a c-axis orientation. It is preferable to have

[0022] In the above embodiment, the first oxide semiconductor film has a hydrogen concentration of 1×10 20 atom s / cm 3 In the above embodiment, the first oxide preferably has a region where the first oxide is less than 100%. The semiconductor film is a region in which the total of In, M, Zn, and O is 99.97 atomic % or more. In the above embodiment, the first oxide semiconductor film preferably contains Fe, Ni, and Si preferably has a region where the total of Si and Si is less than 0.03 atomic %.

[0023] Another embodiment of the present invention is a method for manufacturing a semiconductor device comprising: The gate insulating film is electrically connected to the oxide semiconductor film. a source electrode electrically connected to the oxide semiconductor film and a drain electrode electrically connected to the oxide semiconductor film. It is a semiconductor device.

[0024] Another embodiment of the present invention is a display device including any one of the above oxide semiconductor films and a display element. Another embodiment of the present invention is a display device including the display device, a touch sensor, and Another aspect of the present invention is a display module having any one of the above-mentioned oxides. a semiconductor film, the semiconductor device, the display device, or the display module, and an operation and a key or a battery. [Effects of the Invention]

[0025] According to one embodiment of the present invention, a novel oxide semiconductor film can be provided. According to one embodiment of the present invention, a semiconductor device can have good electrical characteristics. Alternatively, a semiconductor device having a novel configuration can be provided. Alternatively, a display device with a novel configuration can be provided.

[0026] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other effects from the descriptions in the aspects and claims. [Brief explanation of the drawings]

[0027] [Figure 1] 1A and 1B are diagrams illustrating atomic ratios of oxide semiconductor films. [Figure 2] FIG. 1 is a diagram illustrating a phase equilibrium diagram. [Figure 3] FIG. 10 is a diagram illustrating the relationship between the atomic ratio of the target and the residual rate of Zn. [Figure 4] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 5] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 6] 10A and 10B illustrate structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 7] Electron diffraction pattern of CAAC-OS. [Figure 8] FIG. 1 shows the change in the crystalline part of an In-Ga-Zn oxide due to electron irradiation. [Figure 9] 1A to 1C illustrate a method for forming a CAAC-OS film. [Figure 10] A diagram explaining the InMZnO4 crystal. [Figure 11] 1A to 1C illustrate a method for forming a CAAC-OS film. [Figure 12] FIG. 2 is a diagram illustrating the positions where particles adhere to a pellet. [Figure 13] FIG. 2 is a diagram illustrating the positions where particles adhere to a pellet. [Figure 14] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device. [Figure 15] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device. [Figure 16] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device. [Figure 17] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device. [Figure 18] FIG. 1 is a cross-sectional view illustrating an example of a semiconductor device. [Figure 19] FIG. 1 is a diagram illustrating a band structure. [Figure 20] FIG. 1 is a cross-sectional view illustrating an example of a semiconductor device. [Figure 21] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 22] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 23] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 24] FIG. 1 is a model diagram showing oxygen moving into an oxide semiconductor film. [Figure 25] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 26] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 27] FIG. 1 is a diagram illustrating a sputtering apparatus. [Figure 28] FIG. 1 is a diagram illustrating a sputtering apparatus. [Figure 29] 3A and 3B are diagrams illustrating the potential distribution in the vicinity of a sputtering device and a sputtering target. [Figure 30] FIG. 1 is a diagram illustrating a sputtering apparatus. [Figure 31] FIG. 1 is a diagram illustrating a sputtering apparatus. [Figure 32] FIG. 1 is a diagram illustrating a sputtering apparatus. [Figure 33] FIG. 1 is a top view showing an example of a film forming apparatus. [Figure 34] FIG. 1 is a cross-sectional view showing an example of a film forming apparatus. [Figure 35] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Figure 36] FIG. 1 is a perspective view showing an example of a touch panel. [Figure 37] FIG. 1 is a cross-sectional view showing an example of a display device. [Figure 38] FIG. 1 is a cross-sectional view showing an example of a touch sensor. [Figure 39] FIG. 1 is a cross-sectional view showing an example of a touch panel. [Figure 40] 1A and 1B are a block diagram and a timing chart of a touch sensor; [Figure 41] Circuit diagram of a touch sensor. [Figure 42] FIG. 2 is a diagram illustrating a display module. [Figure 43] 1A to 1C illustrate electronic devices. [Figure 44] FIG. [Figure 45] FIG. 2 is a diagram illustrating the configuration of a film formation apparatus. [Figure 46] FIG. 10 is a diagram illustrating the XRD results of the samples according to the example. [Figure 47] FIG. 2 is a diagram illustrating a cross-sectional TEM image of a sample according to an example. [Figure 48] FIG. 4 is a diagram illustrating measurement coordinates of a sample according to an embodiment. [Figure 49] FIG. 10 is a diagram illustrating the XRD results of the samples according to the example. [Figure 50] FIG. 10 is a diagram illustrating the XRD results of the samples according to the example. [Figure 51] FIG. 10 is a diagram illustrating the XRD results of the samples according to the example. [Figure 52] FIG. 10 is a diagram illustrating the XRD results of the samples according to the example. [Figure 53] FIG. 10 is a diagram illustrating the XRD results of the samples according to the example. [Figure 54] FIG. 10 is a diagram illustrating the SIMS results of a sample according to an example. [Figure 55] FIG. 10 is a graph showing Id-Vg characteristics of a transistor according to an embodiment. [Figure 56]10A to 10C are diagrams illustrating the results of a gate BT stress test on a transistor according to an embodiment. [Figure 57] FIG. 10 is a graph showing Id-Vg characteristics of a transistor according to an embodiment. [Figure 58] 1A to 1C are cross-sectional TEM images of a transistor according to an embodiment. [Figure 59] FIG. 10 is a graph showing Id-Vg characteristics of a transistor according to an embodiment. [Figure 60] 10A and 10B are diagrams illustrating the results of a gate BT stress test on a transistor according to an embodiment. [Figure 61] FIG. 10 is a graph showing Id-Vd characteristics of a transistor according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0028] Hereinafter, embodiments will be described with reference to the drawings. It is possible to implement the present invention in various ways without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments and examples.

[0029] Also, in the drawings, the size, thickness of layers, or areas are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0030] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the number of components. It should be noted that this is added to avoid confusion and is not intended to limit the number.

[0031] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used to indicate the position of components. The positional relationship is used for convenience in describing the structure with reference to the drawings. The relationship between the two components changes depending on the direction in which each component is depicted. The terms are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0032] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal The semiconductor device has a channel region therein, and a current flows through the drain, the channel region, and the source. In this specification and the like, the channel region is a region where a current mainly flows. The flow area.

[0033] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0034] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "of" is not subject to any particular restrictions as long as it allows the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. It has various functions such as switching elements, resistors, inductors, capacitors, etc. This includes elements such as:

[0035] In this specification and the like, a silicon oxynitride film is a film containing more oxygen than nitrogen as a component. A silicon nitride film is a film that contains more nitrogen than oxygen. This refers to a film with a high content of

[0036] In addition, in this specification and the like, when explaining the configuration of the invention using drawings, the same The reference numerals may be commonly used even among different drawings.

[0037] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes cases where the angle is between -5° and 5°. "Almost parallel" means that the two lines are arranged at an angle of between -30° and 30°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. " refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0038] In addition, in this specification and the like, the terms "film" and "layer" may be used interchangeably. For example, the term "conductive layer" can be used interchangeably with the term "conductive film." ". Alternatively, for example, the term "insulating film" may be used. It may be possible to change the term to "insulating layer."

[0039] Even when written as "semiconductor," if the conductivity is sufficiently low, it may be called an "insulator." In addition, the boundary between "semiconductors" and "insulators" is unclear and cannot be clearly defined. Therefore, the term "semiconductor" as used herein is not necessarily an "insulator" Similarly, the term "insulator" used in this specification can be interpreted as "semiconductor." It can sometimes be rephrased as "body."

[0040] (Embodiment 1) In this embodiment, an oxide semiconductor film according to one embodiment of the present invention will be described.

[0041] The oxide semiconductor film of one embodiment of the present invention is a semiconductor film containing indium (In) and M (M is Al, Ga, Y). or Sn.) and zinc (Zn). In particular, M is gallium (Ga). In the following description, M is assumed to be Ga.

[0042] When the oxide semiconductor film contains In, for example, carrier mobility (electron mobility) increases. Furthermore, when the oxide semiconductor film contains Ga, for example, the energy gap of the oxide semiconductor film ( Eg) becomes larger. Ga is an element with high bond energy with oxygen, The bond energy of Zn is higher than that of In. The conductor film is prone to crystallization.

[0043] Here, an oxide semiconductor film of one embodiment of the present invention will be described with reference to FIGS. .

[0044] <1-1. Phase equilibrium diagram> FIG. 1 is an example of a phase diagram illustrating the atomic ratio of an oxide semiconductor film of one embodiment of the present invention. is.

[0045] FIG. 1 shows the atomic ratio of In, M, and Zn in the oxide semiconductor film of one embodiment of the present invention. The preferred range of the oxygen atom number ratio is shown in FIG. do not have.

[0046] An oxide semiconductor film of one embodiment of the present invention contains In, M, and Zn. The oxide semiconductor film is In 1+x M 1-x O3(ZnO) y (x is 0 <x<0. 5, and y is roughly 1.) structure. 1 shows the oxide semiconductor film in the vicinity of region 11 shown in FIG.

[0047] Note that the oxide semiconductor film of one embodiment of the present invention can be formed by, for example, sputtering. method, pulsed laser deposition (PLD) method, plasma enhanced chemical vapor deposition (PECVD) method, thermal CVD (Chemical Vapor Deposition) method, ALD (Atomic Examples of thermal CVD methods include the (Layer Deposition) method and vacuum deposition method. As an example, MOCVD (Metal Organic Chemical Vapor Deposition) In particular, the oxide semiconductor film of one embodiment of the present invention can be formed by a deposition method. When formed using a sputtering device, it is possible to form a uniform layer even on a large glass substrate. This is preferable because it is possible to form a film.

[0048] Here, the ratio of the number of atoms of each element in the phase equilibrium diagram is calculated using Figure 2(A)(B). In Figure 2(A) and (B), there is an equilateral triangle with vertices X, Y, and Z, and a coordinate point As an example, the coordinate point R (4:2:1) is shown, where each vertex represents the elements X, Y, and Z, respectively. The ratio of the number of atoms is higher nearer to each vertex and lower farther away. As shown in the figure, the ratio of the number of atoms is determined by the perpendicular line from the coordinate point to the opposite side of the vertex of the triangle. For example, for element X, the length of the side opposite the vertex X from the coordinate point is The coordinate R shown in Figure 2(A)(B) is expressed by the length of the perpendicular line 21 to YZ. The atomic ratio of X, element Y, and element Z is the ratio of the lengths of perpendicular lines 21, 22, and 23, i.e., This means that x:y:z=4:2:1. Also, the line that passes through vertex X and coordinate point R is the line that passes through side Y. Let the point where it intersects with Z be γ. In this case, the ratio of the length of the line segment Yγ to the length of the line segment γZ is Yγ:γZ. Then, Yγ:γZ = (number of atoms of element Z):(number of atoms of element Y).

[0049] Also, as shown in Figure 2(B), there are three lines that pass through coordinate point R and are parallel to the three sides of the triangle. At this time, using the intersections of the three lines and the three sides, x, y, and z are shown in Figure 2(B). It can be expressed as shown below.

[0050] As described in Non-Patent Document 1, an oxide containing In, element M, and Zn So, InMO3(ZnO) m (m is a natural number) The thick lines in Figure 1 represent the In2O3, M2O3, When ZnO powder is mixed and fired at 1350°C, a single-phase solid solution region can be obtained. This is a known composition.

[0051] More specifically, in the phase equilibrium diagram shown in FIG. 1, the dashed line represents the relationship In:M:Zn=(1+α ):(1-α):1 structure (α is a number that satisfies -1≦α≦1) solid solution region, In:M:Zn=( Solid solution region of 1+α):(1-α):2 structure, In:M:Zn=(1+α):(1-α):3 The solid solution region of the In:M:Zn=(1+α):(1-α):4 structure, and the solid solution region of the In: The dotted line represents the solid solution region of the M:Zn=(1+α):(1-α):5 structure. M=1:1, In:M=1:2, In:M=1:3, In:M=1:7, In:M=2: 1, In:M=3:1, and In:M=5:1.

[0052] The square symbol in Figure 1 is known to be a material that is prone to the coexistence of spinel-type crystal structures. The coordinates show the composition of ZnM2O4, which is the composition of the sample. The coordinate A shown in is In:M:Zn=1.33:0.67:1 (roughly In:M:Zn=4: 2:3). The coordinate B shown by the triangle symbol in Figure 1 is In:M:Z. The composition is n=1:1:1. The two-dot chain line in FIG. 1 indicates the coordinates of In and ZnM. 2O4. The area 12 shown in FIG. 1 is a spinel-type This is a region where crystalline structures tend to coexist.

[0053] In Non-Patent Document 1, a solid having the structure In:M:Zn=(1+α):(1-α):1 shown in FIG. Solubility region, In:M:Zn=(1+α):(1-α):2 structure solid solution region, In:M:Zn=( 1+α):(1-α):3 structure solid solution region, In:M:Zn=(1+α):(1-α):4 The solid solution range of the In:M:Zn=(1+α):(1-α):5 structure is The equilibrium state when 2O3, M2O3, and ZnO powders were mixed and fired at 1350°C. This is the result.

[0054] On the other hand, an oxide semiconductor film formed using a sputtering apparatus or the like is easily damaged by high temperatures (for example, If heat treatment at temperatures above 1000°C and below 1500°C is not performed, a quasi-equilibrium state can be achieved. In this case, even if there is some deviation from the range in which the single-phase solid solution region shown in Non-Patent Document 1 can be obtained, a single phase can be obtained. There are cases where it is possible to take on a phase.

[0055] Also, even in the solid solution range of the In:M:Zn = (1 + α):(1 - α):1 structure, when approaching the region where the spinel phase shown in region 12 is likely to coexist, even if trying to form a single-phase (e.g., homologous phase) oxide semiconductor film, there is a case where the oxide semiconductor film contains a spinel-type crystal structure. exists.

[0056] Also, in the case of deviating significantly from the solid solution range of the In:M:Zn = (1 + α):(1 - α):1 structure, that is, when the composition deviates significantly from the stoichiometry showing a single phase, there is a case where multiple crystal structures coexist (e.g., two-phase coexistence, three-phase coexistence, etc.) in the oxide semiconductor film. When multiple crystal structures coexist in the oxide semiconductor film, grain boundaries (also referred to as grain boundaries) are formed between different crystal structures, and the electrical characteristics of the oxide semiconductor film, or the reliability may deteriorate. Or, when multiple crystal structures coexist in the oxide semiconductor film, it can also be a factor causing variations in the crystallinity etc. of the oxide semiconductor film. Therefore, as the oxide semiconductor film of one aspect of the present invention, it is preferable that it has a crystal structure showing a single phase, particularly a homologous phase.

[0057] Thus, as the oxide semiconductor film of one aspect of the present invention, it is suitable to have a crystal structure showing a single phase, particularly a homologous phase.

[0058] Therefore, in the oxide semiconductor film of one aspect of the present invention, taking the composition near the solid solution range of the In 1+x M 1-x O3(Zn O) y (x is a number satisfying 0 < x < 0.5, and y represents approximately 1.), and increasing the content ratio of In rather than M, it becomes possible to move away from the region where the spinel phase shown in region 12 is likely to coexist and obtain a crystal structure showing a single phase. Also, by increasing the content ratio of In ​​​​​​​By increasing the amount, the carrier mobility (electron mobility) of the oxide semiconductor film can be increased. It is possible.

[0059] In particular, the oxide semiconductor film of one aspect of the present invention is In 1+x M 1-x O3(ZnO) y (where x is a number satisfying 0 < x < 0.5, and y represents approximately 1.) Among the compositions near the solid solution region of the structure, In particular, it is preferable to have a composition near the coordinates A (In:M:Zn = 1.33:0.67:1 (approximately In:M:Zn = 4:2:3)) indicated by the black circle symbol shown in FIG. 1.

[0060] In this specification and the like, "near" means within plus or minus 1, more preferably within plus or minus 0.5, with respect to the atomic ratio of a certain metal atom M. For example, when the composition of the oxide semiconductor film is near In:Ga:Zn = 4:2:3, Ga is 1 or more and 3 or less (1 ≤ Ga ≤ 3), and Zn is 2 or more and 4 or less (2 ≤ Zn ≤ 4), preferably Ga is 1.5 or more and 2.5 or less (1.5 ≤ Ga ≤ 2.5), and Zn is 2 or more and 4 or less (2 ≤ Zn ≤ 4). Also, in this specification and the like, "approximately" includes plus or minus 0.2 of a certain number within its range. For example, "approximately 1" means within the range of 0.8 or more and 1. 2 or less. When forming the oxide semiconductor film by a sputtering apparatus, a film with an atomic ratio deviated from the atomic ratio of the target may be formed. In particular, depending on the substrate temperature during film formation, Zn may have a smaller atomic ratio in the film than in the atomic ratio of the target. Therefore,

[0061] [[ID=4°]]In the oxide semiconductor film of one aspect of the present invention, the atomic number deviated from the atomic ratio of the target ratio Zn may be smaller in the atomic ratio of the film than in the atomic ratio of the target. Therefore, In the oxide semiconductor film of one aspect of the present invention, the atomic number deviated from the atomic ratio of the target The oxide semiconductor film of one embodiment of the present invention also includes such an oxide semiconductor film. The target used in the sputtering device is a polycrystalline metal oxide target. It is preferable.

[0062] Here, the atomic ratio of a target containing In, Ga, and Zn and the The relationship between the atomic ratio of the oxide semiconductor film and that of the oxide semiconductor film obtained by sputtering was investigated. The atomic ratio of the target used and the oxide semiconductor obtained by the sputtering method The atomic ratio of the film is shown in Table 1. The target was a polycrystalline metal oxide target. The test was carried out using the following method.

[0063] [Table 1]

[0064] The film formation conditions were argon and oxygen as the film formation gas, with the oxygen flow rate ratio set to 33%. Here, the oxygen flow rate ratio is expressed as oxygen flow rate ÷ (oxygen flow rate + argon flow rate) × 100 [%] The pressure is set to a range of 0.4 Pa to 0.7 Pa, and the substrate temperature is set to 200° C. The temperature was set at 300°C and the power supply was set at 0.5kW (DC). A sputtering device was used.

[0065] The atomic ratio of the films shown in Table 1 was determined by ICP-MS (Inductively Coupled Plasma Mass Spectroscopy). The results were evaluated using LED Plasma Mass Spectrometry. In Table 1, the atomic ratio of the film is normalized as In=1 or 3, Ga and Z= This is the calculated value of n.

[0066] From the results shown in Table 1, the atomic ratio of In and Ga in the film is On the other hand, the atomic ratio of Zn in the film is The ratio of the number of children shows that there has been a significant change.

[0067] Therefore, the relationship between the atomic ratio of the target and the Zn residual rate in the film was confirmed. The relationship between the atomic ratio of the target and the Zn residual rate is shown in Figure 3. The numbers in Figure 3 are the same as those in Table 1. The vertical axis in FIG. 3 represents the atomic ratio of In:Ga:Zn in the target. Zn(Film) is the atomic ratio of Zn in the film obtained by film formation, compared to In, Ga, and The value is divided by the sum of the atomic ratio of Zn. Zn (Target) on the vertical axis is the target. The atomic ratio of Zn in the target is divided by the sum of the atomic ratios of In, Ga, and Zn in the target. In addition, in Figure 3, the vertical axis shows Zn(Film) / Zn(Target) × 10 0 represents the residual ratio of Zn contained in the oxide semiconductor film. Zn(Film) / Ga(Film) is the atomic ratio of Zn in the film obtained by film formation. is divided by the atomic ratio of Ga in the film obtained by film formation.

[0068] From the results shown in Figure 3, the atomic ratio of Zn to Ga in the film (Zn(Film) / Ga(F film)) and the Zn residual rate (Zn(Film) / Zn(Target)×100) It can be seen that there is a good correlation between them. In other words, the less Zn there is relative to Ga, the better. The residual rate of Zn is low.

[0069] In addition, the results shown in Figure 3 indicate that the Zn content of the oxide semiconductor film obtained by sputtering is The residual ratio was found to be in the range of 50% to 90% of the target atomic ratio. That is, compared with the atomic ratio of the target, the amount of Zn in the formed oxide semiconductor film is large. There may be a significant decrease.

[0070] For example, when it is desired to obtain an oxide semiconductor film having a composition of In:Ga:Zn=4:2:3, The value of Zn(Film) / Ga(Film), which is the horizontal axis in Figure 3, is 1.5. The Zn residual rate for (Film) / Ga(Film)=1.5 is approximately 74%. It was found that the target composition should be approximately In:Ga:Zn=4:2:4.1. do.

[0071] Note that the oxide semiconductor film of one embodiment of the present invention is preferably a CAAC-OS film, which will be described later. It is particularly preferable that the CAAC-OS does not contain a spinel-type crystal structure. Whether or not a spinel-type crystal structure is contained can be determined by, for example, X-ray diffraction of an oxide semiconductor film. It is evaluated by analyzing it using X-ray diffraction (XRD). It is possible.

[0072] <1-2. Structure of oxide semiconductors> Next, a structure of an oxide semiconductor included in an oxide semiconductor film of one embodiment of the present invention will be described. .

[0073] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconductor) uctor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous l Examples include amorphous oxide semiconductors, amorphous oxide semiconductors, and amorphous oxide semiconductors.

[0074] From another point of view, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxides. Crystalline oxide semiconductors are divided into single-crystal oxide semiconductors, CAAC- Examples include OS, polycrystalline oxide semiconductor, and nc-OS.

[0075] The definition of an amorphous structure is generally that it is not fixed in a metastable state and is isotropic. It is known that the bond angle is flexible and the bond is short-range. This can also be described as a structure that has a high degree of order but no long-range order.

[0076] On the other hand, in the case of an essentially stable oxide semiconductor, it is possible to obtain a completely amorphous structure. It cannot be called an oxide semiconductor (isotropic amorphous). The oxide semiconductor is then oxidized to form a completely amorphous structure. However, a-like OS is a semiconductor that can be used in a microscopic area. Although it has a periodic structure, it has voids and is an unstable structure. It can be said that the physical properties are similar to those of an amorphous oxide semiconductor.

[0077] [CAAC-OS] First, let me explain about CAAC-OS.

[0078] CAAC-OS is an oxide having multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0079] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, high-resolution TEM images reveal the boundaries between pellets, i.e., grain boundaries. Therefore, the CAAC-OS is not clearly characterized by the grain boundaries. It can be said that the resulting decrease in electron mobility is unlikely to occur.

[0080] The CAAC-OS observed by TEM is described below. Figure 4(A) shows the This shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction (SAC) is required. The spherical aberration correction function was used to obtain a high-resolution TEM image. In particular, it is called a Cs-corrected high-resolution TEM image. This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by Nippon Denshi Co., Ltd. This can be done.

[0081] Figure 4(B) shows an enlarged Cs-corrected high-resolution TEM image of region (1) in Figure 4(A). 4(B) confirms that the metal atoms are arranged in layers in the pellet. The arrangement of each layer of atoms is determined by the surface on which the CAAC-OS film is formed (also called the surface on which the film is formed). It reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0082] As shown in Figure 4(B), CAAC-OS has a characteristic atomic arrangement. The characteristic atomic arrangement is shown by auxiliary lines. From Figure 4(B) and Figure 4(C), The size of each pellet is about 1 nm to 3 nm, and the inclination between pellets is The size of the gap caused by the pellet is about 0.8 nm. can also be called nanocrystals (nc). OS with CANC (C-Axis Aligned nanocrystals) The oxide semiconductor may also be called an oxide semiconductor.

[0083] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See Figure 4(D)). The inclination between the pellets observed in Figure 4(C) is The area where this occurs corresponds to the area 5161 shown in FIG.

[0084] In addition, Figure 5(A) shows the Cs of the CAAC-OS observed from a direction almost perpendicular to the sample surface. The corrected high-resolution TEM image is shown. Regions (1), (2), and (3) in Figure 5(A) are shown. The enlarged Cs-corrected high-resolution TEM images are shown in Figure 5(B), Figure 5(C), and Figure 5(D), respectively. ) As shown in Figure 5(B), Figure 5(C) and Figure 5(D), the pellet has metal atoms arranged in a triangular pattern. It can be seen that the particles are arranged in a square, rectangular or hexagonal shape. No regularity is observed in the arrangement of metal atoms between pellets.

[0085] Next, we will explain the CAAC-OS analyzed by XRD. The structure of CAAC-OS with nO4 crystals was solved by the out-of-plane method. When the analysis is performed, a peak appears at a diffraction angle (2θ) of around 31° as shown in Figure 6(A). This peak is attributed to the (009) plane of the InGaZnO4 crystal, The CAAC-OS crystal has a c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the surface on which the CAAC-OS is formed or the upper surface. You can confirm that it is suitable.

[0086] In addition, in the structural analysis of CAAC-OS using the out-of-plane method, 2θ is 31 In addition to the peak around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS crystals do not have a c-axis orientation. The more preferable CAAC-OS is a structure produced by the out-of-plane method. The analysis shows a peak at 2θ around 31°, but no peak at 2θ around 36°.

[0087] On the other hand, in-pla, X-rays are incident on the CAAC-OS from a direction almost perpendicular to the c-axis. When structural analysis is performed using the NE method, a peak appears at 2θ around 56°. This peak is due to I It is attributed to the (110) plane of the nGaZnO4 crystal. In the case of CAAC-OS, 2θ is set to 5 The sample is fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a (φ scan) is performed, no clear peak appears, as shown in Figure 6(B). However, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ is When scanning is performed, the peaks attributable to the crystal plane equivalent to the (110) plane are observed as shown in Figure 6(C). Therefore, from the structural analysis using XRD, it is clear that CAAC-OS is a It can be seen that the orientation of the a-axis and b-axis is irregular.

[0088] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, the probe diameter is 300 nm parallel to the sample surface. When an electron beam is incident on the sample, a diffraction pattern (selected area transmission electron diffraction) like that shown in Figure 7(A) is generated. This diffraction pattern may show the InGaZnO4 This includes spots due to the (009) plane of the crystal. Therefore, electron diffraction also reveals The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is approximately on the surface to be formed or on the upper surface. On the other hand, for the same sample, the probe is oriented perpendicular to the sample surface. The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in Figure 7(B). ) a ring-shaped diffraction pattern is observed. Therefore, CA It can be seen that the a-axis and b-axis of the pellets contained in AC-OS do not have any orientation. The first ring in FIG. 7(B) is the (010) plane and (1 00) plane. Also, the second ring in Figure 7(B) is ) surface, etc.

[0089] As described above, CAAC-OS is an oxide semiconductor with high crystallinity. Crystallinity can be reduced by the incorporation of impurities or the generation of defects, so the opposite view can be taken. Therefore, CAAC-OS can be considered an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0090] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon are more oxidative than metal elements that constitute oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0091] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or In addition, oxygen vacancies in oxide semiconductors can act as carrier traps. In some cases, the SiO 2 can become a carrier generation source by capturing hydrogen.

[0092] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. Specifically, the carrier density is 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 Such an oxide semiconductor can be a highly pure intrinsic or substantially highly pure oxide semiconductor. CAAC-OS has a low impurity concentration and a low density of defect states. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0093] [nc-OS] Next, we will explain nc-OS.

[0094] In the high-resolution TEM image, nc-OS has two distinct regions: one where crystals can be confirmed and the other where clear crystals can be confirmed. The crystalline part contained in nc-OS is The size is often between 1 nm and 10 nm, or between 1 nm and 3 nm. An oxide semiconductor having a crystal size of 10 nm or more and 100 nm or less is called a microcrystalline oxide. For example, in high-resolution TEM images, nc-OS shows grain boundaries. In some cases, the nanocrystals are not clearly visible. Therefore, in the following, the crystalline part of nc-OS is referred to as the pellet. There is a chance to call.

[0095] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). The atomic arrangement is periodic in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. For example, in contrast to nc-OS, there are cases where it is difficult to distinguish the particles from the pellets. When X-rays are used, the peaks that indicate the crystal planes are In addition, for nc-OS, a probe diameter larger than the pellet (e.g., 50 When electron diffraction is performed using an electron beam of 1000 nm or more, a halo-like diffraction pattern is produced. On the other hand, for nc-OS, pellets with sizes close to or smaller than the pellets were observed. When nanobeam electron diffraction is performed using an electron beam with a lobe diameter, spots are observed. When nanobeam electron diffraction is performed on nc-OS, high brightness regions are observed in a circular (ring-like) pattern. In addition, multiple spots may be observed within a ring-shaped area. This may be the case.

[0096] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) oxide semiconductors, or NANCs (Non-Aligned Nanocrystals) The semiconductor may also be referred to as an oxide semiconductor having a structure (s).

[0097] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, in nc-OS, there is no regularity in the crystal orientation between different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0098] [a-like OS] The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a semiconductor.

[0099] In a-like OS, pores may be observed in high-resolution TEM images. In the high-resolution TEM image, there are areas where crystalline parts can be clearly seen, and areas where crystalline parts can be seen. and areas where it is not possible to

[0100] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the structural changes caused by electron irradiation.

[0101] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS (hereinafter referred to as Sample B) and CAAC-OS (hereinafter referred to as Sample C) are prepared. Both samples are In-Ga-Zn oxides.

[0102] First, high-resolution cross-sectional TEM images of each sample are acquired. It can be seen that all the materials have crystalline parts.

[0103] The determination of which part is to be regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, six of which are stacked in layers in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The areas where the spacing is 0.28 nm or more and 0.30 nm or less are considered to be InGaZnO4 crystal parts. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0104] Figure 8 shows an example of the average size of the crystals (22 to 45 locations) in each sample. However, the length of the lattice fringes mentioned above is the size of the crystal part. It can be seen that the crystalline part of the OS grows in size according to the cumulative amount of electron irradiation. As shown by (1) in Figure 8, the initial size of the TEM observation was approximately 1.2 nm. The crystal part (also called the initial nucleus) was sized at a cumulative irradiation dose of 4.2 × 10 8 e - / nm 2 to On the other hand, in the nc-OS and For CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in Fig. 1, the nc-OS and CA The sizes of the crystal parts of AC-OS are approximately 1.4 nm and 2.1 nm, respectively. It can be seen that...

[0105] In this way, the growth of crystalline parts can be observed in a-like OS due to electron irradiation. On the other hand, in nc-OS and CAAC-OS, the growth of the crystals by electron irradiation is almost nonexistent. In other words, a-like OS is not as good as nc-OS and CAAC- It is clear that it has an unstable structure compared to the OS.

[0106] In addition, due to its porosity, a-like OS is more flexible than nc-OS and CAAC-OS. Specifically, the density of a-like OS is lower than that of a single crystal of the same composition. The density of the nc-OS is 78.6% or more and less than 92.3% of that of the normal crystal. The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0107] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0 g / cm3 More than 5.9g / cm 3 It will be less than For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0108] In some cases, single crystals with the same composition do not exist. In such cases, crystals with different compositions may be used in any proportion. By combining single crystals with the desired composition, the density equivalent to that of a single crystal can be estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate by combining different types of single crystals.

[0109] As described above, oxide semiconductors have various structures, each of which has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the above-mentioned compounds.

[0110] <1-3. CAAC-OS film formation method> An example of a method for forming a CAAC-OS film will be described below.

[0111] FIG. 9(A) is a schematic diagram of the inside of the film formation chamber. CAAC-OS is formed by sputtering. A film can be formed.

[0112] As shown in FIG. 9(A), the substrate 5220 and the target 5230 are arranged to face each other. Between the substrate 5220 and the target 5230, there is a plasma 5240. In addition, a heating mechanism 5260 is provided below the substrate 5220. The pad 5230 is bonded to the backing plate. A number of magnets are placed facing the target 5230. The sputtering method that uses a magnetic field to increase the film deposition rate is called magnetron sputtering. Called.

[0113] The distance d between the substrate 5220 and the target 5230 (target-substrate distance (TS distance) The distance is 0.01 m or more and 1 m or less, preferably 0.02 m or more and 0.5 m or less. The deposition chamber is mostly filled with deposition gas (e.g., oxygen, argon, or oxygen in a volume of 5). % or more), and the pressure is 0.01 Pa or more and 100 Pa or less, preferably is controlled to be 0.1 Pa or more and 10 Pa or less. By applying a voltage, a discharge starts and plasma 5240 is observed. A high density plasma region is formed near the nozzle 5230 by the magnetic field. In the region, the deposition gas is ionized to generate ions 5201. , for example, oxygen cations (O + ) and argon cations (Ar + ) etc.

[0114] The target 5230 has a polycrystalline structure having a plurality of crystal grains, and As an example, FIG. 10 shows the InMZn 10 shows the crystal structure of O4 (element M is, for example, Al, Ga, Y or Sn). This is the crystal structure of InMZnO4 when observed from a direction parallel to the b axis. In the crystal of 4, the oxygen atoms have a negative charge, which allows the two adjacent M-Zn-O layers to Therefore, the InMZnO4 crystal has a repulsive force between two adjacent M-Zn The cleavage plane is between the -O layers.

[0115] Ions 5201 generated in the high-density plasma region are attracted to the target 5230 by the electric field. The particles are accelerated and eventually collide with the target 5230. At this time, flat or planar particles are formed from the cleavage plane. Pellets 5200, which are pellet-shaped sputtered particles, are peeled off (see FIG. 9(A)). The pellet 5200 is the portion sandwiched between the two cleavage planes shown in FIG. When only 200 is extracted, the cross section looks like Figure 9(B), and the top surface looks like Figure 9(C). It can be seen that the pellet 5200 is deformed by the impact of the collision of the ion 5201. The structure may be distorted. Particle 5203 is also ejected from 30. Particle 5203 is a collection of one atom or several atoms. Therefore, the particle 5203 is called an atomic particle. ) can also be called.

[0116] The pellet 5200 is a flat or pellet-shaped pellet having a triangular, for example, equilateral triangular, plane. Alternatively, the pellet 5200 may have a hexagonal, for example, regular hexagonal, plane. The sputtered particles are in the form of plates or pellets. However, the shape of the pellets 5200 is not limited to triangles or hexagons, for example, when it is a shape made up of multiple triangles For example, a quadrilateral (e.g., a rhombus) is formed by joining two triangles (e.g., an equilateral triangle). ) may also be used.

[0117] The thickness of the pellet 5200 is determined depending on the type of deposition gas. 5200 has a thickness of 0.4 nm or more and 1 nm or less, preferably 0.6 nm or more and 0.8 nm or less. For example, the pellet 5200 has a width of 1 nm or more and 100 nm or less, preferably Preferably, the thickness is 2 nm or more and 50 nm or less, and more preferably, 3 nm or more and 30 nm or less. The target 5230 having In-M-Zn oxide is bombarded with ions 5201. As a result, a pellet 5 having three layers, an M-Zn-O layer, an In-O layer and an M-Zn-O layer, was obtained. 200 peels off.

[0118] As the pellet 5200 passes through the plasma 5240, its surface becomes negatively or positively charged. For example, when the pellet 5200 is in the plasma 5240, 2- negative charge from As a result, the oxygen atoms on the surface of the pellet 5200 may become negatively charged. In addition, when the pellet 5200 passes through the plasma 5240, It may grow by combining with indium, element M, zinc, or oxygen in 40. .

[0119] The pellets 5200 and particles 5203 that have passed through the plasma 5240 are Some of the particles 5203 are small in mass and can be removed by a vacuum pump or other device. It may be discharged to the outside.

[0120] Next, the deposition of pellets 5200 and particles 5203 on the surface of the substrate 5220 is described. This will be explained with reference to FIG.

[0121] First, the first pellet 5200 is deposited on the substrate 5220. The pellet 5200 is a flat plate. Since the pellet 52 has a shape like a flat surface, it is deposited with the flat surface facing the surface of the substrate 5220. The charge on the surface of 00 on the substrate 5220 side is released through the substrate 5220.

[0122] Next, the second pellet 5200 reaches the substrate 5220. At this time, the already deposited The surface of the first pellet 5200 and the surface of the second pellet 5200 are charged. As a result, the second pellet 5200 is pushed into the pile already. Avoiding the pellets 5200 on which the substrate 5220 is stacked, place the flat side a little away from the surface of the substrate 5220. The deposition is performed on the surface of the substrate 5220. By repeating this process, the surface of the substrate 5220 Countless pellets 5200 are piled up to the thickness of one layer. , an area where the pellets 5200 are not deposited is generated (see FIG. 11(A)).

[0123] Next, the particles 5203 that have received energy from the plasma reach the surface of the substrate 5220. The particles 5203 can be deposited in active areas such as the surface of the pellet 5200. Therefore, the particles 5203 move to the area where the pellet 5200 is not deposited, and the pellet The particle 5203 adheres to the side of the nozzle 5200. The bond becomes more active, and the pellet 5200 is chemically bonded to the lateral growth portion 52 02 (see FIG. 11(B)).

[0124] Furthermore, the laterally growing portion 5202 grows in the lateral direction (also called lateral growth), The pellets 5200 are connected to each other (see FIG. 11(C)). Lateral growth 5202 is formed until the undeposited area is filled. Deposition mechanism of atomic layer deposition (ALD) method Similar to a rhythm.

[0125] Therefore, even if the pellets 5200 are piled up in different directions, Particles 5203 grow laterally and fill the gaps between particles 5200, forming clear grain boundaries. In addition, the particles 5203 smoothly connect the pellets 5200. Therefore, a crystal structure different from either single crystal or polycrystal is formed. A crystalline structure having distortion between the crystalline regions (pellets 5200) is formed. The regions filling the gaps are distorted crystalline regions, so it is not appropriate to refer to these regions as amorphous structures. It is considered not to be a good idea.

[0126] Next, a new pellet 5200 is deposited with its flat side facing the surface of the substrate 5220 (FIG. 11(D)). Then, the particles 5203 penetrate the undeposited areas of the pellet 5200. By depositing the layer so as to fill the gap, a lateral growth portion 5202 is formed (see FIG. 11(E)). Then, the particles 5203 adhere to the side of the pellet 5200, and the lateral growth portion 5202 grows laterally. By doing so, the pellets 5200 in the second layer are connected to each other (see FIG. 11(F)). m is an integer of 2 or more. The film formation continues until a thin film structure having a laminate is formed.

[0127] The deposition pattern of the pellets 5200 also changes depending on the surface temperature of the substrate 5220. For example, if the surface temperature of the substrate 5220 is high, the pellet 5200 may be heated to the surface of the substrate 5220. As a result, the pellets 5200 are interdigitated with the particles 5203. The proportion of bonds without any bonds increases, resulting in a CAAC-OS with higher orientation. The surface temperature of the substrate 5220 during the formation of the OS film is set to be equal to or higher than room temperature and lower than 340° C., preferably room temperature. and 300°C or less, more preferably 100°C or more and 250°C or less, and even more preferably 100°C or more and 250°C or less. ℃ or more and 200 ℃ or less. Therefore, the substrate 5220 is a large-area substrate of the 8th generation or more. Even when using a CAAC-OS film, warping and other problems caused by the film formation hardly occur. I understand.

[0128] On the other hand, when the surface temperature of the substrate 5220 is low, the pellet 5200 moves to the surface of the substrate 5220. As a result, pellets 5200 do not pile up. In the case of nc-OS, the pellet 5200 is negatively charged. As a result, the pellets 5200 may be deposited at regular intervals. Although the orientation is low, the film has a slight regularity, which makes it more uniform than an amorphous oxide semiconductor. The entire structure is dense.

[0129] In addition, in CAAC-OS, the gaps between pellets are extremely small, Large pellets of different sizes may be formed. The inside of one large pellet has a single crystal structure. For example, the size of the pellet is 10 nm or more and 200 nm or less when viewed from the top. It may be between 100 nm and 100 nm, or between 20 nm and 50 nm.

[0130] According to the above film formation model, it is believed that pellets are deposited on the surface of the substrate. CAAC-OS can be deposited even on surfaces that do not have a crystalline structure. Therefore, the above-mentioned film formation model, which is a growth mechanism different from epitaxial growth, is highly valid. In addition, because this is the deposition model described above, the CAAC-OS and nc-OS It can be seen that uniform film formation is possible even on large glass substrates. For example, Even if the structure of the substrate surface (surface to be formed) is amorphous (for example, amorphous silicon oxide), It is possible to form a CAAC-OS film.

[0131] In addition, even if the surface of the substrate on which the film is to be formed is uneven, the pellets will adhere to the shape of the uneven surface. It is clear that the arrangement is

[0132] In addition, from the above-mentioned film formation model, the following conditions are required to form a CAAC-OS film with high crystallinity: First, in order to lengthen the mean free path, we need to create a higher vacuum. Next, to reduce damage near the substrate, the plasma energy is Next, heat energy is applied to the surface to be formed, and the damage caused by the plasma is weakened each time a film is formed. It will heal.

[0133] In addition, the above-mentioned film formation model is based on the In-M-Zn oxide target with multiple crystal grains. When a complex oxide has a polycrystalline structure such as a crystalline material, and one of the crystal grains contains a cleavage plane, For example, a mixture of indium oxide, an oxide of element M, and zinc oxide may be used. The present invention can also be applied to the case where an object target is used.

[0134] The target of the mixture does not have a cleavage plane, so when sputtered, atoms are released from the target. During film formation, a strong electric field region of plasma is formed near the target. Therefore, atomic particles detached from the target are connected by the action of the strong electric field region of the plasma. For example, first, atomic particles of indium bond together and grow laterally. Next, M-Zn-O layers are formed above and below it to complement it. Thus, even when a mixed target is used, pellets may be formed. Therefore, even when a target made of a mixture is used, the above-mentioned film formation model can be applied. It is possible.

[0135] However, if a strong electric field region of the plasma is not formed near the target, Only atomic particles peeled off from the substrate are deposited on the substrate surface. In this case, atomic particles may grow laterally. However, because the orientation of atomic particles is not uniform, However, the crystal orientation in the resulting thin film is not uniform. .

[0136] <1-4. Lateral Growth> In the following, particles 5203 are attached (also called bonded or adsorbed) in the lateral direction of the pellet 5200. .) and explain lateral growth.

[0137] Figure 12 (A) (B) (C) (D) (E) shows the structure of pellet 5200 and the metal ion attached. The pellet 5200 is a pellet having a crystal structure of InMZnO4. From the structure, we assumed a cluster model that extracts 84 atoms while maintaining the stoichiometric composition. In the following, the case where the element M is Ga will be described. ) shows the structure of the pellet 5200 as seen from a direction parallel to the c-axis. The structure of the PET 5200 is shown as seen from a direction parallel to the a-axis.

[0138] The positions where the metal ions are attached are indicated as position A, position B, position a, position b, and position c. Position A is a grid surrounded by one gallium particle and two zinc particles on the top surface of the pellet 5200. Position B is located above the interatomic site. Position a is above the interstitial site surrounded by one. Position b shows the In-O layer and the Ga-Zn layer on the side of the pellet 5200. The position c is the gallium site on the side of the pellet 5200. is.

[0139] Next, metal ions were placed at the assumed positions A, B, a, b, and c. The relative energies for the two cases were evaluated by first-principles calculations. Vienna Ab initio Simulation Package) In addition, the exchange-correlation potential is PBE (Perdew-Burke-Ernzerh Generalized Gradient Approximation (GGA) of type The ion potential is PAW (Project AAW). The cutoff energy was 40 0 eV, and k-point sampling was limited to the Γ point. Indium ions (In 3+ ), gallium ions (Ga 3+ ) and and zinc ions (Zn 2+ ) is placed. The relative energy In the calculated models, the energy of the lowest model is set to 0 eV. This is the relative value when

[0140] [Table 2]

[0141] As a result, it was found that metal ions tended to adhere to the side of pellet 5200 rather than to the top. In particular, at the indium site at position a, not only indium ions but also The results also showed that zinc ions were most likely to adhere.

[0142] Similarly, oxygen ions (O 2- The ease of adhesion of the substance was evaluated. 3(A)(B)(C)(D)(E) show the structure of pellet 5200 and the oxygen ions attached to it. 13(F) shows the position of the pellet 5200 when viewed from a direction parallel to the c-axis. FIG. 13(G) shows the structure of the pellet 5200 as seen from a direction parallel to the b-axis. show.

[0143] The positions where oxygen ions are attached are shown as positions C, D, d, e, and f. Position C is the position where the gallium is bonded to the upper surface of the pellet 5200. The position d is the position where the zinc on the top surface of the pellet 5200 is bonded. Position e is the position where the gallium bonded to the side of pellet 5200. Position f is the position where the zinc on the side of the pellet 5200 is bonded.

[0144] Next, oxygen ions were placed at the assumed positions C, D, d, e, and f. The relative energies for positions C, D, and E are evaluated by first-principles calculations. d, oxygen ions (O 2- ) is placed in the vinegar.

[0145] [Table 3]

[0146] As a result, it was found that oxygen ions also tend to adhere to the side of the pellet 5200 rather than the top surface. It was.

[0147] Therefore, the particle 5203 approaching the pellet 5200 is attracted to the side of the pellet 5200. It can be seen that the particles 52 adhere preferentially to the side of the pellet 5200. The above-mentioned film formation model in which lateral growth of pellet 5200 occurs due to the 03 is highly valid. It can be said that

[0148] According to the above model, when the pellet 5200 is deposited on the surface of the substrate 5220, It is possible to form a CAAC-OS film even if the surface on which the film is to be formed does not have a crystalline structure. This indicates that the growth mechanism is different from epitaxial growth. CAAC-OS and nc-OS can be deposited uniformly even on large glass substrates. For example, if the structure of the surface (surface to be formed) of the substrate 5220 is an amorphous structure (for example, amorphous It is possible to form a CAAC-OS film even on a silicon dioxide (silicon dioxide).

[0149] In addition, even if the surface of the substrate 5220 on which the film is to be formed is uneven, the film is formed along the shape of the uneven surface. It can be seen that let 5200 is arranged.

[0150] According to one embodiment of the present invention, an oxide semiconductor film has no or only a very small spinel crystal structure. In addition, a reliable oxide semiconductor film having the oxide semiconductor film can be realized. Therefore, a highly reliable semiconductor device can be provided.

[0151] As described above, the configuration shown in this embodiment may be appropriately combined with configurations shown in other embodiments or examples. , can be used in combination.

[0152] (Embodiment 2) In this embodiment, a semiconductor device including an oxide semiconductor film according to one embodiment of the present invention and A manufacturing method of the semiconductor device will be described with reference to FIGS.

[0153] <2-1. Configuration examples of semiconductor devices> FIG. 14A is a top view of a transistor 200 which is a semiconductor device of one embodiment of the present invention. 14(B) is a cross-sectional view taken along the dashed line X1-X2 in FIG. 14(A). 14(C) corresponds to the cross section taken along the dashed line Y1-Y2 in FIG. 14(A). It should be noted that in FIG. 14(A), in order to avoid complication, the Some of the components of the transistor 200 (such as the insulating film that functions as the gate insulating film) are omitted in the illustration. The dashed line X1-X2 direction is the channel length direction, and the dashed line Y1-Y2 direction is In the top view of the transistor, In the drawings, as in FIG. 14(A), some of the components may be omitted.

[0154] The transistor 200 includes a conductive film 204 over a substrate 202, which functions as a gate electrode, and a An insulating film 206 on the plate 202 and the conductive film 204, an insulating film 207 on the insulating film 206, and an insulating film The oxide semiconductor film 208 on the film 207 and the source electrode 206 electrically connected to the oxide semiconductor film 208 are The conductive film 212a serving as a gate electrode and the gate electrode electrically connected to the oxide semiconductor film 208 are and a conductive film 212b serving as a drain electrode. More specifically, the insulating film 214 is formed over the conductive films 212a and 212b and the oxide semiconductor film 208. , 216, and an insulating film 218 are provided. , and functions as a protective insulating film for the transistor 200.

[0155] The insulating film 206 and the insulating film 207 serve as the gate insulating film of the transistor 200. It has a function.

[0156] The oxide semiconductor film described in Embodiment 1 can be used as the oxide semiconductor film 208. In the oxide semiconductor film of one embodiment of the present invention, a spinel crystal structure is formed in the oxide semiconductor film. Since the oxide semiconductor film has no or very little oxide, a highly reliable transistor 20 It can be set to 0.

[0157] The components included in the semiconductor device of this embodiment will be described in detail below.

[0158] [substrate] There is no particular restriction on the material of the substrate 202, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and A fire substrate or the like may be used as the substrate 202. Also, silicon or silicon carbide may be used as the material. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductors such as silicon germanium, etc. It is also possible to apply a substrate, an SOI substrate, etc., and a semiconductor element is provided on these substrates. The substrate 202 may be a glass substrate. If you are using 6th generation (1500mm x 1850mm), 7th generation (1870mm x 220 0mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 280 By using large area substrates such as 10th generation (2950mm x 3400mm), By using such a large area substrate, it is possible to manufacture a large display device. This is preferable because it can reduce costs.

[0159] In addition, a flexible substrate is used as the substrate 202, and the transistor 20 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 202 and the transistor 200. The release layer is preferably removed from the substrate 202 after a semiconductor device is partially or completely completed thereon. The transistor 200 can be separated and transferred to another substrate. It can also be transferred to substrates with poor thermal properties or flexible substrates.

[0160] [Conductive film functioning as gate electrode, source electrode, and drain electrode] A conductive film 204 that functions as a gate electrode and a conductive film 212 that functions as a source electrode The conductive film 212b functioning as a drain electrode is made of chromium (Cr), copper (C u), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (M o), tantalum (Ta), titanium (Ti), tungsten (W), manganese (Mn), a metal element selected from nickel (Ni), iron (Fe), cobalt (Co), or the above Alloys containing metal elements or alloys combining the above metal elements are used, respectively. It can be formed.

[0161] The conductive films 204, 212a, and 212b may have a single-layer structure or a stacked structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, a titanium film on an aluminum film, Two-layer structure with titanium film laminated on titanium nitride film, two-layer structure with titanium film laminated on titanium nitride film, titanium nitride film Two-layer structure with tungsten film laminated on top, tantalum nitride film or tungsten nitride film Two-layer structure with tungsten film stacked, titanium film, and aluminum film stacked on the titanium film. There are also three-layer structures, such as a titanium film on top of an aluminum film. Select from tantalum, tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film made by combining one or more of these may be used.

[0162] The conductive films 204, 212a, and 212b are made of indium tin oxide or tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide A conductive material having light-transmitting properties, such as indium tin oxide doped with silicon oxide, is used. It is also possible.

[0163] The conductive films 204, 212a, and 212b are made of a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. This allows for processing using a wet etching process, which reduces manufacturing costs. It becomes possible.

[0164] [Insulating film that functions as a gate insulating film] The insulating films 206 and 207 functioning as gate insulating films of the transistor 200 are Plasma Enhanced Chemical Vapor Deposition (PECVD) Silicon oxide is deposited by vapor deposition, sputtering, etc. silicon oxide film, silicon nitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film , hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, oxide Tantalum film, magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film The insulating films 206 and 207 may each be made of one or more insulating layers. Instead of the laminated structure, a single layer insulating film selected from the above materials or an insulating film with three or more layers may also be used.

[0165] The insulating film 206 also functions as a blocking film that suppresses oxygen permeation. For example, the insulating films 207, 214, and 216 and / or the oxide semiconductor film 208 may contain excess acid. When oxygen is supplied, the insulating film 206 can suppress the permeation of oxygen.

[0166] Note that the oxide semiconductor film 208, which functions as a channel region of the transistor 200, is The insulating film 207 is preferably an oxide insulating film, and has an oxide content in excess of the stoichiometric composition. It is more preferable that the insulating film 2 has a region containing oxygen (excess oxygen region). The insulating film 207 is capable of releasing oxygen. To provide the insulating film 207, for example, the insulating film 207 may be formed in an oxygen atmosphere. Oxygen may be introduced into the insulating film 207 to form an excess oxygen region. These include ion implantation, ion doping, plasma immersion ion implantation, and plasma Zuma processing or the like can be used.

[0167] Furthermore, when hafnium oxide is used as the insulating film 207, the following effects are achieved. Hafnium has a higher dielectric constant than silicon oxide and silicon oxynitride. Since the thickness of the insulating film 207 can be made larger than when silicon oxide is used, the tunnel current In other words, a transistor with a small off-state current can be produced. Furthermore, hafnium oxide, which has a crystalline structure, can be used to form an amorphous structure. It has a higher dielectric constant than hafnium oxide, which has a low off-state current. To form a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of the crystal structure include a monoclinic system and a cubic system. are not limited to these.

[0168] In this embodiment, a silicon nitride film is formed as the insulating film 206, and a silicon nitride film is formed as the insulating film 207. The silicon nitride film has a lower dielectric constant than the silicon oxide film. The film thickness required to obtain the same capacitance as a silicon oxide film is large, so The gate insulating film of the transistor 200 is made physically thick by including a silicon nitride film. Therefore, the decrease in the dielectric strength voltage of the transistor 200 can be suppressed, and further, the dielectric strength can be improved. The edge breakdown voltage can be improved, and electrostatic breakdown of the transistor 200 can be suppressed.

[0169] [Oxide semiconductor film] The oxide semiconductor film 208 may be the oxide semiconductor film of one embodiment of the present invention described in Embodiment 1. can be used.

[0170] The oxide semiconductor film 208 has an energy gap of 2 eV or more, preferably 2.5 eV or more. eV or more, more preferably 3 eV or more. By using a nitride semiconductor, the off-state current of the transistor 200 can be reduced.

[0171] In addition, as the oxide semiconductor film 208, an oxide semiconductor film with low carrier density is used. For example, the oxide semiconductor film 208 has a carrier density of 8×10 11 / cm 3 Less than, preferably is 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1× 10 -9 / cm 3 That's all there is to it.

[0172] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (e.g., the mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of the transistor, the carrier density and impurity of the oxide semiconductor film 208 are controlled. The material concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. are set appropriately. It is preferable.

[0173] Note that the oxide semiconductor film 208 is formed of an oxide semiconductor having a low impurity concentration and a low density of defect states. By using a semiconductor film, it is possible to manufacture a transistor with even better electrical characteristics. Here, the impurity concentration is low and the defect level density is low (there is little oxygen vacancy). This is called high purity authentic or substantially high purity authentic. Since the oxide semiconductor film has a low carrier generation source, the carrier density can be reduced. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film can be The threshold voltage rarely becomes a negative electrical characteristic (also known as normally-on). In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low defect state density. The trap level density may also be low due to the low High-purity intrinsic oxide semiconductor films have extremely small off-state currents and channel widths of 1×10 6 Even if the device has a channel length L of 10 μm, the voltage between the source and drain electrodes ( In the drain voltage range of 1V to 10V, the off-state current is Below the measurement limit of the isa, i.e., 1 × 10 -13 It can achieve a characteristic of A or below.

[0174] Therefore, the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film is provided with a channel. The transistors in which the regions are formed have small fluctuations in electrical characteristics and are highly reliable. Note that charges trapped in the trap states of the oxide semiconductor film are lost. It takes a long time for the charge to dissipate, and it can behave as if it were a fixed charge. A transistor in which a channel region is formed in an oxide semiconductor film with a high density of trap states has Impurities include hydrogen, nitrogen, alkali metals, and alkali metals. These include lithium-earth metals, iron, nickel, and silicon.

[0175] The high-purity intrinsic oxide semiconductor film 208 may be, for example, a film containing In and , Ga, Zn, and the sum of In, Ga, Zn, and O is 99.97a It is preferable to have a region where the ratio is 0.05 to 0.05%.

[0176] The hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. The oxygen vacancies are formed in the lattice from which oxygen is desorbed (or in the portions from which oxygen is desorbed). When hydrogen enters the electron carrier, it can generate electrons. It can combine with oxygen, which combines with metal atoms, to generate electrons, which act as carriers. Therefore, a transistor using an oxide semiconductor film containing hydrogen has normally-on characteristics. Therefore, it is important that the amount of hydrogen in the oxide semiconductor film 208 is reduced as much as possible. Specifically, the oxide semiconductor film 208 is preferably S: Secondary Ion Mass Spectrometry) The hydrogen concentration is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atom s / cm 3 less than 5 × 10 18 atoms / cm 3 Less than, preferably is 1 x 10 18 atoms / cm 3 In other words, the oxide semiconductor film 208 has a thickness of less than The hydrogen concentration obtained by SIMS was 1×10 20 atoms / cm 3 The area that is less than Has.

[0177] In addition, the oxide semiconductor film 208 contains silicon or carbon, which is one of the Group 14 elements. If the oxide semiconductor film 208 is filled with oxygen, oxygen vacancies increase in the oxide semiconductor film 208, causing the oxide semiconductor film 208 to become n-type. Therefore, the concentrations of silicon and carbon in the oxide semiconductor film 208 and the oxide semiconductor film 208 The concentration of silicon and carbon near the interface (obtained by SIMS) was 2 × 10 18 at oms / cm 3 Less than or equal to 2 x 1017 atoms / cm 3 The following applies.

[0178] In addition, the oxide semiconductor film 208 contains an alkali metal or an alkaline earth metal. When the alkali metal or alkaline earth metal is added, it bonds with oxygen or the like in the oxide semiconductor film. Therefore, alkali metals or alkaline earth metals A transistor using an oxide semiconductor film containing such a metal oxide tends to be normally on. Therefore, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor film 208 is reduced. Specifically, it is preferable to use the SIMS method to obtain the oxide semiconductor film 208. The concentration of alkaline metals or alkaline earth metals is 1×10 18 atoms / cm 3 Below is good Preferably 2 x 10 16 atoms / cm 3 Do the following:

[0179] When the oxide semiconductor film 208 contains iron, nickel, and silicon, iron , nickel, and silicon bond with oxygen or the like in the oxide semiconductor film to generate carriers. Therefore, an oxide semiconductor film containing iron, nickel, and silicon is used. Therefore, the transistor having the oxide semiconductor film 208 tends to be normally on. It is preferable to reduce the concentrations of iron, nickel, and silicon in the oxide semiconductor. The total impurity concentration of iron, nickel, and silicon in the film 208 is set to 0.03 atomic %. It is sufficient to set it to less than.

[0180] When nitrogen is contained in the oxide semiconductor film 208, electrons serving as carriers are generated. As a result, the oxide semiconductor film containing nitrogen is easily converted into an n-type film. A transistor using the oxide semiconductor film tends to be normally on. In this case, it is preferable that the nitrogen content is reduced as much as possible. For example, The nitrogen concentration is 5 x 10 18 atoms / cm 3 It is preferable to do the following:

[0181] [Insulating film that functions as a protective insulating film for transistors] The insulating films 214 and 216 have a function of supplying oxygen to the oxide semiconductor film 208. The insulating film 218 functions as a protective insulating film for the transistor 200. The films 214 and 216 contain oxygen. The insulating film 214 is also permeable to oxygen. The insulating film 214 is an insulating film formed by etching when the insulating film 216 is formed later. It also functions as a film for reducing damage to the compound semiconductor film 208 .

[0182] The insulating film 214 has a thickness of 5 nm to 150 nm, preferably 5 nm to 50 Silicon oxide, silicon oxynitride, etc., having a thickness of 1 nm or less can be used.

[0183] Furthermore, it is preferable that the insulating film 214 has a small number of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 3 x 10 17 spins / cm 3 This is because the insulating film 214 is preferably If the density of defects contained is high, oxygen will bond to the defects, and the oxygen in the insulating film 214 will This is because the amount of light transmitted through the glass decreases.

[0184] In the insulating film 214, all of the oxygen that has entered the insulating film 214 from the outside is Some oxygen does not move to the outside of the insulating film 214 and remains in the insulating film 214. At the same time, oxygen contained in the insulating film 214 moves to the outside of the insulating film 214, Oxygen migration may occur in the film 214. When the oxide insulating film capable of forming the insulating film 216 is formed, the insulating film 216 is formed on the insulating film 214. The desorbed oxygen can be transferred to the oxide semiconductor film 208 through the insulating film 214. .

[0185] The insulating film 214 is formed using an oxide insulating film having a low density of states due to nitrogen oxides. Note that the density of states due to the nitrogen oxide can be determined by the valence The energy at the top of the electron band (E V_OS ) and the energy of the conduction band minimum of the oxide semiconductor film (E C_OS ) may be formed between the insulating film and the nitride semiconductor layer. Silicon oxynitride film with low nitrogen oxide release rate or aluminum oxynitride film with low nitrogen oxide release rate A aluminum film or the like can be used.

[0186] In addition, a silicon oxynitride film that emits a small amount of nitrogen oxides can be analyzed by thermal desorption spectroscopy. This membrane releases more ammonia than nitrogen oxides, and typically releases ammonia. The amount of molecules released is 1×10 18 molecule / cm 3 5x10 or more 19 molecule / cm 3 The following is the The amount of ammonia released is determined when the surface temperature of the membrane is 50°C or higher and 650°C or lower, preferably 50°C or lower. The amount released by heat treatment at or above 550°C or below.

[0187] Nitrogen oxides (NO x , x is greater than 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2), typically NO or NO forms a level in the insulating film 214. The oxides of nitrogen are located within the energy gap of the insulating film 214 and the When the oxide semiconductor film 208 diffuses to the interface between the insulating film 214 and the oxide semiconductor film 208, the level As a result, the trapped electrons may be trapped in the insulating film 214 and the oxide semiconductor. Since it remains near the interface of the conductor film 208, the threshold voltage of the transistor is shifted in the positive direction. It makes them do it.

[0188] Nitrogen oxide reacts with ammonia and oxygen during the heat treatment. The nitrogen oxide contained in the insulating film 216 reacts with the ammonia contained in the insulating film 216 during the heat treatment. Therefore, the nitrogen oxide contained in the insulating film 214 is reduced. Electrons are less likely to be trapped at the interface between the oxide semiconductor film 206 and the oxide semiconductor film 208.

[0189] By using the oxide insulating film as the insulating film 214, the threshold voltage of the transistor can be reduced. It is possible to reduce the shift in the electrical characteristics of the transistor. can.

[0190] Note that the heat treatment in the manufacturing process of a transistor is typically performed at a temperature lower than 400° C. or lower than 375° C. By the heat treatment at a temperature of 340° C. or more and 360° C. or less, the insulating film 214 is In the spectrum obtained by ESR measurement below 0 K, the g value is 2.037 or more. a first signal of 9 or less, a second signal of g-value 2.001 or more and 2.003 or less, and A third signal with a g value between 1.964 and 1.966 is observed. The split width of the null and second signals, and the split width of the second and third signals The split width is about 5 mT in the X-band ESR measurement. The first signal is between 2.039 and 2.039, and the second signal is between 2.001 and 2.003. The sum of the spin densities of the signals and the third signal with g values ​​between 1.964 and 1.966 The total is 1 x 10 18 spins / cm 3 less than 1 × 10 17 spins / cm 3 More than 1×10 18 spins / cm 3 is less than.

[0191] In addition, the g value is between 2.037 and 2.039 in the ESR spectrum below 100K. The first signal has a g value of 2.001 or more and 2.003 or less, and the second signal has a g value of 1 The third signal, between 0.964 and 1.966, is nitrogen oxide (NO x , x is greater than 0 These correspond to signals caused by nitrogen oxides (<2 or less, preferably 1 to 2). Examples include nitrogen monoxide and nitrogen dioxide. That is, the g value is between 2.037 and 2.039. a first signal having a g value of 2.001 or more and 2.003 or less, and a second signal having a g value of The smaller the total spin density of the third signal between 1.964 and 1.966, the more acid This means that the content of nitrogen oxides contained in the oxide insulating film is low.

[0192] The oxide insulating film has a nitrogen concentration of 6×10 as measured by SIMS. 20 atoms / cm 3 The following is the result.

[0193] The substrate temperature is between 220℃ and 350℃, and PEC using silane and nitrous oxide is used. By forming the oxide insulating film using a VD method, a dense and hard film can be obtained. It can be formed.

[0194] The insulating film 216 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. The oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition is formed using When heated, some of the oxygen is released. The oxygen content is greater than the stoichiometric value. The oxide insulating film was analyzed by thermal desorption spectroscopy (TDS). Spectroscopy), the amount of oxygen released, converted to oxygen atoms, was 1.0 x 10 19 atoms / cm 3 or more, preferably 3.0 × 10 20 atoms / cm 3 That's all. The surface temperature of the film in the above TDS was 100°C or higher. The temperature is preferably in the range of 00°C or lower, or 100°C or higher and 500°C or lower.

[0195] The insulating film 216 has a thickness of 30 nm to 500 nm, preferably 50 nm or more. Silicon oxide, silicon oxynitride, etc., of 400 nm or less can be used.

[0196] Furthermore, it is preferable that the insulating film 216 has a small number of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 1.5 x 10 18 spins / cm 3 Less than, or even 1×10 18 spins / cm 3 It is preferable that the insulating film 216 has a higher oxide semiconductor content than the insulating film 214. Since it is separated from the insulating film 208, it may have a higher defect density than the insulating film 214.

[0197] In addition, the insulating films 214 and 216 can be made of the same material, so that the insulating films In some cases, the interface between the film 214 and the insulating film 216 cannot be clearly confirmed. In this embodiment, the interface between the insulating film 214 and the insulating film 216 is shown by a broken line. In the embodiment, the two-layer structure of the insulating film 214 and the insulating film 216 has been described. The present invention is not limited to this, and may be a single-layer structure of the insulating film 214 or the insulating film 216, for example.

[0198] The insulating film 218 is a blocking material for oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing the insulating film 218, oxygen from the oxide semiconductor film 208 can be prevented from being released. Diffusion to the outside, diffusion of oxygen contained in the insulating films 214 and 216 to the outside, and oxidation from the outside This can prevent hydrogen, water, and the like from entering the compound semiconductor film 208.

[0199] The insulating film 218 may be, for example, a nitride insulating film. Examples include silicon nitride, silicon nitride oxide, aluminum nitride, and aluminum nitride oxide. It should be noted that there are blocking effects of oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. Instead of a nitride insulating film, which has a blocking effect on oxygen, hydrogen, water, etc., an oxide insulating film is used. An oxide insulating film having a blocking effect against oxygen, hydrogen, water, etc. may be provided. Examples include aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, Examples include yttrium oxide, yttrium oxynitride, hafnium oxide, and hafnium oxynitride. do.

[0200] <2-2. Configuration examples of semiconductor devices> Next, regarding a configuration example different from that of the transistor 200 shown in FIGS. 14(A), 14(B), and 14(C), This will be explained using Figures 15(A), (B), and (C).

[0201] FIG. 15A is a top view of a transistor 250 which is a semiconductor device of one embodiment of the present invention. 15(B) is a cross-sectional view taken along the dashed line X1-X2 in FIG. 15(A). 15(C) corresponds to the cross section taken along the dashed line Y1-Y2 in FIG. 15(A). This corresponds to a cross-sectional view.

[0202] The transistor 250 includes a conductive film 204 over a substrate 202, which functions as a gate electrode, and a An insulating film 206 on the plate 202 and the conductive film 204, an insulating film 207 on the insulating film 206, and an insulating film The oxide semiconductor film 208 on the film 207 and the insulating films 214 and 216 on the oxide semiconductor film 208 The oxide semiconductor film 208 is then exposed through the opening 251 a provided in the insulating films 214 and 216 . A conductive film 212a functioning as a source electrode and insulating films 214 and 216 are electrically connected to each other. The drain is electrically connected to the oxide semiconductor film 208 through an opening 251b provided in the drain. and a conductive film 212b which functions as an electrode. In detail, an insulating film 218 is provided on the conductive films 212a and 212b and the insulating film 216. The insulating films 214 and 216 function as protective insulating films for the oxide semiconductor film 208. The insulating film 218 functions as a protective insulating film for the transistor 250.

[0203] The transistor 200 shown above has a channel-etched structure, whereas The transistor 250 shown in FIGS. 15A, 15B, and 15C has a channel protection structure. As described above, the semiconductor device of one embodiment of the present invention can be used as both a channel etch type and a channel protection type. The other configurations are the same as those of the transistor 200. and has the same effect.

[0204] <2-3. Configuration examples of semiconductor devices> Next, regarding a configuration example different from that of the transistor 250 shown in FIGS. 15(A), 15(B), and 15(C), This will be explained using Figures 16(A), (B), and (C).

[0205] FIG. 16A is a top view of a transistor 260 which is a semiconductor device of one embodiment of the present invention. 16(B) is a cross-sectional view taken along the dashed line X1-X2 in FIG. 16(A). 16(C) corresponds to the cross section taken along the dashed line Y1-Y2 in FIG. 16(A). This corresponds to a cross-sectional view.

[0206] The transistor 260 includes a conductive film 204 over a substrate 202, which functions as a gate electrode, and a An insulating film 206 on the plate 202 and the conductive film 204, an insulating film 207 on the insulating film 206, and an insulating film The oxide semiconductor film 208 on the film 207 and the insulating films 214 and 216 on the oxide semiconductor film 208 and a conductive film 212 serving as a source electrode electrically connected to the oxide semiconductor film 208. a conductive film 202 functioning as a drain electrode electrically connected to the oxide semiconductor film 208; 12b. In addition, the transistor 260, more specifically, the conductive films 212a and 212b are An insulating film 218 is provided on the insulating film 214 and the insulating film 216. The insulating film 218 functions as a protective insulating film for the oxide semiconductor film 208. It functions as a protective insulating film for the capacitor 260.

[0207] The transistor 260 is a transistor 250 shown in FIGS. 15(A), (B), and (C) and an insulating film. Specifically, the insulating films 214 and 216 of the transistor 260 are different in shape. The insulating film 16 is provided in an island shape on the channel region of the oxide semiconductor film 208. The other components are as follows: It is similar to the transistor 250 and has the same effect.

[0208] <2-4. Configuration examples of semiconductor devices> Next, regarding a configuration example different from that of the transistor 200 shown in FIGS. 14(A), 14(B), and 14(C), This will be explained using Figures 17(A), (B), and (C).

[0209] FIG. 17A is a top view of a transistor 270 which is a semiconductor device of one embodiment of the present invention. 17(B) is a cross-sectional view taken along the dashed line X1-X2 in FIG. 17(A). 17(C) corresponds to the cross section taken along the dashed line Y1-Y2 in FIG. 17(A). This corresponds to a cross-sectional view.

[0210] The transistor 270 includes a conductive film 204 over a substrate 202, which functions as a first gate electrode. an insulating film 206 on the substrate 202 and the conductive film 204; and an insulating film 207 on the insulating film 206. an oxide semiconductor film 208 over the insulating film 207; an insulating film 214 over the oxide semiconductor film 208; 216 and a conductive film functioning as a source electrode electrically connected to the oxide semiconductor film 208. 212a and a conductive film serving as a drain electrode electrically connected to the oxide semiconductor film 208. the conductive film 212b, the insulating film 218 on the conductive films 212a, 212b and the insulating film 216, and the insulating film and conductive films 220a and 220b on the film 218.

[0211] In the transistor 270, the insulating films 214, 216, and 218 are The second insulating film functions as a second gate insulating film of the transistor 270. In the above, the conductive film 220a has a function as, for example, a pixel electrode used in a display device. The conductive film 220a is formed through openings provided in the insulating films 214, 216 and 218. The transistor 270 is connected to the conductive film 212b through the gate electrode 252c. The conductive film 220b functions as a second gate electrode (also referred to as a back gate electrode).

[0212] As shown in FIG. 17(C), the conductive film 220b is formed by insulating films 206, 207, and insulating film 2 14, 216, and the openings 252a, 252b provided in the insulating film 218. Therefore, the conductive film 220b and the conductive film 220c are connected to the conductive film 204 which functions as the gate electrode of the The same potential is applied to the membrane 204 .

[0213] In this embodiment, openings 252a and 252b are provided, and the conductive film 220b and Although the structure in which the conductive film 204 is connected has been exemplified, the present invention is not limited to this. Only one of the openings 252a and 252b is formed, and the conductive film 220b and The conductive film 204 is connected, or the openings 252a and 252b are not provided, and the conductive film 204 is not connected. The conductive film 220b and the conductive film 204 may not be connected to each other. In the case where the conductive film 204 is not connected, the conductive film 220b and the conductive film 204 are respectively connected to different A potential can be applied.

[0214] As shown in FIG. 17B, the oxide semiconductor film 208 is used as a first gate electrode. The conductive film 204 functions as a gate electrode, and the conductive film 220b functions as a second gate electrode. The second electrode is sandwiched between two conductive films that function as gate electrodes. The length in the channel length direction and the channel width direction of the conductive film 220b functioning as a gate electrode The length is longer than the length of the oxide semiconductor film 208 in the channel length direction and the channel width direction. The entire oxide semiconductor film 208 is covered with insulating films 214, 216, and 218. The conductive film 220b is covered with the conductive film 220b via the second gate electrode. The insulating films 206, 207, and the conductive film 204 functioning as the first gate electrode are connected to each other. In the openings 252a and 252b provided in the insulating films 214 and 216 and the insulating film 218, Therefore, the side surfaces of the oxide semiconductor film 208 in the channel width direction are covered with the insulating films 214 and 215. 16, and faces the conductive film 220b that functions as the second gate electrode via the insulating film 218. is doing.

[0215] In other words, in the channel width direction of the transistor 270, The conductive film 204 functioning as the first gate electrode and the conductive film 220b functioning as the second gate electrode are Insulating films 206 and 207 functioning as gate insulating films and a second insulating film functioning as a gate insulating film The insulating films 214, 216, and 218 are connected in openings provided therein, and The insulating films 206 and 207 function as the first gate insulating film and the insulating film 208 function as the second gate insulating film. The oxide semiconductor film 208 is surrounded by insulating films 214, 216, and 218. It is a structure that includes:

[0216] With such a structure, the oxide semiconductor film 208 included in the transistor 270 The conductive film 204 functions as a first gate electrode and the conductive film 205 functions as a second gate electrode. The transistor 270 can be electrically surrounded by the electric field of the conductive film 220b. The electric field of the first gate electrode and the second gate electrode causes the oxide film to form a channel region. The device structure of the transistor that electrically surrounds the oxide semiconductor film is called the surrounded ch This can be called an s-channel structure.

[0217] Since the transistor 270 has an s-channel structure, The conductive film 204 functions as a gate electrode, and the electric field for inducing the channel is effectively applied to the oxide semiconductor. This allows the voltage to be applied to the body membrane 208, improving the current driving capability of the transistor 270. It is possible to obtain high on-current characteristics. It is also possible to increase the on-current. Therefore, it is possible to miniaturize the transistor 270. The conductive film 204 functions as a first gate electrode and the conductive film 205 functions as a second gate electrode. Since the transistor 270 has a structure surrounded by the conductive film 220b, the mechanical strength of the transistor 270 is increased. It can be done.

[0218] <2-5. Configuration examples of semiconductor devices> Next, regarding a configuration example different from that of the transistor 270 shown in FIGS. 17(A), 17(B), and 17(C), This will be explained using Figures 18(A), (B), (C), and (D).

[0219] 18(A) and (B) are cross-sectional views of modified examples of the transistor 270 shown in FIGS. 17(B) and (C). 18(C) and (D) are diagrams illustrating the transistor 270 shown in FIG. It is a cross-sectional view of a modified example.

[0220] The transistor 270A shown in FIGS. 18(A) and (B) has a three-layer stacked structure for the oxide semiconductor film 208 included in the transistor 270 shown in FIGS. 17(B) and (C). More specifically the oxide semiconductor film 208 included in the transistor 270A includes an oxide semiconductor film 208a, an oxide semiconductor film 208b, and an oxide semiconductor film 208c.

[0221] The transistor 270B shown in FIGS. 18(C) and (D) has a two-layer stacked structure for the oxide semiconductor film 208 included in the transistor 270 shown in FIGS. 17(B) and (C). More specifically the oxide semiconductor film 208 included in the transistor 270B includes an oxide semiconductor film 208b, and an oxide semiconductor film 208c.

[0222] Here, the band structures of the insulating films in contact with the oxide semiconductor films 208a, 208b, 208c, and the oxide semiconductor films 208b and 208c will be described using FIG. 19.

[0223] FIG. 19(A) shows an example of the band structure in the film thickness direction of a stacked structure including an insulating film 207, oxide semiconductor films 208a, 208b, 208c, and an insulating film 214. Further, FIG. 19(B ) shows an example of the band structure in the film thickness direction of a stacked structure including an insulating film 207, oxide semiconductor films 208b, 208c, and an insulating film 214. Note that the band structure shows the energy level (Ec) of the lower end of the conduction band of the insulating film 207, oxide semiconductor films 208a, 208b, 208c, and insulating film 214 for easy understanding.

[0224] Also, in FIG. 19(A), silicon oxide films are used as the insulating films 207 and 214, and the oxide semiconductor The conductor film 208a is a metal oxide film having an atomic ratio of metal elements of In:Ga:Zn=1:1:1.2. The oxide semiconductor film 208b was formed using an oxide semiconductor film formed using an oxide target. A metal oxide target with an atomic ratio of In:Ga:Zn=4:2:4.1 was used. The oxide semiconductor film 208c is formed by using an oxide semiconductor film having a metal element number of 100 or less. The oxide formed using a metal oxide target with a ratio of In:Ga:Zn=1:1:1.2 FIG. 1 is a band diagram of a structure using a compound semiconductor film.

[0225] 19B, silicon oxide films are used as the insulating films 207 and 214, and oxide semiconductor films are used as the insulating films 207 and 214. The conductor film 208b is a metal oxide film having an atomic ratio of In:Ga:Zn=4:2:4.1. The oxide semiconductor film 208c was formed using an oxide semiconductor film formed using an oxide target. A metal oxide target with an atomic ratio of In:Ga:Zn=1:1:1.2 was used. FIG. 10 is a band diagram of a structure using an oxide semiconductor film formed by

[0226] As shown in FIGS. 19A and 19B, in the oxide semiconductor films 208a, 208b, and 208c, In other words, the energy level at the bottom of the conduction band changes smoothly. In order to have such a band structure, the oxide The interface between the oxide semiconductor film 208a and the oxide semiconductor film 208b, or the oxide semiconductor film 208b At the interface between the oxide semiconductor film 208c and the oxide semiconductor film 208b, defect quasi-crystallization occurs, such as a trap center or a recombination center. Assume that there are no impurities that would form positions.

[0227] In order to form a continuous junction in the oxide semiconductor films 208a, 208b, and 208c, Each film is deposited using a multi-chamber deposition system (sputtering system) equipped with a lock chamber. It is necessary to continuously stack the layers without exposing them to the air.

[0228] 19A and 19B, the oxide semiconductor film 208b forms a well. In the transistor using the above stacked structure, the channel region is formed of the oxide semiconductor film 2 It can be seen that it is formed in 08b.

[0229] Note that by providing the oxide semiconductor films 208a and 208c, the oxide semiconductor film 208 Therefore, trap states that may be formed in the oxide semiconductor film 208b can be kept away from the oxide semiconductor film 208b.

[0230] In addition, the trap states are below the conduction band of the oxide semiconductor film 208b which functions as a channel region. The energy level (Ec) at the edge of the electron trap may be farther from the vacuum level, and electrons may be trapped in the trap level. When electrons accumulate in the trap level, negative fixed This results in a charge, and the threshold voltage of the transistor shifts in the positive direction. The trap level is lower than the energy level (Ec) of the conduction band minimum of the oxide semiconductor film 208b. It is preferable to configure the trap level so that it is close to the empty level. This makes it difficult for electrons to accumulate, which increases the on-state current of the transistor. , the field effect mobility can be increased.

[0231] The oxide semiconductor films 208a and 208c have a conduction band lower than that of the oxide semiconductor film 208b. The energy level of the edge is close to the vacuum level, and typically, and the energy levels of the conduction band minimums of the oxide semiconductor films 208a and 208c. The difference between the two is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, or 1 eV That is, the electron affinity of the oxide semiconductor films 208a and 208c and the The difference between the electron affinity of the organic film 208b and the electron affinity of the organic film 208c is 0.15 eV or more, or 0.5 eV or more, and eV or less, or 1 eV or less.

[0232] With such a structure, the oxide semiconductor film 208b serves as a main path for current, and The oxide semiconductor films 208a and 208c function as a channel region. The oxide semiconductor film 208b is formed by using an oxide semiconductor material containing one or more metal elements. Since the oxide semiconductor film 208a is an oxide semiconductor film, the interface between the oxide semiconductor film 208a and the oxide semiconductor film 208b, Alternatively, interface scattering occurs at the interface between the oxide semiconductor film 208b and the oxide semiconductor film 208c. Therefore, the movement of carriers is not hindered at the interface, and the transistor The field effect mobility of the silicon dioxide increases.

[0233] In addition, the oxide semiconductor films 208a and 208c function as part of a channel region. In order to prevent this, a material having sufficiently low electrical conductivity is used. 208a and 208c are the electron affinities (the difference between the vacuum level and the energy level at the bottom of the conduction band) is smaller than that of the oxide semiconductor film 208b, and the energy level of the conduction band minimum is Use a material that has a difference (band offset) with the conduction band bottom energy level of 208b In addition, the difference in threshold voltage depending on the magnitude of the drain voltage is suppressed. In order to suppress this, the energy level of the conduction band minimum of the oxide semiconductor films 208a and 208c must be The energy level of the oxide semiconductor film 208b is lower than the vacuum level by 0.2 eV or more. It is preferable to use a material close to the vacuum level, preferably a material close to the vacuum level by 0.5 eV or more.

[0234] In addition, the oxide semiconductor films 208a and 208c do not contain a spinel crystal structure. It is preferable that the oxide semiconductor films 208a and 208c have a spinel crystal structure. When the spinel type crystal structure is contained, the conductive film 212a, 21 The constituent elements of 2b may diffuse into the oxide semiconductor film 208b. When the conductive films 208a and 208c are made of CAAC-OS, the structure of the conductive films 212a and 212b is This is preferable because it increases the blocking property of the component element, for example, copper element.

[0235] The thicknesses of the oxide semiconductor films 208a and 208c are determined by the amount of the constituent elements of the conductive films 212a and 212b. The insulating film has a thickness that is greater than or equal to a thickness that can prevent the insulating film from diffusing into the oxide semiconductor film 208b. The thickness of the oxide semiconductor film 208b is set to be less than the thickness that prevents oxygen from being supplied from the film 214 to the oxide semiconductor film 208b. When the thickness of the oxide semiconductor films 208a and 208c is 10 nm or more, the conductive film 212a This can prevent the constituent elements of the oxide semiconductor film 212b from diffusing into the oxide semiconductor film 208b. In addition, when the thickness of the oxide semiconductor films 208a and 208c is 100 nm or less, the insulating film 214 Oxygen can be effectively supplied from the oxide semiconductor film 208b to the oxide semiconductor film 208b.

[0236] In this embodiment, the oxide semiconductor films 208a and 208c are formed by adding a metal element. The atomic ratio of In:Ga:Zn was 1:1:1.2. However, the present invention is not limited to this. The compound semiconductor films 208a and 208c are made of In:Ga:Zn=1:1:1 [atomic ratio], In:Ga:Zn=1:3:2 [atomic ratio], In:Ga:Zn=1:3:4 [atomic ratio] ], or a metal oxide target with In:Ga:Zn=1:3:6 [atomic ratio] A formed oxide semiconductor film may be used.

[0237] The oxide semiconductor films 208a and 208c were formed using a compound of In:Ga:Zn=1:1:1 [primary When a metal oxide target having a molecular weight ratio of 0.1 to 0.2 is used, the oxide semiconductor films 208a and 208c have a In:Ga:Zn=1:β1(0<β1≦2):β2(0<β2≦3) The oxide semiconductor films 208a and 208c are formed of In:Ga:Zn=1:3:4 [atomic When a metal oxide target having a molecular weight ratio of 0.1 to 0.2 is used, the oxide semiconductor films 208a and 208c have a In:Ga:Zn=1:β3(1≦β3≦5):β4(2≦β4≦6) The oxide semiconductor films 208a and 208c are made of In:Ga:Zn=1:3:6 [atomic When a metal oxide target having a molecular weight ratio of 0.1 to 0.2 is used, the oxide semiconductor films 208a and 208c have a In:Ga:Zn=1:β5(1≦β5≦5):β6(4≦β6≦8) .

[0238] In addition, the oxide semiconductor film 208 included in the transistors 200 and 270 and the The oxide semiconductor film 208c included in 70A and 270B is a conductive film 212a , the oxide semiconductor film in the region exposed from 212b becomes thinner. A shape having a recess in a part is shown as an example, but one embodiment of the present invention is not limited to this. The oxide semiconductor film in the region exposed from the conductive films 212a and 212b does not have a recess. An example of this case is shown in Figure 20(A)(B)(C)(D). Figure 20(A)(B) 20(C) and 20(D) are cross-sectional views showing an example of a semiconductor device. The oxide semiconductor film 208 of the transistor 200 shown above does not have a recess. 0(C) and 0(D) are diagrams showing the structure of the transistor 270B in which the oxide semiconductor film 208 has a recess. It is a structure that does not have

[0239] In addition, the transistor according to this embodiment can be freely combined with each of the above structures. It is possible to do this.

[0240] <2-6. Manufacturing method of semiconductor device> Next, a manufacturing method of a semiconductor device of one embodiment of the present invention will be described with reference to the drawings.

[0241] Note that the conductive film, the insulating film, the oxide semiconductor film, and the like included in the semiconductor device of one embodiment of the present invention Various films are deposited by sputtering, chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (P It can be formed using ECVD, vacuum evaporation, pulsed laser deposition (PLD), However, the present invention is not limited to this, and examples thereof include coating methods, printing methods, and thermal CVD (Chemical Vapor Deposition (Vapor Deposition) or Atomic Layer Deposition (ALD) It may be formed by a thermal CVD method. MOCVD (Metal Organic Chemical Vapor Deposition) In addition, MOCVD is used to produce conductive films, insulating films, and oxide films. A compound semiconductor film or the like may be formed.

[0242] The thermal CVD method is a film formation method that does not use plasma, so defects can occur due to plasma damage. This has the advantage that no further processing is required.

[0243] In the thermal CVD method, the source gas and oxidant are simultaneously fed into a chamber, and the chamber is heated to atmospheric pressure. Alternatively, a film is formed by reacting the material near or on the substrate under reduced pressure and depositing the material on the substrate. You may go.

[0244] In addition, in the ALD method, the pressure inside the chamber is atmospheric or reduced, and the source gas for the reaction is The gases may be introduced into the chamber in sequence, and the film may be formed by repeating this gas introduction sequence. For example, by switching between two or more types of switching valves (also called high-speed valves), The source gases are supplied to the chamber in order, and the first source gas is supplied to the chamber in order to prevent the mixture of the source gases. Inert gas (argon, nitrogen, etc.) is introduced simultaneously with or after the fuel gas. In case of simultaneously introducing an inert gas, the inert gas is The second source gas may be introduced as a carrier gas, and an inert gas may be introduced at the same time as the second source gas is introduced. Also, instead of introducing an inert gas, the first raw material gas is discharged by vacuum evacuation. The first source gas may be adsorbed on the surface of the substrate to form a first layer. The second layer is deposited on the first layer by reacting with the second source gas introduced later. This process is repeated several times while controlling the gas introduction order until a desired thickness is achieved. By doing so, a thin film with excellent step coverage can be formed. The thickness of the thin film is determined by the order of gas introduction. The thickness can be precisely adjusted by changing the number of times the process is repeated. This is suitable for producing thin FETs.

[0245] Thermal CVD methods such as MOCVD can be used to form the conductive film, insulating film, oxide semiconductor film, It is possible to form various films such as metal oxide films. For example, an In-Ga-Zn-O film can be formed. When forming a film, trimethylindium, trimethylgallium, and dimethylzinc are used. The chemical formula of trimethylindium is In(CH3)3. The chemical formula for zinc is Ga(CH3)3. The chemical formula for dimethylzinc is Zn (CH3)2. In addition, the combination is not limited to these, and instead of trimethylgallium, Alternatively, triethylgallium (chemical formula Ga(C2H5)3) can be used, and dimethylgallium Diethylzinc (chemical formula Zn(C2H5)2) can also be used instead of lead.

[0246] For example, when forming a hafnium oxide film using a film forming apparatus that uses ALD, the solvent and a liquid containing a hafnium precursor compound (hafnium alkoxide, tetrakisdimethylamine, The raw material gas is vaporized hafnium amide (TDMAH) and oxidized Two types of gases are used: tetrakisdimethylamide hafnium (TDA) and ozone (O3). The chemical formula for nium is Hf[N(CH3)2]4. Other material liquids include tetrahydrofuran. Examples include kis(ethylmethylamido)hafnium.

[0247] For example, when forming an aluminum oxide film using an ALD film forming device, A liquid containing a catalyst and an aluminum precursor compound (e.g., trimethylaluminum (TMA)) is added. Two types of gases are used: vaporized source gas and H2O as an oxidizing agent. The chemical formula for aluminum is Al(CH3)3. Other liquid materials include Tris( dimethylamido)aluminum, triisobutylaluminum, aluminum tris(2 ,2,6,6-tetramethyl-3,5-heptanedionate).

[0248] For example, when forming a silicon oxide film using a film forming device that uses ALD, Chlorodisilane is adsorbed onto the surface to be coated, removing the chlorine contained in the adsorbed material, and the oxidizing gas (O 2. Nitrous oxide (NO) radicals are supplied to react with the adsorbed material.

[0249] For example, when forming a tungsten film using an ALD deposition system, WF6 The initial tungsten film was formed by sequentially introducing BH gas and BH gas. The tungsten film is formed using B2H6 gas and H2 gas. iH4 gas may also be used.

[0250] For example, an oxide semiconductor film, such as In-Ga-ZnO, can be formed using a film formation device that uses ALD. When forming a film, an In-O layer is formed using In(CH3)3 gas and O3 gas. Then, a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then Z The ZnO layer is formed using n(CH3)2 gas and O3 gas. The order of these layers is The example is not limited to this. In addition, by mixing these gases, an In-Ga-O layer or an In-Zn-O layer can be formed. Alternatively, a mixed compound layer such as a Ga-Zn-O layer may be formed. HO gas obtained by bubbling with an inert gas such as HCl may be used. However, O gas containing no H may be used. It is preferable to use In(CH3)3 gas. )3 gas may be used instead of Ga(CH3)3 gas. Alternatively, Zn(CH3)2 gas may be used.

[0251] [Method 1 for manufacturing semiconductor device] First, Transistor 2 shown in FIGS. 18C and 18D, which is a semiconductor device of one embodiment of the present invention, A method for manufacturing 70B will be described with reference to FIGS. 21 to 23. 21(F), 22(A) to 22(F), and 23(A) to 23(F) are 21A, 21B, 21C, and 21E are cross-sectional views illustrating a method for manufacturing a semiconductor device. 22(A)(C)(E) and 23(A)(C)(E) are cross-sectional views in the channel length direction. 21(B)(D)(F), 22(B)(D)(F), and 23(B)(D) (F) is a cross-sectional view in the channel width direction.

[0252] First, a conductive film is formed on the substrate 202, and the conductive film is then subjected to a lithography process and an etching process. Then, the conductive film 204 is formed to function as a gate electrode. Insulating films 206 and 207 that function as gate insulating films are formed on the substrate 04 (FIG. 21(A)). See B).

[0253] In this embodiment, a glass substrate is used as the substrate 202, and a conductive film is formed on the substrate 202 to function as a gate electrode. As the conductive film 204, a tungsten film having a thickness of 100 nm is formed by sputtering. In addition, a silicon nitride film having a thickness of 400 nm was formed as the insulating film 206 by the PECVD method. A silicon oxynitride film having a thickness of 50 nm is formed as the insulating film 207 by the PECVD method. .

[0254] The insulating film 206 may have a laminated structure of silicon nitride films. The insulating film 206 is made of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. A three-layer laminated structure with a silicon film can be formed. An example of the three-layer laminated structure is as follows: It can be formed as follows.

[0255] The first silicon nitride film is formed by, for example, silane at a flow rate of 200 sccm, PECVD was performed using nitrogen at a flow rate of 100 sccm and ammonia gas at a flow rate of 100 sccm as source gases. The pressure in the reaction chamber was controlled to 100 Pa, and a high frequency of 27.12 MHz was generated. A power of 2000 W is supplied using a microwave power supply, and the thickness is formed to be 50 nm. stomach.

[0256] For the second silicon nitride film, silane at a flow rate of 200 sccm and 2000 sccm The PECVD equipment was operated using nitrogen at a flow rate of 2000 sccm and ammonia gas at a flow rate of 2000 sccm as raw material gases. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high frequency power supply A power of 2000 W may be supplied using a heater to form the film to a thickness of 300 nm.

[0257] The third silicon nitride film was formed using silane at a flow rate of 200 sccm and silane at a flow rate of 5000 sccm. The pressure in the reaction chamber was adjusted to 100 The thickness was measured by controlling the temperature to 50 Pa and supplying 2000 W of power using a 27.12 MHz high frequency power supply. It is sufficient to form it so that the thickness is 50 nm.

[0258] The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during the formation can be 350° C. or less.

[0259] By forming the insulating film 206 as a three-layered structure of silicon nitride films, for example, the conductive film 20 When a conductive film containing copper (Cu) is used for 4, the following effects are achieved.

[0260] The first silicon nitride film can suppress the diffusion of copper (Cu) elements from the conductive film 204. The second silicon nitride film has the function of releasing hydrogen and functions as a gate insulating film. The third silicon nitride film can improve the breakdown voltage of the insulating film. The hydrogen released from the silicon nitride film is small, and the hydrogen released from the second silicon nitride film is diffused. can be suppressed.

[0261] The insulating film 207 is formed by the oxide semiconductor film 208 (more specifically, the oxide In order to improve the interface characteristics with the oxide semiconductor film 208b, the oxide semiconductor film 208b is formed of an insulating film containing oxygen. preferable.

[0262] Next, a stacked film of oxide semiconductor films is formed over the insulating film 207, and the stacked film is formed into a desired shape. By processing, an island-shaped oxide semiconductor film including the oxide semiconductor film 208b and the oxide semiconductor film 208c is formed. An oxide semiconductor film 208 is formed (see FIGS. 21C and 21D).

[0263] The temperature at which the oxide semiconductor film 208 is formed is preferably room temperature or higher and lower than 340° C. is from room temperature to 300°C, more preferably from 100°C to 250°C, and even more preferably The temperature is 100° C. or higher and 200° C. or lower. On the other hand, the crystallinity of the nitride semiconductor film 208 can be improved. When a glass substrate (for example, a sixth to tenth generation glass substrate) is used, the oxide semiconductor film 208 is If the temperature during film formation is set to 150° C. or higher and lower than 340° C., the substrate 202 will be deformed (distorted). Therefore, when using a large glass substrate, it is necessary to By setting the temperature during the formation of the conductive film 208 to 100° C. or higher and lower than 150° C., Deformation of the material can be suppressed.

[0264] Note that the oxide semiconductor films 208b and 208c were formed at the same substrate temperature. However, the oxide semiconductor film 208b and the oxide semiconductor film 208 By using the same substrate temperature as in the case of the first embodiment, the manufacturing cost can be reduced. do.

[0265] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: 2:4.1 [atomic ratio]) by a sputtering method to form the oxide semiconductor film 208b. Then, an oxide semiconductor film consisting of In-Ga-Zn metal oxide film was formed in vacuum. Sputtering was performed using a target (In:Ga:Zn=1:1:1.2 [atomic ratio]). An oxide semiconductor film to be the oxide semiconductor film 208c is formed by a method. The substrate temperature during deposition of the oxide semiconductor film 208 is set to 170° C. The oxide semiconductor film 208 was formed using a deposition gas containing oxygen and argon. Use.

[0266] When the oxide semiconductor film is formed by a sputtering method, a rare earth metal is used as the sputtering gas. A gas (typically argon), oxygen, a rare gas, and a mixed gas of oxygen are used as appropriate. In the case of a mixed gas, it is preferable to increase the ratio of oxygen to rare gas. For example, oxygen gas used as a sputtering gas and The argon gas has a dew point of -40°C or less, preferably -80°C or less, more preferably -10 By using gas that has been highly purified to below 0°C, more preferably below -120°C, oxides can be This can prevent moisture and the like from being absorbed into the semiconductor film as much as possible.

[0267] In addition, when the oxide semiconductor film is formed by a sputtering method, the sputtering gas is an oxygen gas. When the oxide semiconductor film is formed, oxygen is preferably used as a sputtering gas. When the oxide semiconductor film is formed, the oxide semiconductor film is formed in the lower layer (here, in the insulating film 207). Therefore, by providing an excess oxygen region in the insulating film 207, This makes it possible to:

[0268] In addition, when the oxide semiconductor film is formed by sputtering, The chamber is cladded to remove as much water as possible, which is an impurity for the oxide semiconductor film. A high vacuum (5×10) was used by using an adsorption type vacuum pump such as an ion pump. -7 Pa to 1× 10 -4 It is preferable to evacuate the gas to a temperature of about 100 Pa. Alternatively, a turbomolecular pump and a cold A trap is used to extract gases, especially gases containing carbon or hydrogen, from the exhaust system into the chamber. It is preferable to prevent backflow.

[0269] Next, a source electrode and a drain electrode are formed on the insulating film 207 and the oxide semiconductor film 208. Then, a conductive film 212 is formed by sputtering (see FIGS. 21E and 21F).

[0270] In this embodiment, the conductive film 212 is a tungsten film having a thickness of 50 nm and a SiO 2 film having a thickness of 40 A laminated film in which a 0 nm thick aluminum film and a 10 nm thick aluminum film are laminated in this order is formed by sputtering. In this embodiment, the conductive film 212 has a two-layer laminated structure, but the present invention is not limited to this. For example, the conductive film 212 may be a tungsten film having a thickness of 50 nm and a 400 nm thick tungsten film having a thickness of 400 nm. A three-layer laminate structure consisting of a 100 nm thick aluminum film and a 100 nm thick titanium film stacked in sequence. You may do so.

[0271] Next, the conductive film 212 is processed into a desired shape, thereby forming conductive films separated from each other. 212a and 212b are formed (see FIGS. 22(A) and 22(B)).

[0272] In this embodiment, the conductive film 212 is processed using a dry etching apparatus. However, the method for processing the conductive film 212 is not limited to this. For example, a wet etching method may be used. A wet etching apparatus may be used. The conductive film 212 can be processed by using a dry etching apparatus rather than by etching. On the other hand, a dry etching apparatus is used to form a conductive film 2 It is preferable to process the conductive film 212 using a wet etching apparatus rather than processing the conductive film 12. The manufacturing cost can be reduced.

[0273] After the conductive films 212a and 212b are formed, the oxide semiconductor film 208 (more specifically, The surface (back channel side) of the oxide semiconductor film 208c may be cleaned. For example, cleaning using a chemical solution such as phosphoric acid can be used. By performing the cleaning, impurities (for example, impurities adhering to the surface of the conductive film 208c) are removed. The cleaning process can be performed to remove elements contained in 12a, 212b, etc. In some cases, cleaning may not be necessary.

[0274] In addition, either one of the steps of forming the conductive films 212a and 212b and the cleaning step described above or In both cases, the regions of the oxide semiconductor film 208 that are exposed from the conductive films 212a and 212b are For example, the oxide semiconductor film 208c may be thinner than the oxide semiconductor film 208b. Regions of reduced film thickness may be formed.

[0275] Next, the insulating film 214 and the conductive films 212a and 212b are formed over the oxide semiconductor film 208 and the conductive films 212a and 212b. An insulating film 216 is formed (see FIGS. 22(C) and (D)).

[0276] After the insulating film 214 is formed, the insulating film 216 is successively formed without exposure to the air. After the insulating film 214 is formed, it is preferable to control the flow rate, pressure, and temperature of the source gas without exposing the insulating film 214 to the atmosphere. By adjusting one or more of the frequency power and the substrate temperature, the insulating film 216 is continuously formed. The concentration of impurities derived from atmospheric components can be reduced at the interface between the insulating film 214 and the insulating film 216. At the same time, oxygen contained in the insulating films 214 and 216 is transferred to the oxide semiconductor film 208. As a result, the amount of oxygen vacancies in the oxide semiconductor film 208 can be reduced. .

[0277] For example, a silicon oxynitride film is formed as the insulating film 214 by using the PECVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. It is preferable to use the following gases. Typical examples of deposition gases containing silicon include silane, disilane, and the like. Examples of oxidizing gases include nitrous oxide, nitrous dioxide, etc. In addition, the flow rate of the oxidizing gas is set to be 20 times or more the flow rate of the deposition gas. The pressure in the processing chamber is set to less than 100 times, preferably 40 times or more and 80 times or less, and the pressure in the processing chamber is set to less than 100 Pa. By using the PECVD method at a pressure of 50 Pa or less, preferably 50 Pa or less, the insulating film 214 is The insulating film contains the above and has a small amount of defects.

[0278] In this embodiment, the insulating film 214 is formed by heating the substrate 202 at a temperature of 220°C. Silane at a flow rate of 50 sccm and dinitrogen monoxide at a flow rate of 2000 sccm were used as source gases. The pressure in the processing chamber was set to 20 Pa, and the high frequency power supplied to the parallel plate electrodes was set to 13.56 M. Hz, 100W (power density is 1.6 x 10 -2 W / cm 2 ) PECVD method A silicon oxynitride film is formed using the silicon oxynitride film.

[0279] The insulating film 216 is formed by depositing a substrate placed in a vacuum-evacuated processing chamber of a PECVD device. The temperature is kept at 180°C or higher and 350°C or lower, and the raw material gas is introduced into the processing chamber to increase the pressure in the processing chamber. is set to 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less. , 0.17 W / cm to the electrode installed in the processing chamber 2 More than 0.5W / cm 2 Below are some more good ones: Preferably 0.25W / cm 2 More than 0.35W / cm 2 The following high frequency power supply conditions are met: In this way, a silicon oxide film or a silicon oxynitride film is formed.

[0280] The conditions for forming the insulating film 216 are as follows: a high frequency voltage of the above power density in a reaction chamber of the above pressure; By supplying power, the decomposition efficiency of the source gas in the plasma increases, and oxygen radicals increase. As the oxidation of the source gas progresses, the oxygen content in the insulating film 216 becomes higher than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is As a result, the stoichiometric amount of oxygen in the film is reduced by the heat treatment in the subsequent process. Oxides that contain more oxygen than the stoichiometric composition and lose some of the oxygen when heated An insulating film can be formed.

[0281] In the step of forming the insulating film 216, the insulating film 214 serves as a protection film for the oxide semiconductor film 208. Therefore, the power density can be reduced while reducing damage to the oxide semiconductor film 208. The insulating film 216 can be formed using high radio frequency power.

[0282] In the film forming conditions for the insulating film 216, the deposition gas containing silicon is mixed with the oxidizing gas. By increasing the flow rate of the gas, it is possible to reduce the number of defects in the insulating film 216. In the ESR measurement, the g value of 2.001, which is due to the dangling bond of silicon, The spin density of the signal is 6×10 17 spins / cm 3 Less than 3 x 10 17 spins / cm 3 Less than or equal to 1.5 × 10 17 spins / cm 3 The following is a missing An oxide insulating layer with fewer defects can be formed, resulting in improved reliability of the transistor. It can be done.

[0283] After the insulating films 214 and 216 are formed, a heat treatment (hereinafter referred to as a first heat treatment) is performed. The first heat treatment is preferably performed to remove nitrogen oxides contained in the insulating films 214 and 216. Furthermore, the first heat treatment can reduce the amount of oxides contained in the insulating films 214 and 216. Part of the oxygen contained in the oxide semiconductor film 208 is transferred to the oxide semiconductor film 208. The amount of oxygen deficiency can be reduced.

[0284] The temperature of the first heat treatment is typically less than 400°C, preferably less than 375°C, and The first heat treatment is preferably performed at a temperature of 150° C. or higher and 350° C. or lower. Dry air (water content is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb The reaction may be carried out under an atmosphere of air (see below) or a rare gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, etc. For heat treatment, electric furnaces, RTA (Rapid Thermal Anneal) equipment, etc. are used. It can be used.

[0285] Next, a barrier film 230 is formed on the insulating film 216, and the insulating film 216 is 16, 214, or oxygen 240 is added to the oxide semiconductor film 208 (FIG. 22(E)(F )reference).

[0286] 22(E) and 22(F), the insulating film 214 or the insulating film 216 is doped with Oxygen is shown schematically by a dashed arrow.

[0287] The barrier film 230 has the function of allowing oxygen to pass through and suppressing the release of oxygen. 230 includes, for example, oxygen and metals (indium, zinc, titanium, aluminum, thiamin, selected from tungsten, tantalum, molybdenum, hafnium, or yttrium In particular, the barrier film 230 is made of indium tin oxide. (also called ITO), indium tin silicon oxide (In-Sn-Si oxide: hereinafter I Indium oxide (also known as TSO) or indium oxide has good coating properties for uneven surfaces. Alternatively, the barrier film 230 may be formed of the oxide semiconductor film described above (for example, In:Ga :Zn=1:1:1[atomic ratio], In:Ga:Zn=1:3:2[atomic ratio], In: Ga:Zn=1:3:4[atomic ratio], In:Ga:Zn=1:3:6[atomic ratio], I n:Ga:Zn=4:2:3 [atomic ratio], etc.) may also be used.

[0288] The barrier film 230 can be formed by sputtering. In addition, when the thickness of the barrier film 230 is thin, oxygen that may be released from the insulating film 216 to the outside is suppressed. On the other hand, if the barrier film 230 is thick, it may be difficult to Therefore, the thickness of the barrier film 230 may be set to 1000 nm. It is preferable that the thickness is 1 nm or more and 20 nm or less, or 2 nm or more and 10 nm or less. In this embodiment, a 5 nm thick ITSO film is deposited as the barrier film 230.

[0289] In addition, as a method for adding oxygen 240 to the insulating film 216 through the barrier film 230, There are various methods such as on-doping, ion implantation, and plasma treatment. Depending on the device or the conditions of addition, the insulating film 214 located below the insulating film 216 or Alternatively, oxygen 240 may be added to the oxide semiconductor film 208. Examples of the oxygen include excess oxygen and oxygen radicals. By applying a bias to the substrate side, oxygen 240 can be effectively added to the insulating film 216. The bias can be, for example, applied to an ashing device. The power density of the bias applied between the pair of electrodes is 1 W / cm 2 More than 5W / cm 2 Below By providing a barrier film 230 on the insulating film 216 and adding oxygen 240, The barrier film 230 functions as a protective film that suppresses oxygen from being released from the insulating film 216. Therefore, more oxygen can be added to the insulating film 216.

[0290] In addition, after adding oxygen 240 to the insulating film 216 through the barrier film 230, a heat treatment ( Hereinafter, this will be referred to as the second heat treatment. The heat treatment can be the same as in 1.

[0291] Next, the barrier film 230 is removed to expose the surface of the insulating film 216. An insulating film 218 is formed thereon (see FIGS. 23(A) and 23(B)).

[0292] When removing the barrier film 230, a part of the insulating film 216 may also be removed. The barrier film 230 can be removed by dry etching or wet etching. or a method in which dry etching and wet etching are combined. In this embodiment, the barrier film 230 is removed by wet etching. As a method for removing the barrier film 230, the wet etching method is used in order to reduce manufacturing costs. This is preferable because it can suppress the

[0293] The insulating film 218 is formed by using, for example, a sputtering method or a PECVD method. For example, when the insulating film 218 is formed by the PECVD method, the substrate temperature is set to 40 It is less than 0°C, preferably less than 375°C, and more preferably 180°C or higher and 350°C or lower. By setting the substrate temperature in the above range when forming the insulating film 218, a dense film can be formed. In addition, it is preferable that the substrate temperature when forming the insulating film 218 is within the above range. By this, oxygen or excess oxygen in the insulating films 214 and 216 is transferred to the oxide semiconductor film 208. It becomes possible to move it.

[0294] After the insulating film 218 is formed, a heat treatment similar to the second heat treatment described above (hereinafter referred to as the first heat treatment) is performed. In this way, oxygen 240 is added to the insulating film 216. After that, the temperature is lowered to less than 400°C, preferably lower than 375°C, and more preferably to 180°C or higher and 350°C or lower. By performing heat treatment at a temperature of 0.5° C. or less, oxygen or excess oxygen in the insulating film 216 is converted into an oxide. The oxide semiconductor film 208 is transferred into the semiconductor film 208 (particularly, the oxide semiconductor film 208b). This can compensate for the oxygen deficiency.

[0295] Here, oxygen moving into the oxide semiconductor film 208 will be described with reference to FIG. FIG. 24 shows the relationship between the substrate temperature (typically less than 375° C.) during the formation of the insulating film 218 and the temperature of the insulating film 218. The oxide semiconductor film 218 is formed by a third heat treatment (typically at a temperature lower than 375° C.). 24 is a model diagram showing oxygen moving into the oxide semiconductor 208. Oxygen (oxygen radicals, oxygen atoms, or oxygen molecules) moving into the film 208 is indicated by dashed arrows. It represents.

[0296] The oxide semiconductor film 208 shown in FIG. 24 is a film in contact with the oxide semiconductor film 208 (here, Oxygen vacancies are filled by the movement of oxygen from the insulating films 207 and 214. In particular, in the semiconductor device of one embodiment of the present invention, the oxide semiconductor film 208 is formed by sputtering. During the deposition, oxygen gas is used to add oxygen to the insulating film 207, so the insulating film 207 is formed with excess oxygen. In addition, since oxygen is added through the barrier film 230, the insulating films 214 and 2 16 has an excess oxygen region. Therefore, the oxide sandwiched between the insulating films having the excess oxygen region The semiconductor film 208 can suitably fill oxygen vacancies in the oxide semiconductor film 208. do.

[0297] Further, an insulating film 206 is provided below the insulating film 207, and insulating films 214 and 21 An insulating film 218 is provided above the insulating films 206 and 218. By forming the insulating films 207, 214, and 216 from a thin material, such as silicon nitride, Since the oxygen contained therein can be trapped on the oxide semiconductor film 208 side, the oxide semiconductor film 208 can be suitably oxidized. This allows oxygen to be transferred to the compound semiconductor film 208.

[0298] In addition, when a silicon nitride film is formed as the insulating film 218 by the PECVD method, silicon It is preferable to use a deposition gas containing ammonium, nitrogen, and ammonia as source gases. By using a small amount of ammonia compared to the amount of oxygen, the ammonia dissociates in the plasma and becomes active. The activated species are formed by bonding silicon and hydrogen contained in the silicon-containing deposition gas. This breaks the triple bond between silicon and nitrogen, promoting the bonding of silicon and nitrogen. It is possible to form a dense silicon nitride film with few silicon and hydrogen bonds and few defects. On the other hand, if the amount of ammonia relative to nitrogen is high, the deposition gas containing silicon and nitrogen The decomposition of the silicon does not proceed, and silicon and hydrogen bonds remain, resulting in increased defects and roughness. For these reasons, the source gas is not suitable for ammonia. It is preferable that the flow rate ratio of nitrogen to oxygen is 5 times or more and 50 times or less, or 10 times or more and 50 times or less.

[0299] In this embodiment, the insulating film 218 is formed by depositing silane, nitrogen, and the like using a PECVD apparatus. A silicon nitride film with a thickness of 50 nm is formed using nitrogen and ammonia as source gases. The flow rates were 50 sccm for silane, 5000 sccm for nitrogen, and 1000 sccm for ammonia. The pressure in the processing chamber was 100 Pa, the substrate temperature was 350°C, and the flow rate was 27.12 Mpa. A high-frequency power supply of 1000 W was used to supply high-frequency power to the parallel plate electrodes. The device has an electrode area of ​​6000 cm 2 It is a parallel plate type PECVD device, and the supplied voltage The force can be converted to power per unit area (power density) as 1.7 x 10 -1 W / cm 2 is .

[0300] Next, a mask is formed on the insulating film 218 by a lithography process, and the insulating films 214 and 21 An opening 252c is formed in a desired region of the insulating film 218. A mask is formed by a film process, and the desired insulating films 206, 207, 214, 216, and 218 are formed. The openings 252a and 252b are formed in the conductive film 212. The openings 252a and 252b are formed so as to reach the conductive film 20 4 (see Figures 23(C) and (D)).

[0301] The openings 252a, 252b and the opening 252c may be formed in the same process. The openings 252a and 252b and the opening 252c may be formed in different steps. When forming the mask, for example, a gray-tone mask or a half-tone mask is used. Alternatively, the openings 252a and 252b may be formed in multiple steps. For example, openings are formed in the insulating films 206 and 207 in advance, and then the insulating films on the openings are The velum 214, 216, and 218 may be opened.

[0302] Next, a conductive film is formed on the insulating film 218 so as to cover the openings 252a, 252b, and 252c. The conductive film is then processed into a desired shape to form conductive films 220a and 220b. (See Figure 23(E)(F).)

[0303] The conductive films that become the conductive films 220a and 220b are made of, for example, indium (In), zinc (Zn), or the like. A material containing one selected from the group consisting of zinc (Zn) and tin (Sn) can be used. The conductive films 220a and 220b may be formed of indium oxide containing tungsten oxide, tungsten oxide, or the like. Indium zinc oxide containing tungsten, indium oxide containing titanium oxide, titanium oxide Indium tin oxide (ITO), indium zinc oxide (ITO) containing The transparent conductive material is used, such as indium tin silicon oxide (ITSO). The conductive films 220a and 220b may be, for example, a spatula. In this embodiment, the thickness of the insulating film is 110 nm. The ITSO is formed by sputtering.

[0304] Through the above steps, the transistor 270B shown in FIGS. 18C and 18D can be manufactured. .

[0305] In addition, in all the manufacturing steps of the transistor 270B, the substrate temperature is preferably less than 400° C. Preferably, the temperature is less than 375°C, and more preferably 180°C or higher and 350°C or lower. Even when using a multi-layer substrate, deformation (warping or warping) of the substrate can be minimized. It is preferable to form the insulating films 206 and 207 at a temperature (less than 400°C, preferably 2 50° C. or more and 350° C. or less), and the temperature during deposition of the oxide semiconductor film 208 (room temperature or more and less than 340° C. less than 100°C, preferably 100°C or more and 200°C or less, and more preferably 100°C or more and less than 150°C ), the temperature during the formation of the insulating films 216 and 218 (less than 400°C, preferably less than 375°C, More preferably, the temperature is 180°C or higher and 350°C or lower), and the first heat treatment or The temperature of the second heat treatment is less than 400°C, preferably less than 375°C, more preferably less than 1 80° C. or more and 350° C. or less) is applied to the substrate during the manufacturing process of the transistor 270B. .

[0306] As described above, the structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiments. They can be used in combination.

[0307] [Method 2 for manufacturing semiconductor device] Next, a manufacturing method different from the above-described [Method 1 for manufacturing a semiconductor device] will be described below. .

[0308] First, the steps up to the steps shown in FIGS. 22(C) and 22(D) are carried out in the same manner as in [Method 1 for manufacturing a semiconductor device]. Next, a barrier film 230 is formed as shown in FIGS. 22(E) and 22(F), and oxygen 240 is added. 23(C)(D) and 23(D) are not performed. Perform steps 23(E) and (F).

[0309] In this case, a material having high insulating properties is selected from the materials described above as the barrier film 230. The barrier film 230 used in this manufacturing method may be selected from aluminum oxide, halogen oxide, etc. Preferably, fluorine or yttrium oxide is used.

[0310] The barrier film 230 may be aluminum oxide, hafnium oxide, or yttrium oxide. When forming a film by sputtering, the sputtering gas should contain at least oxygen. When forming the barrier film 230, it is preferable to use oxygen as a sputtering gas. The oxygen becomes oxygen radicals in the plasma, and the oxygen or the oxygen radicals Either one or both may be added to the insulating film 216. E) The step of adding oxygen 240 shown in (F) may be omitted. During the deposition of the barrier film 230, the oxygen addition process and the deposition of the barrier film 230 can be performed simultaneously. It should be noted that the barrier film 230 is formed by the following steps (especially in the early stage of film formation): However, after the barrier film 230 is formed (especially in the later stage of film formation), It has the function of blocking oxygen.

[0311] The barrier film 230 is formed by sputtering aluminum oxide, for example. In this case, a mixed layer may be formed near the interface between the insulating film 216 and the barrier film 230. For example, when the insulating film 216 is a silicon oxynitride film, the mixed layer is made of Al. x Si y O z The mixed layer may have an excess oxygen region.

[0312] The barrier film 230 may be made of aluminum oxide, hafnium oxide, or titanium oxide. When using aluminum, aluminum oxide, hafnium oxide, and yttrium oxide are highly 23(A)(B) has excellent insulating properties and high oxygen barrier properties. Therefore, the step of forming the barrier film 218 can be omitted. It may be used as it is in place of the insulating film 218.

[0313] The substrate temperature during the formation of the barrier film 230 is set to less than 400° C., preferably less than 375° C. More preferably, the temperature is set to 180° C. or higher and 350° C. or lower. Oxygen or excess oxygen can be transferred into the oxide semiconductor film 208.

[0314] Thus, the barrier film 230 may be made of aluminum oxide, hafnium oxide, or By using yttrium, it is possible to shorten the manufacturing process of semiconductor devices, Costs can be reduced.

[0315] [Method 3 for manufacturing semiconductor device] Next, a transistor shown in FIGS. 15(A), 15(B), and 15(C) which is a semiconductor device of one embodiment of the present invention will be described. A method for manufacturing the capacitor 250 will be described with reference to FIGS. 25 and 26. 25(F) and 26(A) to 26(F) illustrate a method for manufacturing a semiconductor device. 25(A), (C), (E), and 26(A), (C), and (E) are cross-sectional views. 25(B), (D), (F), and 26(B), (D). (F) is a cross-sectional view in the channel width direction.

[0316] First, a conductive film 204, insulating films 206 and 207, and an oxide semiconductor film 208 are formed on a substrate 202. Then, insulating films 214 and 216 and a barrier film 230 are formed (see FIGS. 25(A) and 25(B)).

[0317] Conductive film 204, insulating films 206 and 207, oxide semiconductor film 208, and insulating films 214 and 216 The barrier film 230 may be formed by taking into consideration the description of [Method 1 for manufacturing a semiconductor device]. stomach.

[0318] Next, oxygen 240 is added to the insulating film 214 through the barrier film 230 (FIG. 25(C)( See D).

[0319] Next, the barrier film 230 is removed. After that, a lithography process is performed on the insulating film 214. A mask is formed, and openings 251a and 251b are formed in desired regions of the insulating film 214 and the insulating film 216. The openings 251a and 251b reach the oxide semiconductor film 208 (see FIG. 25(E)(F)).

[0320] Next, a conductive film 212 is formed on the insulating film 214 so as to cover the openings 251a and 251b. (See Figures 26(A) and 26(B)).

[0321] Next, a mask is formed on the conductive film 212 by a lithography process, and the conductive film is formed in a desired shape. By processing the conductive film 212a into a shape similar to that shown in FIG. 26(C)(D), the conductive film 212a and the conductive film 212b are formed. .

[0322] Next, an insulating film 218 is formed on the insulating film 214 and the conductive films 212a and 212b (FIG. 26(E)(F)).

[0323] Through the above steps, a transistor 250 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. Cut.

[0324] In addition, as for the transistor 260 shown in FIGS. 16(A), 16(B), and 16(C), the opening 251a In the step of forming the insulating film 251b, the insulating film 251b is formed only on the channel region of the oxide semiconductor film 208. The insulating film 214 and the insulating film 216 are formed.

[0325] As described above, the configuration and method shown in this embodiment may be the same as those shown in other embodiments or examples. and the method can be used in combination as appropriate.

[0326] (Embodiment 3) In this embodiment, a substrate capable of forming an oxide semiconductor film according to one embodiment of the present invention is used. The sputtering device and the film forming device will be described with reference to FIGS. 27 to 34. In the sputtering device shown below, the substrate and target are The figure shows the substrate and target in place. Since the sputtering device is a device that is used for sputtering, the device may not have a substrate or a target.

[0327] <3-1. Sputtering equipment> The sputtering device may be, for example, a parallel plate sputtering device and a facing target A parallel plate sputtering device can be used. The film formation method using this method is called PESP (parallel electrode sputtering). It can also be called "facing target sputtering." This method is called VDSP (vapor deposition sputtering). It can also be done as follows.

[0328] [Parallel Plate Sputtering System (PESP)] First, the parallel plate sputtering apparatus will be explained. 27(A) is a cross-sectional view of a film formation chamber 301 in a sputtering apparatus. 301 includes a target holder 320, a backing plate 310, and a target 300. , a magnet unit 330, and a substrate holder 370. 00 is placed on the backing plate 310. The backing plate 310 is , is placed on the target holder 320. The magnet unit 330 is The substrate holder 370 is placed under the target 300 via a holding plate 310. are arranged facing the target 300. In this specification, the term "multiple magnets" is used. A combination of magnets is called a magnet unit. It can be called a cathode, cathode magnet, magnetic member, magnetic part, etc. The net unit 330 includes a magnet 330N, a magnet 330S, and a magnet holder. In the magnet unit 330, the magnet 330 The magnet 330S and the magnet N are placed on a magnet holder 332. The magnet 330N is disposed at a distance from the magnet 330S. When the plate 360 ​​is loaded, the substrate 360 ​​is placed in contact with the substrate holder 370 .

[0329] The target holder 320 and the backing plate 310 are fastened together using screws (bolts, etc.). The target holder 320 is fixed to the backing plate 322 and is at an equipotential. The support 310 functions to support the target 300 .

[0330] In addition, a target 300 is fixed to the backing plate 310. For example, The backing plate 310 and the target are bonded together by a bonding material containing a low melting point metal such as zinc. Get 300 and can be fixed.

[0331] FIG. 27A shows the magnetic field lines 380a and magnetic Field lines 380b are shown.

[0332] The magnetic field line 380a is one of the magnetic field lines that form the horizontal magnetic field in the vicinity of the target 300. The vicinity of the target 300 is, for example, a point at which the vertical distance from the upper surface of the target 300 is 0 The range is from 0 mm to 5 mm, particularly from 0 mm to 10 mm.

[0333] The magnetic field lines 380b extend from the top surface of the magnet unit 330 to the horizontal magnetic field at a vertical distance d. The vertical distance d is one of the magnetic field lines that form the field. is between 5mm and 15mm.

[0334] At this time, by using the powerful magnets 330N and 330S, A strong magnetic field can be generated even in the vicinity of the substrate 360. The magnetic flux density of the horizontal magnetic field in the vicinity of 0 is 10 G or more and 100 G or less, preferably 15 G or more. It can be 60G or less, and more preferably 20G or more and 40G or less.

[0335] The magnetic flux density of the horizontal magnetic field is measured when the magnetic flux density of the vertical magnetic field is 0G. That's fine.

[0336] By setting the magnetic flux density of the magnetic field in the film formation chamber 301 within the above range, a film having high density and crystallinity can be obtained. In addition, the oxide semiconductor film obtained can have a high thermal conductivity. The oxide semiconductor film contains little seed crystal phase and contains almost a single crystal phase.

[0337] FIG. 27(B) shows a top view of the magnet unit 330. 0 is a circular or nearly circular magnet 330N and a circular or nearly circular magnet 330 S is fixed to the magnet holder 332. The magnet unit 330 The normal vector at the center or approximately the center of the upper surface of the magnet unit 330 is set as the rotation axis. For example, the magnet unit 330 can be rotated at a frequency of 0.1 Hz or more. Beats below 1 kHz (also known as rhythm, beat, pulse, frequency, period or cycle) It is also possible to rotate it with

[0338] Therefore, the region of strong magnetic field on the target 300 is rotated by the magnet unit 330. The region with a strong magnetic field becomes a high-density plasma region, so in its vicinity, For example, the area where the magnetic field is strong is particularly prone to sputtering of the target 300. In this case, only a specific area of ​​the target 300 will be used. 27(B), the magnet unit 330 is rotated to The magnet unit 330 can be rotated to uniformly use the magnet unit 300. This allows for a film with a uniform thickness and a uniform quality.

[0339] In addition, by rotating the magnet unit 330, the The direction of the magnetic field lines can also be changed.

[0340] Although an example in which the magnet unit 330 is rotated is shown here, the present invention is not limited to this. For example, the magnet unit 330 may be swung up and down and / or left and right. For example, the magnet unit 330 may be a vibration device having a frequency of 0.1 Hz to 1 kHz. Alternatively, the target 300 may be rotated or moved. For example, the target 300 is rotated or moved at a beat of 0.1 Hz or more and 1 kHz or less. Alternatively, the substrate 360 ​​may be rotated to allow the substrate 360 ​​to be relatively close to the substrate 360. Alternatively, the direction of the magnetic field lines may be changed. Alternatively, these may be combined.

[0341] The film forming chamber 301 may have a groove inside or below the backing plate 310. Then, by flowing a fluid (air, nitrogen, rare gas, water, oil, etc.) into the groove, the spatula During heating, abnormal discharge may occur due to a rise in the temperature of the target 300, or deformation of the film forming chamber 30 may occur due to deformation of the material. At this time, the backing plate 310 and the target 1 can be prevented from being damaged. It is preferable to bond the cooling element 300 to the cooling element 300 with a bonding material, as this improves the cooling performance.

[0342] A gasket is provided between the target holder 320 and the backing plate 310. This is preferable because it makes it difficult for impurities to enter the film formation chamber 301 from the outside or from the grooves.

[0343] In the magnet unit 330, the magnet 330N and the magnet 330S are: Each magnet is arranged with a different pole facing the target 300. The magnet 330N is placed so that the north pole is on the target 300 side, and the magnet 330S is placed on the target The case where the magnet unit 300 is arranged to be the south pole will be explained. The arrangement of the magnets and poles in unit 330 is not limited to this arrangement. Moreover, the arrangement is not limited to that shown in FIG. 27(A).

[0344] During film formation, the potential V1 applied to the terminal V1 connected to the target holder 320 is, for example, This potential is lower than the potential V2 applied to the terminal V2 connected to the substrate holder 370. In addition, the potential V2 applied to the terminal V2 connected to the substrate holder 370 is, for example, the ground potential. In addition, the potential V3 applied to the terminal V3 connected to the magnet holder 332 is, for example, For example, it is the ground potential. The potentials applied to terminals V1, V2 and V3 are the same as those mentioned above. The target holder 320, the substrate holder 370, the magnet holder For example, if the substrate holder 370 is In FIG. 27(A), the target holder 320 is in contact with the target. An example of the so-called DC sputtering method was shown in which a potential V1 is applied to a terminal V1 connected to the electrode. For example, the target holder 320 may be configured to receive a laser beam having a frequency of up to 13.56 MHz. The so-called RF sputtering method is used, in which a high frequency power source such as 27.12 MHz is connected. It's okay if they are there.

[0345] Also, in FIG. 27(A), a backing plate 310 and a target holder 320, An example in which the magnet unit 330 and the magnet holder 332 are not electrically connected is shown below. For example, the backing plate 310 and the target holder 312 may be used. The magnet unit 330 and the magnet holder 332 are electrically connected to each other. It is acceptable for the terminals to be equipotential.

[0346] In order to further improve the crystallinity of the resulting oxide semiconductor film, the temperature of the substrate 360 ​​is increased. By increasing the temperature of the substrate 360, the spat in the vicinity of the substrate 360 ​​can be reduced. This can promote the migration of carbon particles. An oxide semiconductor film with higher crystallinity can be formed. For example, the temperature is from room temperature to less than 340°C, preferably from room temperature to 300°C, more preferably from 10 The temperature is preferably 0°C or higher and 250°C or lower, and more preferably 100°C or higher and 200°C or lower.

[0347] The vertical distance between the target 300 and the substrate 360 ​​is set to 10 mm or more and 600 mm or less. Preferably, 20 mm or more and 400 mm or less, and more preferably, 30 mm or more and 200 mm or less More preferably, the distance between the target 300 and the substrate 360 ​​is 40 mm or more and 100 mm or less. By making the vertical distance closer to the above range, the sputtered particles can be prevented from reaching the substrate 360. In addition, the decrease in energy between the target 300 and the base By increasing the vertical distance to the plate 360 ​​to the above range, the sputtered particles can be prevented from reaching the substrate 360. Since the incident direction can be made closer to perpendicular, the sputtered particles can be prevented from colliding with the substrate 360. Damage may be reduced.

[0348] FIG. 28(A) shows an example of a film formation chamber different from that shown in FIG. 27(A).

[0349] The film forming chamber 301 shown in FIG. 28(A) includes a target holder 320a and a target holder 320b, backing plate 310a, backing plate 310b, and target a magnet unit 330a, a target 300b, a magnet unit 330a, and a magnet unit The target 30 includes a target 330b, a member 342, and a substrate holder 370. 0a is placed on the backing plate 310a. a is placed on the target holder 320a. The magnet unit 330a is , is placed under the target 300a via a backing plate 310a. The get 300b is disposed on a backing plate 310b. The target holder 310b is placed on the target holder 320b. 330b is disposed below the target 300b via a backing plate 310b.

[0350] The magnet unit 330a includes a magnet 330N1, a magnet 330N2, and The magnet unit 330S includes a magnet 330S and a magnet holder 332. In the magnet 330a, the magnet 330N1, the magnet 330N2 and the magnet 33 The magnet 330N1 and the magnet 330N2 are disposed on the magnet holder 332. The net 330N2 is disposed at a distance from the magnet 330S. The unit 330b has the same structure as the magnet unit 330a. When the substrate 360 ​​is loaded into the chamber 301, the substrate 360 ​​is placed in contact with the substrate holder 370. .

[0351] a target 300a, a backing plate 310a, and a target holder 320a; The target 300b, the backing plate 310b, and the target holder 320b are They are spaced apart by a member 342. Preferably, the member 342 is an insulator. However, the member 342 may be a conductor or a semiconductor. The surface of an electric conductor or semiconductor may be covered with an insulator.

[0352] The target holder 320a and the backing plate 310a are connected by screws (bolts, etc.). The target holder 320a is fixed using a backing It has a function of supporting the target 300a through the plate 310a. The holder 320b and the backing plate 310b are fixed together using screws (bolts, etc.). The target holder 320b is attached to the backing plate 3 10b has the function of supporting the target 300b.

[0353] The backing plate 310a has a function of fixing the target 300a. The backing plate 310b has a function of fixing the target 300b.

[0354] FIG. 28(A) shows magnetic field lines 380a and 380b formed by the magnet unit 330a. Magnetic field lines 380b are shown.

[0355] The magnetic field line 380a is one of the magnetic field lines that form the horizontal magnetic field in the vicinity of the target 300a. The vicinity of the target 300a is, for example, a region that is 0.05 m vertically away from the target 300a. The range is from 0 mm to 5 mm, particularly from 0 mm to 10 mm.

[0356] The magnetic field lines 380b extend horizontally from the top surface of the magnet unit 330a at a vertical distance d. It is one of the magnetic field lines that form the magnetic field. The vertical distance d can be, for example, between 0 mm and 20 mm. or 5 mm or more and 15 mm or less.

[0357] At this time, the strong magnet 330N1, the strong magnet 330N2 and the strong magnet By using the net 330S, a strong magnetic field can be generated even in the vicinity of the substrate 360. Specifically, the magnetic flux density of the horizontal magnetic field in the vicinity of the substrate 360 ​​is set to 10 G or more. 0 G or less, preferably 15 G or more and 60 G or less, and more preferably 20 G or more and 40 G or less. It is possible.

[0358] By setting the magnetic flux density of the magnetic field in the film formation chamber 301 within the above range, a film having high density and crystallinity can be obtained. In addition, the oxide semiconductor film obtained can have a high thermal conductivity. The oxide rarely contains a seed crystal phase and is almost entirely a single crystal phase.

[0359] The magnet unit 330b also has magnetic lines of force similar to those of the magnet unit 330a. It is done.

[0360] FIG. 28B shows the upper surfaces of the magnet unit 330a and the magnet unit 330b. The magnet unit 330a is a rectangular or approximately rectangular magnet 330N. 1 and a rectangular or approximately rectangular magnet 330N2 and a rectangular or approximately rectangular magnet It can be seen that the magnet 330S is fixed to the magnet holder 332. The net unit 330a can be swung left and right as shown in FIG. 28(B). For example, the magnet unit 330a is oscillated at a beat of 0.1 Hz to 1 kHz. Just do that.

[0361] Therefore, the region of strong magnetic field on the target 300a is located at the magnet unit 330a. The region with a strong magnetic field becomes a high-density plasma region, and the For example, in a region where a magnetic field is strong, the sputtering phenomenon of the target 300a is likely to occur. If the area is a specific location, only the specific area of ​​the target 300a will be used. On the other hand, by swinging the magnet unit 330a as shown in FIG. The target 300a can be used uniformly. By oscillating the film, it is possible to obtain a film having a uniform thickness and a uniform quality. can be done.

[0362] In addition, by swinging the magnet unit 330a, the magnet unit 330a moves in the vicinity of the substrate 360. This can also change the state of the magnetic field lines in the magnet unit 330b. The same is true for

[0363] In this case, the magnet unit 330a and the magnet unit 330b are swung. However, the present invention is not limited to this. For example, the magnet unit 330 For example, the magnet unit 330a and the magnet unit 330b may be rotated. The output 330a and the magnet unit 330b are driven at a rate of 0.1 Hz to 1 kHz. Alternatively, the target 300 may be rotated or moved. For example, the target 300 can be rotated or moved at a beat of 0.1 Hz or more and 1 kHz or less. Alternatively, the substrate 360 ​​may be rotated to relatively change the magnetic field on the upper surface of the substrate 360. You can change the state of the lines of force, or you can combine these.

[0364] The film forming chamber 301 includes the backing plates 310a and 310b. Alternatively, a groove may be provided at the bottom, etc., and a fluid (air, nitrogen, rare gas, water, etc.) may be introduced into the groove. , oil, etc.) to the target 300a and the target 300b during sputtering. This prevents abnormal discharge due to a rise in temperature and damage to the film forming chamber 301 due to deformation of the components. At this time, the backing plate 310a and the target 300a are bonded together. It is preferable to use a backing material to make the contact, as this will improve the cooling performance. When the target 310b and the target 300b are bonded together with a bonding material, the cooling performance is improved. This is preferable because it increases

[0365] A gasket is provided between the target holder 320a and the backing plate 310a. If the film forming chamber 301 has a groove, impurities are less likely to enter the film forming chamber 301 from the outside or the groove. In addition, a gasket is provided between the target holder 320b and the backing plate 310b. If the film forming chamber 301 has a groove, impurities are less likely to enter the film forming chamber 301 from the outside or the groove. .

[0366] In the magnet unit 330a, the magnet 330N1 and the magnet 330N 2 and magnet 330S are arranged with different poles facing the target 300a side. Here, the magnet 330N1 and the magnet 330N2 are connected to the target 300 The magnet 330S is positioned so that the target 300a side is the S pole. However, the case where the magnet unit 330a is arranged as follows will be described. The arrangement of the magnets and poles is not limited to this arrangement. The same applies to the magnet unit 330b. be.

[0367] During film formation, a terminal V1 connected to the target holder 320a and a terminal V2 connected to the target holder 320b are connected to the target holder 320a. A potential that alternates between high and low may be applied between the terminal V1 connected to the terminal V2 and the terminal V3 connected to the terminal V4. The potential V2 applied to the terminal V2 connected to the substrate holder 370 is, for example, the ground potential. The potential V3 applied to the terminal V3 connected to the magnet holder 332 is, for example, The potentials applied to terminals V1, V2, V3, and V4 are The potentials are not limited to the above. b. It is not necessary to apply a potential to both the substrate holder 370 and the magnet holder 332. For example, the substrate holder 370 may be in a floating state. ) terminal V1 connected to target holder 320a and terminal V2 connected to target holder 320b. Between the terminal V4 and the connected terminal V5, a potential that alternates between high and low is applied, so-called AC switch. Although the sputtering method is shown as an example, the present invention is not limited to this.

[0368] In addition, in FIG. 28(A), the backing plate 310a and the target holder 320a The magnet unit 330a and the magnet holder 332 are not electrically connected. For example, the backing plate 310a and the target a magnet unit 330a and a magnet holder 332. The backing plate 3 may be electrically connected and may be at the same potential. 10b and target holder 320b, and magnet unit 330b and magnet holder Although an example in which the terminal 332 is not electrically connected to the terminal 332 is shown, the present invention is not limited to this. The mounting plate 310a, the target holder 320b, and the magnet unit 330 b and the magnet holder 332 are electrically connected and may be at the same potential. No.

[0369] In order to further improve the crystallinity of the resulting oxide semiconductor film, the temperature of the substrate 360 ​​is increased. By increasing the temperature of the substrate 360, the spat in the vicinity of the substrate 360 ​​can be reduced. This can promote the migration of carbon particles. An oxide semiconductor film with higher crystallinity can be formed. For example, the temperature is from room temperature to less than 340°C, preferably from room temperature to 300°C, more preferably from 10 The temperature is preferably 0°C or higher and 250°C or lower, and more preferably 100°C or higher and 200°C or lower.

[0370] The vertical distance between the target 300a and the substrate 360 ​​is set to 10 mm or more and 600 mm or less. , preferably 20 mm or more and 400 mm or less, and more preferably 30 mm or more and 200 mm or less The distance between the target 300a and the substrate 36 is preferably 40 mm or more and 100 mm or less. By making the vertical distance from the substrate 360 ​​closer to the above range, the sputtered particles can reach the substrate 360. In some cases, it may be possible to suppress the decrease in energy during the time it takes for the target 300 By increasing the vertical distance between a and the substrate 360 ​​to the above range, the sputtered particles can be prevented from reaching the substrate 36 0 can be made closer to perpendicular, so that the impact of sputtered particles on the substrate 36 It may be possible to reduce damage to 0.

[0371] The vertical distance between the target 300b and the substrate 360 ​​is set to 10 mm or more and 600 mm or less. , preferably 20 mm or more and 400 mm or less, and more preferably 30 mm or more and 200 mm or less The distance between the target 300b and the substrate 36 is preferably 40 mm or more and 100 mm or less. By making the vertical distance from the substrate 360 ​​closer to the above range, the sputtered particles can reach the substrate 360. In some cases, it may be possible to suppress the decrease in energy during the time it takes for the target 300 By increasing the vertical distance between b and the substrate 360 ​​to the above range, the sputtered particles can be prevented from reaching the substrate 36 0 can be made closer to perpendicular, so that the impact of sputtered particles on the substrate 36 It may be possible to reduce damage to 0.

[0372] [Facing Target Sputtering System (VDSP)] Next, a facing target type sputtering apparatus will be described. 29(A) is a cross-sectional view of a film formation chamber in a facing target type sputtering apparatus. The film forming chamber is provided with a target 300a and a target 300b. The backing plate 310a and the backing plate 310b respectively hold the get 300b. 310b, and the turntable 310b is connected to the backing plate 310a via the backing plate 310b. Magnet units arranged on the backside of the get 300a and the target 300b, respectively The substrate holder 370 has a substrate holder 330a and a magnet unit 330b. The substrate 360 ​​is disposed between the target 300a and the target 300b. After the substrate 360 ​​is loaded, the substrate 360 ​​is fixed to the substrate holder 370 .

[0373] As shown in FIG. 29(A), the backing plate 310a and the backing plate Power supplies 390 and 391 for applying a potential are connected to the port 310b. A power supply 390 connects to backing plate 310a and a power supply 390 connects to backing plate 310b. A power supply 391 applies a potential that alternates between high and low potentials, so-called A It is preferable to use an AC power supply. Also, the power supplies 390 and 391 shown in FIG. 29(A) are AC Although an example using a power supply is shown, the present invention is not limited to this. For example, the power supply 390 and the power supply 391 Alternatively, a RF power supply, a DC power supply, or the like may be used as the power supply 390 and the power supply 391. Different types of power sources may be used.

[0374] In addition, the substrate holder 370 is preferably connected to GND. 370 may be in a floating state.

[0375] 29(B) and 29(C) show the plasma between the dashed line AB in FIG. 29(A). 29(B) shows the potential distribution of the backing plate 340. 10a is applied with a high potential and backing plate 310b is applied with a low potential. That is, the positive ions are accelerated toward the target 300b. applies a low potential to backing plate 310a and a high potential to backing plate 310b. In other words, the positive ions are accelerated toward the target 300a. In one embodiment of the present invention, an oxide semiconductor film is formed in the state shown in FIG. 29(B) and FIG. 29(C). Just alternate between the two positions.

[0376] In addition, in the formation of the oxide semiconductor film according to one embodiment of the present invention, a plasma is formed on the surface of the substrate 360. It is preferable to perform this step when the laser 340 has reached the target. For example, as shown in FIG. As shown in FIG. 1, the substrate holder 370 and the substrate 360 ​​are preferably disposed in the plasma 340. In particular, the substrate holder 370 and the substrate 360 ​​enter the region of the positive column in the plasma 340. The region of the positive column in the plasma 340 is preferably arranged as shown in FIG. In the potential distribution shown in Fig. 29(C), the gradient of the potential distribution is near the middle between A and B. That is, as shown in FIG. 29(A), the positive column in the plasma 340 By placing the substrate 360 ​​in this region, the substrate 360 ​​is placed in the strong electric field area under the plasma 340. Because the substrate 360 ​​is not exposed to the plasma 340, it is less damaged by the plasma 340, resulting in fewer defects. This can be done.

[0377] 29(A), the substrate holder 370 and the substrate 360 ​​are heated by the plasma 340. By forming a film while the target 300a and the target 300b are placed in the This is preferable because it increases the efficiency of use.

[0378] As shown in FIG. 29(A), the horizontal distance between the substrate holder 370 and the target 300a is The horizontal distance between the substrate holder 370 and the target 300b is L1, and the horizontal distance between the substrate holder 370 and the target 300b is L2. The lengths of L1 and L2 are preferably equal to the length of the substrate 360. As mentioned above, L1 and L2 are set so that the substrate 360 ​​is in the region of the positive column of the plasma 340. For example, L1 and L2 are each 10 mm or more. It should be 200mm or less.

[0379] In the configuration shown in FIG. 29(A), the target 300a and the target 300b are oriented in parallel. The magnet unit 330a and the magnet unit 33 0b are arranged with their opposite poles facing each other. The net unit 330b is directed to the magnet unit 330a. The magnet unit 330a and the magnet unit 330b generate a magnetic field. The plasma 340 is confined. The substrate holder 370 and the substrate 360 ​​are The area between target 300a and target 300b (also called the inter-target area) In FIG. 29(A), the target 300a and the target 300b are arranged in the same manner. The substrate holder 370 and the substrate 360 ​​are arranged parallel to each other in the opposing direction, but are arranged at an angle. For example, the substrate holder 370 and the substrate 360 ​​may be rotated at an angle of 30° to 60° (typically By tilting the substrate 360 ​​at an angle of 45°, the proportion of sputtered particles that are incident perpendicularly to the substrate 360 ​​during film formation is reduced. The ratio can be increased.

[0380] In the configuration shown in FIG. 30, the target 300a and the target 300b are not parallel to each other. The fact that they are arranged facing each other in a tilted state (V-shape) is the same as the structure shown in Figure 29(A). Therefore, for details other than the target placement, please refer to the explanation in Figure 29(A). In addition, the magnet unit 330a and the magnet unit 330b have opposite poles facing each other. The substrate holder 370 and the substrate 360 ​​are positioned in the inter-target area. The targets 300a and 300b are arranged as shown in FIG. By doing so, the proportion of sputtered particles that reach the substrate 360 ​​increases, thereby increasing the deposition rate. It is possible.

[0381] 29(A), the substrate holder 370 and the substrate 360 ​​are placed in the plasma 340. For example, as shown in FIG. 31, the substrate holder 37 The substrate 360 ​​may be located outside the plasma 340. By not being exposed to the high electric field region of the plasma 340, damage caused by the plasma 340 is reduced. However, the further the substrate 360 ​​is from the plasma 340, the more the target 30 The utilization efficiency of the substrate holder 370 is reduced. The position is preferably variable as shown in FIG.

[0382] Also, the substrate holder 370 is located above the inter-target region, but is located below The substrate holders may be arranged on the upper and lower sides. By arranging 370, film formation can be performed on two or more substrates at the same time, which improves productivity. can be increased.

[0383] The facing target sputtering device generates stable plasma even in a high vacuum. For example, film formation is possible even at a pressure of 0.005 Pa or more and 0.09 Pa or less. Therefore, the concentration of impurities mixed in during film formation can be reduced.

[0384] By using a facing target sputtering device, it is possible to form films in a high vacuum. Alternatively, film formation with less damage caused by plasma can be achieved, so the temperature of the substrate 360 ​​can be kept low. For example, even if the temperature of the substrate 360 ​​is Even at temperatures above 100°C and below, a film with high crystallinity can be formed.

[0385] FIG. 32(A) shows another example of a facing target sputtering apparatus.

[0386] FIG. 32(A) is a cross-sectional schematic diagram of a film formation chamber in a facing target sputtering apparatus. Unlike the film formation chamber shown in FIG. A shield 323 is provided. Also, a backing plate 310a and a backing plate The power supply 391 is connected to the plate 310b.

[0387] As shown in FIG. 32(A), the target shield 322 and the target shield 323 is connected to GND. In other words, the backing The plate 310a and the backing plate 310b, and the target system to which GND is applied The potential difference applied between the target shield 322 and the target shield 323 causes the plug Zuma 340 is formed.

[0388] In addition, in the formation of the oxide semiconductor film according to one embodiment of the present invention, a plasma is formed on the surface of the substrate 360. For example, as shown in FIG. As shown in FIG. 1, the substrate holder 370 and the substrate 360 ​​are preferably disposed in the plasma 340. In particular, the substrate holder 370 and the substrate 360 ​​enter the region of the positive column in the plasma 340. In the region of the positive column in the plasma, the gradient of the potential distribution is small. That is, as shown in FIG. 32(A), the region of the positive column in the plasma 340 By placing the substrate 360 ​​in the region, the substrate 360 ​​is exposed to a strong electric field under the plasma 340. Therefore, the substrate 360 ​​is less damaged by the plasma 340 and has a good oxide film quality. can be obtained.

[0389] 32(A), the substrate holder 370 and the substrate 360 ​​are in the plasma 340. By forming a film in the state where the target 300a and the target 300b are arranged, This is preferable because it increases the efficiency of use.

[0390] As shown in FIG. 32(A), the substrate holder 370 and the target 300a are The horizontal distance is L1, and the horizontal distance between the substrate holder 370 and the target 300b is L2. The lengths of L1 and L2 are preferably equal to the size of the substrate 360. As described above, the substrate 360 ​​is positioned in the positive column of the plasma 340. , L1 and L2 are preferably adjusted appropriately.

[0391] 32(A), the substrate holder 370 and the substrate 360 ​​are placed in the plasma 340. For example, as shown in FIG. 32(B), The substrate 360 ​​may be disposed outside the plasma 340. By not being exposed to the high electric field region of the plasma 340, damage caused by the plasma 340 is reduced. However, the farther the substrate 360 ​​is from the plasma 340, the greater the target The utilization efficiency of the substrate holder 300a and the target 300b is reduced. The position of 70 is preferably variable as shown in FIG. 32(B).

[0392] As shown in FIG. 32(B), the substrate holder 370 is disposed above the inter-target region. However, it may be placed on the lower side. It may also be placed on both the lower and upper sides. By disposing the substrate holders 370 on the upper and lower sides, it is possible to simultaneously form films on two or more substrates. This allows for increased productivity.

[0393] In the facing target sputtering apparatus described above, the plasma is generated by the magnetic field between the targets. Since the plasma is confined within the By tilting the target, the angle of incidence of sputtered particles onto the substrate can be made shallower. The step coverage of the deposited film can be improved. Also, film formation in a high vacuum is possible. Therefore, the concentration of impurities mixed into the film can be reduced.

[0394] The film deposition chamber is equipped with a parallel plate sputtering device and an ion beam sputtering device. It's okay to apply it.

[0395] <3-2. Film deposition equipment> Hereinafter, a deposition chamber capable of depositing an oxide semiconductor film according to one embodiment of the present invention will be described. The membrane device will now be described.

[0396] First, the structure of the film forming apparatus that minimizes the inclusion of impurities in the film during film formation is shown in Figs. 34 will be used to explain.

[0397] FIG. 33 is a schematic top view of a single-wafer multi-chamber film-forming apparatus 2700. The film forming apparatus 2700 includes a cassette port 2761 for accommodating a substrate and a substrate alignment unit. and an atmosphere-side substrate supply chamber 2701 having an alignment port 2762 for performing the alignment. The substrate supply chamber 2701 is connected to the atmospheric substrate transfer chamber 2702, which transfers the substrate. and a load lock chamber in which the pressure inside the chamber is switched from atmospheric pressure to reduced pressure or from reduced pressure to atmospheric pressure. 2703a, and the substrate is removed, and the pressure in the chamber is reduced to atmospheric pressure, or atmospheric pressure to atmospheric pressure. The unload lock chamber 2703b is switched to a reduced pressure, and the transfer chamber 2703b transfers the substrate in a vacuum. 704, a substrate heating chamber 2705 for heating the substrate, and a deposition chamber in which a target is placed and a film is deposited. The film forming chamber 2706 includes a film forming chamber 2706a, a film forming chamber 2706b, and a film forming chamber 2706c. The film forming chambers 706a, 2706b, and 2706c are configured as described above. It is possible.

[0398] The atmospheric substrate transfer chamber 2702 is provided with a load lock chamber 2703a and an unload lock chamber 2703b. chamber 2703b, and the load lock chamber 2703a and unload lock chamber 2703b are connected to the The transfer chamber 2704 is connected to the substrate heating chamber 2705 and the film forming chamber 2706. 6a, and is connected to the film formation chamber 2706b and the film formation chamber 2706c.

[0399] A gate valve 2764 is provided at the connection between the chambers, and the atmosphere-side substrate supply chamber 2 Except for the atmospheric side substrate transfer chamber 2702, each chamber can be independently maintained in a vacuum state. The atmospheric substrate transfer chamber 2702 and the transfer chamber 2704 are connected by a transfer robot 2763. and capable of transporting a substrate.

[0400] It is also preferable that the substrate heating chamber 2705 also serves as a plasma processing chamber. This allows the substrate to be transported between processes without being exposed to the atmosphere, eliminating the need for It is possible to suppress the adsorption of pure substances. In addition, the order of film formation and heat treatment can be freely configured. In addition, the transfer chamber, film formation chamber, load lock chamber, unload lock chamber and substrate heating chamber The number is not limited to the above, and the optimum number can be set according to the installation space and process conditions. It can be done.

[0401] Next, the dashed dotted line V1-V2, the dashed dotted line W1-W2, and the dashed dotted line W3-W4 of the film forming apparatus 2700 shown in FIG. A cross section corresponding to the dashed line W2-W3 is shown in FIG.

[0402] FIG. 34(A) shows a cross section of the substrate heating chamber 2705 and the transfer chamber 2704. The thermal chamber 2705 has multiple heating stages 2765 capable of accommodating substrates. The substrate heating chamber 2705 is connected to a vacuum pump 2770 via a valve. The vacuum pump 2770 may be, for example, a dry pump or a mechanical booster pump. etc. can be used.

[0403] The heating mechanism that can be used in the substrate heating chamber 2705 is, for example, a resistance heating mechanism. Alternatively, the heating mechanism may be a mechanism that uses a medium such as a heated gas to heat the object. For example, the heating mechanism may be a GRTA (G as Rapid Thermal Anneal), LRTA(Lamp Rapid RTA such as RTA (Rapid Thermal Anneal) can be used. halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, The radiation of light (electromagnetic waves) emitted from high-pressure sodium lamps, high-pressure mercury lamps, etc. The GRTA uses high-temperature gas to perform heat treatment. Inert gas is used.

[0404] The substrate heating chamber 2705 is connected to the refiner 27 via a mass flow controller 2780. 81. The mass flow controller 2780 and the refiner 2781 are connected to the gas Although the number of the heating chambers is equal to the number of types, only one is shown for ease of understanding. The gas to be introduced has a dew point of -80°C or less, preferably -100°C or less. For example, oxygen gas, nitrogen gas, and rare gas (such as argon gas) can be used.

[0405] The transfer chamber 2704 has a transfer robot 2763. The transfer robot 2763 The transfer chamber 2704 can be connected to a vacuum pump via a valve. 2770 and a cryopump 2771 are connected. The transfer chamber 2704 can be set to a pressure ranging from atmospheric pressure to low or medium vacuum (several hundred Pa to approximately 0.1 Pa). The chamber is evacuated using a vacuum pump 2770 at 1000 W. The valve is switched to change the vacuum from medium to high or ultra-high. High vacuum (0.1 Pa to 1×10 -7 Using the Cryopump 2771, It is exhausted.

[0406] In addition, for example, two or more cryopumps 2771 are connected in parallel to the transfer chamber 2704. With this configuration, even if one cryopump is in the regeneration Even if the remaining cryopump is used, it is possible to pump the remaining cryopump. Cryopumping is the process of releasing molecules (or atoms) stored in the cryopump. If the Lyopump accumulates too many molecules (or atoms), its pumping capacity will decrease. It is periodically regenerated.

[0407] FIG. 34(B) shows the film forming chamber 2706b, the transfer chamber 2704, and the load lock chamber 2703a. 1 shows a cross section of the

[0408] Here, the film formation chamber (sputtering chamber) will be described in detail with reference to FIG. 34(B). The film forming chamber 2706b shown in FIG. 34(B) includes a target 2766a and a target 276 6b, target shield 2767a, target shield 2767b, and magnet a magnet unit 2790a, a substrate holder 2768, and an electrode Although not shown, the target 2766a and the target 2766 b are fixed to the target holder via a backing plate. A power supply 2791 is electrically connected to the get 2766a and the target 2766b. The magnet unit 2790a and the magnet unit 2790b are Located on the back of the get 2766a and the target 2766b. Target Shield 2 767a and target shield 2767b are respectively target 2766a and target The substrate holder 2768 is arranged to surround the end of the get 2766b. The substrate holder 2768 supports a substrate 2769 via a movable member 2784. The target 2766a and the target 2766b are fixed to the film forming chamber 2706b by a movable member 2784. The substrate holder 276 extends to the region between the target 276 and the target 276b (also called the inter-target region). For example, the substrate holder 2768 supporting the substrate 2769 can be moved. Placing the target in the inter-target region may reduce plasma damage. Although not shown, the substrate holder 2768 includes a substrate holding mechanism for holding the substrate 2769, A heater or the like may be provided to heat the substrate 2769 from the rear side.

[0409] In addition, the target shield 2767a and the target shield 2767b - Particles sputtered from the target 2766a and the target 2766b are in an unwanted area. The target shield 2767a and the target shield It is desirable to process 2767b so that accumulated sputter particles do not peel off. For example, blasting to increase surface roughness, or target shielding 2767a and The surface of the target shield 2767b may be uneven.

[0410] The deposition chamber 2706b is connected to a mass flow controller 2782 via a gas heating mechanism 2782. 780, and the gas heating mechanism 2782 is precisely controlled via the mass flow controller 2780. The gas is introduced into the film-forming chamber 2706b by a gas heating mechanism 2782. The gas to be treated is heated to a temperature of 40°C or higher and 400°C or lower, preferably 50°C or higher and 200°C or lower. The gas heating mechanism 2782, the mass flow controller 2780, and the refiner 2 Although the number of gases 781 is equal to the number of gases, only one is shown for ease of understanding. The gas introduced into 2706b has a dew point of -80°C or less, preferably -100°C or less. Gases can be used, such as oxygen gas, nitrogen gas, and rare gases (such as argon gas). ) is used.

[0411] In addition, when a refiner is provided immediately before the gas inlet, the distance from the refiner to the deposition chamber 2706b The length of the piping is set to 10 m or less, preferably 5 m or less, and more preferably 1 m or less. By limiting the length to 10m or less, 5m or less, or 1m or less, the impact of gas released from the piping can be reduced. In addition, the gas piping is free of iron fluoride, aluminum oxide, and acid. It is recommended to use metal piping with the inside coated with chromium oxide or the like. Compared to 316L-EP piping, the amount of gas containing impurities released is smaller, and the amount of impurities in the gas is reduced. In addition, high-performance ultra-small metal gasket fittings (UPG) are used for the piping joints. In addition, by constructing the piping entirely from metal, it is possible to reduce the In comparison, this is preferable because it can reduce the effects of released gas and external leakage.

[0412] The film forming chamber 2706b is connected to a turbo molecular pump 2772 and a vacuum pump 2773 via a valve. It is connected to 2770.

[0413] The film formation chamber 2706b is provided with a cryotrap 2751.

[0414] Cryotrap 2751 adsorbs molecules (or atoms) with a relatively high melting point, such as water. The turbomolecular pump 2772 is a mechanism that can pump large molecules (or atoms). It has excellent productivity due to stable exhaust of hydrogen and hydrogen atoms and low maintenance frequency. Therefore, in order to improve the pumping capacity for water, etc., a cryotrap is used. The cryotrap 2751 is connected to the film forming chamber 2706b. The temperature of the refrigerator is set to 100 K or less, preferably 80 K or less. If 2751 has multiple refrigerators, changing the temperature of each refrigerator will allow for efficient exhaust. For example, the temperature of the first stage refrigerator is set to 100K or less, and The temperature of the second stage refrigerator should be set to 20K or less. Using a sublimation pump may allow for even higher vacuum. In addition, by using an ion pump instead of a cryopump or turbomolecular pump, In some cases, it is possible to achieve a high vacuum.

[0415] The method of exhausting the film forming chamber 2706b is not limited to this, and may be the same as that of the transfer chamber 2704. The same configuration as the exhaust method (exhaust method of a cryopump and a vacuum pump) may also be used. Of course, the exhaust method of the transfer chamber 2704 is the same as that of the film forming chamber 2706b (with a turbo molecular pump). It may also be possible to use a vacuum pump (exhaust method).

[0416] In addition, the back pressure ( The total pressure and the partial pressure of each gas molecule (atom) are preferably as follows. Since there is a possibility that impurities may be mixed into the film to be formed, the back pressure of the film forming chamber 2706b, etc. It is also necessary to pay attention to the partial pressure of each gas molecule (atom).

[0417] The back pressure (total pressure) of each chamber mentioned above is 1 x 10 -4 Pa or less, preferably 3 x 10 -5 Pa or less, more preferably 1 × 10 -5 The mass-to-charge ratio (m / The partial pressure of a gas molecule (atom) with z) equal to 18 is 3 x 10 -5 Pa or less, preferably 1 x 1 0 -5 Pa or less, more preferably 3×10 -6 Pa or less. The partial pressure of a gas molecule (atom) with m / z 28 is 3 x 10 -5 Pa or less, preferably 1× 10-5 Pa or less, more preferably 3×10 -6 In addition, the temperature of each of the above-mentioned rooms is The partial pressure of a gas molecule (atom) with m / z 44 is 3 x 10 -5 Pa or less, preferably 1 x10 -5 Pa or less, more preferably 3×10 -6 Pa or less.

[0418] The total pressure and partial pressure in the vacuum chamber can be measured using a mass spectrometer. For example, a quadrupole mass spectrometer (also called Q-mass) manufactured by ULVAC, Inc. ee Just use CGM-051.

[0419] The transfer chamber 2704, the substrate heating chamber 2705, and the film forming chamber 2706b are externally It is desirable to have a configuration with little leakage or internal leakage.

[0420] For example, the above-mentioned transfer chamber 2704, substrate heating chamber 2705, and film forming chamber 2706b The crate is 3 x 10 -6 Pa·m 3 / s or less, preferably 1×10 -6 Pa·m 3 / s In addition, the leak rate of gas molecules (atoms) with m / z of 18 is 1 × 10 -7 Pa·m 3 / s or less, preferably 3 × 10 -8 Pa·m 3 / s or less. The leak rate of gas molecules (atoms) with a value of 28 is 1×10 -5 Pa·m 3 / s or less, preferred Or 1 x 10 -6 Pa·m 3 / s or less. Also, gas molecules with m / z of 44 (atomic The leak rate of the child is 3×10 -6 Pa·m3 / s or less, preferably 1×10 -6 Pa· m 3 / s or less.

[0421] The leak rate was calculated from the total pressure and partial pressure measured using the mass spectrometer mentioned above. It can be derived.

[0422] The leak rate depends on external and internal leaks. External leaks occur due to small holes or seals. An internal leak is when gas flows in from outside the vacuum system due to a valve malfunction or other reasons. This is caused by leaks from valves and other partitions, or by gas released from internal components. In order to keep the above figure or less, it is necessary to take measures against both external and internal leaks. be.

[0423] For example, the opening and closing portion of the film forming chamber 2706b may be sealed with a metal gasket. The gasket is made of metal coated with iron fluoride, aluminum oxide, or chromium oxide. It is preferable to use a metal gasket. Metal gaskets have a higher adhesion than O-rings and reduce external leakage. It can also reduce the amount of iron fluoride, aluminum oxide, chromium oxide, etc. coated metals. By using the passivation, the gas released from the metal gasket containing impurities is suppressed. This reduces internal leakage.

[0424] In addition, the film forming apparatus 2700 is made of aluminum, which emits less gas containing impurities. The alloys used are aluminum, chromium, titanium, zirconium, nickel, or vanadium. The above-mentioned members may be used by being coated with an alloy containing iron, chromium, nickel, etc. The alloy containing nickel and the like is rigid, heat-resistant, and suitable for processing. In order to reduce the surface area, if the surface roughness of the component is reduced by polishing, the released gas This can reduce the risk of

[0425] Alternatively, the components of the film forming apparatus 2700 may be replaced with iron fluoride, aluminum oxide, chromium oxide, etc. It may be coated with, for example.

[0426] It is preferable that the members of the film forming apparatus 2700 are made of metal only, for example, quartz. When installing a viewing window made of iron fluoride, the surface is coated with iron fluoride to suppress gas emissions. It is recommended to coat it thinly with aluminum oxide or chromium oxide.

[0427] The adsorbates present in the film deposition chamber are adsorbed to the inner walls, etc., and do not affect the pressure in the film deposition chamber. This causes gas emission when the deposition chamber is evacuated. Although there is no correlation, it is recommended to use a pump with high exhaust capacity to remove as much of the adsorbed matter as possible from the deposition chamber. It is important to desorb the adsorbed material and evacuate the gas beforehand. The deposition chamber may be baked. Baking increases the desorption rate of adsorbed substances by about 10 times. Baking can be performed at a temperature between 100°C and 450°C. When removing adsorbed substances while introducing an inert gas into the deposition chamber, the adsorbed substances cannot be removed by simply evacuating the chamber. The desorption rate of water, which is difficult to remove, can be further increased. Heating to the same temperature as baking can further increase the desorption rate of adsorbed substances. Here, it is preferable to use a rare gas as the inert gas. For example, when forming an oxide film, oxygen or the like may be used instead of an inert gas. In some cases, it is preferable to use oxygen, which is the main component. It is preferable to do this in a

[0428] Alternatively, an inert gas such as a heated rare gas or oxygen may be introduced into the film formation chamber. It is preferable to increase the pressure and then evacuate the film formation chamber again after a certain period of time has elapsed. By introducing gas, it is possible to desorb adsorbed substances in the film formation chamber, and impurities present in the film formation chamber can be removed. This treatment can be carried out 2 to 30 times, preferably 5 to 15 times. It is effective to repeat this process within the range of 40°C to 400°C. In the case where the temperature is preferably 50°C or higher and 200°C or lower, an inert gas or oxygen is introduced. The pressure in the deposition chamber is set to 0.1 Pa or more and 10 kPa or less, preferably 1 Pa or more and 1 kPa or less. More preferably, the pressure is set to 5 Pa or more and 100 Pa or less, and the pressure is maintained for 1 minute or more and 300 minutes or less. The time is preferably 5 minutes or more and 120 minutes or less. The air is evacuated for a period of time of not more than 10 minutes and not more than 120 minutes.

[0429] Furthermore, the desorption rate of the adsorbed substances can be further increased by forming a dummy film. - Film formation is performed on a dummy substrate by sputtering or other methods. A film is deposited on the substrate and the inner wall of the film-forming chamber, and impurities in the film-forming chamber and substances adsorbed on the inner wall of the film-forming chamber are removed from the film. The dummy substrate is preferably a substrate that emits less gas. By performing this process, the impurity concentration in the film to be formed later can be reduced. The film may be baked at the same time.

[0430] Next, the transfer chamber 2704 and the load lock chamber 2703a shown in FIG. 34(B) and the Details of the atmospheric substrate transfer chamber 2702 and the atmospheric substrate supply chamber 2701 shown in (C) 34(C) shows the atmospheric side substrate transfer chamber 2702 and the atmospheric side substrate supply chamber 2703. A cross section of the supply chamber 2701 is shown.

[0431] The transfer chamber 2704 shown in FIG. 34(B) is the same as the transfer chamber 2704 shown in FIG. 34(A). Please refer to the description.

[0432] The load lock chamber 2703a includes a substrate transfer stage 2752. The pressure in the chamber 2703a is increased from a reduced pressure state to atmospheric pressure, and the pressure in the load lock chamber 2703a is increased. When the pressure becomes atmospheric pressure, the transfer robot 27 installed in the atmospheric side substrate transfer chamber 2702 63 to the substrate transfer stage 2752. After the chamber 2703a is evacuated and put into a reduced pressure state, the transfer robot installed in the transfer chamber 2704 The stage 2763 receives the substrate from the substrate transfer stage 2752 .

[0433] The load lock chamber 2703a is connected to a vacuum pump 2770 and a cryogenic It is connected to the vacuum pump 2770 and the cryopump 2771. The exhaust system can be connected by referring to the connection method of the transfer chamber 2704. The unload lock chamber 2703b shown in FIG. It can have the same configuration as lock chamber 2703a.

[0434] The atmospheric substrate transfer chamber 2702 includes a transfer robot 2763. The substrate is transferred between the cassette port 2761 and the load lock chamber 2703a. In addition, above the atmosphere-side substrate transfer chamber 2702 and the atmosphere-side substrate supply chamber 2701, HEPA filter (High Efficiency Particulate Air Filter) A mechanism for cleaning dust or particles such as a filter may be provided. .

[0435] The atmosphere-side substrate supply chamber 2701 has a plurality of cassette ports 2761. The enclosure 2761 can accommodate multiple substrates.

[0436] The target surface temperature is 100°C or less, preferably 50°C or less, and more preferably room temperature. The temperature should be around 25°C (typically 25°C). However, targets of a size corresponding to a large area are often used. In reality, it is difficult to fabricate multiple targets without any gaps. Although they are arranged in a large shape so that they do not overlap, there are inevitably small gaps. As the surface temperature of the target rises, zinc and other materials volatilize from the small gaps, gradually filling the gaps. If the gap widens, the backing plate or The metal of the bonding material used to bond the base and target is sputtered. This increases the impurity concentration. It is preferable that

[0437] Specifically, a metal (such as a metal alloy) having high electrical conductivity and high heat dissipation properties is used as the backing plate. In addition, a groove is formed in the backing plate, and a sufficient amount of By flowing cooling water, the target can be cooled efficiently.

[0438] By using the above-mentioned film forming apparatus, the hydrogen concentration was measured by SIMS to be 1×10 20 ato ms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5, more preferably x10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 It is possible to form an oxide semiconductor film having a thickness of less than 100 nm.

[0439] In addition, the nitrogen concentration is 5×10 18 atoms / cm 3 The following is preferably is 1 x 10 18 atoms / cm 3 An oxide semiconductor film can be formed as follows.

[0440] In addition, the carbon concentration was 2×10 18 atoms / cm 3 The following is preferably is 2 x 10 17 atoms / cm 3 An oxide semiconductor film can be formed as follows.

[0441] An oxide semiconductor film with few impurities and oxygen vacancies has a low carrier density. Specifically, the carrier density is 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 Such an oxide semiconductor can be a highly pure intrinsic or substantially highly pure oxide semiconductor. The oxide semiconductor film has a low impurity concentration and a low defect state density. That is, it can be said that the oxide semiconductor film has stable characteristics.

[0442] In addition, gas molecules (atoms) with m / z of 2 (such as hydrogen molecules) by TDS and gas molecules with m / z of 1 A gas molecule (atom) with m / z 8, a gas molecule (atom) with m / z 28, and a gas molecule (atom) with m / z 44 The amount of gas molecules (atoms) released is 1×10 19 pieces / cm 3 Below, preferably 1x 10 18 pieces / cm 3 The following oxide semiconductor film can be formed.

[0443] By using the above film formation apparatus, impurities can be prevented from being mixed into the oxide semiconductor film. In this case, a film in contact with the oxide semiconductor film is formed using the above film formation apparatus. This can prevent impurities from being mixed into the oxide semiconductor film from a film in contact with the conductive film.

[0444] As described above, the configuration shown in this embodiment may be appropriately combined with configurations shown in other embodiments or examples. , can be used in combination.

[0445] (Fourth embodiment) In this embodiment, a display device including a semiconductor device of one embodiment of the present invention will be described with reference to FIG. This will be used to explain.

[0446] <4. Explanation of display device> The display device shown in FIG. 35(A) has a region having pixels of a display element (hereinafter referred to as a pixel portion 502). ) and a circuit section ( hereinafter referred to as a drive circuit section 504), and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 50 6) and a terminal portion 507. Note that the protection circuit 506 is not provided. That's fine.

[0447] A part or the whole of the driver circuit portion 504 is formed on the same substrate as the pixel portion 502. This makes it possible to reduce the number of parts and terminals. When a part or all of the pixel portion 502 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 504 is COG or TAB (Tape Automated Bearing). It can be implemented by

[0448] The pixel section 502 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device has a circuit for driving a plurality of display elements (hereinafter referred to as pixel circuit 501), The path section 504 is a circuit (hereinafter referred to as a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 504a), for supplying signals (data signals) for driving the display elements of the pixels. The source driver 504b includes a driving circuit such as the circuit (hereinafter referred to as a source driver 504b).

[0449] The gate driver 504a includes a shift register and the like. A signal for driving the shift register is inputted through the terminal section 507, and a signal for outputting the shift register is outputted. For example, the gate driver 504a receives a start pulse signal, a clock signal, etc. The gate driver 504a receives a scanning signal and outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 504a are provided, and the plurality of gate drivers 504a drive the scanning lines GL_1 to Alternatively, the gate driver 504a may control the GL_X by dividing it into the initialization signal However, the gate driver 50 has a function of supplying 4a may also provide other signals.

[0450] The source driver 504b includes a shift register and the like. Through the terminal section 507, signals for driving the shift register as well as the source of the data signal are transmitted. The source driver 504b receives a signal (image signal) that is to be output from the pixel circuit The source driver 504b has a function of generating a data signal to be written to the source driver 501. A data signal is generated in accordance with a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 504b has a function of controlling the output of a data signal. The data lines DL_1 to DL_Y are connected to the data lines DL_2 through DL_Y. Alternatively, the source driver 504b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b may also supply other signals. It is possible.

[0451] The source driver 504b is configured using, for example, a plurality of analog switches. The source driver 504b sequentially turns on a plurality of analog switches, The image signal can be time-divided and output as a data signal. The source driver 504b may be configured using the same.

[0452] Each of the plurality of pixel circuits 501 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is input via the data line DL, and a data signal is given via one of the data lines DL. Each of the pixel circuits 501 is connected to a gate driver 504a controls writing and holding of data of the data signal. The second pixel circuit 501 is connected to a gate driver GL_m (where m is a natural number equal to or less than X) via a scanning line GL_m. A pulse signal is input from 504a, and the data line DL_n ( A data signal is input from the source driver 504b via the input terminal 504a (n is a natural number equal to or less than Y).

[0453] The protection circuit 506 shown in FIG. 35(A) is, for example, a gate driver 504a and a pixel circuit 5 01. Alternatively, the protection circuit 506 is connected to the scanning line GL, which is the wiring between the source driver The data line DL is connected between the driver 504b and the pixel circuit 501. The protection circuit 506 can be connected to the wiring between the gate driver 504a and the terminal section 507. Alternatively, the protection circuit 506 may be formed by wiring between the source driver 504b and the terminal section 507. The terminal section 507 can be connected to a power supply and a line from an external circuit to the display device. This refers to the part where terminals for inputting control signals and image signals are provided.

[0454] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit 506 This is a circuit that brings one wire into electrical continuity with another wire.

[0455] As shown in FIG. 35(A), a pixel section 502 and a driver circuit section 504 are provided with a protection circuit 50. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrents caused by electrostatic discharges and the like. However, the configuration of the protection circuit 506 is not limited to this. For example, A configuration in which a protection circuit 506 is connected, or a configuration in which the protection circuit 506 is connected to the source driver 504b Alternatively, a configuration in which a protection circuit 506 is connected to the terminal portion 507 may be used. It can also be done as follows.

[0456] In FIG. 35(A), the gate driver 504a and the source driver 504b Therefore, although an example in which the driver circuit portion 504 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 504a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is implemented. It may also be configured to be equipped with

[0457] Furthermore, the plurality of pixel circuits 501 shown in FIG. 35(A) may be, for example, a configuration shown in FIG. 35(B). It can be said that:

[0458] The pixel circuit 501 shown in FIG. 35B includes a liquid crystal element 570, a transistor 550, and a capacitor. The transistor 550 may be any of the transistors described in the previous embodiments. can be applied.

[0459] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 included in each of the pixel circuits 501. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 501 in each row. One of the electrodes may be given a different potential.

[0460] For example, a method for driving a display device having the liquid crystal element 570 is to use a TN (Twisted Nematic) Nematic mode, STN (Super-Twisted Nematic) mode Mode, VA (Vertical Alignment) mode, MVA (Multi-D Main Vertical Alignment mode, PVA (Pattern ed Vertical Alignment) mode, IPS (In-Plane-S witching) mode, FFS(Fringe Field Switching) mode, ASM (Axially Symmetric Aligned Micro- cell) mode, OCB (Optically Compensated Biref ringence mode, FLC (Ferroelectric Liquid Cr ystal) mode, AFLC(AntiFerroelectric Liquid Crystal) mode or TBA (Transverse Bend Align) ment) mode may also be used.

[0461] In addition to the above-mentioned driving method, the display device can also be driven by an ECB (Electro Cally Controlled Birefringence mode, PDLC ( Polymer Dispersed Liquid Crystal (PNL) mode C (Polymer Network Liquid Crystal) mode, guest However, there are other liquid crystal elements and their driving methods, including but not limited to the above. A variety of materials can be used.

[0462] In the pixel circuit 501 in the mth row and the nth column, the source electrode or the drain electrode of the transistor 550 One of the electrodes is electrically connected to the data line DL_n, and the other is connected to a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the electrodes of the scan line G. L_m. The transistor 550 can be turned on or off. This provides a function of controlling the writing of data signals.

[0463] One of the pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitor 560 functions as a storage capacitor for storing written data.

[0464] For example, in a display device having the pixel circuit 501 of FIG. 35(B), The pixel circuits 501 in each row are sequentially selected by the gate driver 504a shown in FIG. 550 is turned on and data of the data signal is written.

[0465] The pixel circuit 501 in which data has been written is turned off by turning off the transistor 550. By repeating this process for each row, an image can be displayed.

[0466] Furthermore, the plurality of pixel circuits 501 shown in FIG. 35(A) may be, for example, a configuration shown in FIG. 35(C). It can be said that:

[0467] The pixel circuit 501 shown in FIG. 35C includes transistors 552 and 554 and a capacitor 56. 2 and a light-emitting element 572. The transistor described in the above embodiment can be applied to either or both of them.

[0468] One of the source and drain electrodes of the transistor 552 is supplied with a data signal. The gate of the transistor 552 is electrically connected to the wiring (data line DL_n). The electrodes are electrically connected to wiring (scanning lines GL_m) to which gate signals are applied.

[0469] Transistor 552 is turned on or off to transfer the data of the data signal. It has the function of controlling the writing of data.

[0470] One of the pair of electrodes of the capacitor 562 is connected to a wiring to which a potential is applied (hereinafter, a potential supply line VL _a), and the other is electrically connected to the source electrode and drain electrode of the transistor 552. The second electrode is electrically connected to the other of the first and second electrodes.

[0471] The capacitor 562 functions as a storage capacitor for holding written data.

[0472] One of the source electrode and the drain electrode of the transistor 554 is connected to the potential supply line VL_a. Furthermore, the gate electrode of transistor 554 is electrically connected to the It is electrically connected to the other of the source electrode and the drain electrode.

[0473] One of the anode and cathode of the light emitting element 572 is electrically connected to the potential supply line VL_b. The other is electrically connected to the other of the source electrode and drain electrode of the transistor 554. will be done.

[0474] The light emitting element 572 may be, for example, an organic electroluminescence element (also known as an organic EL element). However, the light emitting element 572 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0475] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0476] In a display device having the pixel circuit 501 of FIG. 35(C), for example, The pixel circuits 501 in each row are sequentially selected by the gate driver 504a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0477] The pixel circuit 501 to which the data has been written is turned off by turning off the transistor 552. Furthermore, the transistor 554 is held in a holding state in response to the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted at a brightness that corresponds to the flow rate. By repeating this process row by row, an image can be displayed.

[0478] In this embodiment, the display device includes a liquid crystal element 570 and a light-emitting element. Although the configuration having the element 572 has been illustrated, the display device is not limited to this, and various elements may be used. may have

[0479] The display device may be, for example, a liquid crystal element, an EL element (EL element including organic and inorganic materials, Organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs) D, etc.), transistors (transistors that emit light according to the current), electron emitters, electron inductors ink, electrophoretic element, grating light valve (GLV), plasma display ( PDP), display elements using MEMS (microelectromechanical systems) , Digital Micromirror Device (DMD), DMS (Digital Micro Shutter MIRASOL (registered trademark), IMOD (Interference Modulation shutter-type MEMS display elements, optical interference-type MEMS display elements, Using trowetting elements, piezoelectric ceramic displays, and carbon nanotubes In addition to these, it has at least one of an electric or magnetic action. The display medium may have a contrast, brightness, reflectance, transmittance, etc. that change depending on the An example of a display device using electron-emitting elements is a field emission display. FED or SED type flat panel display (SED: Surface-conductive ction Electron-emitter Display). An example of a display device using a device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, Transmissive LCD, Reflective LCD, Direct-view LCD, Projection LCD Examples of display devices using electronic ink or electrophoretic elements include Examples include electronic paper. Semi-transmissive LCD displays and reflective LCD displays are also available. In order to realize the above, a part or all of the pixel electrodes should have a function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. Furthermore, in this case, a memory such as an SRAM may be provided under the reflective electrode. It is also possible to provide a circuit, which can further reduce power consumption. .

[0480] The display method of the display device of this embodiment may be a progressive method or an interleave method. In addition, when displaying color, the color elements controlled by the pixels can be The color is not limited to the three colors of RGB (R stands for red, G stands for green, and B stands for blue). For example, It may be composed of four pixels: a pixel of color 1, a pixel of color 2, a pixel of color 3, and a pixel of color 4 (white). Like a tile array, two colors of RGB make up one color element, and depending on the color element, You can also select two different colors, or use yellow, cyan, magenta, etc. for RGB. It is possible to add one or more colors. The size of the display area varies for each dot of the color element. However, the disclosed invention is not limited to color display devices. It can also be applied to a monochrome display device.

[0481] Also, backlights for display devices (organic EL elements, inorganic EL elements, LEDs, fluorescent lights, etc.) A white light (W) may be provided in the display device. Also, a colored layer (also called a color filter) may be provided in the display device. As the colored layer, for example, red (R), green (G), blue (B) ), yellow (Y), etc. can be used in combination as appropriate. In this case, the color reproducibility can be improved compared to when no color layer is used. By disposing a region having a colored layer and a region not having a colored layer, The white light in the region may be directly used for display. By placing the color layer in the display, the decrease in brightness caused by the color layer can be reduced during bright display, and power consumption can be reduced by 2. However, it may be possible to reduce the emission by approximately 100% to 30%. When using optical elements to display full color, R, G, B, Y, and white (W) are By using a self-luminous element, the color layer can be In some cases, power consumption can be further reduced compared to when using a conventional method.

[0482] The structure shown in this embodiment mode may be appropriately combined with structures shown in other embodiment modes or examples. It can be used in combination.

[0483] (Embodiment 5) In this embodiment, a display device including a semiconductor device according to one embodiment of the present invention and a display device including the semiconductor device will be described. An electronic device having an input device attached thereto will be described with reference to FIGS.

[0484] <5-1. Explanation of the touch panel> In the present embodiment, an example of an electronic device is a device that combines a display device and an input device. The touch panel 2000 will be described. The case where the .

[0485] 36(A) and (B) are perspective views of the touch panel 2000. In B), representative components of touch panel 2000 are shown for clarity.

[0486] The touch panel 2000 includes a display device 2501 and a touch sensor 2595 (see FIG. 3). 6(B)). The touch panel 2000 includes a substrate 2510, a substrate 2570, and a substrate The substrate 2510, the substrate 2570, and the substrate 2590 are all However, any one of the substrates 2510, 2570, and 2590 is flexible. Alternatively, one or all of the components may be configured to be non-flexible.

[0487] The display device 2501 has a plurality of pixels on a substrate 2510 and a display device that can supply signals to the pixels. The plurality of wirings 2511 are arranged around the periphery of the substrate 2510. The wire is routed through a cable, part of which forms the terminal 2519. The terminal 2519 is an FPC2509 (1) and electrically connect.

[0488] The substrate 2590 is electrically connected to the touch sensor 2595. The plurality of wirings 2598 are routed around the periphery of the substrate 2590. The terminal is electrically connected to the FPC2509(2). In FIG. 36(B), for clarity, the back side of the substrate 2590 (substrate 2510 The electrodes and wiring of the touch sensor 2595 provided on the surface opposite to the touch sensor 2595 are shown by solid lines. .

[0489] As the touch sensor 2595, for example, a capacitance type touch sensor can be applied. The capacitive type includes a surface type electrostatic capacitance type and a projected type electrostatic capacitance type.

[0490] The projected capacitive type is mainly divided into self-capacitance type and mutual capacitance type, which differ mainly in the driving method. The mutual capacitance method is preferable because it allows simultaneous multi-point detection.

[0491] The touch sensor 2595 shown in FIG. 36(B) is a projected capacitive touch sensor. This is a configuration in which the .

[0492] The touch sensor 2595 can detect the proximity or contact of a detection object such as a finger. Various sensors can be applied.

[0493] The projected capacitive touch sensor 2595 has an electrode 2591 and an electrode 2592. The electrode 2591 is electrically connected to one of the plurality of wirings 2598, and the electrode 2592 is It is electrically connected to any other of the plurality of wirings 2598.

[0494] As shown in FIGS. 36(A) and 36(B), the electrodes 2592 are made of a plurality of electrodes repeatedly arranged in one direction. The shape is such that the quadrilaterals are connected at their corners.

[0495] The electrode 2591 is quadrilateral and is repeated in a direction intersecting the direction in which the electrode 2592 extends. are placed.

[0496] The wiring 2594 is electrically connected to the two electrodes 2591 that sandwich the electrode 2592. In this case, it is preferable that the area of ​​the intersection between the electrode 2592 and the wiring 2594 is as small as possible. This reduces the area where no electrodes are provided, reducing variations in transmittance. As a result, the variation in brightness of light passing through the touch sensor 2595 can be reduced. can be done.

[0497] The shapes of the electrodes 2591 and 2592 are not limited to this, and may take various shapes. For example, multiple electrodes 2591 are arranged with as few gaps as possible, and A plurality of electrodes 2592 are provided at intervals so that there is an area where they do not overlap with the electrodes 2591. In this case, a contact between two adjacent electrodes 2592 may be provided. Providing an insulated dummy electrode is preferable because it can reduce the area of ​​the region with different transmittance. .

[0498] The conductive films such as the electrodes 2591, 2592, and wiring 2598, that is, the touch panel Materials that can be used for the wiring and electrodes that make up the filter include indium oxide, tin oxide, and oxide. Examples of the transparent conductive film include a transparent conductive film containing zinc oxide (e.g., ITO). As a material that can be used for the wiring and electrodes that constitute the device, for example, a material with a low resistance value is preferred. Examples include silver, copper, aluminum, carbon nanotubes, graphene, and halogens. Metal halide (such as silver halide) may also be used. Even if metal nanowires (several nanometers in diameter) are used, which are composed of multiple conductors, Alternatively, a metal mesh made of a conductor may be used. Nanowires, Cu nanowires, Al nanowires, Ag mesh, Cu mesh, Al plated For example, Ag nanowires may be used for the wiring and electrodes that make up the touch panel. When using a material with a visible light transmittance of 89% or more and a sheet resistance of 40 Ω / cm 2 End 100Ω / cm 2 The wiring constituting the touch panel can be as follows. Examples of materials that can be used for electrodes include metal nanowires, metal meshes, and carbon nanotubes. Nanotubes and graphene have high transmittance in visible light, so they are used in display elements. Alternatively, the electrode may be used as a pixel electrode or a common electrode.

[0499] <5-2. Explanation of display devices> Next, the display device 2501 will be described in detail with reference to Figures 37(A) and 37(B). 7(A) and 7(B) correspond to cross-sectional views taken along the dashed dotted line X1-X2 shown in FIG. 36(B).

[0500] The display device 2501 has a plurality of pixels arranged in a matrix. and a pixel circuit for driving the display element.

[0501] [Configuration using EL elements as display elements] First, a configuration using an EL element as a display element will be described below with reference to FIG. 37(A). In the following description, the case where an EL element that emits white light is applied will be described. However, the EL element is not limited to this. For example, EL elements having different emission colors may be applied so that the colors of the light emitted from the EL elements are different.

[0502] The substrate 2510 and the substrate 2570 are, for example, made of a material having a water vapor permeability of 10 -5 g / (m 2 ·day) or less, preferably 10 -6 g / (m 2 · Flexibility of less than 1 day Alternatively, the thermal expansion coefficient of the substrate 2510 and the thermal expansion coefficient of the substrate 2570 can be adjusted. It is preferable to use a material with a thermal expansion coefficient that is approximately equal to the coefficient of linear expansion of the material. For example, a material with a linear expansion coefficient of 1×10 - 3 / K or less, preferably 5×10 -5 / K or less, more preferably 1×10 -5 / K or less Certain materials may be used advantageously.

[0503] The substrate 2510 is made of an insulating layer 2510a that prevents impurities from diffusing into the EL element, and a flexible The substrate 2510b and the adhesive layer 2 that bonds the insulating layer 2510a and the flexible substrate 2510b together. The substrate 2570 is a laminate having a layer 510c and a layer 510d. and a flexible substrate 2570b. 2570b and an adhesive layer 2570c that bonds them together.

[0504] The adhesive layer 2510c and the adhesive layer 2570c may be made of, for example, polyester or polyolefin. Polyimide, polycarbonate or acrylic resin, polyurethane, epoxy resin or resin with siloxane bond. It is possible.

[0505] In addition, a sealing layer 2560 is provided between the substrate 2510 and the substrate 2570. It is preferable that the refractive index of the sealing material is larger than that of air. When light is extracted to the layer 2560 side, the sealing layer 2560 can also serve as an optical element.

[0506] A sealant may be formed on the outer periphery of the sealing layer 2560. As a result, the area surrounded by the substrate 2510, the substrate 2570, the sealing layer 2560, and the sealant The sealing layer 2560 may have an EL element 2550. It may be filled with an inert gas (nitrogen, argon, etc.). Also, a desiccant may be placed in the inert gas. The sealing material may be, for example, It is preferable to use epoxy resin or glass frit. It is preferable to use a material that is impermeable to moisture and oxygen.

[0507] The display device 2501 shown in FIG. 37A includes a pixel 2505. 505 is a light emitting module 2580, an EL element 2550, and a and a transistor 2502t that can supply a 2t functions as a part of the pixel circuit.

[0508] The light emitting module 2580 also includes an EL element 2550 and a colored layer 2567 . The EL element 2550 has a lower electrode, an upper electrode, and an EL element between the lower electrode and the upper electrode. The layer.

[0509] Furthermore, when the sealing layer 2560 is provided on the side from which light is extracted, the sealing layer 2560 has a property of E The L element 2550 and the colored layer 2567 are in contact with each other.

[0510] The colored layer 2567 is located so as to overlap the EL element 2550. A part of the light emitted by 50 passes through the colored layer 2567 and travels to the light emitting module in the direction of the arrow shown in the figure. It is ejected outside of Rule 2580.

[0511] The display device 2501 is also provided with a light-shielding layer 2568 in the light-emitting direction. Layer 2568 is provided to surround colored layer 2567 .

[0512] The colored layer 2567 may have a function of transmitting light in a specific wavelength band. For example, For example, a color filter that transmits light in the red wavelength band, a color filter that transmits light in the green wavelength band, a color filter that transmits light in the blue wavelength band, a color filter that transmits light in the yellow wavelength band, Each color filter can be made of various materials. In this regard, printing methods, inkjet methods, etching methods using photolithography technology, etc. It can be formed by

[0513] The display device 2501 is also provided with an insulating layer 2521. The insulating layer 2521 covers the resistor 2502t and other components. In addition, the insulating layer 2521 has a function of suppressing impurity diffusion. This prevents the reliability of the transistor 2502t and the like from being reduced due to the diffusion of impurities. can be suppressed.

[0514] The EL element 2550 is formed above the insulating layer 2521. The lower electrode of 50 is provided with a partition wall 2528 that overlaps the edge of the lower electrode. A spacer for controlling the distance between the substrate 2510 and the substrate 2570 is formed on the partition wall 2528. You may do so.

[0515] The scan line driver circuit 2504 includes a transistor 2503t, a capacitor 2503c, and The driver circuit and the pixel circuit can be formed on the same substrate in the same process. .

[0516] Moreover, wiring 2511 capable of supplying signals is provided on the substrate 2510 . A terminal 2519 is provided on the wiring 2511. The terminal 2519 is also provided with an FP C2509(1) is electrically connected. FPC2509(1) also transmits video signals, It has the function of supplying clock signals, start signals, reset signals, etc. 509(1) may have a printed wiring board (PWB) attached.

[0517] Note that either one or both of the transistor 2502t and the transistor 2503t The transistor described in the above embodiment may be applied to the transistor. The transistor has a highly purified oxide semiconductor film in which the formation of oxygen vacancies is suppressed. Therefore, the current value in the off state (off current value) can be reduced. This allows for a longer retention time for electrical signals such as This allows the frequency of refresh operations to be reduced, resulting in reduced power consumption. In addition, the transistor used in this embodiment has an effect of suppressing a relatively high electric field. Since effective mobility can be obtained, high speed driving is possible. For example, By using such a transistor in the display device 2501, the switching transistor of the pixel circuit The capacitor and the driver transistor used in the drive circuit can be formed on the same substrate. That is, a semiconductor device formed from a silicon wafer or the like is used as a separate driving circuit. Since there is no need for a pixel circuit, the number of components in the semiconductor device can be reduced. However, by using transistors that can be driven at high speed, high-quality images can be provided. Cut.

[0518] [Configuration using liquid crystal elements as display elements] Next, a configuration in which a liquid crystal element is used as a display element will be explained below with reference to FIG. 37(B). In the following description, a reflective liquid crystal display device that displays by reflecting external light will be described. However, the liquid crystal display device is not limited to this. For example, a light source (backlight , side light, etc.) to make a transmissive liquid crystal display device, or a combination of reflective and transmissive functions. The liquid crystal display device may also have such a function.

[0519] The display device 2501 shown in FIG. 37(B) has the following features in common with the display device 2501 shown in FIG. 37(A). The other configurations are the same as the display device 2501 shown in FIG. is.

[0520] A pixel 2505 of a display device 2501 shown in FIG. 37(B) includes a liquid crystal element 2551 and a liquid crystal element and a transistor 2502t capable of supplying power to the transistor 2551.

[0521] The liquid crystal element 2551 has a lower electrode (also called a pixel electrode), an upper electrode, and a and an upper electrode, and a liquid crystal layer 2529 between the lower electrode and the upper electrode. The orientation state of the liquid crystal layer 2529 can be changed by applying a voltage between the electrodes. In addition, a spacer 2530a and a spacer 2530b are provided in the liquid crystal layer 2529. Although not shown in FIG. 37(B), the liquid crystal layer 25 of the upper electrode and the lower electrode An alignment film may be provided on each side in contact with 29.

[0522] The liquid crystal layer 2529 may be a thermotropic liquid crystal, a low molecular weight liquid crystal, a high molecular weight liquid crystal, a high molecular weight liquid crystal, or a high molecular weight liquid crystal. The liquid crystal material can be a dispersion liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, etc. Depending on the conditions, cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. In addition, when a liquid crystal display device employs a horizontal electric field method, an alignment film When a liquid crystal exhibiting a blue phase is used, the alignment Since there is no need to provide a film, rubbing treatment is not required. It is possible to prevent electrostatic breakdown caused during the rubbing process, and the liquid crystal display during the manufacturing process This can reduce malfunctions and damage to display devices.

[0523] The spacers 2530a and 2530b are obtained by selectively etching the insulating film. The spacers 2530a and 2530b are spaced apart by a distance between the substrate 2510 and the substrate 2570. The spacers 2530a and 2530b are provided to control the cell gap. The sizes of the particles may be different from each other, and it is preferable that the particles are provided in a columnar or spherical shape. In 37(B), the spacers 2530a and 2530b are provided on the substrate 2570 side. However, the present invention is not limited to this configuration, and the substrate 2510 may be provided thereon.

[0524] The upper electrode of the liquid crystal element 2551 is provided on the substrate 2570 side. An insulating layer 2531 is provided between the electrode and the colored layer 2567 and the light-shielding layer 2568. The edge layer 2531 has the function of flattening the unevenness caused by the colored layer 2567 and the light-shielding layer 2568. The insulating layer 2531 may be, for example, an organic resin film. The lower electrode 2551 functions as a reflective electrode. 501 is a reflection type display that uses external light and reflects it at the lower electrode to display it through the colored layer 2567. In the case of a transmission type liquid crystal display device, a transparent electrode is used as the lower electrode. All that is needed is to give it a function as a pole.

[0525] The display device 2501 shown in FIG. 37(B) also includes an insulating layer 2522. The insulating layer 2522 covers the transistor 2502t and the like. and forming unevenness on the lower electrode of the liquid crystal element. This makes it possible to form irregularities on the surface of the lower electrode. When light is incident on the lower electrode, it becomes possible for the light to be diffusely reflected on the surface of the lower electrode. In the case of a transmission type liquid crystal display device, the above-mentioned unevenness can be provided. It may also be configured so that this is not the case.

[0526] <5-3. Explanation of touch sensors> Next, the touch sensor 2595 will be described in detail with reference to FIG. 36(B) along the dashed line X3-X4.

[0527] The touch sensor 2595 is made up of electrodes 2591 and electrodes 2592 arranged in a staggered pattern on a substrate 2590. 2592, an insulating layer 2593 covering the electrodes 2591 and 2592, and the adjacent electrodes 25 91 and a wiring 2594 that electrically connects them.

[0528] The electrode 2591 and the electrode 2592 are formed using a light-transmitting conductive material. Examples of conductive materials having the formula include indium oxide, indium tin oxide, and indium zinc oxide. Conductive oxides such as zinc oxide, zinc oxide, and zinc oxide doped with gallium can be used. A film containing graphene may also be used. The film containing graphene may be, for example, a film-like The graphene oxide film can be formed by reducing the graphene oxide film formed on the substrate. For example, a method of applying heat can be mentioned.

[0529] For example, a film of a light-transmitting conductive material is formed on the substrate 2590 by sputtering. After that, various patterning techniques such as photolithography are used to remove unnecessary parts. , an electrode 2591 and an electrode 2592 can be formed.

[0530] The insulating layer 2593 may be made of a resin such as acrylic or epoxy. In addition to resins with siloxane bonds, silicon oxide, silicon oxynitride, aluminum oxide, Inorganic insulating materials such as rubber can also be used.

[0531] An opening reaching the electrode 2591 is provided in the insulating layer 2593, and a wiring 2594 is adjacent to the opening. The transparent conductive material is used to increase the aperture ratio of the touch panel. Therefore, it can be suitably used for the wiring 2594. A material having higher conductivity than the electrode 2592 is preferable for the wiring 2594 because it can reduce electrical resistance. It can be used appropriately.

[0532] The electrodes 2592 extend in one direction, and a plurality of electrodes 2592 are provided in a stripe pattern. Moreover, the wiring 2594 is provided so as to intersect with the electrode 2592.

[0533] A pair of electrodes 2591 is provided with one electrode 2592 sandwiched therebetween. A pair of electrodes 2591 are electrically connected.

[0534] The plurality of electrodes 2591 are arranged in a direction that is not necessarily perpendicular to one electrode 2592. The angle does not have to be 0 degrees, and may be greater than 0 degrees but less than 90 degrees.

[0535] The wiring 2598 is electrically connected to the electrode 2591 or the electrode 2592. A part of the wiring 2598 functions as a terminal. The wiring 2598 is made of, for example, aluminum. Aluminum, gold, platinum, silver, nickel, titanium, tungsten, chromium, molybdenum, iron, Use of metal materials such as ballast, copper, or palladium, or alloy materials containing such metal materials. can be done.

[0536] An insulating layer covering the insulating layer 2593 and the wiring 2594 is provided, and the touch sensor 2595 may be protected.

[0537] The connection layer 2599 electrically connects the wiring 2598 and the FPC 2509(2). .

[0538] The connection layer 2599 is made of an anisotropic conductive film (ACF). conductive film) and anisotropic conductive paste (ACP) Conductive Paste) can be used.

[0539] <5-4. Explanation of the touch panel> Next, details of the touch panel 2000 will be described with reference to FIG. (A) corresponds to a cross-sectional view taken along the dashed dotted line X5-X6 shown in FIG. 36(A).

[0540] The touch panel 2000 shown in FIG. 39(A) is the same as the display device 250 described in FIG. 37(A). 1 and the touch sensor 2595 described in FIG. 38 are bonded together.

[0541] The touch panel 2000 shown in FIG. 39(A) has the same configuration as that described in FIG. 37(A). , an adhesive layer 2597 and an anti-reflective layer 2569 .

[0542] The adhesive layer 2597 is provided in contact with the wiring 2594. The substrate 2590 is attached to the substrate 2570 so that the sensor 2595 overlaps the display device 2501. The adhesive layer 2597 is preferably transparent. The material 597 can be a thermosetting resin or an ultraviolet curing resin. For example, Acrylic resin, urethane resin, epoxy resin, or siloxane resin may be used. This can be done.

[0543] The anti-reflection layer 2569 is provided at a position overlapping the pixel. For example, a circular polarizer can be used.

[0544] Next, for a touch panel with a different configuration from that shown in FIG. 39(A), This will be used to explain.

[0545] FIG. 39(B) is a cross-sectional view of the touch panel 2001. The panel 2001 is a touch panel 2000 shown in FIG. 39(A) and a display device 2501. The location of the touch sensor 2595 is different. Here, the different configurations are explained in detail. The description of the touch panel 2000 is cited for the parts where a similar configuration can be used.

[0546] The colored layer 2567 is located below the EL element 2550. The L element 2550 emits light to the side where the transistor 2502t is provided. As a result, a part of the light emitted by the EL element 2550 passes through the colored layer 2567 and is reflected by the light emitting element 2550 in the direction of the arrows shown in the figure. The light is emitted to the outside of the light emitting module 2580 in the direction of the mark.

[0547] The touch sensor 2595 is provided on the substrate 2510 side of the display device 2501. .

[0548] The adhesive layer 2597 is between the substrate 2510 and the substrate 2590 and is in contact with the display device 2501. Stick the Chisensor 2595 together.

[0549] As shown in FIGS. 39(A) and 39(B), the light emitted from the light emitting element is guided by the substrate 2510 and the substrate 2511. It may be injected through either or both of the plates 2570 .

[0550] <5-5. Explanation of touch panel driving method> Next, an example of a method for driving a touch panel will be described with reference to FIG.

[0551] FIG. 40(A) is a block diagram showing the configuration of a mutual capacitance type touch sensor. In (A), a pulse voltage output circuit 2601 and a current detection circuit 2602 are shown. In FIG. 40(A), the electrodes 2621 to which the pulse voltage is applied are designated as X1-X6, and the change in current The electrodes 2622 for detecting the change are shown as Y1-Y6, each with six wires. In addition, FIG. 40(A) shows a capacitance formed by overlapping an electrode 2621 and an electrode 2622. 2603. The electrodes 2621 and 2622 are interchangeable in function. It may be possible.

[0552] The pulse voltage output circuit 2601 is a circuit for applying pulses to the X1-X6 wirings in sequence. When a pulse voltage is applied to the wiring of X1-X6, the voltage that forms the capacitance 2603 An electric field is generated between the electrodes 2621 and 2622. The electric field generated between the electrodes is By using the change in the mutual capacitance of the capacitance 2603, the proximity of the object to be detected or A contact can be detected.

[0553] The current detection circuit 2602 detects the change in the mutual capacitance of the capacitor 2603 between the wires Y1 and Y6. This is a circuit for detecting changes in current. The wiring of Y1-Y6 detects the proximity of the object to be detected, Or, if there is no contact, the detected current value will not change, but the proximity of the object to be detected, or When the mutual capacitance decreases due to contact, a decrease in the current value is detected. The detection may be performed using an integrating circuit or the like.

[0554] Next, FIG. 40(B) shows the input voltage of the mutual capacitance type touch sensor shown in FIG. 40(A). The timing chart of the output waveform is shown in Figure 40(B). In FIG. 40(B), when the object to be detected is not detected ( Two cases are shown: when the object is detected (touched) and when the object is not detected (touched). For the wiring of Y1-Y6, the waveform is shown as a voltage value corresponding to the detected current value. There are.

[0555] A pulse voltage is applied to the wires X1-X6 in order, and the The waveform in the Y6 wiring changes. When there is no proximity or contact of the object to be detected, X1-X6 The waveforms of Y1-Y6 change uniformly according to the change in the voltage of the wiring. Or, at the contact point, the current value decreases, and the corresponding voltage waveform also changes. do.

[0556] In this way, by detecting the change in mutual capacitance, the proximity or contact of the object to be detected can be detected. It is possible.

[0557] <5-6. Explanation of sensor circuit> In addition, in FIG. 40(A), only a capacitor 2603 is provided at the intersection of the wiring as a touch sensor. Although the configuration of a passive touch sensor has been shown, an active touch sensor having a transistor and a capacitor may also be used. One of the sensor circuits included in the active type touch sensor may be An example is shown in Figure 41.

[0558] The sensor circuit shown in FIG. 41 includes a capacitor 2603, a transistor 2611, and a transistor 2612 and a transistor 2613.

[0559] A signal G2 is applied to the gate of the transistor 2613, and a signal G3 is applied to either the source or the drain of the transistor 2613. A voltage VRES is applied, and the other is connected to one electrode of the capacitor 2603 and the transistor 2611 The transistor 2611 has a source and a drain electrically connected to the gate of the transistor 2611. The source or drain of the transistor 2612 is electrically connected to the voltage VS The transistor 2612 receives a signal G1 at its gate and a signal S at its source or The other electrode of the drain is electrically connected to the wiring ML. The other electrode of the capacitor 2603 is connected to a voltage VS S is given.

[0560] Next, the operation of the sensor circuit shown in Figure 41 will be described. First, the signal G2 is When a potential is applied to turn on the transistor 2613, the gate of the transistor 2611 is turned on. A potential corresponding to the voltage VRES is applied to the node n to which the signal G2 is connected. When a potential that turns off the transistor 2613 is applied, the potential of the node n Retained.

[0561] Next, the mutual capacitance of the capacitor 2603 changes when a detection object such as a finger approaches or touches the sensor. As a result, the potential of the node n changes from VRES.

[0562] The read operation applies a potential to the signal G1 that turns on the transistor 2612. The current flowing through the transistor 2611 in accordance with the potential of the node n, that is, the current flowing through the wiring ML By detecting this current, the proximity or contact of the object to be detected can be detected. This can be done.

[0563] The transistor 2611, the transistor 2612, and the transistor 2613 are In particular, the transistor 2613 can be applied to the transistor shown in the above embodiment. By using the transistor described in this embodiment, the potential of the node n can be maintained for a long period of time. This allows the node n to be supplied with VRES again (refresh operation). ) can be reduced in frequency.

[0564] The structure shown in this embodiment mode may be appropriately combined with structures shown in other embodiment modes or examples. It can be used in combination.

[0565] (Sixth embodiment) In this embodiment, a display module, an electronic device, and a display device each including a semiconductor device according to one embodiment of the present invention will be described. The display device will be described with reference to FIGS.

[0566] <6-1. Explanation of the display module> The display module 8000 shown in FIG. 42 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003 and Display panel 8006, backlight 8007, frame 8009, printed circuit board 801 0, has battery 8011.

[0567] The oxide semiconductor film or the semiconductor device of one embodiment of the present invention is used in, for example, a display panel 8006. It can be used.

[0568] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as needed to fit the size of the 8006.

[0569] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide the display panel 8 with a touch panel function. It is also possible to provide an optical sensor in each pixel of 006 to make it an optical touch panel.

[0570] The backlight 8007 has a light source 8008. In FIG. Although the configuration in which the light source 8008 is disposed on the base 8007 has been illustrated, the present invention is not limited to this. For example, a light source 8008 is arranged at the end of a backlight 8007, and a light diffusion plate is further used. In addition, when a self-luminous light emitting element such as an organic EL element is used, or when a reflective In the case of a flat panel or the like, the backlight 8007 may not be provided.

[0571] The frame 8009 has a function of protecting the display panel 8006 and also a function of preventing the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the The frame 8009 may also function as a heat sink.

[0572] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. This can be omitted if a commercial power source is used.

[0573] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided in addition.

[0574] <6-2. Explanation of electronic devices> 43(A) to 43(G) are diagrams showing electronic devices. These electronic devices are housed in a housing. A body 9000, a display unit 9001, a speaker 9003, operation keys 9005 (power switch, includes an operation switch), a connection terminal 9006, a sensor 9007 (force, displacement, position, speed, Acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electricity Measures field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared It may have a microphone 9008, etc.

[0575] The electronic devices shown in FIGS. 43A to 43G can have various functions. For example, functions to display various information (still images, videos, text images, etc.) on the display, Touch panel function, calendar, date or time display function, various software ( It has the function of controlling processing by using a program, wireless communication function, and various functions using wireless communication function. Functions for connecting to computer networks, transmitting various data using wireless communication functions, or receiving the program or data recorded on the recording medium, and It is possible to have a function to display the information on the display unit. The functions that the electronic device shown in the figure can have are not limited to these, and it may have various functions. Although not shown in FIGS. 43(A) to 43(G), the electronic device may include: The electronic device may have a plurality of display units. The function to take pictures, take videos, and save the images to a recording medium (external or built-in to the camera) ) and a function to display the captured image on the display unit.

[0576] The electronic devices shown in FIGS. 43(A) to 43(G) will be described in detail below.

[0577] FIG. 43A is a perspective view showing a mobile information terminal 9100. The display portion 9001 is flexible. The display unit 9001 can be incorporated along the screen. It is equipped with a touch panel, and can be operated by touching the screen with a finger or a stylus. By touching the icon displayed on the display 9001, the application can be started. can.

[0578] 43(B) is a perspective view showing a portable information terminal 9101. The portable information terminal 9101 is For example, the device has one or more functions selected from a telephone, a notebook, an information viewing device, etc. Specifically, it can be used as a smartphone. Although the speaker 9003, the connection terminal 9006, the sensor 9007, etc. are omitted in the illustration, It can be installed in the same position as the mobile information terminal 9100 shown in 43(A). The information terminal 9101 can display text and image information on multiple surfaces. For example, Three operation buttons 9050 (also called operation icons or simply icons) are displayed on the display unit 900. 9051 shown in a dashed rectangle can be displayed on one side of the display unit 90. 01. An example of the information 9051 is an e-mail A display that notifies you of incoming calls, SNS (social networking services), etc. , subject of email or SNS, sender name of email or SNS, date and time, time, The remaining battery level, antenna reception strength, etc. Or, information 9051 is displayed. In place of the information 9051, an operation button 9050 or the like may be displayed.

[0579] 43(C) is a perspective view showing a portable information terminal 9102. The portable information terminal 9102 is , and has the function of displaying information on three or more surfaces of the display unit 9001. An example is shown in which information 9053 and information 9054 are displayed on different sides. The user of the portable information terminal 9102 stores the portable information terminal 9102 in the breast pocket of his / her clothes. In this state, the display (information 9053 in this case) can be confirmed. The telephone number or name of the caller is displayed in a position that can be observed from above the mobile information terminal 9102. The user can view the display without taking the mobile information terminal 9102 out of his pocket. You can check the call and decide whether to accept it or not.

[0580] 43(D) is a perspective view showing a wristwatch-type portable information terminal 9200. The 9200 is suitable for mobile phone calls, e-mail, document browsing and writing, music playback, and internet communications. It is possible to run various applications such as computer games. The display surface of the display unit 9001 is curved, and the display is performed along the curved display surface. In addition, the portable information terminal 9200 can perform short-distance wireless communication according to a communication standard. For example, by communicating with a wireless headset, handset The mobile information terminal 9200 also has a connection terminal 9006. It has a connector and can directly exchange data with other information terminals. Charging can also be performed via the connection terminal 9006. It may also be possible to supply power wirelessly without going through 6.

[0581] 43(E), (F), and (G) are perspective views showing a foldable portable information terminal 9201. FIG. 43(E) is a perspective view of the portable information terminal 9201 in an unfolded state, and FIG. (F) shows the mobile information terminal 9201 being changed from one of the unfolded state and the folded state to the other. 43(G) is a perspective view of the portable information terminal 9201 in a folded state. The portable information terminal 9201 is highly portable when folded, and is easily portable when unfolded. When the display is turned on, the seamless, wide display area provides excellent visibility of the display. The display unit 9001 of the display device 01 is made up of three housings 9000 connected by hinges 9055. The two housings 9000 are supported by the hinge 9055. This allows the portable information terminal 9201 to be reversibly transformed from an unfolded state to a folded state. For example, the portable information terminal 9201 can be bent with a radius of curvature of 1 mm or more and 150 mm or less. It can be done.

[0582] 44(A) and 44(B) are perspective views of a display device having a plurality of display panels. FIG. 44(A) is a perspective view of a state in which a plurality of display panels are rolled up, and FIG. 44(B) is a perspective view of a state in which a plurality of display panels are rolled up. ) is a perspective view of a state in which a plurality of display panels are unfolded.

[0583] The display device 9500 shown in FIGS. 44(A) and 44(B) includes a plurality of display panels 9501 and a shaft portion 9 511 and a bearing portion 9512. The plurality of display panels 9501 have a display area 9502 and a light-transmitting region 9503.

[0584] The display panels 9501 are flexible. The filters 9501 are arranged so that they partially overlap each other. The light-transmitting region 9503 of the display panel 9501 can be overlapped. By using the display panel 9501, a large screen display device can be provided. The display panel 9501 can be rolled up depending on the situation, making it a versatile display. It can be a display device.

[0585] 44(A) and 44(B), the display area 9502 is located on the adjacent display panel 950. 1 shows a state in which the display panels are spaced apart, but this is not limited to this. For example, the display panels 9 By overlapping the display areas 9502 of the 501 without any gaps, a continuous display area 9502 is created. You may do so.

[0586] The electronic device described in this embodiment has a display unit for displaying some information. However, the semiconductor device of one embodiment of the present invention can also be applied to electronic devices that do not have a display portion. In addition, in the display portion of the electronic device described in this embodiment, flexibility can be achieved. and a configuration in which a display can be performed along a curved display surface or a foldable display. However, the present invention is not limited to this, and the display may be made on a non-flexible, flat surface. This may also be configured as follows.

[0587] The structure shown in this embodiment mode may be appropriately combined with structures shown in other embodiment modes or examples. It can be used in combination.

[0588] (Embodiment 7) In this embodiment, a film formation method that can be used for manufacturing a display module of one embodiment of the present invention will be described. The device will be explained with reference to FIG.

[0589] FIG. 45 illustrates a deposition apparatus 300 that can be used to manufacture a display module according to one embodiment of the present invention. 0. The film forming apparatus 3000 is an example of a batch-type ALD apparatus. .

[0590] <7-1. Example of film deposition equipment configuration> The film forming apparatus 3000 described in this embodiment includes a film forming chamber 3180 and a and a control unit 3182 connected to the control unit 3182 (see FIG. 45).

[0591] The control unit 3182 includes a control device (not shown) that supplies control signals and a The flow rate controller 3182a, the flow rate controller 3182b, and the flow rate controller 3182c are connected to each other. For example, a high-speed valve can be used as a flow rate controller. By using a flow controller or the like, the flow rate can be precisely controlled. It has a heating mechanism 3182h that controls the temperature of the tube.

[0592] The flow rate controller 3182a is supplied with a control signal, the first raw material, and an inert gas. It has a function of supplying the first raw material or the inert gas based on the control signal.

[0593] The flow rate controller 3182b is supplied with a control signal, the second raw material, and an inert gas. It has a function of supplying the second raw material or the inert gas based on the control signal.

[0594] The flow rate controller 3182c receives a control signal and controls the exhaust device 3185 based on the control signal. It has the function to connect to.

[0595] [Raw material supply department] The raw material supply unit 3181a has a function of supplying the first raw material, and the flow rate controller 318 It is connected to 2a.

[0596] The raw material supply unit 3181b has a function of supplying the second raw material, and is connected to the flow rate controller 3182b. is connected.

[0597] A vaporizer or a heating means can be used in the raw material supply section. This allows the solid raw material It is possible to produce gaseous raw materials from gaseous or liquid raw materials.

[0598] The number of raw material supply parts is not limited to two, and three or more raw material supply parts may be provided.

[0599] [Raw materials] A variety of substances can be used as the first source, for example, volatile organometallic compounds. The first raw material can be a metal alkoxide or the like. Various substances can be used as the second raw material. For example, substances that contribute to oxidation reactions, Substances that participate in reactions, addition reactions, decomposition reactions or hydrolysis A substance that contributes to the reaction can be used as the second raw material.

[0600] Radicals and the like can also be used. For example, a raw material is supplied to a plasma source, and the plasma Specifically, oxygen radicals, nitrogen radicals, etc. can be used. Cut.

[0601] The second raw material used in combination with the first raw material reacts at a temperature close to room temperature. For example, the reaction temperature is from room temperature to 200°C, preferably from 50°C to 150°C. Preferably, the raw material is at or below 100°C.

[0602] [Exhaust system] The exhaust device 3185 has an exhaust function and is connected to the flow rate controller 3182c. A trap for capturing the discharged raw material is provided between the discharge port 3184 and the flow rate controller 3182c. Incidentally, exhaust gas is abatemented using an abatement facility.

[0603] [Control Unit] The control unit 3182 outputs a control signal to control the flow rate controller or a control signal to control the heating mechanism. For example, in the first step, a first raw material is supplied to the surface of the workpiece. Then, in the second step, a second raw material is supplied to react with the first raw material. As a result, the first raw material reacts with the second raw material, and the reaction product is deposited on the surface of the processed member 3010. It is possible.

[0604] The amount of the reaction product deposited on the surface of the processed member 3010 is determined by the first and second steps. The control can be performed by repeating the steps above.

[0605] The amount of the first raw material supplied to the processed member 3010 is determined based on the amount of the first raw material absorbed by the surface of the processed member 3010. For example, the amount of the first source material that can be deposited on the workpiece 30 is limited by the amount of the first source material that can be deposited on the workpiece 30. The conditions for forming the surface of 10 are selected, and the second material is added to the monolayer of the first material formed. By reacting the first and second raw materials, a very uniform layer containing the reaction product is formed. It can be achieved.

[0606] As a result, various materials are formed on the surface of the processed member 3010 having a complex structure on the surface. For example, a film having a thickness of 3 nm to 200 nm can be formed on the processed portion. The material 3010 can be formed.

[0607] For example, small holes called pinholes are formed on the surface of the processed member 3010. In this case, the film material can be deposited inside the pinhole and fill the pinhole. do.

[0608] In addition, the excess first source material or the excess second source material is exhausted from the film forming chamber 318 using the exhaust device 3185. For example, exhaust the gas while introducing an inert gas such as argon or nitrogen. Good too.

[0609] [Film forming room] The film forming chamber 3180 has an inlet 31 through which the first source material, the second source material, and an inert gas are supplied. 83 and an outlet 3184 for discharging the first raw material, the second raw material, and the inert gas. .

[0610] The film forming chamber 3180 has a support portion having a function of supporting one or more processed members 3010. 3186, a heating mechanism 3187 having a function of heating the processed member, and a and a door 3188 that has the function of opening and closing the area for loading and unloading.

[0611] For example, a resistance heater or an infrared lamp can be used for the heating mechanism 3187. The heating mechanism 3187 may be configured to heat the temperature to, for example, 80°C or higher, 100°C or higher, or 150°C or higher. The heating mechanism 3187 preferably has a temperature between room temperature and 200°C. The processed member 3010 is heated to a temperature of 50°C or more and 150°C or less.

[0612] The deposition chamber 3180 may also have a pressure regulator and a pressure detector.

[0613] [Support part] The support 3186 supports one or more processing members 3010. For each process, an insulating film, for example, can be formed on one or more processed members 3010.

[0614] <7-2. Examples of membranes> An example of a film that can be fabricated using the film-forming apparatus 3000 described in this embodiment is as follows: We will explain about this.

[0615] For example, oxides, nitrides, fluorides, sulfides, ternary compounds, metals, or polymers. A film can be formed.

[0616] For example, aluminum oxide, hafnium oxide, aluminum silicate, hafnium silicate lanthanum oxide, silicon oxide, strontium titanate, tantalum oxide, titanium oxide Zinc oxide, niobium oxide, zirconium oxide, tin oxide, yttrium oxide, cerium oxide oxide, scandium oxide, erbium oxide, vanadium oxide, indium oxide, etc. It is possible to deposit a film of a material containing

[0617] For example, aluminum nitride, hafnium nitride, silicon nitride, tantalum nitride, titanium nitride, Deposits materials including niobium nitride, molybdenum nitride, zirconium nitride, or gallium nitride It is possible.

[0618] For example, copper, platinum, ruthenium, tungsten, iridium, palladium, iron, cobalt A film of a material containing nickel or the like can be formed.

[0619] For example, zinc sulfide, strontium sulfide, calcium sulfide, lead sulfide, calcium fluoride Materials including strontium fluoride or zinc fluoride can be deposited.

[0620] For example, nitrides containing titanium and aluminum, oxides containing titanium and aluminum, oxides containing aluminum and zinc, sulfides containing manganese and zinc, cerium sulfides containing erbium and strontium, oxides containing erbium and aluminum, Materials including oxides containing tritium and zirconium can be deposited.

[0621] This embodiment mode may be combined as appropriate with other embodiment modes or examples shown in this specification. It can be combined. [Example]

[0622] In this example, the crystallinity and composition of an oxide semiconductor film according to one embodiment of the present invention were evaluated. In this example, samples A1 to A5 and samples B1 to B5 were prepared. Samples A1 to A5 are oxide semiconductor films for comparison, and Samples B1 to B5 are oxide semiconductor films according to the present invention. 1 is an oxide semiconductor film according to an embodiment of the present invention.

[0623] <1-1. Regarding Samples A1 to A5 and Samples B1 to B5> First, samples A1 to A5 and samples B1 to B5 prepared in this example will be described. .

[0624] Samples A1 to A5 and B1 to B5 are made of oxide semiconductors with a thickness of 100 nm on a glass substrate. The samples A1 to A5 and B1 to B5 have a structure in which a conductive film is formed. The film formation conditions for the semiconductor films and the target compositions are different. The main film formation conditions for samples A1 to A5 and samples B1 to B5 are shown in Table 4. Samples A1 to B5 were formed using a parallel plate sputtering apparatus. The power source applied to the target during film formation for samples A1 to A5 and samples B1 to B5 was an AC power source. Used.

[0625] [Table 4]

[0626] As shown in Table 4, the comparative samples A1 to A5 had a composition of In:Ga:Zn=1:1:1.2[ The samples B1 to B5 of one embodiment of the present invention were prepared using a target having a composition of In:G A target with a composition of a:Zn=4:2:4.1 [atomic ratio] was used.

[0627] <1-2. Target composition and film composition> Next, the target compositions used for samples A1 to A5 shown in Table 4 and the results obtained by using these targets are shown below. The film composition of sample A3, which was formed using the same method, was analyzed. The composition of the target and the film composition of sample B3 formed using the target were analyzed. The target compositions used for A1 to A5 and the film composition of sample A3 are shown in Table 5. Table 6 shows the target compositions used for B1 to B5 and the film composition of sample B3.

[0628] [Table 5]

[0629] [Table 6]

[0630] The target composition was analyzed by ICP-MS using a fragment of the target. The film composition was analyzed by X-ray spectroscopy of the film formed by sputtering. Electron spectroscopy (XPS:X-Ray Photoelectron Spectrosco py) was used for evaluation.

[0631] As shown in Tables 5 and 6, the composition of In:Ga:Zn=1:1:1.2 [atomic ratio] The film composition of sample A3 formed using the target was approximately In:Ga:Zn=1:1:1[ The atomic ratio was In:Ga:Zn=4:2:4.1. The film composition of sample B3 formed using the target was approximately In:Ga:Zn=4:2:3[ atomic ratio].

[0632] <1-3. Evaluation of crystallinity by XRD> Next, in order to evaluate the crystallinity of the above-mentioned samples A1 to A5 and samples B1 to B5, X-ray diffraction (XR) was performed. The results of XRD are shown in Figure 46. The XRD was used for multifunctional thin film material evaluation. An X-ray diffraction device, D8 DISCOVER Hybrid (manufactured by Bruker AXS), was used. In addition, the XRD results shown in Figure 46 are the results of analysis using the out-of-plane method. is.

[0633] As shown in FIG. 46, samples A1 to A5 and samples B1 to B5 each have a 2θ=3 A peak was observed around 2θ=1°. The peak around 2θ=31° is due to the crystal structure of InGaZnO4. Since the crystals of the oxide semiconductor film are attributed to the (009) plane, the crystals of the oxide semiconductor film are c-axis oriented in all samples. It was suggested that the c-axis was oriented in a direction approximately perpendicular to the surface on which the film was formed or the upper surface. Furthermore, when comparing samples A1 to A5 with samples B1 to B5, samples B1 to B5 are It can be seen that the peak intensity near 2θ=31° is high. A5) and the samples of one embodiment of the present invention (samples B1 to B5), the oxygen flow rate during film formation was increased. It can be seen that the peak intensity near 2θ=31° is higher under the added condition.

[0634] As shown in FIG. 46, the comparative samples A3, A4, and A5 were The peak near 2θ=36° is suggested to be due to the spinel phase. On the other hand, in the case of Samples B1 to B5 according to one embodiment of the present invention, even if the oxygen flow rate during film formation is increased, In the film, no peak corresponding to the spinel phase is observed. Compared with an oxide semiconductor film formed using a target with a composition ratio of 1:1.2 (atomic ratio), The oxide was formed using a target with a composition of In:Ga:Zn=4:2:4.1 [atomic ratio]. This suggests that the spinel phase is less likely to form in the oxide semiconductor film.

[0635] <1-4. Evaluation of crystallinity using cross-sectional TEM images> Next, the cross-sectional TEM images of the prepared samples A3 and B3 were observed. 47(A) is a cross-sectional TEM image of sample A3, and FIG. 47(B) is a cross-sectional TEM image of sample A4. is a cross-sectional TEM image of sample B3.

[0636] As shown in FIGS. 47(A) and 47(B), compared with Sample A3, Sample B3, which is one embodiment of the present invention, In the case of In:Ga...

Claims

[Claim 1] A sputtering target for forming an oxide semiconductor film, comprising: the sputtering target contains In, Ga, and Zn; the atomic ratio of the In, Ga, and Zn is In:Ga:Zn=4:2:4.1, The hydrogen concentration of the sputtering target is 1.0×10 １８ atoms / cm ３ The target.

Images