Substrate processing method and substrate processing apparatus

Abstract

To provide a substrate processing method for controlling the shape of an opening formed by plasma etching.SOLUTION: A substrate processing method according to the present disclosure includes the steps of: preparing a substrate having a silicon-containing dielectric film on a substrate support; and generating a plasma from a process gas including a gas including hydrogen and fluorine and etching the silicon-containing dielectric film, the etching step includes a step of supplying the process gas into the chamber, an electric power supply step of supplying a first high-frequency signal for generating the plasma to the substrate support or the upper electrode, and a step of applying a first electrical bias to the upper electrode.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] SUMMARY OF THE DISCLOSURE Exemplary embodiments of the present disclosure relate to substrate processing methods and substrate processing apparatus. [Background technology]

[0002] In the manufacture of electronic devices, plasma etching of silicon-containing films on substrates is performed. For example, Patent Document 1 discloses a method of etching a dielectric film by plasma etching. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-39309 Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure provides a substrate processing method for controlling the shape of recesses formed by plasma etching. [Means for solving the problem]

[0005] One exemplary embodiment of the present disclosure is a substrate processing method for processing a substrate in a plasma processing apparatus, the plasma processing apparatus including a chamber, a substrate support provided in the chamber, and an upper electrode provided in the chamber facing the substrate support, the substrate processing method including the steps of: providing a substrate having a silicon-containing dielectric film on the substrate support; and etching the silicon-containing dielectric film by generating plasma from a process gas including a gas containing hydrogen and fluorine, the etching step including the steps of supplying the process gas into the chamber, supplying a first high-frequency signal to the substrate support or the upper electrode to generate the plasma, and applying a first electrical bias to the upper electrode.

[0006] In one exemplary embodiment of the present disclosure, there is provided a substrate processing apparatus for processing a substrate, the substrate processing apparatus including a chamber, a substrate support disposed within the chamber, an upper electrode disposed within the chamber facing the substrate support, a gas supply unit for supplying a process gas to the chamber, a power supply for supplying power for generating plasma within the chamber, and a controller, wherein the controller controls the following: placing a substrate having a silicon-containing dielectric film on the substrate support, supplying a process gas containing a gas containing hydrogen and fluorine into the chamber, supplying a first high-frequency signal to the substrate support or the upper electrode for generating the plasma, and applying a first electrical bias to the upper electrode. [Effects of the Invention]

[0007] According to one exemplary embodiment of the present disclosure, a substrate processing method can be provided that controls the shape of a recess formed by plasma etching. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a diagram schematically illustrating a substrate processing apparatus 1 according to an exemplary embodiment. [Figure 2] 2 is a diagram showing an example of a cross-sectional structure of a substrate W. FIG. [Figure 3] 1 is a flowchart illustrating an example of the present processing method. [Figure 4] 10 is a timing chart of the first electrical bias, the high frequency power HF, and the second electrical bias. [Figure 5] 10 is a diagram showing an example of a cross-sectional structure of the substrate W in step ST22. FIG. [Figure 6] 10 is a diagram for explaining an example of a method for evaluating the cross-sectional shape of a recess RC. FIG. [Figure 7] 1 is a graph showing the amount of deviation in Example 1 and Reference Example 1. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, each embodiment of the present disclosure will be described.

[0010] In one exemplary embodiment, a method for processing a substrate is provided.

[0011] The substrate processing method is a substrate processing method for processing a substrate in a plasma processing apparatus, the plasma processing apparatus comprising a chamber, a substrate support provided in the chamber, and an upper electrode provided in the chamber opposite the substrate support, and the substrate processing method includes the steps of: preparing a substrate having a silicon-containing dielectric film on the substrate support; and etching the silicon-containing dielectric film by generating plasma from a processing gas containing a gas containing hydrogen and fluorine, the etching step including the steps of supplying the processing gas into the chamber, supplying a first high-frequency signal to the substrate support or the upper electrode to generate plasma, and applying a first electric bias to the upper electrode.

[0012] In one exemplary embodiment, the first electrical bias is a DC voltage or a low frequency RF signal.

[0013] In one exemplary embodiment, the first electrical bias is a negative polarity DC voltage.

[0014] In one exemplary embodiment, the first electrical bias is a pulsed wave or a continuous wave.

[0015] In one exemplary embodiment, a first electrical bias is supplied to the upper electrode for a first period and a second period alternating with the first period, wherein the absolute value of the voltage of the first electrical bias during the first period is 0 or a first voltage value, and the absolute value of the voltage of the first electrical bias during the second period is a second voltage value greater than the first voltage value.

[0016] In one exemplary embodiment, the first high-frequency signal is supplied during a third period and a fourth period alternating with the third period, the absolute value of the voltage during the third period is 0 or a third voltage value, the absolute value of the voltage during the fourth period is a second voltage value greater than the third voltage value, and the second period and the third period at least partially overlap.

[0017] In one exemplary embodiment, the proportion of the second period to the total of the first period and the second period is 20% or more and 80% or less.

[0018] In one exemplary embodiment, the frequency defining the period of the second period relative to the first period and the second period is equal to or greater than 2 kHz and equal to or less than 8 kHz.

[0019] In one exemplary embodiment, the etching step further includes providing a second electrical bias to the substrate support.

[0020] In one exemplary embodiment, the gas containing hydrogen and fluorine is hydrogen fluoride gas.

[0021] In one exemplary embodiment, the process gas further comprises a phosphorus-containing gas.

[0022] In one exemplary embodiment, the phosphorus-containing gas comprises a phosphorus halide.

[0023] In one exemplary embodiment, the phosphorus halide is phosphorus fluoride.

[0024] In one exemplary embodiment, the process gas further comprises at least one carbon-containing gas selected from the group consisting of fluorocarbon gases and hydrofluorocarbon gases.

[0025] In one exemplary embodiment, the silicon-containing dielectric film comprises at least one selected from the group consisting of a silicon oxide film, a silicon nitride film, and a polycrystalline silicon film.

[0026] In one exemplary embodiment, a substrate processing apparatus for processing a substrate is provided, the substrate processing apparatus including a chamber, a substrate support disposed within the chamber, an upper electrode disposed within the chamber facing the substrate support, a gas supply unit for supplying a process gas to the chamber, a power supply for supplying power for generating plasma within the chamber, and a controller, wherein the controller performs control to place a substrate having a silicon-containing dielectric film on the substrate support, supply a process gas containing a gas containing hydrogen and fluorine into the chamber, supply a first high frequency signal to the substrate support or the upper electrode for generating plasma, and apply a first electrical bias to the upper electrode.

[0027] Hereinafter, each embodiment of the present disclosure will be described in detail with reference to the drawings. In each drawing, the same or similar elements are designated by the same reference numerals, and redundant explanations will be omitted. Unless otherwise specified, the positional relationships, such as up, down, left, and right, will be described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent actual ratios, and the actual ratios are not limited to the ratios shown in the drawings.

[0028] <Configuration of substrate processing apparatus 1> 1 is a diagram schematically illustrating a substrate processing apparatus 1 according to an exemplary embodiment. The substrate processing apparatus 1 is an example of a plasma processing apparatus. A substrate processing method according to an exemplary embodiment (hereinafter referred to as "this processing method") may be performed using the substrate processing apparatus 1.

[0029] The substrate processing apparatus 1 shown in FIG. 1 includes a chamber 10. The chamber 10 provides an internal space 10s therein. The chamber 10 includes a chamber body 12. The chamber body 12 has a substantially cylindrical shape. The chamber body 12 is made of, for example, aluminum. A corrosion-resistant film is provided on the inner wall surface of the chamber body 12. The corrosion-resistant film may be made of a ceramic such as aluminum oxide or yttrium oxide.

[0030] A passage 12p is formed in the sidewall of the chamber body 12. The substrate W is transferred between the internal space 10s and the outside of the chamber 10 through the passage 12p. The passage 12p is opened and closed by a gate valve 12g. The gate valve 12g is provided along the sidewall of the chamber body 12.

[0031] A support 13 is provided on the bottom of the chamber body 12. The support 13 is made of an insulating material. The support 13 has a generally cylindrical shape. The support 13 extends upward from the bottom of the chamber body 12 within the internal space 10s. The support 13 supports a substrate support 14. The substrate support 14 is configured to support a substrate W within the internal space 10s.

[0032] The substrate support 14 has a lower electrode 18 and an electrostatic chuck 20. The substrate support 14 may further have an electrode plate 16. The electrode plate 16 is made of a conductor such as aluminum and has a generally disc shape. The lower electrode 18 is provided on the electrode plate 16. The lower electrode 18 is made of a conductor such as aluminum and has a generally disc shape. The lower electrode 18 is electrically connected to the electrode plate 16.

[0033] The electrostatic chuck 20 is provided on the lower electrode 18. The substrate W is placed on the upper surface of the electrostatic chuck 20. The electrostatic chuck 20 has a main body and an electrode. The main body of the electrostatic chuck 20 has a substantially disk shape and is formed from a dielectric material. The electrode of the electrostatic chuck 20 is a film-like electrode and is provided within the main body of the electrostatic chuck 20. The electrode of the electrostatic chuck 20 is connected to a DC power supply 20p via a switch 20s. When a voltage from the DC power supply 20p is applied to the electrode of the electrostatic chuck 20, an electrostatic attractive force is generated between the electrostatic chuck 20 and the substrate W. The substrate W is attracted to the electrostatic chuck 20 by the electrostatic attractive force and is held by the electrostatic chuck 20.

[0034] An edge ring 25 is disposed on the substrate support 14. The edge ring 25 is a ring-shaped member. The edge ring 25 may be made of silicon, silicon carbide, quartz, or the like. The substrate W is disposed on the electrostatic chuck 20 and within a region surrounded by the edge ring 25.

[0035] A flow path 18f is provided inside the lower electrode 18. A heat exchange medium (e.g., a refrigerant) is supplied to the flow path 18f from a chiller unit provided outside the chamber 10 via a pipe 22a. The heat exchange medium supplied to the flow path 18f is returned to the chiller unit via a pipe 22b. In the substrate processing apparatus 1, the temperature of the substrate W placed on the electrostatic chuck 20 is adjusted by heat exchange between the heat exchange medium and the lower electrode 18.

[0036] The substrate processing apparatus 1 is provided with a gas supply line 24. The gas supply line 24 supplies a heat transfer gas (e.g., He gas) from a heat transfer gas supply mechanism to the gap between the upper surface of the electrostatic chuck 20 and the back surface of the substrate W.

[0037] The substrate processing apparatus 1 further includes an upper electrode 30. The upper electrode 30 is provided above the substrate support 14. The upper electrode 30 is supported on the upper part of the chamber body 12 via a member 32. The member 32 is made of an insulating material. The upper electrode 30 and the member 32 close the upper opening of the chamber body 12.

[0038] The upper electrode 30 may include a top plate 34 and a support 36. The bottom surface of the top plate 34 is the bottom surface on the side of the internal space 10s and defines the internal space 10s. The top plate 34 may be formed from a low-resistance conductor or semiconductor that generates little Joule heat. The top plate 34 has a plurality of gas discharge holes 34a that penetrate the top plate 34 in its thickness direction.

[0039] The support 36 detachably supports the top plate 34. The support 36 is made of a conductive material such as aluminum. A gas diffusion chamber 36a is provided inside the support 36. The support 36 has a plurality of gas holes 36b extending downward from the gas diffusion chamber 36a. The plurality of gas holes 36b are connected to the plurality of gas discharge holes 34a, respectively. A gas inlet 36c is formed in the support 36. The gas inlet 36c is connected to the gas diffusion chamber 36a. A gas supply pipe 38 is connected to the gas inlet 36c.

[0040] A gas source group 40 is connected to the gas supply pipe 38 via a flow rate controller group 41 and a valve group 42. The flow rate controller group 41 and the valve group 42 constitute a gas supply unit. The gas supply unit may further include a gas source group 40. The gas source group 40 includes a plurality of gas sources. The plurality of gas sources include sources of process gases used in the present processing method. The flow rate controller group 41 includes a plurality of flow rate controllers. Each of the plurality of flow rate controllers in the flow rate controller group 41 is a mass flow controller or a pressure-controlled flow rate controller. The valve group 42 includes a plurality of on-off valves. Each of the plurality of gas sources in the gas source group 40 is connected to the gas supply pipe 38 via a corresponding flow rate controller in the flow rate controller group 41 and a corresponding on-off valve in the valve group 42.

[0041] In the substrate processing apparatus 1, a shield 46 is detachably provided along the inner wall surface of the chamber body 12 and the outer periphery of the support part 13. The shield 46 prevents reaction by-products from adhering to the chamber body 12. The shield 46 is configured by forming a corrosion-resistant film on the surface of a base material made of, for example, aluminum. The corrosion-resistant film can be made of a ceramic such as yttrium oxide.

[0042] A baffle plate 48 is provided between the support 13 and the side wall of the chamber body 12. The baffle plate 48 is formed, for example, by forming a corrosion-resistant film (a film of yttrium oxide or the like) on the surface of a member made of aluminum. A plurality of through-holes are formed in the baffle plate 48. An exhaust port 12e is provided below the baffle plate 48 and at the bottom of the chamber body 12. An exhaust device 50 is connected to the exhaust port 12e via an exhaust pipe 52. The exhaust device 50 includes a pressure adjustment valve and a vacuum pump such as a turbomolecular pump.

[0043] The substrate processing apparatus 1 includes a high-frequency power supply 62 and a bias power supply 64. The high-frequency power supply 62 is a power supply that generates high-frequency power HF. The high-frequency power HF is an example of a first high-frequency signal. The high-frequency power HF has a first frequency suitable for generating plasma. The first frequency is, for example, a frequency within a range of 27 MHz to 100 MHz. The high-frequency power supply 62 is connected to the lower electrode 18 via a matching device 66 and the electrode plate 16. The matching device 66 has a circuit for matching the impedance of the load side (lower electrode 18 side) of the high-frequency power supply 62 to the output impedance of the high-frequency power supply 62. The high-frequency power supply 62 may be connected to the upper electrode 30 via the matching device 66. The high-frequency power supply 62 constitutes an example of a plasma generation unit.

[0044] The bias power supply 64 is a power supply that generates an electric bias. The electric bias is an example of a second electric bias. The bias power supply 64 is electrically connected to the lower electrode 18. The electric bias has a second frequency. The second frequency is lower than the first frequency. The second frequency is, for example, a frequency within a range of 400 kHz to 13.56 MHz. When used together with the high frequency power HF, the electric bias is applied to the substrate support 14 to attract ions to the substrate W. In one example, the electric bias is applied to the lower electrode 18. When the electric bias is applied to the lower electrode 18, the potential of the substrate W placed on the substrate support 14 fluctuates within a period defined by the second frequency. Note that the electric bias may also be applied to a bias electrode provided in the electrostatic chuck 20.

[0045] In one embodiment, the electric bias may be high frequency power LF having a second frequency. The high frequency power LF is an example of a second electric bias. When used together with the high frequency power HF, the high frequency power LF is used as high frequency bias power for attracting ions to the substrate W. A bias power supply 64 configured to generate the high frequency power LF is connected to the lower electrode 18 via a matcher 68 and the electrode plate 16. The matcher 68 has a circuit for matching the impedance of the load side (lower electrode 18 side) of the bias power supply 64 to the output impedance of the bias power supply 64.

[0046] It is also possible to generate plasma using high frequency power LF without using high frequency power HF, i.e., using only a single high frequency power. In this case, the frequency of the high frequency power LF may be higher than 13.56 MHz, for example, 40 MHz. In this case, the substrate processing apparatus 1 does not need to include the high frequency power supply 62 and the matching box 66. In this case, the bias power supply 64 constitutes an example of a plasma generating unit.

[0047] In another embodiment, the electrical bias may be a pulsed voltage. In this case, the bias power supply may be a DC power supply. The bias power supply may be configured to supply the pulsed voltage itself, or may be configured to include a device for pulsing the voltage downstream of the bias power supply. In one example, the pulsed voltage is applied to the lower electrode 18 so as to generate a negative potential on the substrate W. The pulsed voltage may be a square wave, a triangular wave, an impulse, or have any other waveform.

[0048] The period of the pulse voltage is determined by the second frequency. The period of the pulse voltage includes two periods. The pulse voltage in one of the two periods is a negative voltage. The level (i.e., absolute value) of the voltage in one of the two periods is higher than the level (i.e., absolute value) of the voltage in the other of the two periods. The voltage in the other period may be either negative or positive. The level of the negative voltage in the other period may be greater than zero or may be zero. In this embodiment, the bias power supply 64 is connected to the lower electrode 18 via the low-pass filter and the electrode plate 16. Note that the bias power supply 64 may be connected to a bias electrode provided in the electrostatic chuck 20 instead of the lower electrode 18.

[0049] In one embodiment, the bias power supply 64 may provide a continuous wave of electrical bias to the lower electrode 18. That is, the bias power supply 64 may provide an electrical bias to the lower electrode 18 continuously.

[0050] In another embodiment, the bias power supply 64 may apply a pulse wave of an electric bias to the lower electrode 18. The pulse wave of the electric bias may be applied periodically to the lower electrode 18. The period of the pulse wave of the electric bias is defined by a third frequency. The third frequency is lower than the second frequency. The third frequency is, for example, 1 Hz or more and 200 kHz or less. In another example, the third frequency may be 5 Hz or more and 100 kHz or less.

[0051] The period of the pulse wave of the electric bias includes two periods, i.e., an H period and an L period. The level of the electric bias during the H period (i.e., the level of the pulse of the electric bias) is higher than the level of the electric bias during the L period. That is, the pulse wave of the electric bias may be applied to the lower electrode 18 by increasing or decreasing the level of the electric bias. The level of the electric bias during the L period may be greater than zero. Alternatively, the level of the electric bias during the L period may be zero. That is, the pulse wave of the electric bias may be applied to the lower electrode 18 by alternately switching between supplying and stopping the supply of the electric bias to the lower electrode 18. Here, when the electric bias is a high-frequency power LF, the level of the electric bias is the power level of the high-frequency power LF. When the electric bias is a high-frequency power LF, the level of the high-frequency power LF in the pulse of the electric bias may be 2 kW or more. When the electric bias is a pulse wave of a negative DC voltage, the level of the electric bias is the effective absolute value of the negative DC voltage. The duty ratio of the pulse wave of the electric bias, i.e., the proportion of the H period in the cycle of the pulse wave of the electric bias, is, for example, 1% or more and 80% or less. In another example, the duty ratio of the pulse wave of the electric bias may be 5% or more and 50% or less. Alternatively, the duty ratio of the pulse wave of the electric bias may be 50% or more and 99% or less.

[0052] In one embodiment, the high frequency power source 62 may supply a continuous wave of high frequency power HF, i.e., the high frequency power source 62 may supply high frequency power HF continuously.

[0053] In another embodiment, the high frequency power supply 62 may supply a pulse wave of high frequency power HF. The pulse wave of high frequency power HF may be supplied periodically. The period of the pulse wave of high frequency power HF is defined by a fourth frequency. The fourth frequency is lower than the second frequency. In one embodiment, the fourth frequency is the same as the third frequency. The period of the pulse wave of high frequency power HF includes two periods, namely, an H period and an L period. The power level of the high frequency power HF in the H period is higher than the power level of the high frequency power HF in the L period of the two periods. The power level of the high frequency power HF in the L period may be greater than zero or may be zero.

[0054] The period of the pulse wave of the high frequency power HF may be synchronized with the period of the pulse wave of the electric bias. The H period in the period of the pulse wave of the high frequency power HF may be synchronized with the H period in the period of the pulse wave of the electric bias. Alternatively, the H period in the period of the pulse wave of the high frequency power HF may not be synchronized with the H period in the period of the pulse wave of the electric bias. The time length of the H period in the period of the pulse wave of the high frequency power HF may be the same as or different from the time length of the H period in the period of the pulse wave of the electric bias. Part or all of the H period in the period of the pulse wave of the high frequency power HF may overlap with the H period in the period of the pulse wave of the electric bias.

[0055] The substrate processing apparatus 1 further includes a power supply 70. The power supply 70 is connected to the upper electrode 30. In one example, the substrate processing apparatus 1 may be configured to supply a DC voltage or low-frequency power to the upper electrode 30 during plasma processing. The DC voltage and the low-frequency power are examples of a first electrical bias. For example, the power supply 70 may supply a negative DC voltage or periodically supply low-frequency power to the upper electrode 30. The DC voltage or low-frequency power may be supplied as a pulsed wave or a continuous wave. In this embodiment, positive ions present in the internal space 10s are attracted to and collide with the upper electrode 30. This causes secondary electrons to be emitted from the upper electrode 30. The emitted secondary electrons modify the mask film MK and improve the etching resistance of the mask film MK. The secondary electrons also contribute to increasing plasma density. Furthermore, the irradiation of the secondary electrons neutralizes the charged state of the substrate W, thereby enhancing the linearity of ions into recesses formed by etching. Furthermore, if the upper electrode 30 is made of a silicon-containing material, the collision of positive ions releases silicon along with secondary electrons. The released silicon combines with oxygen in the plasma to form a silicon oxide compound, which deposits on the mask and functions as a protective film. As described above, supplying a DC voltage or low-frequency power to the upper electrode 30 not only improves the selectivity, but also suppresses shape abnormalities in the recesses formed by etching and improves the etching rate.

[0056] When plasma processing is performed in the substrate processing apparatus 1, gas is supplied from the gas supply unit to the internal space 10s. Furthermore, a high-frequency electric field is generated between the upper electrode 30 and the lower electrode 18 by supplying high-frequency power HF and / or an electric bias. The generated high-frequency electric field generates plasma from the gas in the internal space 10s.

[0057] The substrate processing apparatus 1 may further include a control unit 80. The control unit 80 may be a computer including a processor, a storage unit such as a memory, an input device, a display device, a signal input / output interface, etc. The control unit 80 controls each unit of the substrate processing apparatus 1. The control unit 80 allows an operator to input commands, etc., to manage the substrate processing apparatus 1 using the input device. The control unit 80 also allows the display device to visualize and display the operating status of the substrate processing apparatus 1. Furthermore, the storage unit stores a control program and recipe data. The control program is executed by the processor to perform various processes in the substrate processing apparatus 1. The processor executes the control program and controls each unit of the substrate processing apparatus 1 in accordance with the recipe data. In one exemplary embodiment, part or all of the control unit 80 may be provided as part of the configuration of a device external to the substrate processing apparatus 1.

[0058] <Example of substrate W> FIG. 2 is a diagram showing an example of the cross-sectional structure of a substrate W. The substrate W is an example of a substrate to which the present processing method can be applied. The substrate W has a silicon-containing film SF, which is an example of a dielectric film in the present processing method. The substrate W may have a base film UF and a mask film MK. As shown in FIG. 3, the substrate W may be formed by laminating the base film UF, the silicon-containing film SF, and the mask film MK in this order.

[0059] The base film UF may be an organic film, a dielectric film, a metal film, a semiconductor film, or the like formed on a silicon wafer. Alternatively, the base film UF may be a silicon wafer. Alternatively, the base film UF may be configured by stacking multiple films.

[0060] The silicon-containing film SF may be a silicon-containing dielectric film. The silicon-containing dielectric film may include a silicon oxide film or a silicon nitride film. The silicon-containing dielectric film may be a film containing other film types as long as it contains silicon. The silicon-containing film SF may also include a silicon film (e.g., a polycrystalline silicon film). The silicon-containing film SF may also include at least one of a silicon nitride film, a polycrystalline silicon film, a carbon-containing silicon film, and a low-k film. The carbon-containing silicon film may include a SiC film and / or a SiOC film. The low-k film contains silicon and may be used as an interlayer insulating film. The silicon-containing film SF may also include two or more silicon-containing films having different film types. The two or more silicon-containing films may include a silicon oxide film and a silicon nitride film. The silicon-containing film SF may be, for example, a multilayer film including one or more silicon oxide films and one or more silicon nitride films stacked alternately. The silicon-containing film SF may also be a multilayer film including multiple silicon oxide films and multiple silicon nitride films stacked alternately. Alternatively, the two or more silicon-containing films may include a silicon oxide film and a silicon film. The silicon-containing film SF may be, for example, a multilayer film including one or more silicon oxide films and one or more silicon films that are alternately stacked. The silicon-containing film SF may be a multilayer film including multiple silicon oxide films and multiple polycrystalline silicon films that are alternately stacked. Alternatively, the two or more silicon-containing films may include a silicon oxide film, a silicon nitride film, and a silicon film.

[0061] The mask film MK is provided on the silicon-containing film SF. The mask film MK is formed from a material having an etching rate lower than that of the silicon-containing film SF in step ST2. The mask film MK may be formed from an organic material. That is, the mask film MK may contain carbon. The mask film MK may be formed from, for example, an amorphous carbon film, a photoresist film, or a spin-on carbon film (SOC film). Alternatively, the mask film MK may be formed from a silicon-containing film such as a silicon-containing anti-reflective film. Alternatively, the mask film MK may be a metal-containing mask formed from a metal-containing material such as titanium nitride, tungsten, or tungsten carbide.

[0062] The mask film MK is patterned to define at least one opening OP on the silicon-containing film SF. That is, the mask film MK has a pattern for etching the silicon-containing film SF in step ST2. A recess such as a hole or a trench is formed in the silicon-containing film SF based on the shape of the opening OP defined by the pattern of the mask film MK. The aspect ratio of the opening formed in the silicon-containing film SF in step ST2 may be 20 or more, 30 or more, 40 or more, or 50 or more. The mask film MK may have a line-and-space pattern.

[0063] <An example of this processing method> 3 is a flowchart showing an example of the present processing method, which is performed on a substrate W using, for example, the substrate processing apparatus 1 shown in FIG.

[0064] FIG. 4 is a timing chart showing the timing at which the high-frequency power HF and the second electric bias are supplied to the substrate support 14 (the lower electrode 18 or the bias electrode) and the timing at which the first electric bias is applied to the upper electrode 30 in this processing method. In FIG. 4, the horizontal axis represents time. The vertical axis represents the voltage levels of the first electric bias and the second electric bias (e.g., the effective value of the absolute value of the voltage of the electric bias) and the power level of the high-frequency power HF (e.g., the effective value of the power of the high-frequency power HF). Specifically, "L1" for the first electric bias indicates that the first electric bias is not supplied or is lower than the voltage level indicated by "H1." "L2" for the high-frequency power HF indicates that the high-frequency power HF is not supplied or is lower than the power level indicated by "H2." "L3" for the second electric bias indicates that the second electric bias is not supplied or is lower than the voltage level indicated by "H3." The voltage level of L1 and L3 may be zero, and the power level of L2 may be zero.

[0065] FIG. 4 shows an example in which pulse waves are used as the first electrical bias, the high-frequency power HF, and the second electrical bias. As an example, the first electrical bias is a pulse wave that alternates between a first period in which the voltage level is "L1" and a second period in which the voltage level is "H1." That is, the first electrical bias is a pulse wave that has an electrical pulse in the second period. As an example, the high-frequency power HF is a pulse wave that alternates between a third period in which the power level is "L2" and a fourth period in which the power level is "H2." That is, the high-frequency power HF is a pulse wave that has an electrical pulse in the fourth period. As an example, the second electrical bias is a pulse wave that alternates between a fifth period in which the voltage level is "L3" and a sixth period in which the voltage level is "H3." That is, the second electrical bias is a pulse wave that has an electrical pulse in the sixth period. As an example, the electric pulses of the first electric bias (pulse wave) and the second electric bias (pulse wave) may be composed of a pulsed voltage (pulse voltage). The pulse voltage may be a square wave, a triangular wave, an impulse, or may have other waveforms. The second electric bias may be a continuous wave. As an example, the second electric bias may be a continuous wave in which a pulse voltage is applied continuously in the fifth period and the sixth period. The waveforms in FIG. 4 are shown schematically and do not specifically indicate the frequency, time, power, voltage, etc.

[0066] An example of executing the present processing method shown in Fig. 3 on the substrate W shown in Fig. 2 will be described below with reference to the respective drawings. In the following example, the control unit 80 shown in Fig. 1 controls each unit of the substrate processing apparatus 1 to execute the present processing method.

[0067] (Step ST1: Preparation of the substrate)

[0068] In step ST1, a substrate W is prepared in the internal space 10s of the chamber 10. In the internal space 10s, the substrate W is placed on a substrate support 14 and held by an electrostatic chuck 20. At least a part of the process for forming each component of the substrate W may be performed in the internal space 10s. Alternatively, after all or a part of each component of the substrate W is formed in an apparatus or chamber external to the substrate processing apparatus 1, the substrate W may be carried into the internal space 10s and placed on the substrate support 14.

[0069] Step ST1 may include a step of setting the temperature of the substrate support 14. As an example, the temperature of the substrate support 14 is set to 0°C or lower. Alternatively, the temperature of the substrate support 14 may be set to -40°C or lower. When the temperature of the substrate support 14 or the substrate W is set to such a temperature, the etching rate of the silicon-containing film SF in step ST2 increases. To set the temperature of the substrate support 14, the control unit 80 may control a chiller unit. Note that, as will be described later, when the processing gas contains phosphorus-containing molecules, the temperature of the substrate support 14 may be set to 20°C or lower.

[0070] (Step ST2: Execution of etching) In step ST2, the silicon-containing film SF of the substrate W is etched. Step ST2 includes a step of supplying a processing gas (step ST21), a step of supplying high-frequency power to the lower electrode 18 (step ST22), and a step of applying a DC voltage to the upper electrode 30 (step ST23). In step ST2, the silicon-containing film SF is etched by activated species (ions, radicals) of plasma generated from the processing gas. Note that the order in which steps ST21 to ST23 are started is not limited to this order. Furthermore, steps ST21 to ST23 may be performed in parallel.

[0071] (Step ST21: Supply of processing gas) In step ST21, a processing gas is supplied into the chamber 10. The processing gas is a gas used to etch a film to be etched formed on the substrate W. The type of processing gas may be appropriately selected based on the material of the film to be etched, the material of the mask film, the material of the base film, the pattern of the mask film, the etching depth, etc.

[0072] The process gas used in step ST21 may include a gas containing hydrogen and fluorine. The hydrogen and fluorine-containing gas may be a gas capable of generating hydrogen fluoride (HF) species in the chamber 10 during plasma processing. The hydrogen fluoride species functions as an etchant. The hydrogen and fluorine-containing gas may be at least one gas selected from the group consisting of hydrogen fluoride (HF) and a hydrofluorocarbon. The hydrofluorocarbon may be, for example, at least one of CH2F2, CHF3, or CH3F. The hydrofluorocarbon may contain two or more carbon atoms, or may contain two to six carbon atoms. The hydrofluorocarbon may contain two carbon atoms, such as C2HF5, C2H2F4, C2H3F3, or C2H4F2. Hydrofluorocarbons may contain three or four carbon atoms, for example, C3HF7, C3H2F2, C3H2F4, C3H2F6, C3H3F5, C4H2F6, C4H5F5, C4H2F8, etc. Hydrofluorocarbon gases may contain three or four carbon atoms, for example, C5H2F6, C5H2F 10The hydrogen- and fluorine-containing gas may contain five carbon atoms, such as C5H3F7. In one embodiment, the hydrofluorocarbon gas includes at least one selected from the group consisting of C3H2F4, C3H2F6, C4H2F6, and C4H2F8. The hydrogen- and fluorine-containing gas may also be a mixed gas capable of generating hydrogen fluoride species in the chamber 10 during plasma processing. The mixed gas capable of generating hydrogen fluoride species may include a hydrogen source and a fluorine source. The hydrogen source may be, for example, H2, NH3, HO, HO2, or a hydrocarbon (e.g., CH4, C3H6). The fluorine source may be NF3, SF6, WF6, XeF2, a fluorocarbon, or a hydrofluorocarbon. The mixed gas capable of generating hydrogen fluoride species may be, for example, a mixed gas of nitrogen trifluoride (NF3) and hydrogen (H2).

[0073] The process gas used in step ST21 may further include at least one phosphorus-containing molecule. The phosphorus-containing molecule may be tetraphosphorus decoxide (PO 10 The phosphorus-containing molecule may be an oxide such as phosphorus trifluoride (PF3), phosphorus pentafluoride (PF5), phosphorus trichloride (PCl3), phosphorus pentachloride (PCl5), phosphorus tribromide (PBr3), phosphorus pentabromide (PBr5), or phosphorus iodide (PI3). That is, the phosphorus-containing molecule may be a fluoride (phosphorus fluoride) containing fluorine as the halogen atom. Alternatively, the phosphorus-containing molecule may contain a halogen atom other than fluorine as the halogen atom. The phosphorus-containing molecule may be a phosphoryl halide such as phosphoryl fluoride (POF3), phosphoryl chloride (POCl3), or phosphoryl bromide (POBr3). The phosphorus-containing molecule may be phosphine (PH3), calcium phosphide (e.g., Ca3P2), phosphoric acid (H3PO4), sodium phosphate (Na3PO4), hexafluorophosphate (HPF6), etc. The phosphorus-containing molecule may be fluorophosphines (H x PF y) where the sum of x and y is 3 or 5. Examples of fluorophosphines include HPF2 and H2PF3. The process gas may contain one or more of the above-mentioned phosphorus-containing molecules as the at least one phosphorus-containing molecule. For example, the process gas may contain at least one of PF3, PCl3, PF5, PCl5, POCl3, PH3, PBr3, or PBr5 as the at least one phosphorus-containing molecule. Note that when each phosphorus-containing molecule contained in the process gas is liquid or solid, the phosphorus-containing molecule may be vaporized by heating or the like and supplied into the chamber 10.

[0074] The process gas used in step ST21 may further contain carbon. Examples of carbon-containing molecules include hydrocarbons (C x H y ), fluorocarbon (C v F w ), hydrofluorocarbons (C s H t F u The hydrocarbon may include at least one carbon-containing gas selected from the group consisting of CH4, C2H6, C3H6, C3H8, or C4H. 10 The fluorocarbon may include, for example, CF4, C2F2, C2F4, C3F8, C4F6, C4F8, or C5F8, etc. Chemical species generated from these carbon-containing gases protect the mask film MK.

[0075] The process gas may also contain halogen-containing molecules. The halogen-containing molecules may not contain carbon. The halogen-containing molecules may be fluorine-containing molecules or halogen-containing molecules containing halogen elements other than fluorine. The fluorine-containing molecules may include gases such as nitrogen trifluoride (NF), sulfur hexafluoride (SF), and boron trifluoride (BF). The halogen-containing molecules containing halogen elements other than fluorine may be at least one selected from the group consisting of a chlorine-containing gas, a bromine-containing gas, and iodine. The chlorine-containing gas may be, for example, a gas such as chlorine (Cl), silicon dichloride (SiCl), silicon tetrachloride (SiCl), carbon tetrachloride (CCl), dichlorosilane (SiHCl), disilicon hexachloride (SiCl), chloroform (CHCl), sulfuryl chloride (SOCl), or boron trichloride (BCl). Bromine-containing gases include, for example, bromine (Br), hydrogen bromide (HBr), dibromodifluoromethane (CBrF), bromopentafluoroethane (CFBr), phosphorus tribromide (PBr), phosphorus pentabromide (PBr), phosphorus oxybromide (POBr), and boron tribromide (BBr). Iodine-containing gases include, for example, hydrogen iodide (HI), trifluoroiodomethane (CFI), pentafluoroiodoethane (CFI), heptafluoropropyl iodide (CFI), iodine pentafluoride (IF), iodine heptafluoride (IF), iodine heptafluoride (IF), iodine (I), and phosphorus triiodide (PI). Chemical species generated from these halogen-containing molecules are used to control the shape of recesses formed by plasma etching.

[0076] The process gas may further include oxygen-containing molecules, such as O2, CO2, or CO. Alternatively, the process gas may be oxygen-free. The process gas may also include a noble gas, such as Ar, Kr, or Xe.

[0077] (Step ST22: Supply of high frequency power) In step ST22, high frequency power HF is supplied to the lower electrode 18. As shown in Fig. 4, the high frequency power HF has a power level H2 in the fourth period, and has a power level L2 lower than the power level H2 in the third period. Note that the power level of the high frequency power HF may be zero in the third period of Fig. 4.

[0078] The frequency at which the electrical pulses of the high frequency power HF (i.e., the fourth period when the power level is H2) are periodically generated is, for example, 2 kHz or more and 8 kHz or less. The high frequency that constitutes the electrical pulses has a frequency of, for example, 27 MHz or more and 100 MHz or less. In the high frequency power HF, the duty ratio of the electrical pulses, i.e., the proportion of the fourth period in one cycle of the high frequency power HF (the sum of the third period and the fourth period), is, for example, 1% or more and 90% or less. The duty ratio may be 20% or more and 80% or less.

[0079] Furthermore, in step ST22, a second electric bias may be further supplied to the lower electrode 18. For example, the second electric bias is a DC voltage having a negative polarity. Alternatively, the second electric bias may be high frequency power LF. The second electric bias may be supplied to the substrate support 14 in synchronization with the timing at which the high frequency power HF is supplied to the substrate support 14. For example, the electric pulse of the second electric bias (i.e., the sixth period in which the voltage level is H3) is supplied to the substrate support 14 at the same timing as the power pulse of the high frequency power HF. Alternatively, the electric pulse of the second electric bias may be supplied to the substrate support 14 at a different timing from the power pulse of the high frequency power HF. The fourth period and the sixth period may at least partially overlap in time.

[0080] The frequency at which the electric pulses of the second electric bias are periodically generated is, for example, 2 kHz or more and 8 kHz or less. The high frequency waves constituting the electric pulses have a frequency of, for example, 400 kHz or more and 13.56 MHz or less. In the second electric bias, the duty ratio of the electric pulses, i.e., the proportion of the sixth period in one cycle of the second electric bias (the sum of the fifth and sixth periods), is, for example, 1% or more and 90% or less. The duty ratio may be 20% or more and 80% or less. The duty ratio of the electric pulses (sixth period) in the second electric bias may be different from the duty ratio of the electric pulses (fourth period) in the high frequency power HF. In another embodiment, high frequency power LF may be supplied to the substrate support 14 instead of the second electric bias.

[0081] 5 is a diagram showing an example of the cross-sectional structure of the substrate W in step ST22. In step ST22, when high-frequency power HF and a second electric bias are supplied to the lower electrode 18, a high-frequency electric field is generated between the upper electrode 30 and the substrate support 14. This generates plasma from the processing gas supplied into the internal space 10s. Chemical species such as ions and radicals in the generated plasma are attracted to the substrate W, etching the silicon-containing film SF on the substrate W. Then, as shown in FIG. 5, based on the shape of the opening OP in the mask film MK, a recess RC defined by the sidewall of the silicon-containing film SF is also formed in the silicon-containing film SF, continuing from the opening OP formed in the mask film MK. The recess RC may be an opening in which the base film UF is exposed at its bottom BT.

[0082] (Step ST23: Application of First Electrical Bias) In step ST23, a first electric bias is applied to the upper electrode 30 (see FIG. 3). The voltage of the first electric bias may be controlled based on the timing at which an electric pulse of high frequency power HF is supplied to the substrate support 14. As an example, the voltage level of the first electric bias in the second period may be in the range of −100 volts to −500 volts. Also, as an example, the voltage level of the first electric bias in the first period may be in the range of −500 volts to −1200 volts. Note that in another embodiment, a low frequency RF signal may be supplied to the upper electrode 30 instead of the first electric bias.

[0083] The first electric bias may be supplied to the substrate support 14 in synchronization with the timing at which the high frequency power HF is supplied to the substrate support 14. As an example, the electric pulse of the first electric bias (i.e., the second period in which the voltage level is H1) may be supplied to the substrate support 14 at the same timing as the third period of the high frequency power HF. Alternatively, the electric pulse of the first electric bias may be supplied to the substrate support 14 at a different timing from the third period of the high frequency power HF. The second period and the third period may at least partially overlap in time.

[0084] The duty ratio of the second period of the first electrical bias, i.e., the proportion of the second period in one cycle of the first electrical bias (the sum of the first and second periods), is, for example, 1% to 90%. The duty ratio may be 20% to 80%. The duty ratio of the second period of the first electrical bias may be the same as or different from the duty ratio of the third period of the high frequency power HF.

[0085] Example 1 6 is a diagram illustrating an example of a method for evaluating the cross-sectional shape of a recess. In FIG. 6, a center reference line CL is a line passing through a midpoint MP of the width of the recess RC on the lower surface of the mask film MK or the upper surface of the silicon-containing film SF. The shape of the opening OP can be evaluated by measuring the amount of deviation of the midpoint MP from the center reference line CL along the depth direction of the recess RC. For example, the amount of deviation can be used to evaluate the bending, twisting, etc. of the recess RC formed in the silicon-containing film SF.

[0086] In Example 1 and Reference Example 1, etching of the silicon-containing film SF of the substrate W was performed under the following conditions. That is, in both Example 1 and Reference Example 1, a mixed gas of Cl2, HBr, NF3, CH2F2, HF, and PF3 was supplied as a processing gas to the internal space 10s of the substrate processing apparatus 1. A high-frequency power HF of 40 MHz and 5500 W and a pulse voltage of 400 kHz and 6000 V were supplied as a second electrical bias to the lower electrode 18 to generate plasma from the mixed gas for 20 minutes, thereby etching the silicon-containing film SF of the substrate W. During this period, the temperature of the substrate support 14 was set to −70°C. In both Example 1 and Reference Example 1, the duty ratio of the fourth period shown in FIG. 4 was set to 80%. In Example 1, the voltage level of the first electrical bias during the first period was set to −150 volts, and the voltage level during the second period was set to −1000 volts. On the other hand, in Reference Example 1, the voltage level of the first electrical bias was set to −150 volts continuously in both the first period and the second period.

[0087] FIG. 7 is a graph showing the deviation of the midpoint MP of the width of the recess RC obtained by etching the silicon-containing film SF according to Example 1 of the present processing method from the center reference line CL, and the deviation of the midpoint MP of the width of the recess RC obtained by etching the silicon-containing film SF according to Reference Example 1 from the center reference line CL. In FIG. 7, the vertical axis represents the depth of the recess RC of the silicon-containing film SF. The horizontal axis represents the deviation of the midpoint MP of the width of the recess RC from the center reference line CL. As shown by the solid line in FIG. 7, in Example 1, there was almost no deviation of the midpoint MP from the center reference line CL. On the other hand, as shown by the dashed line in FIG. 7, in Reference Example 1, the midpoint MP deviated significantly from the center reference line CL, particularly at depths of approximately 2 μm to approximately 6 μm, resulting in a significant curvature in the cross-sectional shape of the recess RC.

[0088] <Example 2> In Example 2 and Reference Example 2, the silicon-containing film SF of the substrate W was etched under the conditions of Example 1 and Reference Example 1, except that the flow rate of PF3 was increased by 1.5 times. In Example 2, a recess RC with almost no bending was obtained after 20 minutes of etching, as in Example 1. On the other hand, in Reference Example 2, the etching process was stopped midway about 7 minutes and 30 seconds after the start of etching due to the influence of deposits formed around the bottom BT of the recess RC of the silicon-containing film SF (see FIG. 5).

[0089] In this embodiment, for example, during the fourth period, when activated species generated in the plasma are attracted to the substrate W and etch the silicon-containing film SF, the etched portion of the substrate W (e.g., the sidewall SS and bottom BT of the recess RC formed in the silicon-containing film SF) may become positively charged. If the sidewall SS and bottom BT of the recess RC are asymmetrically charged, the direction of travel of the activated species generated in the plasma when they reach the recess RC may be affected by the charging. On the other hand, for example, during the third period, when an electric pulse of the first electric bias is applied to the upper electrode 30, positive ions present in the plasma are attracted to the upper electrode 30 and collide with the upper electrode 30. When the positive ions collide with the upper electrode 30, secondary electrons are emitted from the upper electrode. The emitted secondary electrons are accelerated by the upper electrode 30, which is at a negative potential, and reach the substrate W. The secondary electrons that reach the substrate W then eliminate or reduce the charge on the positively charged portion of the substrate W (e.g., the bottom BT of the recess RC formed in the silicon-containing film SF). That is, according to this embodiment, the charging of the sidewall SS, the bottom BT, and the like of the recess RC, which occurs in, for example, the fourth period, can be eliminated or reduced in the second period, and therefore, when the active species generated in the plasma reach the recess RC, the influence of the charging on the traveling direction of the active species can be eliminated or reduced.

[0090] Furthermore, in this embodiment, by applying an electric pulse of the second electric bias to the upper electrode 30 during the second period, the composition of the activated species generated in the plasma can be controlled. This makes it possible to control the generation of deposits during etching of the silicon-containing film SF. Consequently, it is possible to eliminate or reduce the adverse effects of the deposits on the etching process during etching.

[0091] The above embodiments have been described for illustrative purposes and various modifications may be made without departing from the scope and spirit of the present disclosure. [Explanation of symbols]

[0092] 1...substrate processing apparatus, 10...chamber, 12...chamber body, 13...support portion, 14...substrate support, 16...electrode plate, 18...lower electrode, 20...electrostatic chuck, 24...gas supply line, 25...edge ring, 30...upper electrode, 32...member, 34...top plate, 36...support, 62...high frequency power supply, 64...bias power supply, 66...matching box, 68...matching box, 80...controller, BT...bottom, HF...high frequency power, HP...power pulse, LF...high frequency power, LP...power pulse, MK...mask film, MP...midpoint, OP...opening, RC...recess, SF...silicon-containing film, SS...sidewall, UF...undercoat film, W...substrate

Claims

1. A substrate processing method for processing a substrate in a plasma processing apparatus, comprising: The plasma processing apparatus includes: a chamber; a substrate support disposed within the chamber; an upper electrode provided in the chamber facing the substrate support; Equipped with The substrate processing method includes: providing a substrate having a silicon-containing dielectric film on the substrate support; generating a plasma from a process gas including hydrogen fluoride gas and a phosphorus-containing gas to etch the silicon-containing dielectric film; Including, The etching step includes: supplying the process gas into the chamber; supplying a first high frequency signal to the substrate support or the upper electrode to generate the plasma; applying a first electrical bias to the upper electrode; A substrate processing method comprising:

2. The method of claim 1 , wherein the first electrical bias is a DC voltage or a low frequency RF signal.

3. 2. The substrate processing method according to claim 1, wherein the first electrical bias is a negative DC voltage.

4. 4. The substrate processing method according to claim 1, wherein the first electric bias is a pulse wave or a continuous wave.

5. the first electrical bias is supplied to the upper electrode for first time periods and second time periods alternating with the first time periods; 5. A substrate processing method according to claim 1, wherein the absolute value of the voltage of the first electrical bias during the first period is 0 or a first voltage value, and the absolute value of the voltage of the first electrical bias during the second period is a second voltage value greater than the first voltage value.

6. the first high frequency signal is supplied during a third period and a fourth period alternating with the third period; an absolute value of the voltage during the third period is 0 or a third voltage value, and an absolute value of the voltage during the fourth period is a second voltage value greater than the third voltage value; The substrate processing method according to claim 5 , wherein the second period and the third period at least partially overlap each other.

7. 7. The substrate processing method according to claim 5, wherein the proportion of the second period to the total of the first period and the second period is 20% or more and 80% or less.

8. 8. The substrate processing method according to claim 5, wherein a frequency that defines a cycle of the second period relative to the first period and the second period is equal to or greater than 2 kHz and equal to or less than 8 kHz.

9. The substrate processing method of claim 1 , wherein the etching step further comprises the step of applying a second electrical bias to the substrate support.

10. The substrate processing method of claim 1 , wherein the phosphorus-containing gas includes a phosphorus halide.

11. 11. The substrate processing method according to claim 10, wherein the phosphorus halide is phosphorus fluoride.

12. 12. The substrate processing method according to claim 1, wherein the processing gas further contains at least one carbon-containing gas selected from the group consisting of a fluorocarbon gas and a hydrofluorocarbon gas.

13. 13. The substrate processing method according to claim 1, wherein the silicon-containing dielectric film includes at least one selected from the group consisting of a silicon oxide film, a silicon nitride film, and a polycrystalline silicon film.

14. A substrate processing apparatus for processing a substrate, a chamber, a substrate support provided in the chamber, an upper electrode provided in the chamber facing the substrate support, a gas supply unit that supplies a process gas to the chamber, a power supply that supplies power to generate plasma in the chamber, and a control unit; The control unit placing a substrate having a silicon-containing dielectric film on the substrate support; supplying a process gas containing hydrogen fluoride gas and a phosphorus-containing gas into the chamber; supplying a first high frequency signal to the substrate support or the upper electrode to generate the plasma; applying a first electrical bias to the upper electrode; The substrate processing apparatus performs the control.

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