Semiconductor failure analysis device and semiconductor failure analysis method

Abstract

To efficiently detect a fault location in a semiconductor device. [Solution] A semiconductor failure analysis apparatus (1) includes a first analysis unit (10) that irradiates a first irradiation light (L1) along a first path (R1) set on a first main surface (D1) of a semiconductor device (D), a second analysis unit (20) that irradiates a second irradiation light (L2) along a second path (R2) set on a second main surface (D2) that is the back side of the first main surface (D1), an electrical signal acquisition unit (61) that receives electrical signals output from the semiconductor device (D) that is irradiated with the first irradiation light (L1) and the second irradiation light (L2), and a computer (40) that controls the second analysis unit (20). A first irradiation area (A1) formed on the first main surface (D1) by the first irradiation light (L1) is different in size from a second irradiation area (A2) formed on the second main surface (D2) by the second irradiation light (L2). The computer (40) irradiates the first irradiation light (L1) and the second irradiation light (L2) while maintaining a state in which the second irradiation area (A2) entirely overlaps the first irradiation area (A1).

Description

[Technical Field]

[0001] The present invention relates to a semiconductor failure analysis apparatus and a semiconductor failure analysis method. [Background technology]

[0002] Semiconductor devices are becoming increasingly miniaturized. To achieve this miniaturization, improvements in exposure and patterning technologies for manufacturing semiconductor devices are required. Technology to determine whether semiconductor devices manufactured using these exposure and patterning technologies function properly is also important. When semiconductor devices do not function properly, technology to determine the cause of the malfunction is also important.

[0003] Patent Document 1 discloses an apparatus for inspecting wiring formed inside a semiconductor integrated circuit. The inspection apparatus of Patent Document 1 irradiates a laser beam onto the surface of a semiconductor integrated circuit chip that is supplied with current. The irradiation of the laser beam generates electron-hole pairs inside the semiconductor, causing a current to flow through the wiring of the semiconductor integrated circuit. The apparatus of Patent Document 1 uses this current to inspect the wiring.

[0004] Patent Document 2 discloses a technique for testing integrated circuit microchips using so-called laser probing technology. A laser beam is irradiated onto a test device driven by a test electrical signal. The laser beam is reflected by the test device. The reflected light contains a signal component that indicates the response state of the test device to the test electrical signal. In the technique of Patent Document 2, a waveform corresponding to the reflected beam is converted into an electrical signal. The electrical signal is then analyzed. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 7-167924 [Patent Document 2] JP 2007-64975 A Summary of the Invention [Problem to be solved by the invention]

[0006] In the technical field of semiconductor failure analysis apparatus, there is a demand for a technique for effectively detecting a failure location in a semiconductor device. The present invention provides a semiconductor failure analysis apparatus and a semiconductor failure analysis method for effectively detecting a failure location in a semiconductor device. [Means for solving the problem]

[0007] A semiconductor failure analysis apparatus according to one embodiment of the present invention includes a first analysis unit that irradiates a first irradiation light along a first path set on a first main surface of a semiconductor device, a second analysis unit that irradiates a second irradiation light along a second path set on a second main surface behind the first main surface, an electrical signal acquisition unit that receives electrical signals output by the semiconductor device irradiated with the first irradiation light and the second irradiation light, and a control unit that controls at least one of the first analysis unit and the second analysis unit. A first irradiation region formed on the first main surface by the first irradiation light is different in size from a second irradiation region formed on the second main surface by the second irradiation light. The control unit outputs a control signal to irradiate the first irradiation light and the second irradiation light while maintaining a state in which one of the first irradiation region and the second irradiation region entirely overlaps the other of the first irradiation region and the second irradiation region.

[0008] Another aspect of the present invention is a semiconductor failure analysis method for analyzing a semiconductor device, the method comprising: a setting step of preparing first irradiation conditions for first irradiation light irradiated along a first path set on a first main surface of the semiconductor device and second irradiation conditions for second irradiation light irradiated along a second path set on a second main surface behind the first main surface; and an analysis step of acquiring an electrical signal output from the semiconductor device while irradiating the semiconductor device with the first irradiation light and the second irradiation light in accordance with the first and second irradiation conditions set in the setting step. In the setting step, the first and second irradiation conditions are set so that the size of a first irradiation region formed on the first main surface by the first irradiation light differs from the size of a second irradiation region formed on the second main surface by the second irradiation light. In the analysis step, the first irradiation light and the second irradiation light are irradiated while maintaining a state in which one of the first irradiation region and the second irradiation region entirely overlaps the other of the first irradiation region and the second irradiation region.

[0009] The semiconductor failure analysis apparatus and semiconductor failure analysis method irradiate first and second irradiation light beams onto a first and second main surface of a semiconductor device, respectively. The size of the first irradiation area is different from the size of the second irradiation area. As a result, it is possible to overlap the entire smaller of the first and second irradiation areas with the larger irradiation area. In other words, it is possible to scan the inspection surface of the semiconductor device while making the sizes of the first and second irradiation areas different from each other. Therefore, it is possible to reliably apply optical stimuli to the semiconductor device from both the first and second main surfaces. As a result, electrical signals influenced by the optical stimuli are output from the semiconductor device. Therefore, it is possible to reliably identify the failure location. In other words, the semiconductor failure analysis apparatus and semiconductor failure analysis method can effectively detect the failure location of a semiconductor device.

[0010] In the semiconductor failure analysis apparatus, the size of the second irradiation area may be smaller than the size of the first irradiation area. The control unit may output a control signal to the second analysis unit. With this configuration, the second irradiation area can be reliably overlapped with the first irradiation area.

[0011] The first analysis unit of the semiconductor failure analysis device may include a first optical scanning unit that reflects the first irradiation light so that the first irradiation area moves along the first path. The second analysis unit may include a second optical scanning unit that reflects the second irradiation light so that the second irradiation area moves along the second path. The control unit may control the first optical scanning unit and the second optical scanning unit using a ratio based on the size of the first irradiation area and the size of the second irradiation area. These configurations also ensure that the entire second irradiation area overlaps with the first irradiation area.

[0012] The first analysis unit of the semiconductor failure analysis device may include a first light source that generates first irradiation light and a first optical member that guides the first irradiation light from the first light source to the first principal surface. The second analysis unit may include a second light source that generates second irradiation light and a second optical member that guides the second irradiation light from the second light source to the second principal surface. The difference between the sizes of the first irradiation region and the second irradiation region may be caused by a difference between the optical characteristics of the first optical member and the optical characteristics of the second optical member. With these configurations, the difference between the sizes of the first irradiation region and the second irradiation region can be caused by selecting the optical member.

[0013] The first analysis unit of the semiconductor failure analysis device may have a first lens that focuses the first irradiation light on the first principal surface so that the size of the first irradiation area is a predetermined size. The second analysis unit may have a second lens that focuses the second irradiation light on the second principal surface so that the size of the second irradiation area is different from the size of the first irradiation area. The magnification of the first lens may be different from the magnification of the second lens. With these configurations, the size of the first irradiation area and the size of the second irradiation area can be made different by selecting the magnification of the objective lens.

[0014] The first analysis unit of the semiconductor failure analysis device may include a first light source that generates first irradiation light and a first optical member that guides the first irradiation light from the first light source to the first principal surface. The second analysis unit may include a second light source that generates second irradiation light and a second optical member that guides the second irradiation light from the second light source to the second principal surface. The difference in size between the first irradiation region and the second irradiation region may be caused by a difference in the arrangement of the first optical member and the second optical member. According to these configurations, the difference in size between the first irradiation region and the second irradiation region can be caused by the arrangement of the optical member.

[0015] The first analysis unit of the semiconductor failure analysis device may include a first optical scanning unit that reflects the first irradiation light so that the first irradiation area moves along the first path. The second analysis unit may include a second optical scanning unit that reflects the second irradiation light so that the second irradiation area moves along the second path. The difference between the sizes of the first irradiation area and the second irradiation area may be caused by a difference between the first path and the second path. According to these configurations, the difference between the first path and the second path can cause a difference between the sizes of the first irradiation area and the second irradiation area.

[0016] A semiconductor failure analysis apparatus according to yet another embodiment of the present invention includes a first analysis unit that irradiates a first irradiation light along a first path set on a first main surface of a semiconductor device, a second analysis unit that irradiates a second irradiation light along a second path set on a second main surface behind the first main surface, a first light detection unit that receives a first response light from the semiconductor device generated in response to the first irradiation light, a second light detection unit that receives a second response light from the semiconductor device generated in response to the second irradiation light, and a control unit that controls at least one of the first analysis unit and the second analysis unit. A first irradiation region formed on the first main surface by the first irradiation light is different in size from a second irradiation region formed on the second main surface by the second irradiation light. The control unit outputs a control signal to irradiate the first irradiation light and the second irradiation light while maintaining a state in which one of the first irradiation region and the second irradiation region entirely overlaps the other of the first irradiation region and the second irradiation region.

[0017] A semiconductor failure analysis method for analyzing a semiconductor device according to yet another embodiment of the present invention includes a setting step of preparing first irradiation conditions for first irradiation light irradiated along a first path set on a first main surface of the semiconductor device and second irradiation conditions for second irradiation light irradiated along a second path set on a second main surface behind the first main surface, and an analysis step of acquiring first response light from the semiconductor device while irradiating the semiconductor device with the first irradiation light according to the first irradiation conditions set in the setting step, and acquiring second response light from the semiconductor device while irradiating the semiconductor device with the second irradiation light according to the second irradiation conditions set in the setting step. In the setting step, the first irradiation conditions and the second irradiation conditions are set so that the size of a first irradiation region formed on the first main surface by the first irradiation light differs from the size of a second irradiation region formed on the second main surface by the second irradiation light. In the analysis step, the first irradiation light and the second irradiation light are irradiated while maintaining a state in which one of the first irradiation region and the second irradiation region entirely overlaps the other of the first irradiation region and the second irradiation region.

[0018] The semiconductor failure analysis apparatus and semiconductor failure analysis method irradiate first and second irradiation light beams onto a first and second main surface of a semiconductor device, respectively. Because the size of the first irradiation area is different from the size of the second irradiation area, it is possible to overlap the entire smaller of the first and second irradiation areas with the larger irradiation area. As a result, optical stimuli can be reliably applied to the semiconductor device from both the first and second main surfaces. Therefore, it is possible to obtain first and second response lights affected by the optical stimuli, thereby reliably revealing the location of the failure. In other words, the semiconductor failure analysis apparatus and semiconductor failure analysis method can effectively detect the location of the failure in the semiconductor device. [Effects of the Invention]

[0019] According to the present invention, a semiconductor failure analysis apparatus and a semiconductor failure analysis method are provided that can effectively detect the location of a failure in a semiconductor device. [Brief explanation of the drawings]

[0020] [Figure 1] FIG. 1 is a configuration diagram of a semiconductor failure analysis device according to the first embodiment. [Figure 2] 2(a), 2(b), and 2(c) are conceptual diagrams for explaining the overlap between the first irradiation region and the second irradiation region. [Figure 3] FIG. 3 is a diagram illustrating a configuration in which the size of the first irradiation region and the size of the second irradiation region are made different from each other. [Figure 4] Figure 4 is a diagram illustrating an image of laser marking on a semiconductor device. Figure 4(a) is a diagram showing a first main surface of a laser-marked semiconductor device. Figure 4(b) is a diagram showing a second main surface of a laser-marked semiconductor device. Figure 4(c) is a cross-sectional view taken along II(c)-II(c) in Figure 4(b). [Figure 5] FIG. 5 is a diagram for explaining marking control in the analysis device of FIG. [Figure 6] FIG. 6 is a plan view of the target. [Figure 7] FIG. 7 is a flow chart showing the main steps of a semiconductor failure analysis method using the analysis apparatus of FIG. [Figure 8] FIG. 8 is a configuration diagram of a semiconductor failure analysis device according to the second embodiment. [Figure 9] FIG. 9 is a flowchart showing the main steps of a semiconductor failure analysis method using the analysis apparatus of FIG. [Figure 10] FIG. 10 is a configuration diagram of the first optical system and the second optical system provided in the failure analysis device of the first modification. [Figure 11] FIG. 11 is a configuration diagram of the first optical system and the second optical system provided in the failure analysis device of the second modification. [Figure 12] FIG. 12 is a configuration diagram of the first optical system and the second optical system provided in the failure analysis device of the third modification. [Figure 13] FIG. 13 is a configuration diagram of the first optical system and the second optical system provided in the failure analysis device of the fourth modification. [Figure 14]FIG. 14 is a configuration diagram of the first optical system and the second optical system provided in the failure analysis device of the fifth modification. [Figure 15] FIG. 15 is a configuration diagram of the first optical system and the second optical system provided in the failure analysis device of the sixth modification. [Figure 16] FIG. 16 is a configuration diagram of the first optical system and the second optical system provided in the failure analysis device of the seventh modification. [Figure 17] 17(a) and 17(b) are diagrams for explaining the first path and the second path in the failure analysis device of the eighth modification. DETAILED DESCRIPTION OF THE INVENTION

[0021] As shown in FIG. 1, the semiconductor failure analysis apparatus of the first embodiment analyzes a semiconductor device D, which is a device under test (DUT). The semiconductor failure analysis apparatus may be, for example, an inverted emission microscope. In the following description, the semiconductor failure analysis apparatus of the first embodiment will be simply referred to as "analysis apparatus 1." Analysis of the semiconductor device D includes, for example, identifying the location of a fault location contained in the semiconductor device D. Analysis of the semiconductor device D is not limited to identifying the location of the fault location. Analysis of the semiconductor device D also includes other analyses and inspections related to the semiconductor device D. Hereinafter, the analysis apparatus 1 of this embodiment will be described as identifying the location of a fault location contained in the semiconductor device D.

[0022] In addition to the function of identifying the location of the fault, the analysis device 1 may additionally have the function of placing a mark around the fault to indicate the fault. This marking operation is called "marking." The mark is used to easily identify the fault location identified by the analysis device 1 in a process performed after the fault analysis.

[0023] The semiconductor device D is an integrated circuit (IC) having a PN junction such as a transistor, a logic device which is a large scale integrated circuit (LSI), a memory device, or an analog device. The semiconductor device D may be a mixed signal device which combines the above devices. The semiconductor device D may be a power semiconductor device (power device) such as a high current MOS transistor, a high voltage MOS transistor, a bipolar transistor, or an IGBT. The semiconductor device D has a layered structure including a substrate and a metal layer. For example, a silicon substrate is used as the substrate of the semiconductor device D.

[0024] The analysis device 1 obtains an electrical signal image to identify the location of a fault. There are several types of electrical signal images obtained by the analysis device 1. Examples of the electrical signal images obtained by the analysis device 1 include an OBIC (Optical Beam Induced Current) image, which is a photovoltaic current image, an OBIRCH (Optical Beam Induced Resistance Change) image, which is an image of change in electrical quantity, an SDL (Soft Defect Localization) image, which is an image of correct / incorrect information, and an LADA (Laser Assisted Device Alteration) image.

[0025] OBIC images are based on photoelectric currents generated by light irradiation, and are images of the current values ​​or current changes of photoelectric currents as characteristic electrical signals.

[0026] When a semiconductor device D is irradiated with light such as a laser, heat is generated at the irradiated location. The temperature change associated with the heat generation causes changes in resistance in the wiring and contacts that make up the semiconductor device D, the transistor channels, and the fault location. OBIRCH images are based on the changes in resistance caused by heat. More specifically, the changes in resistance caused by heat depend on the temperature, the amount of temperature change, the original resistance value, and other factors. The changes in resistance caused by heat can be obtained as changes in voltage or current. Therefore, OBIRCH images are images of electrical signal characteristics that indicate changes in voltage or current. For example, when light is irradiated onto a semiconductor device D receiving a constant voltage, the changes in resistance caused by the light irradiation can be obtained as changes in current. If the fault location has a large resistance value, significant electrical signal characteristics can be obtained from the fault location.

[0027] The SDL image is based on information about a malfunction state (e.g., a PASS / FAIL signal). A semiconductor device D to which a stimulus signal such as a test pattern has been applied is irradiated with light. This light does not excite carriers such as electric charges. When light is irradiated onto the semiconductor device D, heat is generated at the position where the light is irradiated. The application of the stimulus signal and the heat generated by the irradiation of light make it possible to detect the malfunction state that has occurred. As a result, an SDL image can be obtained based on the information about the irradiation position and the malfunction information. The malfunction information can be obtained as a brightness value. The SDL image is an image based on the brightness value.

[0028] LADA images are also based on information about malfunction conditions (e.g., PASS / FAIL signals). The light used to obtain LADA images excites carriers such as electric charges. The operation of obtaining LADA images differs from the operation of obtaining SDL images in that light that excites carriers is irradiated. Similar to SDL images, malfunction information is obtained as brightness values ​​based on the application of a stimulus signal and information about the light irradiation position, and image data is generated based on the brightness values ​​and the light irradiation position.

[0029] The analysis apparatus 1 includes a first analysis unit 10, a second analysis unit 20, a device placement unit 30, a computer 40, and an electrical signal acquisition unit 61. The first analysis unit 10 is disposed below the semiconductor device D. The first irradiation light L1 emitted by the first analysis unit 10 is irradiated onto a first main surface D1 of the semiconductor device D. The second analysis unit 20 is disposed above the semiconductor device D. The second irradiation light L2 emitted by the second analysis unit 20 is irradiated onto a second main surface D2 of the semiconductor device D. The analysis apparatus 1 identifies a fault location in the semiconductor device D by utilizing an electrical signal output from the semiconductor device D when irradiated with the first irradiation light L1 and the second irradiation light L2.

[0030] The first analysis unit 10 has components for identifying the fault location. Specifically, the first analysis unit 10 has a first irradiation light source 11 (first light source), a first optical system 12, a first XYZ stage 13, and a first camera 14 (first light detection unit).

[0031] The first irradiation light source 11 generates first irradiation light L1 to be irradiated onto the semiconductor device D. Details of the first irradiation light source 11 are determined depending on the analysis method. For example, in an analysis in which coherent light such as a laser is irradiated onto the semiconductor device D, a solid-state laser source, a semiconductor laser source, or the like may be used as the first irradiation light source 11. In an analysis in which an OBIRCH image or an SDL image is acquired, the first irradiation light source 11 outputs a laser in a wavelength band in which the semiconductor device D does not generate electric charges (carriers). For example, in an analysis of a semiconductor device D made of silicon, the first irradiation light source 11 outputs a laser in a wavelength band greater than 1200 nm. The first irradiation light source 11 outputs a laser in a wavelength band of approximately 1300 nm. In an analysis in which an OBIC image or a LADA image is acquired, the first irradiation light source 11 outputs light in a wavelength band in which the semiconductor device D generates electric charges (carriers). In an analysis in which an OBIC image or a LADA image is acquired, the first irradiation light source 11 outputs light in a wavelength band of 1200 nm or less. For example, the first irradiation light source 11 outputs a laser having a wavelength band of about 1064 nm. In an analysis in which incoherent light is irradiated onto the semiconductor device D, the first irradiation light source 11 may be a super luminescent diode (SLD), an amplified spontaneous emission (ASE), a light emitting diode (LED), or the like.

[0032] The first optical system 12 receives the first irradiation light L1 emitted from the first irradiation light source 11 via an optical coupler and an optical fiber. The first optical system 12 includes a first optical scanning unit 12s, a first objective lens 12a (first optical member, first lens), and a first beam splitter 12b. The first optical scanning unit 12s irradiates the first irradiation light L1 along a predetermined first path R1 (see FIG. 2) onto a first principal surface D1, which is the back surface of the semiconductor device D. The first optical scanning unit 12s is an optical scanning element such as a galvanometer mirror or an MEMS mirror. The first optical scanning unit 12s is controlled based on a control signal provided from an external device. Devices that provide the control signal include a computer 40, a second analysis unit 20, a pulse generator, and a tester. The first objective lens 12a focuses the first irradiation light L1 received from the first optical scanning unit 12s onto the first principal surface D1.

[0033] The first optical system 12 is placed on a first XYZ stage 13. The first XYZ stage 13 moves the first optical system 12 in the Z-axis direction, which is the optical axis direction of the first objective lens 12a. The first XYZ stage 13 also moves the first optical system 12 in the X-axis direction and the Y-axis direction, which are perpendicular to the Z-axis direction. The first XYZ stage 13 is controlled by a computer 40. The observation area is determined by the position of the first XYZ stage 13.

[0034] The first camera 14 captures an image of the first principal surface D1. The first camera 14 outputs image data obtained by capturing the image to the computer 40. The first camera 14 is, for example, a photodiode, an avalanche photodiode, a photomultiplier tube, an area image sensor, or the like.

[0035] The second analysis unit 20 has components for identifying the fault location. Specifically, the second analysis unit 20 has a second irradiation light source 21 (second light source), a second optical system 22, a second camera 24 (second light detection unit), and a second XYZ stage 23. The second irradiation light source 21 has a configuration similar to that of the first irradiation light source 11. The second optical system 22 has a second optical scanning unit 22s, a second objective lens 22a (second optical member, second lens), and a second beam splitter 22b. The second optical scanning unit 22s has a configuration similar to that of the first optical scanning unit 12s. The second camera 24 has a configuration similar to that of the first camera 14.

[0036] When the analysis device 1 performs an operation to identify a fault location, the first optical system 12 irradiates the first main surface D1 of the semiconductor device D with the first irradiation light L1. The second optical system 22 irradiates the second main surface D2 of the semiconductor device D with the second irradiation light L2. The irradiation of the first irradiation light L1 and the second irradiation light L2 is performed in parallel in time.

[0037] As shown in FIG. 2(a), the first irradiation light L1 forms a first irradiation area A1. The first optical system 12 irradiates the first irradiation light L1 so that the first irradiation area A1 moves along a predetermined first path R1. The second irradiation light L2 forms a second irradiation area A2. Similarly, the second optical system 22 irradiates the second irradiation light L2 so that the second irradiation area A2 moves along a predetermined second path R2.

[0038] For example, when the semiconductor device D is viewed from the direction of the optical axis of the first optical system 12, the first irradiation area A1 overlaps the second irradiation area A2. The semiconductor device D receives energy from the first irradiation light L1 irradiated from the first principal surface D1 side and the second irradiation light L2 irradiated from the second principal surface D2 side. As a result, the portions receiving energy from both the first principal surface D1 and the second principal surface D2 undergo a change in state that allows for identifying a fault location. For example, in the case of OBIRCH analysis, which captures changes in resistance value due to heat generation, a predetermined amount of heat is generated in the portions irradiated with the first irradiation light L1 from the first principal surface D1 and the second irradiation light L2 from the second principal surface D2. As a result, if a fault exists in the portion irradiated with the first irradiation light L1 and the second irradiation light L2, the fault state can be identified.

[0039] As shown in FIG. 2(a), the positions where the first irradiation light L1 and the second irradiation light L2 are irradiated (i.e., the first irradiation area A1 and the second irradiation area A2) move over time. The first irradiation area A1 moves along a first path R1. The second irradiation area A2 moves along a second path R2. The movement of the first irradiation light L1 is achieved by the first optical scanning unit 12s. The movement of the irradiation position of the second irradiation light L2 is achieved by the second optical scanning unit 22s.

[0040] As shown in FIG. 2(a), under ideal operation, the area actually irradiated with the first irradiation light L1 and the area actually irradiated with the second irradiation light L2 completely overlap with each other, forming an overlap region AL12. However, due to various factors, the ideal operation as shown in FIG. 2(a) may not be achieved. FIG. 2(b) illustrates a case where the first irradiation light L1 ideally moves along the first path R1, but the second irradiation light L2 moves off the second path R2. In this case, the area actually irradiated with the first irradiation light L1 and the area actually irradiated with the second irradiation light L2 may not completely overlap with each other. Specifically, a first non-overlapping region AL1 irradiated only with the first irradiation light L1, a second non-overlapping region AL2 irradiated only with the second irradiation light L2, and an overlap region AL12 irradiated with both the first irradiation light L1 and the second irradiation light L2 are generated.

[0041] As described above, in order to reveal a fault location in the semiconductor device D, it is necessary to irradiate the semiconductor device D with the first irradiation light L1 and the second irradiation light L2. The first non-overlapping region AL1, which is irradiated only with the first irradiation light L1, receives insufficient light stimulation. As a result, even if a fault location exists in the first non-overlapping region AL1, the fault location may not be revealed. Similarly, the second non-overlapping region AL2, which is irradiated only with the second irradiation light L2, receives insufficient light stimulation. As a result, even if a fault location exists in the second non-overlapping region AL2, the fault location may not be revealed. As a result, the region (overlapping region AL12) in which a fault location in the semiconductor device D can be accurately detected is narrowed. In other words, if the position of the actually irradiated first irradiation light L1 deviates from the set first path R1, the region (overlapping region AL12) in which a fault location in the semiconductor device D can be accurately detected is reduced. Similarly, if the position of the actually irradiated second irradiation light L2 deviates from the set second path R2, the area (overlapping area AL12) in which the fault location of the semiconductor device D can be detected satisfactorily will decrease.

[0042] In view of the above problem, the analysis device 1 of the first embodiment suppresses the reduction of the overlap region AL12 that reliably exposes the fault location. As a result, the analysis device 1 of the first embodiment successfully detects the fault location of the semiconductor device D.

[0043] 2(c), when the first irradiation light L1 is stopped and the first principal surface D1 is irradiated with the first irradiation light L1, a circular first irradiation area A1 is generated. When the second irradiation light L2 is stopped and the second principal surface D2 is irradiated with the second irradiation light L2, a circular second irradiation area A2 is generated. The size of the first irradiation area A1 is different from the size of the second irradiation area A2.

[0044] The "size" here may be defined as the area of ​​the first irradiation region A1 and the area of ​​the second irradiation region A2. When the first irradiation region A1 and the second irradiation region A2 are circular, the "size" may be defined as the diameter of the first irradiation region A1 and the second irradiation region A2. The diameter of the first irradiation region A1 and the second irradiation region A2 is the so-called spot diameter.

[0045] The size of the first irradiation region A1 does not match the size of the second irradiation region A2. More specifically, the size of the second irradiation region A2 is smaller than the size of the first irradiation region A1. When the first irradiation region A1 and the second irradiation region A2 are viewed from the direction of the optical axis of the first analysis unit 10, the entire second irradiation region A2 overlaps with the first irradiation region A1.

[0046] 3, the relationship between the first irradiation area A1 and the second irradiation area A2 is due to the fact that the magnification of the second objective lens 22a of the second analysis unit 20 is higher than that of the first objective lens 12a of the first analysis unit 10. In other words, the difference in size between the first irradiation area A1 and the second irradiation area A2 is realized by the difference in optical characteristics between the first objective lens 12a and the second objective lens 22a.

[0047] The second objective lens 22a of the second analysis unit 20 has optical characteristics different from those of the first objective lens 12a of the first analysis unit 10. The magnification of the second objective lens 22a is different from that of the first objective lens 12a. The magnification of the second objective lens 22a does not match that of the first objective lens 12a. The magnification of the second objective lens 22a is higher than that of the first objective lens 12a.

[0048] The difference in magnification can also be expressed as a difference in focal length. The distance K1 from the first objective lens 12a to the first principal surface D1 and the distance K2 from the second objective lens 22a to the second principal surface D2 are the same. The second focal length F2 of the second objective lens 22a is shorter than the first focal length F1 of the first objective lens 12a. The first principal surface D1 is located closer to the first objective lens 12a than the first focal point P1. The second principal surface D2 is located closer to the second objective lens 22a than the second focal point P2. As a result, the size of the second irradiation area A2 is smaller than the size of the first irradiation area A1.

[0049] It is sufficient that the size of the first irradiation area A1 and the size of the second irradiation area A2 are different from each other. In the above description, the first irradiation area A1 is smaller than the second irradiation area A2. For example, the second irradiation area A2 may be larger than the first irradiation area A1.

[0050] The effect of suppressing the reduction of the area where the fault location is made apparent can be achieved if the size of the first irradiation area A1 and the size of the second irradiation area A2 are different from each other. The configuration for making the size of the first irradiation area A1 and the size of the second irradiation area A2 different does not need to be the difference between the magnification of the first objective lens 12a and the magnification of the second objective lens 22a. Other configurations for making the size of the first irradiation area A1 and the size of the second irradiation area A2 different will be described later as Modifications 1 to 8.

[0051] <Device Placement Section> Referring to Figure 1, the device placement unit 30 holds a semiconductor device D. The device placement unit 30 changes the position of the semiconductor device D relative to the first analysis unit 10. The device placement unit 30 changes the position of the semiconductor device D relative to the second analysis unit 20. The device placement unit 30 has a sample stage 31, a wafer chuck 32, and an XY drive unit 33.

[0052] The analysis device 1 has a first XYZ stage 13 of the first analysis unit 10, a second XYZ stage 23 of the second analysis unit 20, and an XY drive unit 33 of the device placement unit 30. The analysis device 1 has three drive mechanisms. The analysis device 1 has three degrees of freedom. With a configuration having three degrees of freedom, for example, the second analysis unit 20 and the device placement unit 30 can be moved while the first analysis unit 10 is fixed. The device placement unit 30 can also be moved while the first analysis unit 10 and the second analysis unit 20 are fixed. "Fixed" means that the positions are not changed. For example, "a state in which the first analysis unit 10 and the second analysis unit 20 are fixed" refers to a state in which the relative position of the second analysis unit 20 with respect to the first analysis unit 10 is maintained.

[0053] The wafer chuck 32 is placed on the sample stage 31. The wafer chuck 32 is slidable relative to the sample stage 31. The wafer chuck 32 has a device holder 32a. The device holder 32a holds a semiconductor device D. The device holder 32a includes a through-hole provided in the wafer chuck 32 and a glass plate that physically covers the through-hole.

[0054] The wafer chuck 32 has an alignment target 50. The alignment target 50 (see FIG. 6) is a glass plate. A pattern extending radially from a reference point bp is provided on a first surface of the glass plate. This pattern is, for example, a metal film. In one example, the pattern is created using a thin aluminum film. Therefore, the pattern forms an opaque portion 50b. The glass plate transmits light of a wavelength that is transmitted through the substrate SiE of the semiconductor device D. Therefore, the area without the pattern forms a light-transmitting portion 50a. The wafer chuck 32 has a target hole 32b. The alignment target 50 is disposed in the target hole 32b. The alignment target 50 is disposed so as to close the target hole 32b. This arrangement of the alignment target 50 allows the first camera 14 and the second camera 24 to acquire images of the pattern disposed on one surface of the glass plate.

[0055] The alignment target 50 is provided on the wafer chuck 32. The position where the device holder 32a is provided on the wafer chuck 32 is different from the position where the alignment target 50 is provided. When the position of the wafer chuck 32 is changed by the XY drive unit 33, the positions of the semiconductor device D and the alignment target 50 are changed simultaneously. The position of the alignment target 50 relative to the semiconductor device D attached to the wafer chuck 32 remains unchanged.

[0056] The XY drive unit 33 moves the wafer chuck 32 in the X-axis direction or the Y-axis direction in response to a control command from the computer 40. As a result, the observation area can be changed without moving the first analysis unit 10 and the second analysis unit 20.

[0057] The specific configuration of the device placement unit 30 is not limited to the above configuration. The device placement unit 30 may be configured to perform the functions of holding the semiconductor device D and moving the semiconductor device D in at least one of the X-axis direction and the Y-axis direction. For example, instead of the sample stage 31 and the XY drive unit 33, an XY stage may be provided. This XY stage moves the wafer chuck 32 in at least one of the X-axis direction and the Y-axis direction.

[0058] The analysis device 1 may include a stimulus signal application unit 60 and a marking light source 26 as needed.

[0059] The stimulus signal application unit 60 is electrically connected to the semiconductor device D via a cable. The stimulus signal application unit 60 applies a stimulus signal to the semiconductor device D. The stimulus signal application unit 60 operates using power received from a power supply. The stimulus signal application unit 60 repeatedly applies a stimulus signal such as a predetermined test pattern to the semiconductor device D. The stimulus signal output by the stimulus signal application unit 60 may be a modulated current signal or a CW (continuous wave) current signal.

[0060] The stimulus signal applying unit 60 is electrically connected to the computer 40 via a cable. The stimulus signal applying unit 60 applies a stimulus signal specified by the computer 40 to the semiconductor device D. The stimulus signal applying unit 60 does not necessarily have to be electrically connected to the computer 40. When the stimulus signal applying unit 60 is not electrically connected to the computer 40, it determines a stimulus signal such as a test pattern by itself. A power supply, a pulse generator, or the like may be used as the stimulus signal applying unit 60.

[0061] <Marking light source> As shown in FIGS. 4 and 5, the analysis device 1 may additionally include a marking light source 26 for marking.

[0062] The marking light source 26 places a mark around the fault location identified by the computer 40. As shown in Figures 4(a) and 4(b), marking locations mp are set around the fault location fp. Figures 4(a) and 4(b) illustrate four marking locations mp. When laser marking is completed, a through-hole is formed penetrating the metal layer ME of the semiconductor device D, as shown in Figure 4(c). The laser marking forms a through-hole that reaches the interface ss between the metal layer ME and the substrate SiE. As a result, the surface of the substrate SiE that contacts the metal layer ME is exposed. In this specification, the term "mark" may refer to the through-hole formed in the metal layer ME. In this specification, the term "mark" may refer to the substrate SiE exposed through the through-hole.

[0063] The marking light source 26 irradiates the marking location mp of the semiconductor device D with a marking laser via the second optical system 22. The marking light source 26 irradiates the marking location mp with a laser from the metal layer ME side of the semiconductor device D. The laser forms a through-hole in the metal layer ME. The marking light source 26 starts irradiating the laser when it receives a control signal from the computer 40 to start laser irradiation. The marking light source 26 may be, for example, a solid-state laser source or a semiconductor laser source. The wavelength of the light irradiated from the marking light source 26 is not less than 250 nm and not more than 2000 nm.

[0064] The second optical system 22 guides the laser to the marking location mp of the semiconductor device D. Specifically, the second optical system 22 irradiates the semiconductor device D with the laser from the metal layer ME side of the semiconductor device D. In other words, the second optical system 22 irradiates the semiconductor device D with the laser from the second main surface D2 side of the semiconductor device D. The second beam splitter 22b of the second optical system 22 switches the optical paths of the marking light source 26 and the second camera 24. The second objective lens 22a focuses the laser on the marking location mp. The second objective lens 22a and the second beam splitter 22b guide the light coming from the surface of the semiconductor device D to the second camera 24.

[0065] The second XYZ stage 23 may be driven to align the optical axis of the second objective lens 22a with the marking position, thereby irradiating the marking position with a laser. The second optical scanning unit 22s may also irradiate the marking position with a laser. The second optical system 22 may include a shutter. The shutter alternates between a state in which the laser from the marking light source 26 passes through and a state in which it blocks the laser. As a result, it is possible to control the start and stop of laser irradiation. These operations are performed in accordance with a control signal output by a marking control unit 41b of the computer 40, which will be described later.

[0066] The second camera 24 captures an image of the metal layer ME of the semiconductor device D from the second main surface D2 side of the semiconductor device D. The second camera 24 outputs the captured image to the computer 40. By checking the captured image, the user can understand the state of the laser marking as viewed from the second main surface D2 side of the semiconductor device D. The illumination light source 25 illuminates the semiconductor device D with illumination light when capturing an image with the second camera 24.

[0067] <Calculator> See Figure 1. The calculator 40 is a computer such as a personal computer. Physically, the calculator 40 includes memories such as RAM and ROM, a processor (arithmetic circuit) such as a CPU, a communication interface, and a storage unit such as a hard disk. Examples of the calculator 40 include personal computers, cloud servers, and smart devices (smartphones, tablet terminals, etc.). The calculator 40 functions by executing a program stored in the memory with the CPU of the computer system.

[0068] The computer 40 has an irradiation control unit 41s and an image processing unit 41h as elements for identifying the fault location. The irradiation control unit 41s outputs a control signal to the second analysis unit 20. Upon receiving the control signal, the second analysis unit 20 irradiates the semiconductor device D with the second irradiation light L2. The first analysis unit 10 does not receive a control signal for the first irradiation light L1 from the computer 40. The first analysis unit 10 receives a control signal for the first irradiation light L1 from the second analysis unit 20. The operation of synchronizing the first irradiation light L1 and the second irradiation light L2 is performed by the second analysis unit 20 receiving the control signal from the computer 40 and outputting a control signal to the first analysis unit 10 so that the second analysis unit 20 follows the operation of the second analysis unit 20. The second irradiation area A2 is smaller than the first irradiation area A1. The computer 40 outputs a control signal to the second analysis unit 20, which forms the smaller second irradiation area A2.

[0069] The control signal controls the start and stop of irradiation of the second irradiation light L2. The control signal controls the irradiation position of the second irradiation light L2. Specifically, the control signal controls the second optical scanning unit 22s. If the second optical scanning unit 22s is a mirror, the control signal controls the angle of the mirror.

[0070] The irradiation control unit 41s may generate a control signal for the second optical scanning unit 22s based on the ratio between the size of the first irradiation area A1 and the size of the second irradiation area A2. For example, if the magnification of the first objective lens 12a that generates the larger first irradiation area A1 is set to "1," the magnification of the second objective lens 22a that generates the second irradiation area A2 is indicated by a value (N) greater than "1." It is assumed that the ratio between the magnification of the first objective lens 12a and the magnification of the second objective lens 22a is indicated as 1:N. In this case, the irradiation control unit 41s controls the swing angle of the mirror that constitutes the second optical scanning unit 22s to be N times larger.

[0071] The scan angle is increased according to the ratio of the magnifications of the objective lenses. As a result, the size of the field of view of the first objective lens 12a and the size of the field of view of the second objective lens 22a can be made to match each other. For example, suppose the magnification of the second objective lens 22a is twice that of the first objective lens 12a. In this case, the size of the field of view of the second objective lens 22a (the length of each side of the field of view) is half the size of the field of view of the first objective lens 12a (the length of each side of the field of view). Therefore, the swing angle of the mirror that guides light to the second objective lens 22a is set to twice the swing angle of the mirror that guides light to the first objective lens 12a.

[0072] The computer 40 may output a control signal to the first analyzer 10 in parallel with outputting the control signal to the second analyzer 20.

[0073] The image processing unit 41h obtains the electrical signal characteristic values ​​output by the electrical signal acquisition unit 61. The image processing unit 41h generates an electrical signal image based on the electrical signal characteristic values. The electrical signal image is, for example, an OBIC image, an OBIRCH image, an SDL image, or a LADA image.

[0074] If the analysis device 1 has a function of applying marking, the computer 40 may additionally have, as functional components, a marking setting unit 41a, a marking control unit 41b, and a marking image creation unit 41c.

[0075] <Marking setting section> The marking setting unit 41a sets a marking point mp based on information indicating a failure point fp input from the input unit 41e. Several marking points mp are set around the identified failure point fp. The several marking points mp are, for example, four points. For example, when information indicating the failure point fp is input, the marking setting unit 41a automatically sets four marking points mp around the failure point fp, with the failure point fp at the center. Specifically, the marking setting unit 41a sets the marking points mp in a cross shape with the failure point fp at the center, for example, in a planar view (see FIGS. 4(a) and 4(b)). The marking points mp may be set based on information input by the user. The user inputs information indicating the marking points mp while viewing the analysis image displayed on the display unit 41d. The information indicating the marking points mp is received by the input unit 41e. When the user inputs information, the marking setting unit 41a does not automatically set the marking points mp. The marking setting unit 41a sets the marking location mp based on information indicating the marking location mp input from the input unit 41e. The marking setting unit 41a generates a reference image. The reference image is obtained by adding a mark indicating the fault location fp and a mark indicating the marking location mp to the analysis image. The marking setting unit 41a saves the reference image in the memory of the computer 40.

[0076] <Marking control section> The marking control unit 41b controls the second XYZ stage 23 of the second analysis unit 20 so that the observation area of ​​the fault location falls within the field of view of the second camera 24. The marking control unit 41b controls the second XYZ stage 23 of the marking light source 26 so that the optical axis of the second optical system 22 coincides with the optical axis of the first optical system 12. The marking control unit 41b controls the XY drive unit 33 of the device placement unit 30 so that the optical axis of the second optical system 22 overlaps with the marking location mp. The marking control unit 41b may also control the second optical scanning unit 22s.

[0077] The marking control unit 41b also controls the marking light source 26. When the marking image creation unit 41c determines that a mark image has appeared, the marking control unit 41b outputs an output stop signal to the marking light source 26. When the output stop signal is input, the marking light source 26 stops outputting the laser. Therefore, the marking light source 26 continues to output the laser from the time the output start signal is input by the marking control unit 41b until the output stop signal is input. The marking control unit 41b controls the marking light source 26 so that laser marking is performed until the mark image formed by laser marking appears in the pattern image. A laser penetration threshold is set. The marking control unit 41b controls the marking light source 26 so that laser marking is performed until the laser penetrates the metal layer ME.

[0078] <Marking Image Creation Department> The computer 40 is electrically connected to the first camera 14 via a cable. The computer 40 creates a pattern image and an emission image using image data input from the first camera 14. It is difficult to identify the emission position in the pattern of the semiconductor device D using only the emission image. The computer 40 generates a superimposed image as an analysis image. The superimposed image includes a pattern image based on reflected light from the semiconductor device D and an emission image based on emission from the semiconductor device D. The pattern image and the emission image are superimposed on each other.

[0079] The marking image creation unit 41c creates a marking image. The marking image includes a pattern image including a mark image and a light-emitting image. The pattern image and the light-emitting image overlap each other. The created marking image is saved in the memory of the calculator 40. The marking image creation unit 41c displays the marking image on the display unit 41d. The marking image allows the user to accurately grasp the marking position relative to the position of the faulty part in a subsequent process. The marking image creation unit 41c acquires marking information. The marking information is information necessary to grasp the marking position relative to the position of the faulty part. Examples of the marking information include the distance from the marking position to the faulty part and the orientation of the marking position relative to the position of the faulty part. The acquired marking information may be displayed as a list. The marking information may be added to the marking image and displayed. The marking information may be output on a paper medium.

[0080] The calculator 40 outputs the analysis image to the display unit 41d. The display unit 41d is a display device such as a display for showing the analysis image, etc. to the user. The user can confirm the location of the faulty part from the analysis image displayed on the display unit 41d. The user inputs information indicating the faulty part using the input unit 41e. The input unit 41e is an input device such as a keyboard and a mouse that accepts input from the user. The input unit 41e outputs the information indicating the faulty part to the calculator 40. The calculator 40, the display unit 41d, and the input unit 41e may be a tablet terminal.

[0081] The marking image creation unit 41c may output a control command to the marking control unit 41b to stop the laser irradiation. The control command to stop the laser irradiation is generated using the mark image appearing in the pattern image. Specifically, the marking image creation unit 41c sequentially generates pattern images in parallel with laser marking using the laser output from the marking light source 26. Laser marking forms a hole in the metal layer ME at the marking location mp. When the hole in the metal layer ME is shallow, the change in the intensity of reflected light at the marking position is small, and therefore the change in the optical reflection image is also small. In other words, when the hole formed by laser marking is only formed in the metal layer ME and does not reach the substrate SiE, the change in the intensity of reflected light at the marking position is small. Therefore, the change in the optical reflection image is also small. As a result, the effect of laser marking does not appear in the pattern image. When the hole in the metal layer ME becomes deeper, the change in at least one of the refractive index, transmittance, and reflectance of light on the first main surface D1 side becomes larger. Specifically, when the hole is deep enough to reach the interface ss between the metal layer ME and the substrate SiE, at least one of the refractive index, transmittance, and reflectance of light on the first main surface D1 side changes significantly. These changes cause a significant change in the intensity of reflected light at the marking position. As a result, a mark image indicating the marking location appears in the pattern image.

[0082] The marking image creation unit 41c, for example, compares the above-mentioned reference image with the pattern image. If the comparison result shows that the difference between the images is greater than a predetermined value, the marking image creation unit 41c determines that a mark image has appeared. By setting the predetermined value in advance, it is possible to determine the timing at which it is determined that a mark image has appeared.

[0083] The marking image creation unit 41c may determine whether a mark image has appeared based on the input from the user. If the marking image creation unit 41c determines that a mark image has appeared, it compares the reference image with the pattern image. If the mark formation location on the pattern image is misaligned with the marking location mp on the reference image, the marking image creation unit 41c may determine that a positional deviation of the mark has occurred. In this case, laser marking may be performed again so that the mark is formed at the correct marking location mp.

[0084] The marking may involve the following modifications:

[0085] For example, the laser marking has been described as being performed by penetrating the metal layer ME to the extent that the surface of the substrate SiE in contact with the metal layer ME is exposed. However, this is not limited to this embodiment. The depth of the hole formed by the laser marking may be sufficient so that the mark image appears in the pattern image. Specifically, for example, laser marking may be performed further after penetrating the metal layer ME and exposing the surface of the substrate SiE in contact with the metal layer ME. For example, if the thickness of the metal layer ME is 10 μm and the thickness of the substrate SiE is 500 μm, the laser marking may form a hole approximately 1 μm deeper from the surface of the substrate SiE in contact with the metal layer ME. The laser marking hole does not necessarily have to penetrate the metal layer ME. For example, assume that the thickness of the metal layer ME is 10 μm and the thickness of the substrate SiE is 500 μm. In this case, the thickness of the metal layer ME at the location where the laser marking hole was formed may be approximately 50 nm. The laser marking hole does not have to reach the surface of the substrate SiE in contact with the metal layer ME.

[0086] In the above description, the pattern image is generated while laser marking is being performed. However, this is not limiting. For example, the pattern image may be generated while the laser output is stopped. In this case, the operation of outputting the laser and the operation of stopping the laser and generating the pattern image may be alternately performed at predetermined intervals.

[0087] When the wavelength of the laser output from the marking light source 26 is 1000 nanometers or more, the first analysis unit 10 may have an optical filter that blocks only laser with a wavelength of 1000 nanometers or more. When the laser output from the marking light source 26 passes through the SiE substrate of the semiconductor device D, the laser is blocked by the first analysis unit 10. As a result, it is possible to prevent the photodetector from being damaged by the laser.

[0088] The wavelength of the laser output from the marking light source 26 may be less than 1000 nanometers. In this case, if the semiconductor device D is configured with a substrate such as a silicon substrate, the laser is absorbed by the substrate. As a result, it is possible to prevent photodetectors such as the first camera 14 from being damaged by the laser without providing an optical filter or the like.

[0089] The component that applies a stimulus signal to the semiconductor device D is not limited to the stimulus signal application unit 60. As the stimulus signal application unit, which is a component that applies a stimulus signal to the semiconductor device D, a device that applies a voltage or current to the semiconductor device D may be adopted. The stimulus signal may be applied to the semiconductor device D using these devices.

[0090] The following describes the analysis processing performed by the analysis device 1. FIG.

[0091] <Setting process S100> Preparations are made to differentiate the sizes of the first and second irradiation regions A1 and A2. In the analysis device 1 of the first embodiment, the magnifications of the first and second objective lenses 12a and 22a are differentiated to differentiate the sizes of the first and second irradiation regions A1 and A2. In the setting step S100, the magnification of the first and second objective lenses 12a and 22a is set to a predetermined magnification, and the magnification of the second objective lens 22a is set to a magnification different from that of the first objective lens 12a. For example, the first analysis unit 10 and the second analysis unit 20 each include a plurality of objective lenses with different magnifications. The objective lens used for analysis is selected by a user's input operation using the input unit 41e. The calculator 40 outputs information about the selected objective lens to the first analysis unit 10 and the second analysis unit 20. The first analysis unit 10 places the objective lens according to the input information on the optical axis as the first objective lens 12a. The second analysis unit 20 places an objective lens according to the input information on the optical axis as the second objective lens 22a.

[0092] <Alignment step S110> Next, the first optical system 12 and the second optical system 22 are aligned (S110). "Alignment" refers to aligning the optical axis of the first optical system 12 with the optical axis of the second optical system 22. More specifically, "alignment" refers to eliminating the misalignment of the center of the second optical scanning area of ​​the second optical system 22 with the center of the first optical scanning area of ​​the first optical system 12. The irradiation control unit 41s outputs an alignment command for step S110. The XY drive unit 33 moves the wafer chuck 32 so that the alignment target 50 is captured in the field of view of the first optical system 12 (S111). The irradiation control unit 41s stores the movement amount of the semiconductor device D. The movement amount may be that of the wafer chuck 32.

[0093] Next, the first optical scanning region of the first optical system 12 and the second optical scanning region of the second optical system 22 are aligned with each other (S112). By aligning the optical axis of the second optical system 22 with the optical axis of the first optical system 12, the center of the first optical scanning region for the first optical system 12 and the center of the second optical scanning region for the second optical system 22 are aligned. The second XYZ stage 23 moves the second optical system 22 so that the alignment target 50 is captured within the field of view of the second optical system 22. Next, the illumination light source 25 outputs illumination light toward the alignment target 50. The illumination light passes through the light-transmitting portion 50a of the alignment target 50. The first camera 14 of the first optical system 12 captures a transmission image of the light that has passed through the light-transmitting portion 50a of the alignment target 50. The first camera 14 outputs the transmission image to the computer 40. The second camera 24 captures a reflection image of the light reflected by the opaque portion 50b of the alignment target 50. The second camera 24 outputs the reflected image to the computer 40. The image processing unit 41h calculates the deviation of the optical axis of the second optical system 22 from the optical axis of the first optical system 12 using the transmitted image and the reflected image. The operation of moving the second optical system 22 and the operation of checking the deviation amount are repeated until the deviation falls within the allowable range. When it is determined that the deviation falls within the allowable range, the alignment of the optical axes is completed. This allows the center of the first optical scanning area related to the first optical system 12 to be aligned with the center of the second optical scanning area related to the second optical system 22. As an operation to bring the deviation within the allowable range, the second optical system 22 may be moved while the position of the first optical system 12 is fixed. The first optical system 12 may be moved while the position of the second optical system 22 is fixed. Both the first optical system 12 and the second optical system 22 may be moved.

[0094] After the alignment of the optical scanning region is completed, the XY drive unit 33 moves the wafer chuck 32 so that the semiconductor device D is captured within the fields of view of the first optical system 12 and the second optical system 22 (S113). At this time, the irradiation control unit 41s may control the XY drive unit 33 based on the movement amount stored when the semiconductor device D was retracted. The relative positions of the first optical system 12, the second optical system 22, and the semiconductor device D may be controlled using image data output from the first camera 14 and the second camera 24. In this case, too, only the semiconductor device D is moved. Immediately after the alignment of the scanning region is completed, the semiconductor device D is retracted. In other words, the semiconductor device D is not present within the fields of view of the first optical system 12 and the second optical system 22. Therefore, after the alignment of the scanning region is completed, the semiconductor device D is placed within the fields of view of the first optical system 12 and the second optical system 22. More specifically, the semiconductor device D is placed in the first optical scanning region of the first optical system 12 and the second optical scanning region of the second optical system 22. After the alignment is completed, the semiconductor device D is moved. In other words, after the alignment is completed, the first optical system 12 and the second optical system 22 are not moved. As a result, the relative positional relationship between the first optical scanning area of ​​the first optical system 12 and the second optical scanning area of ​​the second optical system 22 is maintained as a result of the alignment.

[0095] <Analysis process S120> Next, the fault location of the semiconductor device D is identified (S120). Specifically, the computer 40 outputs a control signal to the second analysis unit 20. As a result, optical scanning by the second analysis unit 20 is started. In response to the operation of the second analysis unit 20, optical scanning by the first analysis unit 10 also starts. An electrical characteristic signal is acquired from the semiconductor device D. In parallel with the acquisition of the electrical characteristic signal, a pattern image may be acquired by detecting reflected light from the semiconductor device D. The control signals received by the first analysis unit 10 and the second analysis unit 20 may be input from a pulse generator or a tester. In this case, a control signal is provided from the pulse generator or the tester to the first analysis unit 10, and a control signal is also provided to the second analysis unit 20 in parallel.

[0096] In the analysis step S120, a desired electrical signal image is obtained according to the characteristics of the first irradiation light L1 and the second irradiation light L2. Furthermore, in the analysis step S120, a desired electrical signal image is obtained according to the state of the semiconductor device D receiving the irradiation light. Examples of the electrical signal image include an OBIC image, an OBIRCH image, an SDL image, and a LADA image.

[0097] The first analysis operation includes an operation of obtaining an OBIC image. In the first analysis, the semiconductor device D is irradiated with first irradiation light L1 and second irradiation light L2. In the first analysis, the stimulus signal application unit 60 does not apply a stimulus signal to the semiconductor device D. When the semiconductor device D is irradiated with the laser, a photovoltaic current may be generated. The electrical signal acquisition unit 61 outputs the current value or current change value of the photovoltaic current as an electrical signal characteristic value.

[0098] The second analysis operation may be an operation for obtaining an OBIRCH image. In the second analysis, the semiconductor device D is irradiated with a first irradiation light L1 and a second irradiation light L2. In the second analysis, the stimulus signal application unit 60 applies a constant current, which is a stimulus signal, to the semiconductor device D. The stimulus signal may be a constant voltage. When the semiconductor device D that has received the stimulus signal is irradiated with a laser, the resistance value at the irradiated position on the semiconductor device D changes. The electrical signal acquisition unit 61 outputs a voltage value or a change in voltage corresponding to the change in resistance value as an electrical signal characteristic value.

[0099] The third analysis operation includes an operation of obtaining an SDL image. In the third analysis, the semiconductor device D is irradiated with first irradiation light L1 and second irradiation light L2. In the third analysis, lasers with wavelengths that do not excite carriers are used as the first irradiation light L1 and the second irradiation light L2. In the third analysis operation, the stimulus signal application unit 60 applies a stimulus signal such as a test pattern. When the semiconductor device D that has received the stimulus signal is irradiated with a laser with a wavelength that does not excite carriers, a malfunctioning state of the semiconductor device D can be detected. The electrical signal acquisition unit 61 outputs information related to the malfunctioning state (e.g., a PASS / FAIL signal) as an electrical signal characteristic value.

[0100] An example of a fourth analysis operation is an operation for obtaining a LADA image. In the fourth analysis, the semiconductor device D is irradiated with first irradiation light L1 and second irradiation light L2. In the fourth analysis, lasers having wavelengths that excite carriers are used as the first irradiation light L1 and second irradiation light L2. In the fourth analysis operation, the stimulus signal application unit 60 applies a stimulus signal such as a test pattern. When the semiconductor device D that has received the stimulus signal is irradiated with a laser having a wavelength that excites carriers, a malfunctioning state of the semiconductor device D can be detected. The electrical signal acquisition unit 61 outputs information related to the malfunctioning state (e.g., a PASS / FAIL signal) as an electrical signal characteristic value.

[0101] <Marking process S130> If necessary, an operation of forming a marking at the marking location mp (S130) may be performed. The marking control unit 41b outputs a marking command for step S130 to the marking light source 26 and the device placement unit 30. Specifically, the marking light source 26 outputs a laser. Laser marking is performed for all of the set marking locations mp. In the laser output operation for each marking location mp, the marking image creation unit 41c may determine whether or not a mark image appears in the pattern image. If it is determined that a mark image does not appear in the pattern image, the marking image creation unit 41c performs laser irradiation again. In parallel with the laser irradiation operation, the marking image creation unit 41c generates a pattern image.

[0102] The following describes the effects of the analysis device 1 of this embodiment.

[0103] The semiconductor failure analysis apparatus 1 includes a first analysis unit 10 that irradiates a first irradiation light L1 along a first path R1 set on a first main surface D1 of a semiconductor device D, a second analysis unit 20 that irradiates a second irradiation light L2 along a second path R2 set on a second main surface D2 that is the back side of the first main surface D1, an electrical signal acquisition unit 61 that receives electrical signals output from the semiconductor device D irradiated with the first irradiation light L1 and the second irradiation light L2, and a computer 40 that controls the second analysis unit 20. The size of a first irradiation area A1 formed on the first main surface D1 by the first irradiation light L1 is different from the size of a second irradiation area A2 formed on the second main surface D2 by the second irradiation light L2. The computer 40 irradiates the first irradiation light L1 and the second irradiation light L2 while maintaining a state in which the second irradiation area A2 entirely overlaps the first irradiation area A1.

[0104] The semiconductor failure analysis method for analyzing a semiconductor device D includes a setting step S100 for preparing first irradiation conditions for a first irradiation light L1 that is irradiated along a first path R1 that is set on a first main surface D1 of the semiconductor device D and second irradiation conditions for a second irradiation light L2 that is irradiated along a second path R2 that is set on a second main surface D2 that is the back side of the first main surface D1, and an analysis step S120 for acquiring an electrical signal output from the semiconductor device D while irradiating the semiconductor device D with the first irradiation light L1 and the second irradiation light L2 in accordance with the first and second irradiation conditions set in the setting step S100. In the setting step S100, the first and second irradiation conditions are set so that the size of a first irradiation area A1 formed on the first main surface D1 by the first irradiation light L1 differs from the size of a second irradiation area A2 formed on the second main surface D2 by the second irradiation light L2. In the analyzing step S120, the first irradiation light L1 and the second irradiation light L2 are irradiated while maintaining a state in which the second irradiation area A2 entirely overlaps the first irradiation area A1.

[0105] In failure analysis involving optical scanning by the first optical system 12 and the second optical system 22 arranged on both sides of the semiconductor device D, it may be difficult in terms of control precision to scan while aligning the positions of the light spots of the first optical system 12 and the second optical system 22 arranged on both sides of the semiconductor device D. Therefore, even if the optical axis of the first optical system 12 and the optical axis of the second optical system 22 do not completely align, it is desirable to overlap the light irradiation areas that are the light spots.

[0106] The semiconductor failure analysis apparatus 1 and the semiconductor failure analysis method irradiate a first main surface D1 of a semiconductor device D with a first irradiation light L1 and a second main surface D2 with a second irradiation light L2. The size of the first irradiation area A1 is different from the size of the second irradiation area A2. As a result, it is possible to make the entire second irradiation area A2, which is the smaller of the first irradiation area A1 and the second irradiation area A2, overlap with the larger first irradiation area A1. As a result, optical stimuli can be reliably applied to the semiconductor device D from both the first main surface D1 and the second main surface D2. Therefore, electrical signals influenced by the optical stimuli are output from the semiconductor device D, thereby reliably revealing the fault location. In other words, the semiconductor failure analysis apparatus 1 and the semiconductor failure analysis method can effectively detect the fault location of the semiconductor device D.

[0107] In the semiconductor failure analysis apparatus 1 and the semiconductor failure analysis method, the sizes of the light spots formed by the first optical system 12 and the second optical system 22 arranged on both sides of the semiconductor device D are made different from each other. As a result, even if the optical axes of the first optical system 12 and the second optical system 22 do not coincide, the light irradiation areas can be kept overlapping.

[0108] The effects of the analysis device 1 and the analysis method will be described in detail below using specific examples. For example, a first example is a case where the first irradiation area A1 moves without straying from the first path R1, and the second irradiation area A2 also moves without straying from the second path R2, as shown in Fig. 2(a). A second example is a case where the first irradiation area A1 moves without straying from the first path R1, but the second irradiation area A2 moves while straying from the second path R2, as shown in Fig. 2(b) and Fig. 2(c).

[0109] As shown in FIG. 2(b), a case where the first irradiation area A1 and the second irradiation area A2 are aligned with each other will be described. When the second irradiation area A2 moves while deviating from the second path R2, an overlapping area AL12, a first non-overlapping area AL1, and a second non-overlapping area AL2 are generated. The overlapping area AL12 is irradiated with the first irradiation light L1 and the second irradiation light L2. The first non-overlapping area AL1 is irradiated with only the first irradiation light L1. The second non-overlapping area AL2 is irradiated with only the second irradiation light L2. A comparison will be made between a state where the second irradiation area A2 moves while deviating from the second path R2 and an ideal case (see FIG. 2(a)). The ideal case refers to a case where the first irradiation area A1 and the second irradiation area A2 move while aligned with each other. When the second irradiation area A2 moves while deviating from the second path R2, the area of ​​the overlapping area AL12 decreases by the area of ​​the first non-overlapping area AL1. The fault location is revealed in the overlapping area AL12. Therefore, the first non-overlapping area AL1 reduces the area in which the fault location can be revealed.

[0110] As shown in FIG. 2(c), a case where the second irradiation area A2 is larger than the first irradiation area A1 will be described. Even if the first irradiation area A1 moves while deviating from the first path R1, the second irradiation area A2 always overlaps the first irradiation area A1. In other words, when the first irradiation area A1 is larger than the second irradiation area A2, an overlapping area AL12 having the same area as the overlapping area AL12 obtained by ideal operation as shown in FIG. 2(a) is obtained. Therefore, even if the position of the irradiation light deviates from the path, the overlapping area AL12, which can reveal the fault location, does not decrease.

[0111] In the semiconductor failure analysis device 1, the size of the second irradiation area A2 is smaller than the size of the first irradiation area A1. The computer 40 outputs a control signal to the second analysis unit 20. With this configuration, the second irradiation area A2 can be reliably overlapped in its entirety with the first irradiation area A1.

[0112] The first analysis unit 10 of the semiconductor failure analysis device 1 has a first optical scanning unit 12s that reflects the first irradiation light L1 so that the first irradiation area A1 moves along a first path R1. The second analysis unit 20 has a second optical scanning unit 22s that reflects the second irradiation light L2 so that the second irradiation area A2 moves along a second path R2. The computer 40 controls the first optical scanning unit 12s and the second optical scanning unit 22s using a ratio based on the size of the first irradiation area A1 and the size of the second irradiation area A2. This configuration also ensures that the entire first irradiation area A1 overlaps with the second irradiation area A2.

[0113] The first analysis unit 10 of the semiconductor failure analysis device 1 includes a first irradiation light source 11 that generates a first irradiation light L1 and a first objective lens 12a that guides the first irradiation light L1 from the first irradiation light source 11 to the first principal surface D1. The second analysis unit 20 includes a second irradiation light source 21 that generates a second irradiation light L2 and a second objective lens 22a that guides the second irradiation light L2 from the second irradiation light source 21 to the second principal surface D2. The difference in size between the first irradiation region A1 and the second irradiation region A2 occurs due to the difference in magnification, which is an optical characteristic of the first objective lens 12a, and the magnification, which is an optical characteristic of the second objective lens 22a. With this configuration, the difference in size between the first irradiation region A1 and the second irradiation region A2 can be created by selecting the magnification of the objective lens.

[0114] <Semiconductor failure analysis device according to the second embodiment> The semiconductor failure analysis apparatus according to the second embodiment locates a failure location using an optical probing technique known as EOP analysis or EOFM (Electro-Optical Frequency Mapping) analysis. EOFM analysis may be used to perform optical probed thermo-reflectance image mapping (OPTIM). The optical probing technique identifies the portion of a circuit operating at a target frequency. In the optical probing technique, light emitted from a light source is irradiated onto an integrated circuit. The light reflected by the integrated circuit is detected by an optical sensor. A signal component having the target frequency is extracted from the detection signal output from the optical sensor. The amplitude energy of the extracted signal component is displayed over time. The amplitude energy of the extracted signal component is displayed as a two-dimensional map.

[0115] Optical probing technology analyzes failures in a semiconductor device D based on modulation of light intensity from the semiconductor device D while it is operating. The semiconductor failure analysis equipment applies an electrical signal having a predetermined modulation frequency to the semiconductor device D. The modulation frequency is often higher than the frequency of the stimulus signal used in the analysis to identify the location of a heat source. For example, the semiconductor failure analysis equipment applies a drive current having the same frequency as the drive signal of the semiconductor device D as the stimulus signal.

[0116] Since the optical probing technique is based on modulation of the light intensity from the semiconductor device D during operation, the reflected light generated in response to the irradiated light is used for analysis. The information acquired by the analysis apparatus 1A is not an electrical signal output by the semiconductor device D when the first irradiation light L1 and the second irradiation light L2 are irradiated. The information acquired by the analysis apparatus 1A is the first response light H1 and the second response light H2. The first response light H1 is generated by the first irradiation light L1 being reflected from the first main surface D1. The second response light H2 is generated by the second irradiation light L2 being reflected from the second main surface D2.

[0117] 8, the semiconductor failure analysis apparatus of the second embodiment (hereinafter referred to as "analysis apparatus 1A") includes a first analysis unit 10A, a second analysis unit 20A, a device placement unit 30, a computer 40, and a stimulus signal application unit 60. The analysis apparatus 1A of the second embodiment does not include the electrical signal acquisition unit 61 that the analysis apparatus 1 of the first embodiment has.

[0118] The first analysis unit 10A includes a first illumination light source 11A, a first optical system 12A, a first XYZ stage 13A, and a first camera 14A. The first illumination light source 11A generates incoherent light as illumination light for EOP analysis or EOFM analysis. The light output from the first illumination light source 11A is, for example, light in a wavelength band of 530 nm or more. The light output from the first illumination light source 11A is preferably light in a wavelength band of 1064 nm or more. The first optical system 12A is similar to the first optical system 12 of the first embodiment. The magnification of the first objective lens 12a of the first optical system 12A is lower than the magnification of the second objective lens 22a of the second optical system 22A. The first camera 14A is configured to detect the first response light H1 from the first principal surface D1.

[0119] The second analysis unit 20A has a second irradiation light source 21A, a second optical system 22A, and a second camera 24A. Like the first irradiation light source 11A, the second irradiation light source 21A also generates incoherent light. The second optical system 22A is similar to the second optical system 22 in the first embodiment. The magnification of the second objective lens 22a of the second optical system 22A is higher than the magnification of the first objective lens 12a of the first optical system 12A. The second camera 24A is configured to be able to detect the second response light H2 from the second principal surface D2.

[0120] In the analyzer 1A of the second embodiment, the magnification of the first objective lens 12a is different from that of the second objective lens 22a. As in the analyzer 1, the size of the first irradiation area A1 is different from that of the second irradiation area A2 (see FIG. 2). Therefore, even if the second irradiation light L2 deviates from the planned second path R2, the overlap area AL does not narrow. Therefore, the analyzer 1A of the second embodiment can reliably identify the fault location.

[0121] Either the first analysis unit 10A or the second analysis unit 20A may have a function of applying a mark indicating a fault location. Either the first analysis unit 10A or the second analysis unit 20A may have the marking light source 26 of the first embodiment.

[0122] <Semiconductor Failure Analysis of Second Embodiment> Next, the analysis process of the analysis device 1A will be described below. Figure 9 is a flow chart showing the main steps of the analysis process using the analysis device 1A.

[0123] <Setting process S100A> The setting step S100A of the second embodiment is the same as the setting step S100 of the first embodiment. In the setting step S100A, lenses are selected so that the magnification of the second objective lens 22a is greater than the magnification of the first objective lens 12a.

[0124] <Alignment process S110A> The alignment step S110A of the second embodiment is the same as the alignment step S110 of the first embodiment.

[0125] <Analysis process S120A> Next, the fault location of the semiconductor device D is identified (S120A). The first analysis unit 10A irradiates the first main surface D1 of the semiconductor device D with the first irradiation light L1 generated by the first irradiation light source 11A using the first optical scanning unit 12s. The second analysis unit 20A irradiates the second main surface D2 of the semiconductor device D with the second irradiation light L2 generated by the second irradiation light source 21A using the second optical scanning unit 23s. The computer 40 controls the second optical scanning unit 22s to move the second irradiation area A2 along the second path R2 while maintaining the first irradiation area A1 and the second irradiation area A2 overlapping each other, in accordance with the control signal output from the second analysis unit 20A. The first analysis unit 10A operates the first optical scanning unit 12s to move the first irradiation area A1 along the first path R1 while maintaining the first irradiation area A1 and the second irradiation area A2 overlapping each other.

[0126] The second irradiation light L2 is reflected by the second main surface D2 of the semiconductor device D. The reflected light is incident on the second analysis unit 20A as the second response light H2. The second response light H2 is detected by the second camera 24A. The second camera 24A outputs information based on the second response light H2 to the computer 40. The first irradiation light L1 also undergoes a process similar to that of the second irradiation light L2, and is finally output to the computer 40 as information based on the first response light H1.

[0127] Next, the stimulus signal application unit 60 outputs a stimulus signal such as a test pattern to the semiconductor device D. The first analysis unit 10A irradiates the semiconductor device D that has received the stimulus signal with a first irradiation light L1. The second analysis unit 20A irradiates the semiconductor device D that has received the stimulus signal with a second irradiation light L2. In this operation, the first irradiation light L1 and the second irradiation light L2 are irradiated at an irradiation position selected by the user. The user may input the irradiation position into the computer 40 using the input unit 41e while viewing the optical reflection image displayed on the display unit 41d. The first camera 14A detects a first response light H1 from the semiconductor device D that has received the stimulus signal. The second camera 24A detects a second response light H2 from the semiconductor device D that has received the stimulus signal. The first camera 14A outputs information based on the first response light H to the computer 40. The second camera 24A outputs information based on the second response light H2 to the computer 40.

[0128] In the semiconductor device D receiving the stimulus signal, the elements constituting the semiconductor device D are operating. The response light from the semiconductor device D in which the elements are operating is modulated in accordance with the operation of the elements.

[0129] The image processing unit 41h of the computer 40 generates a signal waveform using the detection signals output by the first camera 14A and the second camera 24A. The image processing unit 41h displays the signal waveform on the display unit 41d. The computer 40 acquires the detection signals and generates the signal waveform while changing the irradiation position based on the optical reflection image. The generated signal waveform can be used to identify the location of the fault.

[0130] The image processing unit 41h may generate an electro-optic frequency mapping image (EOFM image). An EOFM image is an image of phase difference information between a stimulus signal such as a test pattern and a detection signal, correlated with the irradiation position. The phase difference information can be obtained from the AC component extracted from the detection signal. An optical reflection image can be obtained by correlating the DC component extracted simultaneously with the AC component with the irradiation position and imaging it. A superimposed image obtained by superimposing the EOFM image on the optical reflection image can be used as an analysis image.

[0131] <Marking process S130A> The marking step S130A of the first embodiment is the same as the marking step S130A of the first embodiment.

[0132] <Action and effect> The analysis device 1A of the second embodiment can also achieve the same effects as the analysis device 1 of the first embodiment. The analysis device 1A of the second embodiment also suppresses the reduction of the overlap area AL12 that reliably reveals the fault location. As a result, the analysis device 1A of the second embodiment successfully detects the fault location of the semiconductor device D.

[0133] The present invention is not limited to the semiconductor failure analysis apparatus 1 of the first embodiment and the semiconductor failure analysis apparatus 1A of the second embodiment. As described in the description of the first embodiment, the configuration for differentiating the size of the first irradiation area A1 and the size of the second irradiation area A2 does not necessarily require a difference in the magnification of the first objective lens 12a and the second objective lens 22a.

[0134] The configuration that makes the magnifications of the objective lenses different makes the optical characteristics of the optical members different. In other words, it can be said that the optical members that make up the first analysis unit 10 and the optical members that make up the second analysis unit 20 are different from each other. "Different members" may mean different optical characteristics, as in the first embodiment. "Different members" may mean that the configuration of the optical members of the first analysis unit 10 and the configuration of the optical members of the second analysis unit 20 are different. Such configurations will be described as Modified Examples 1 to 4.

[0135] Even if the optical members constituting the first analysis section 10 and the second analysis section 20 have the same optical characteristics, it is possible to make the size of the first irradiation area A1 and the size of the second irradiation area A2 different by changing the arrangement of the optical members. Such configurations will be described as Modified Examples 5 to 7.

[0136] Even if the optical characteristics and arrangement of the optical members constituting the first analysis unit 10 and the second analysis unit 20 are the same, it is possible to make the size of the first irradiation area A1 and the size of the second irradiation area A2 different by making the first path R1 and the second path R2 different from each other. Such a configuration will be described as Variation 8.

[0137] <Variation 1> FIG. 10 shows the first optical system 12B and the second optical system 22B of the semiconductor failure analysis device 1B of the first modification. In the first modification, the optical components have different optical characteristics. The different optical components are the first objective lens 12aB and the second objective lens 22aB. The different optical characteristic is the numerical aperture (NA). For example, as in the first embodiment, it is assumed that the size of the second irradiation area A2 is smaller than the size of the first irradiation area A1. In this case, the numerical aperture (NA) of the second objective lens 22aB is set smaller than the numerical aperture (NA) of the first objective lens 12aB. Due to such a difference in optical characteristics, the size of the second irradiation area A2 can be made smaller than the size of the first irradiation area A1 while maintaining the same distance K1 from the first objective lens 12aB to the first principal surface D1 and the same distance K2 from the second objective lens 22aB to the second principal surface D2.

[0138] Instead of the numerical aperture (NA) of the first objective lens 12aB and the second objective lens 22aB, the numerical aperture (NA) of the first irradiation light source 11 and the second irradiation light source 21 may be made different.

[0139] <Variation 2> FIG. 11 shows the first optical system 12C and the second optical system 22C of the semiconductor failure analysis device 1C of the second modification. In the second modification, the configurations of the optical components are different from each other. The different optical components are the first objective lens 12aC and the second objective lens 22aC. The first objective lens 12aC has a lens 12a1 and a first pupil 12a2. The first pupil 12a2 is, for example, a circular plate member having a through-hole. The first pupil 12a2 narrows the first irradiation light L1 entering the lens 12a1. The second objective lens 22aC has a lens 22a1 and a second pupil 22a2. The second pupil 22a2 is also a circular plate member having a through-hole. The second pupil 22a2 narrows the second irradiation light L2 entering the lens 22a1. For example, as in the first embodiment, it is assumed that the size of the second irradiation area A2 is smaller than the size of the first irradiation area A1. In this case, the inner diameter (opening diameter) of the through hole of the second pupil 22a2 may be made smaller than the inner diameter (opening diameter) of the through hole of the first pupil 12a2. Even with this difference in configuration, as in Modification 1, the size of the second irradiation area A2 can be made smaller than the size of the first irradiation area A1 while keeping the distance K1 from the first objective lens 12aC to the first principal surface D1 and the distance K2 from the second objective lens 22aC to the second principal surface D2 the same.

[0140] <Variation 3> FIG. 12 shows a first optical system 12D and a second optical system 22D of a semiconductor failure analysis device 1D according to Modification 3. In Modification 3, the optical components are different from each other. The different optical components are a first aperture 11t and a second aperture 21t. The first aperture 11t is disposed on the optical path from the first irradiation light source 11 to the first optical scanning unit 12s. The first aperture 11t is a circular plate member having a through hole. The second aperture 21t is disposed on the optical path from the second irradiation light source 21 to the second optical scanning unit 22s. The second aperture 21t is also a circular plate member having a through hole. For example, as in the first embodiment, it is assumed that the size of the second irradiation area A2 is smaller than the size of the first irradiation area A1. In this case, the inner diameter (opening diameter) of the through hole of the second aperture 21t may be smaller than the inner diameter (opening diameter) of the through hole of the first aperture 11t. According to this configuration, the first illumination light L1 narrowed down by the first aperture 11t enters the first pupil 12a2 of the first objective lens 12aD. The second illumination light L2 narrowed down by the second aperture 21t enters the second pupil 22a2 of the second objective lens 22aD. Even with this difference in configuration, as in the first modification, the size of the second illumination region A2 can be made smaller than the size of the first illumination region A1 while keeping the distance K1 from the first objective lens 12aD to the first principal surface D1 and the distance K2 from the second objective lens 22aD to the second principal surface D2 the same.

[0141] <Variation 4> FIG. 13 shows the first optical system 12E and the second optical system 22E of the semiconductor failure analysis device 1E of the fourth modification. The configurations of the optical components are different from those of the third modification. The different optical components are the first fiber 12r and the second fiber 22r. The first optical system 12E has a first fiber 12r instead of the first objective lens 12a. The first fiber 12r guides the first irradiation light L1 from the first irradiation light source 11 to the first optical scanning unit 12s. The beam diameter of the first irradiation light L1 emitted from the first fiber 12r corresponds to the core diameter of the first fiber 12r. The first irradiation light L1 emitted from the first fiber 12r is incident on the first optical scanning unit 12s while maintaining the beam diameter corresponding to the core diameter of the first fiber 12r. The first irradiation light L1 incident on the first optical scanning unit 12s reaches the first principal surface D1. The second optical system 22E also includes a second fiber 22r instead of the second objective lens 22a. The second irradiation light L2 emitted from the second fiber 22r is incident on the second optical scanning unit 22s while maintaining a beam diameter corresponding to the core diameter of the second fiber 22r. The second irradiation light L2 incident on the second optical scanning unit 22s reaches the second principal surface D2. The first fiber 12r is a multimode fiber, while the second fiber 22r is a single-mode fiber. The core diameter of a multimode fiber is larger than that of a single-mode fiber. Therefore, the beam diameter of the first irradiation light L1 emitted from the first fiber 12r, which is a multimode fiber, is larger than the beam diameter of the second irradiation light L2 emitted from the second fiber 22r, which is a single-mode fiber. This difference in configuration also allows the size of the second irradiation area A2 to be smaller than the size of the first irradiation area A1.

[0142] As another example, the optical system forming a large illumination area may include a spiral polarizing filter. In this case, the illumination light irradiated onto the semiconductor device D from the optical system becomes a so-called vector beam. With this configuration, the illumination light becomes a multiple ring shape, allowing the illumination area to be large.

[0143] Below, modifications 5 to 7, which differ from each other in the arrangement of the optical members, will be described.

[0144] <Variation 5> FIG. 14 shows a first optical system 12F and a second optical system 22F of a semiconductor failure analysis apparatus 1F according to a fifth modification. In the fifth modification, the arrangement of the optical components of the first optical system 12F and the second optical system 22F is different from each other. The optical components with different arrangements are a first objective lens 12aF and a second objective lens 22aF. The optical characteristics of the first objective lens 12aF are the same as those of the second objective lens 22aF. The magnification of the first objective lens 12aF is the same as that of the second objective lens 22aF. The numerical aperture (NA) of the first objective lens 12aF is also the same as the numerical aperture (NA) of the second objective lens 22aF. The first focal length F1 of the first objective lens 12aF is also the same as the second focal length F2 of the second objective lens 22aF. In Modification 5, the positions of the first objective lens 12aF and the second objective lens 22aF are different from each other relative to the semiconductor device D. Specifically, the distance K1 from the first main surface D1 of the semiconductor device D to the first objective lens 12aF and the distance K2 from the second main surface D2 of the semiconductor device D to the second objective lens 22aF are different from each other. In Modification 5, the optical axis Q12 of the first objective lens 12aF overlaps with the optical axis Q22 of the second objective lens 22aF. The optical axis Q12 of the first objective lens 12aF coincides with the optical axis Q22 of the second objective lens 22aF. For example, as in the first embodiment, it is assumed that the size of the second irradiation area A2 is smaller than the size of the first irradiation area A1. In this case, the distance K2 should be greater than the distance K1. With this configuration, even if the optical members constituting the first optical system 12F and the optical members constituting the second optical system 22F are common to each other, the size of the second irradiation area A2 can be made smaller than the size of the first irradiation area A1.

[0145] <Variation 6> FIG. 15 shows the first optical system 12G and the second optical system 22G of the semiconductor failure analysis device 1G of Modification 6. In Modification 6, the arrangement of the optical components of the first optical system 12G and the second optical system 22G is different from each other. The optical components with different arrangements are the first objective lens 12aG and the second objective lens 22aG. As in Modification 5, the optical characteristics (magnification, NA, focal length) of the first objective lens 12aG and the optical characteristics (magnification, NA, focal length) of the second objective lens 22aG may be the same. In Modification 5, the optical axis Q12 of the first objective lens 12aF coincides with the optical axis Q22 of the second objective lens 22aF. In contrast, in Modification 6, the optical axis Q12 of the first objective lens 12aG does not coincide with the optical axis Q22 of the second objective lens 22aG. Specifically, the optical axis Q22 of the second objective lens 22aG, which forms the smaller irradiation area, is perpendicular to the second principal surface D2. Therefore, the shape of the second irradiation area A2 is circular. On the other hand, the optical axis Q22 of the first objective lens 12aG, which forms the larger irradiation area, is not perpendicular to the first principal surface D1. The optical axis Q22 is tilted with respect to the normal to the first principal surface D1. Therefore, the shape of the first irradiation area A1 is, for example, an ellipse that appears when a cone is obliquely cut. Even with this configuration, the size of the second irradiation area A2 can be made smaller than the size of the first irradiation area A1, even when the optical members constituting the first optical system 12G and the second optical system 22G are common to each other.

[0146] <Variation 7> FIG. 16 shows a first optical system 12H and a second optical system 22H of a semiconductor failure analysis device 1H according to Modification 7. In Modification 7, the arrangement of the optical components of the first optical system 12H and the second optical system 22H is different from each other. The first optical system 12H has a pair of first fibers 12ka and 12kb. FIG. 15 illustrates two first fibers 12ka and 12kb. However, the number of first fibers in the first optical system 12H may be two or more. The number of first fibers may be greater than the number of second fibers. The first optical system 12H has first irradiation light sources 11a and 11b corresponding to the number of fibers. The first optical system 12H may supply irradiation light to multiple fibers from a single light source. The optical axis of the first fiber 12ka is shifted from but parallel to the optical axis of the first fiber 12kb. The first irradiation light L1a generated by the first irradiation light source 11a and irradiated from the first fiber 12ka forms a first irradiation area A1a. The first irradiation light L1b generated by the first irradiation light source 11b and irradiated from the first fiber 12kb forms a first irradiation area A1b. The first irradiation area A1a overlaps a portion of the first irradiation area A1b. As a result, the first irradiation area A1 is formed by the first irradiation areas A1a and A1b. The second optical system 22H has one second fiber 22k. The first fibers 12ka, 12kb, and second fiber 22k of Modification 7 all have the same optical characteristics. For example, the first fibers 12ka, 12kb, and second fiber 22k are single-mode fibers. With this configuration, the optical system forming the larger irradiation area has multiple optical fibers, and the large irradiation area can be formed by the irradiation light irradiated by each optical fiber. Therefore, even with this configuration, even if the optical members constituting the first optical system 12H and the optical members constituting the second optical system 22H are common, the size of the second irradiation area A2 can be made smaller than the size of the first irradiation area A1.

[0147] Hereinafter, an eighth modification example will be described in which the first route R1 and the second route R2 are different from each other.

[0148] <Variation 8> FIG. 17 shows the first path R1 and the second path R2 in the semiconductor failure analysis device of Modification 8. In Modification 8, only the path is different. In Modification 8, the optical components constituting the first optical system and the second optical system are common. In Modification 8, the arrangement of the optical components is also common. Modification 8 is realized by the control of the computer 40 that controls the first optical system and the second optical system. As in the first embodiment, a case where the size of the second irradiation area A2 is smaller than the size of the first irradiation area A1 is illustrated. It is assumed that the size of the irradiation spot L2s of the second irradiation light L2 is the same as the size of the irradiation spot L1s of the first irradiation light L1. Now, as shown in FIG. 17(a), the irradiation spot L2s moves linearly along the second path R2. The second path R2 is a straight line. In contrast, the irradiation spot L1s moves along the first path R1, which crosses the second path R2. More specifically, the first path R1 includes a portion R1a and a portion R1b. The portion R1a advances parallel to the direction of travel of the second path R2 while being offset in a direction perpendicular to the direction of travel of the second path R2. The portion R1b advances in a direction perpendicular to the direction of travel of the second path R2. As shown in FIG. 17(b), a first irradiation area A1 having an area larger than the irradiation spot L1s is formed. The first irradiation area A1 of the eighth modification is a pseudo-enlarged irradiation area. Setting such a path can also be considered, for example, to make one path longer than the other. Setting such a path can also be considered to set one scanning speed faster than the other. With this operation, even if the optical components constituting the first optical system and the second optical system are common to each other, the size of the second irradiation area A2 can be made smaller than the size of the first irradiation area A1. [Explanation of symbols]

[0149] DESCRIPTION OF THE REFERENCE NUMERALS 1, 1A, 1B, 1C, 1D, 1E, 1F, 1G, 1H...semiconductor failure analysis device, 10, 10A...first analysis unit, 11, 11A, 11a, 11b...first irradiation light source (first light source), 20, 20A...second analysis unit, 21, 21A...second irradiation light source (second light source), 61...electrical signal acquisition unit, A1, A1a, A1b...first irradiation area, A2...second irradiation area, D...semiconductor device, D1...first main surface, D2...second main surface, H1...first response light, H2...second response light, L1, L1a, L1b...first irradiation light, L2...second irradiation light, R1...first path, R2...second path, S100, S100A...setting step, S120...analysis step

Claims

1. a first analysis unit that irradiates a first irradiation light along a first path set on a first main surface of the semiconductor device; a second analysis unit that irradiates a second irradiation light along a second path set on a second main surface that is a back side of the first main surface; a first light detection unit that receives first response light from the semiconductor device in response to the first irradiation light; a second light detection unit that receives second response light from the semiconductor device in response to the second irradiation light; a control unit that controls at least one of the first analysis unit and the second analysis unit, the first analysis unit has a first optical scanning unit that reflects the first irradiation light so that a first irradiation region formed on the first main surface by the first irradiation light moves along the first path; the second analysis unit has a second optical scanning unit that reflects the second irradiation light so that a second irradiation region formed on the second main surface by the second irradiation light moves along the second path; The size of the first illumination area is different from the size of the second illumination area, The control unit outputs a control signal to irradiate the first irradiation light and the second irradiation light while maintaining a state in which one of the first irradiation region and the second irradiation region is entirely overlapped with the other of the first irradiation region and the second irradiation region.

2. The size of the second illumination area is smaller than the size of the first illumination area, 2. The semiconductor failure analysis apparatus according to claim 1, wherein the control unit outputs the control signal to the second analysis unit.

3. A semiconductor failure analysis device as described in claim 1 or 2, wherein the control unit controls the first optical scanning unit and the second optical scanning unit using a ratio based on the size of the first irradiation area and the size of the second irradiation area.

4. The first analysis unit a first light source that generates the first irradiation light; a first optical member that guides the first irradiation light from the first light source to the first principal surface, The second analysis unit a second light source that generates the second irradiation light; a second optical member that guides the second irradiation light from the second light source to the second principal surface, A semiconductor failure analysis device according to any one of claims 1 to 3, wherein the difference between the size of the first irradiation area and the size of the second irradiation area is caused by the difference between the optical characteristics of the first optical element and the optical characteristics of the second optical element.

5. the first analysis unit has a first lens that focuses the first irradiation light on the first principal surface so that the size of the first irradiation region has a predetermined size; the second analysis unit has a second lens that focuses the second irradiation light on the second principal surface so that the size of the second irradiation region is different from the size of the first irradiation region; 4. The semiconductor failure analysis device according to claim 1, wherein the magnification of the first lens is different from the magnification of the second lens.

6. The first analysis unit a first light source that generates the first irradiation light; a first optical member that guides the first irradiation light from the first light source to the first principal surface, The second analysis unit a second light source that generates the second irradiation light; a second optical member that guides the second irradiation light from the second light source to the second principal surface, A semiconductor failure analysis device according to any one of claims 1 to 3, wherein the difference between the size of the first irradiation area and the size of the second irradiation area is caused by a difference between the arrangement of the first optical element and the arrangement of the second optical element.

7. A semiconductor failure analysis device described in any one of claims 1 to 3, wherein the difference between the size of the first irradiation area and the size of the second irradiation area is caused by the difference between the first path and the second path.

8. A semiconductor failure analysis method for analyzing a semiconductor device, comprising: a setting step of preparing first irradiation conditions for first irradiation light to be irradiated along a first path set on a first main surface of the semiconductor device and second irradiation conditions for second irradiation light to be irradiated along a second path set on a second main surface that is a back side of the first main surface; an analyzing step of acquiring a first response light from the semiconductor device while irradiating the semiconductor device with the first irradiation light in accordance with the first irradiation condition set in the setting step so that a first irradiation region formed on the first main surface by the first irradiation light moves along the first path, and acquiring a second response light from the semiconductor device while irradiating the semiconductor device with the second irradiation light in accordance with the second irradiation condition set in the setting step so that a second irradiation region formed on the second main surface by the second irradiation light moves along the second path, In the setting step, the first irradiation condition and the second irradiation condition are set so that a size of a first irradiation region formed on the first main surface by the first irradiation light is different from a size of a second irradiation region formed on the second main surface by the second irradiation light; In the analysis step, the first irradiation light and the second irradiation light are irradiated while maintaining a state in which one of the first irradiation region and the second irradiation region is entirely overlapped with the other of the first irradiation region and the second irradiation region.

Images