Wafer defect analysis device and wafer defect analysis method

Abstract

To provide a wafer defect analysis device.SOLUTION: A wafer defect analysis device comprises: an imaging mechanism including a light source for placing a wafer and emitting infrared light, a camera for pointing to the light source and photographing the wafer, a microscope objective lens located between the camera and the light source, a filter element located between the camera and the microscope objective lens, and a gain element located between the camera and the filter element; a height adjustment mechanism connected to the imaging mechanism and including a motor; and a processor signal-connected to the imaging mechanism. The height adjustment mechanism moves the imaging mechanism vertically, and the imaging mechanism photographs an image of the wafer, which is then received and analyzed by the processor to analyze defects on the wafer. Thereby, the defects can be accurately analyzed.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a defect analysis apparatus and a defect analysis method, and more particularly to a wafer defect analysis apparatus and a wafer defect analysis method. [Background technology]

[0002] With the advancement of technology, single crystal silicon wafers are widely used in the semiconductor and optical industries. However, wafers are prone to subsurface defects during the manufacturing process, which can cause problems in the stability and reliability of subsequent semiconductors. Therefore, how to detect subsurface defects in wafers is of great importance.

[0003] A known subsurface defect detection method includes a laser beam emitter and a detector. The laser beam emitter projects a laser beam at an angle below the wafer surface, so that when the laser beam passes through a defect, it is scattered and received by the detector. However, the scattered laser beam has low energy and is difficult to detect, so defect detection is still lacking. Other subsurface defect detection methods exist, but all have limitations, such as requiring the sample to be transparent or requiring high surface roughness requirements, and all have difficulty accurately detecting the depth of the defect.

[0004] In view of this, how to improve such devices for detecting and analyzing subsurface defects on wafers and increase their defect detection performance has become a target of efforts in the related art. Summary of the Invention [Means for solving the problem]

[0005] In order to solve the above problems, the present invention provides a wafer defect analysis device and a wafer defect analysis method that can improve the defect detection performance by using their structural arrangement.

[0006] According to one embodiment of the present invention, there is provided a wafer defect analysis device comprising: an imaging mechanism including a light source for placing a wafer and emitting infrared light; a camera for pointing the camera at the light source and photographing the wafer; a microscope objective lens positioned between the camera and the light source; a filter element positioned between the camera and the microscope objective lens; and a gain element positioned between the camera and the filter element; a height adjustment mechanism connected to the imaging mechanism and including a motor; and a processor signal-connected to the imaging mechanism, wherein the height adjustment mechanism moves the imaging mechanism to move it in a vertical direction, and the imaging mechanism photographs images of the wafer, which are then received and analyzed by the processor to analyze defects on the wafer.

[0007] This allows the infrared light to penetrate the wafer, especially the silicon wafer, and thus the imaging mechanism can capture an actual image of the wafer to clearly identify defects. Furthermore, the height adjustment mechanism moves the imaging mechanism to move it in the vertical direction, thereby moving the focal position of the imaging mechanism and capturing images of different positions in the vertical direction of the wafer in focus, which can further contribute to analyzing the characteristics of the defects, such as analyzing the depth of the defects.

[0008] According to one embodiment of the wafer defect analysis device, the wavelength of the infrared light may be in the range of 1100 nm to 1500 nm.

[0009] According to one embodiment of the wafer defect analysis apparatus, the motor may have a high-precision stepping motor structure.

[0010] According to one embodiment of the wafer defect analysis apparatus, the apparatus may further include a pattern layer positioned between the light source and the wafer.

[0011] According to one embodiment of the wafer defect analysis apparatus, the filter element may have a pinhole slit plate structure.

[0012] According to one embodiment of the present invention, there is provided a method for analyzing wafer defects, including: an illumination step in which a wafer is placed on a light source and infrared light emitted from the light source is transmitted through the wafer; and a defect depth analysis step in which a motor of a height adjustment mechanism drives an imaging mechanism to move it vertically toward the wafer and causes the imaging mechanism to capture multiple images of an imaging area on the wafer at multiple focal positions, the imaging mechanism including a camera, a gain element, a filter element, and a microscope objective lens, arranged in that order vertically; and a processor confirms the depth of defects in the imaging area based on the multiple focal positions and the multiple images.

[0013] According to one embodiment of the above-mentioned wafer defect analysis method, the motor may further include a surface position confirmation step of driving the imaging mechanism to capture an image of the wafer surface, finding a focal position corresponding to the surface, and confirming the surface position of the wafer.

[0014] According to one embodiment of the wafer defect analysis method, in the defect depth analysis process, the surface position is used as a calculation reference point, and when the average gradation value of one of the multiple images is equal to or greater than a threshold value, the processor can obtain the numerical difference between the focus position and surface position corresponding to the one image as the depth of the defect.

[0015] According to one embodiment of the above-mentioned wafer defect analysis method, a pattern layer is placed between the bottom surface of the wafer and the light source, and a motor drives the imaging mechanism to capture an image of the pattern layer, find a focal position corresponding to the pattern layer, and may further include a bottom surface position confirmation step of confirming the bottom surface position of the wafer.

[0016] According to one embodiment of the wafer defect analysis method, the motor may have a high-precision stepping motor structure. [Brief explanation of the drawings]

[0017] [Figure 1] 1 is a structural schematic diagram of a wafer defect analysis device according to an embodiment of the present invention; [Figure 2] 2A to 2C are diagrams showing different images taken at different focal positions by the wafer defect analysis apparatus according to the embodiment of FIG. 1. [Figure 3] 10 is a block flowchart of a method for analyzing wafer defects in accordance with another embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0018] Hereinafter, embodiments of the present invention will be described with reference to the drawings. For clarity, many practical details are set forth in the following description. However, readers should understand that these practical details are not intended to limit the present invention. That is, in some embodiments of the present invention, these practical details are not necessary. In addition, to simplify the drawings, some well-known conventional structures and elements are simply and diagrammatically shown in the drawings, and overlapping elements may be represented by the same or similar numbers.

[0019] Furthermore, in this specification, a reference to an element (or mechanism or module, etc.) being "connected," "placed," or "coupled" to another element may refer to the element being directly connected, directly placed, or directly coupled to the other element, or to the element being indirectly connected, indirectly placed, or indirectly coupled to the other element, i.e., another element being interposed between the element and the other element. When an element is "directly connected," "directly placed," or "directly coupled" to another element, it indicates that no other element is interposed between the element and the other element. Terms such as "first," "second," and "third" are merely used to describe different elements or components and do not limit the elements / components themselves; therefore, a "first element / component" can be read as a "second element / component." Furthermore, the combinations of elements / components / mechanisms / modules used in this specification are not commonly known, conventional, or known combinations in this field. Whether the elements / components / mechanisms / modules themselves are known or not does not determine whether the combinations would be easily achieved by a person skilled in the art.

[0020] Please refer to FIG. 1. FIG. 1 shows a structural schematic diagram of a wafer defect analysis apparatus 100 according to one embodiment of the present invention. The wafer defect analysis apparatus 100 includes a light source 130, an imaging mechanism 120, a height adjustment mechanism 140, and a processor 150. The light source 130 is used to place a wafer W1 and emit infrared light. The imaging mechanism 120 includes a camera 121, a microscope objective lens 124, a filter element 123, and a gain element 122. The camera 121 is used to point at the light source 130 and capture an image of the wafer W1. The microscope objective lens 124 is located between the camera 121 and the light source 130. The filter element 123 is located between the camera 121 and the microscope objective lens 124. The gain element 122 is located between the camera 121 and the filter element 123. The height adjustment mechanism 140 is connected to the imaging mechanism 120 and includes a motor 141. The processor 150 is signal-connected to the imaging mechanism 120. The height adjustment mechanism 140 moves the imaging mechanism 120 in the vertical direction Z, and the imaging mechanism 120 captures an image of the wafer W1, which is then received and analyzed by the processor 150 to analyze the defects D1 on the wafer W1.

[0021] This allows the infrared light to pass through the wafer W1, particularly the wafer W1 made of single crystal silicon, and thus the imaging mechanism 120 can capture an actual image of the wafer W1, allowing the defect D1 to be clearly identified. Furthermore, the height adjustment mechanism 140 moves the imaging mechanism 120 in the vertical direction Z, thereby moving the focal position of the imaging mechanism 120 and enabling images of different positions in the vertical direction Z of the wafer W1 to be focused and captured, which can further contribute to analyzing the characteristics of the defect D1, such as the depth H1 (shown in FIG. 2) of the defect D1. Details of the wafer defect analysis device 100 will be described later.

[0022] The wafer defect analysis apparatus 100 may further include a base 160 and a horizontal movement mechanism 110. The base 160 includes a work table 161 and a stand 162 vertically connected to the work table 161. The horizontal movement mechanism 110 may include a stage 111 and a horizontal slide rail 112. The horizontal slide rail 112 is fixed to the work table 161. The stage 111 is mounted on the horizontal slide rail 112 and moves the wafer W1 placed thereon in the horizontal direction X. The stage 111 is preferably made of a transparent material. In another embodiment, a stage may not be provided and a light source may be directly mounted on the horizontal slide rail, but this is not limiting. The horizontal slide rail 112 may be, for example, a slide rail structure with a linear ball, and the slide base of the horizontal slide rail 112 may be driven to move the stage 111 relative to the work table 161. In other embodiments, the wafer defect analysis device may include two horizontal movement mechanisms used to move the wafer in two horizontal directions (e.g., length and width directions perpendicular to each other) relative to the worktable, or one horizontal movement mechanism moves the stage to move it in one horizontal direction, and the other horizontal movement mechanism moves the imaging mechanism to move it in the other horizontal direction, but is not limited to the above disclosure.

[0023] The height adjustment mechanism 140 may include a motor 141, a vertical slide rail 142, and a controller 143. The vertical slide rail 142 is mounted on a stand 162. The motor 141 is also mounted on the stand 162. The vertical slide rail 142 may be, for example, a slide rail structure having a linear ball. The controller 143 drives the motor 141 to move the slide base of the vertical slide rail 142 to move the imaging mechanism 120 connected to the slide base in the vertical direction Z. In the embodiment of FIG. 1, the motor 141 may have a high-precision stepping motor structure, which can precisely control minute movements of the imaging mechanism 120 in the vertical direction Z, for example, 0.1 μm, and further can prevent vibrations from occurring during movement that would interfere with optical focusing. The controller 143 may be signal-connected to a processor 150 and receive instructions from the processor 150.

[0024] The imaging mechanism 120 is connected to a slide base of a vertical slide rail 142. In the imaging mechanism 120, a camera 121, a gain element 122, a filter element 123, and a microscope objective lens 124 are arranged in this order from top to bottom along the vertical direction Z, i.e., the microscope objective lens 124 is closest to the wafer W1, and the camera 121 is farthest from the wafer W1. The camera 121 has an infrared CCD or CMOS camera structure and can capture high-pixel images. The gain element 122 may be, for example, a light gain element, such as a photodiode array, and the filter element 123 may have a pinhole-slit plate structure, but is not limited to these. The filter element 123 can be used to filter the light beam from the non-focused surface (e.g., light beam L2) and allow the light beam from the focused surface (e.g., light beam L1) to pass through and enter the camera 121, thereby preventing the data from the non-focused surface and the focused surface contained in the captured image from overlapping with each other, causing interference and making the defect D1 unclear. After filtering out the light beam from the non-focused surface, the intensity of the light beam becomes weak, so the gain element 122 can strengthen the light beam to prevent the captured image from being too dark.

[0025] The imaging mechanism 120 may be a modular structure that is pre-assembled and fixed, and the distance between each element is fixed, thereby fixing the focus of the imaging mechanism 120. Because the focus of the imaging mechanism 120 is fixed, when the height adjustment mechanism 140 moves the imaging mechanism 120 in the vertical direction Z, the focus also moves in the vertical direction Z, and different focus positions are formed.

[0026] The light source 130 may have a flat light source structure that emits uniform infrared light and can transmit through the wafer W1. In the embodiment of Fig. 1, the wavelength of the infrared light may be 1100 nm to 1500 nm, which can contribute to transmitting through the single-crystal silicon wafer W1. The wavelength of the infrared light may be, for example, 1200 nm, which maximizes the transmittance when transmitting through the single-crystal silicon wafer W1.

[0027] Please refer to FIG. 2 and also to FIG. 1. FIG. 2 is a diagram illustrating different images captured by the wafer defect analysis apparatus 100 according to the embodiment of FIG. 1 at different focus positions. As shown at the top of FIG. 2, the stage 111 can first be moved to position the imaging mechanism 120 relative to the imaging area on the wafer W1. The height adjustment mechanism 140 then moves the imaging mechanism 120 to find a focus position that can clearly focus on the surface of the wafer W1. This focus position can be defined and recorded as the surface position P1 of the wafer W1. In particular, when the imaging mechanism 120 is in focus, the captured image is clear, and defect D1 on the surface of the wafer W1 can be clearly seen. Note that whether or not there is clear focus can be determined by the processor 150 analyzing the image. The processor 150 may be, for example, a central processor (CPU), a digital signal processor (DSP), a microprocessor (MPU), a microcontroller (MCU), etc., and the processor 150 can be programmed to achieve specific functions.

[0028] The height adjustment mechanism 140 can continuously move the imaging mechanism 120 downward along the vertical direction Z, i.e., toward the wafer W1. Meanwhile, as described above, the imaging mechanism 120 is modular and has a fixed focus that moves downward accordingly, so that different focus positions can be generated within the range of the vertical direction Z in the imaging area. In this way, the imaging mechanism 120 can continuously capture images of the wafer W1 at different focus positions. In the embodiment of FIG. 1, the imaging mechanism 120 may automatically capture an image every time the height adjustment mechanism 140 moves a set distance, thereby recording the correspondence between the focus position and the image.

[0029] Since defect D1 extends in the horizontal direction X and the vertical direction Z, when defect D1 is not visible or is barely visible in an image corresponding to a certain focus position (for example, focus position P2), it indicates that defect D1 does not extend further downward and ends.

[0030] Typically, as shown in FIG. 2, an image contains multiple defects D1. The depths H1 of the defects D1 are not necessarily the same; some are deep and others are shallow. Therefore, if the focus position is further downward, only the deeper defects D1 will be captured, resulting in fewer defects D1 being visible in the image. The processor 150 can calculate the average gray level for the entire image. Because the defects D1 are dark, a large number of defects D1 will result in a darker image and a lower average gray level, as shown at surface position P1. In this case, the average gray level may be, for example, 64. Conversely, a small number of defects D1, as shown at focus position P2, will result in a brighter image and a higher average gray level, as shown at focus position P2. In this case, the average gray level may be, for example, 240. Therefore, in this embodiment, the status of the defects D1 can be confirmed by setting a threshold value (between 220 and 255, for example, 240). When the number of defects D1 decreases and the average gradation value becomes equal to or greater than the threshold value, it is indicated and recorded that there are no defects D1 at this focal position (i.e., focal position P2), or that the presence of defects D1 no longer affects reliability or performance. Because the imaging mechanism 120 is moved by the height adjustment mechanism 140, its movement distance can be determined, and the value of this focal position (i.e., focal position P2) in the vertical direction Z can be determined, as can the value of the surface position P1 in the vertical direction Z. The difference between these two values ​​can be calculated, and the depth H1 in the vertical direction Z of the deepest defect D1 in this imaging area can be obtained. Multiple imaging areas can be set on the wafer W1, and the depth H1 within these imaging areas with the largest depth can be considered the depth H1 of the defect D1 on the wafer W1. This can be used to determine whether a subsequent wafer W1 needs to be subjected to a polishing process and the polishing depth in the polishing process.

[0031] 2, the height adjustment mechanism 140 moves the imaging mechanism 120 to find a focal position where the pattern layer 170 can be clearly focused, and the processor 150 can define this focal position as the bottom surface position P3 of the wafer W1. In some cases, after the bottom surface position P3 is first found, the imaging mechanism 120 is moved to the surface position P1, and the difference between the bottom surface position P3 and the surface position P1 is first calculated to determine whether it matches the thickness of the wafer W1, thereby initially confirming whether the wafer defect analysis apparatus 100 is normal, but this is not limited to this.

[0032] Please refer to Fig. 3. Fig. 3 shows a block flowchart of a wafer defect analysis method S200 according to another embodiment of the present invention. The wafer defect analysis method S200 includes an illumination step S210 and a defect depth analysis step S240. Details of the wafer defect analysis method S200 will be described later with reference to the wafer defect analysis apparatus 100 of Figs. 1 and 2.

[0033] In the illumination step S210, the wafer W1 is placed on the light source 130, and infrared light emitted from the light source 130 passes through the wafer W1.

[0034] In the defect depth analysis process S240, the motor 141 of the height adjustment mechanism 140 drives the imaging mechanism 120 to move it along the vertical direction Z toward the wafer W1, causing the imaging mechanism 120 to capture multiple images of the imaging area on the wafer W1 at multiple focal positions, and the imaging mechanism 120 includes a camera 121, a gain element 122, a filter element 123 and a microscope objective lens 124, arranged in that order along the vertical direction Z, and the processor 150 confirms the depth H1 of the defect D1 in the imaging area based on the multiple focal positions and the multiple images.

[0035] Specifically, the wafer defect analysis method S200 may further include a surface position confirmation step S230 in which motor 141 drives imaging mechanism 120 to capture an image of the surface of wafer W1, finds a focal position corresponding to the surface, and confirms surface position P1 of wafer W1. Thereafter, in defect depth analysis step S240, surface position P1 can be used as a calculation reference point, and when the average gray level value of defect D1 in one of the multiple images is equal to or greater than a threshold, processor 150 can obtain the numerical difference between the focal position (focal position P2) corresponding to the one image and surface position P1 as depth H1 of defect D1.

[0036] As described above, the height adjustment mechanism 140 can move the imaging mechanism 120 in the vertical direction Z, thereby continuously changing the focal position and forming different focal positions on the wafer W1. That is, the imaging mechanism 120 can move in the vertical direction Z1 to focus at different focal positions, and clear images can be captured at these focal positions. In this way, the processor 150 can accurately recognize the defect D1 from the clear image, determine whether the defect D1 is present in the image, and obtain the average gray level of the image. In this way, the depth H1 of the defect D1 can be obtained from the distance the height adjustment mechanism 140 moves, i.e., the numerical difference in the vertical direction Z between the focal position (e.g., focal position P2) and the surface position P1.

[0037] The wafer defect analysis method S200 may further include a bottom position confirmation step S220 in which the pattern layer 170 is placed between the bottom surface of the wafer W1 and the light source 130, and the motor 141 drives the imaging mechanism 120 to capture an image of the pattern layer 170, and the focal position corresponding to the pattern layer 170 is found to confirm the bottom position P3 of the wafer W1. In this way, as described above, the thickness of the wafer W1 can be calculated from the difference in the vertical direction Z between the bottom position P3 and the surface position P1, and compared with the known thickness of the wafer W1 to confirm whether all elements are operating normally.

[0038] The present invention has been disclosed in the above examples, but the above examples are not intended to limit the present invention, and anyone skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be determined based on that defined by the appended claims. [Explanation of symbols]

[0039] 100: Wafer defect analysis equipment 110: Horizontal movement mechanism 111: Stage 112: Horizontal slide rail 120: Imaging mechanism 121: Camera 122: Gain element 123: Filter element 124: Microscope objective lens 130: Light source 140: Height adjustment mechanism 141: Motor 142: Vertical slide rail 143: Controller 150: Processor 160: Bass 161: Workbench 162: Stand 170: Pattern layer D1: Defect H1: Depth L1, L2: Ray of light P1: Surface position P2: Focus position P3: Bottom position S200: Wafer defect analysis method S210: Lighting process S220: Bottom position confirmation process S230: Surface position confirmation process S240: Defect depth analysis process W1: wafer X: horizontal direction Z: Vertical

Claims

1. a light source for placing the wafer and emitting infrared light; an imaging mechanism including a camera directed at the light source and for imaging the wafer, a microscope objective lens positioned between the camera and the light source, a filter element positioned between the camera and the microscope objective lens, and a gain element positioned between the camera and the filter element; a height adjustment mechanism connected to the imaging mechanism and including a motor; a processor signally connected to the imaging mechanism; Equipped with The height adjustment mechanism moves the imaging mechanism to move it vertically, and the imaging mechanism takes multiple images of the imaging area on the wafer at multiple focal positions, and after the images of the wafer are taken, they are received and analyzed by the processor, and the processor confirms the depth of defects in the imaging area based on the multiple focal positions and the multiple images.

2. 2. The wafer defect analysis device according to claim 1, wherein the wavelength of the infrared light is in the range of 1100 nm to 1500 nm.

3. 2. The wafer defect analysis device according to claim 1, wherein the motor has a high-precision stepping motor structure.

4. 10. The apparatus for analyzing wafer defects according to claim 1, further comprising a pattern layer positioned between the light source and the wafer.

5. 2. The wafer defect analysis device according to claim 1, wherein the filter element has a pinhole slit plate structure.

6. an illumination step in which the wafer is placed on a light source and infrared light emitted from the light source is transmitted through the wafer; a defect depth analysis step in which a motor of the height adjustment mechanism drives an imaging mechanism to move the imaging mechanism toward the wafer along a vertical direction, causing the imaging mechanism to capture a plurality of images of an imaging area on the wafer at a plurality of focal positions, the imaging mechanism including a camera, a gain element, a filter element, and a microscope objective lens arranged in this order along the vertical direction, and a processor confirms the depth of defects in the imaging area based on the plurality of focal positions and the plurality of images; A method for analyzing wafer defects, comprising:

7. 7. The wafer defect analysis method according to claim 6, further comprising a surface position confirmation step in which the motor drives the imaging mechanism to capture an image of the surface of the wafer, finds the focal position corresponding to the surface, and confirms the surface position of the wafer.

8. 8. The wafer defect analysis method according to claim 7, wherein the defect depth analysis step uses the surface position as a calculation reference point, and when the average gradation value of one of the plurality of images is equal to or greater than a threshold, the processor acquires the numerical difference between the focal position and the surface position corresponding to the one image as the depth of the defect.

9. 7. The wafer defect analysis method according to claim 6, further comprising a bottom surface position confirmation step of placing a pattern layer between the bottom surface of the wafer and the light source, the motor driving the imaging mechanism to capture an image of the pattern layer, finding the focal position corresponding to the pattern layer, and confirming the bottom surface position of the wafer.

10. 7. The wafer defect analysis method according to claim 6, wherein the motor has a high-precision stepping motor structure.

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