Substrate transport method and semiconductor manufacturing system

Abstract

To provide a technique capable of enhancing placement accuracy of a substrate relative to a stage while improving conveyance efficiency of the substrate.SOLUTION: A semiconductor manufacturing system includes: a plurality of transfer modules; a pass module; and one or more process modules. In a substrate transfer method, a transfer robot is controlled to transfer a substrate from one of a plurality of transfer modules to a process module connected to the other transfer module via the path module. In the substrate transfer method, when a plurality of substrates are transferred, it is determined whether to perform one-by-one correction in which positions of the plurality of substrates are corrected one by one and placed relative to a plurality of stages of the path module or to perform average correction in which an average value of the positions of the plurality of substrates is obtained and the plurality of substrates are collectively placed relative to the plurality of stages.SELECTED DRAWING: Figure 10

Description

[Technical Field]

[0001] The present disclosure relates to a substrate transport method and a semiconductor manufacturing system. [Background technology]

[0002] Patent Document 1 discloses a substrate processing system (semiconductor manufacturing system) in which a transfer device transfers multiple substrates collectively and places each substrate on multiple placement units provided in a processing chamber. In this type of semiconductor manufacturing system, when multiple substrates are placed on each of multiple placement units (stages), each substrate must be transferred while taking into consideration its relative position with respect to each stage. Therefore, if the substrates held by the transfer robot are misaligned, a correction process is performed to correct the position of each substrate by moving the transfer robot horizontally when placing each substrate on each stage. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-61472 A Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure provides a technique that can improve the substrate transport efficiency while increasing the accuracy of placing a substrate on a stage. [Means for solving the problem]

[0005] According to one aspect of the present disclosure, there is provided a substrate transport method for transporting a plurality of substrates, the method comprising: a plurality of transport modules each equipped with a transport robot for transporting the plurality of substrates; a path module installed between the plurality of transport modules; and one or more process modules connected to each of the plurality of transport modules and performing substrate processing on the plurality of substrates transported by the transport module, the substrate transport method including controlling the transport robot to transport the substrate from one of the plurality of transport modules via the path module to a process module connected to the other of the plurality of transport modules, and determining, when carrying the plurality of substrates into the path module, whether to perform individual substrate correction, in which the positions of the plurality of substrates are corrected and placed on the plurality of stages of the path module one by one, or to perform average correction, in which the positions of the plurality of substrates are averaged and the plurality of substrates are placed collectively on the plurality of stages. A method for transporting a substrate is provided. [Effects of the Invention]

[0006] According to one aspect, it is possible to improve the substrate placement accuracy on the stage while improving the substrate transport efficiency. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a plan view schematically illustrating a semiconductor manufacturing system according to an embodiment. [Figure 2] FIG. 2 is a perspective view illustrating a transfer robot provided in a transfer module of a semiconductor manufacturing system. [Figure 3] FIG. 10 is a cross-sectional view schematically showing an operation of correcting each wafer by a transfer robot. [Figure 4] 10A and 10B are cross-sectional views schematically showing another operation of the transfer robot for correcting each wafer. [Figure 5] 10A and 10B are cross-sectional views schematically showing an average correction operation by a transfer robot. [Figure 6]FIG. 10 is a plan view illustrating an example of a transfer path when a first substrate processing and a second substrate processing are performed. [Figure 7] 1 is a diagram showing a first substrate processing, a second substrate processing, and a path pattern between these processings. [Figure 8] FIG. 10 is a block diagram showing the functional parts of the control device when transferring a substrate between a first substrate processing and a second substrate processing. [Figure 9] 1 is a flowchart illustrating a substrate transport method according to an embodiment. [Figure 10] 10 is a flowchart showing the correction determination processing method of FIG. 9. [Figure 11] 10 is a flowchart illustrating a substrate transport method according to another embodiment. [Figure 12] 12 is a flowchart showing the correction determination processing method of FIG. 11. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and redundant explanations may be omitted.

[0009] 1, a semiconductor manufacturing system 1 according to one embodiment is configured as a multi-chamber system having multiple process modules PM. The semiconductor manufacturing system 1 is used in one process of semiconductor manufacturing, and transports substrates to a predetermined process module PM using a transport module TM, where appropriate substrate processing is performed within the process module PM.

[0010] Examples of substrates that are subjected to substrate processing include silicon semiconductor wafers, compound semiconductor wafers, and oxide semiconductor wafers (hereinafter, the substrates are also referred to as wafers W). The wafers W may have recess patterns such as trenches and vias. Examples of substrate processing performed by the process modules PM include film formation processing, etching processing, ashing processing, and cleaning processing.

[0011] The semiconductor manufacturing system 1 transfers the wafer W from an atmospheric atmosphere to a vacuum atmosphere and transfers the wafer W from the vacuum atmosphere to the atmospheric atmosphere in order to perform substrate processing on the wafer W in a vacuum atmosphere. Specifically, the semiconductor manufacturing system 1 includes a front module FM (e.g., an Equipment Front End Module (EFEM)) and a load lock module LLM. The semiconductor manufacturing system 1 also includes a control device 80 that controls the operation of the entire system.

[0012] The front module FM has multiple load ports 11, a series of loaders 12 adjacent to each load port 11, and an atmospheric transfer device (not shown) provided to the loader 12. Each load port 11 is set with a FOUP (Front Opening Unified Pod) containing a wafer W that has been subjected to a previous process, or an empty FOUP. The atmospheric transfer device removes the wafer W from the FOUP set in each load port 11 and transfers the wafer W into the load lock module LLM via the clean space in the loader 12. The atmospheric transfer device also removes the wafer W from the load lock module LLM and places the wafer W into the FOUP via the clean space in the loader 12.

[0013] The load lock module LLM is provided between the front module FM and the transfer module TM. The load lock module LLM has a load lock container 21 that can be switched between an atmospheric atmosphere and a vacuum atmosphere. A gate 22 equipped with a valve (not shown) that airtightly closes the load lock container 21 is provided between the load lock module LLM and the front module FM. Furthermore, a gate 23 equipped with a valve (not shown) that airtightly closes the load lock container 21 is provided between the load lock module LLM and the transfer module TM.

[0014] The load-lock container 21 accommodates a wafer W transferred from the front module FM in an atmospheric atmosphere and then depressurizes the atmosphere to a vacuum, thereby enabling the wafer W to be transferred to the transfer module TM. The load-lock container 21 accommodates a wafer W transferred from the transfer module TM in a vacuum atmosphere and then increases the pressure to an atmospheric atmosphere, thereby enabling the wafer W to be transferred to the front module FM. The load-lock container 21 may be configured such that a space for transfer from the front module FM to the transfer module TM and a space for transfer from the transfer module TM to the front module FM are separated in the up-down direction (vertical direction).

[0015] The load lock module LLM according to this embodiment also includes multiple (two) stages 24 inside the load lock container 21 (each in the loading space and the unloading space), each capable of loading two wafers W separately. The two stages 24 are arranged side by side along the long side of the load lock module LLM. This allows each stage 24 to simultaneously hold two wafers W by a transfer robot 32 of a transfer module TM, which will be described later. While FIG. 1 illustrates a semiconductor manufacturing system 1 that simultaneously transfers two wafers W, the semiconductor manufacturing system 1 may also be configured to simultaneously transfer three or more wafers W. The load lock module LLM may have as many stages 24 as the number of wafers W to be transferred.

[0016] The transfer module TM and the multiple process modules PM transfer and perform substrate processing on the wafer W in a vacuum atmosphere. The semiconductor manufacturing system 1 according to this embodiment includes multiple (two) areas each consisting of the transfer module TM and the multiple process modules PM. This is because substrate processing is performed on the wafer W in each area (i.e., multiple rounds of substrate processing). Hereinafter, with regard to multiple rounds of substrate processing, the first processing performed on an unprocessed wafer W is referred to as the first substrate processing, and the processing performed on the wafer W after the first substrate processing is referred to as the second substrate processing.

[0017] Specifically, the multiple regions of the semiconductor manufacturing system 1 include a front processing region FA provided adjacent to the load lock module LLM and a rear processing region FB provided adjacent to the front processing region FA. The rear processing region FB is provided on the opposite side of the load lock module LLM across the front processing region FA.

[0018] The front processing area FA includes a first transfer module TM1, which is one of the multiple transfer modules TM, and a first process module PM1 and a second process module PM2 connected to the first transfer module TM1. Meanwhile, the rear processing area FB includes a second transfer module TM2, which is the other of the multiple transfer modules TM, and fourth to sixth process modules PM4, PM5, and PM6 connected to the second transfer module TM2. The semiconductor manufacturing system 1 also includes a path module PASM between the front processing area FA and the rear processing area FB, on which a wafer W can be temporarily placed. The wafer W is transported from the front processing area FA to the rear processing area FB, and from the rear processing area FB to the front processing area FA, via the path module PASM. Note that in FIG. 1, a path module PASM is connected instead of the third process module that should be connected to the first transfer module TM1, and the semiconductor manufacturing system 1 does not include a third process module.

[0019] Each transfer module TM (first transfer module TM1 and second transfer module TM2) includes a transfer container 31 that can be depressurized to a vacuum atmosphere, and a transfer robot 32 installed in the transfer container 31. Hereinafter, the transfer robot 32 installed in the first transfer module TM1 will also be referred to as the first transfer robot 32A, and the transfer robot 32 installed in the second transfer module TM2 will also be referred to as the second transfer robot 32B.

[0020] The transfer container 31 is formed into a rectangular box in a plan view. A load lock module LLM, a pass module PASM, and multiple process modules PM are installed on each side of the transfer container 31. The transfer robot 32 is configured to be movable horizontally and vertically within the transfer container 31 and to be rotatable by θ in the horizontal direction. In addition, the transfer robot 32 has a bifurcated end effector that directly contacts the wafers W in order to hold multiple (two) wafers W collectively.

[0021] 2, the transfer robot 32 is further provided with two transfer arms to enable exchange of two wafers W with respect to the load lock module LLM, the pass module PASM, and the process module PM (functioning as a transfer arm for loading and unloading). Specifically, the transfer robot 32 has a base 321, a first transfer arm 322 and a second transfer arm 325 supported by the base 321, and a support shaft 328 that raises and lowers the base 321.

[0022] The first transfer arm 322 includes a base link 322a rotatably supported on the base 321, an intermediate link 322b rotatably supported on the base link 322a, and a first end effector 323 rotatably supported on the intermediate link 322b. The first end effector 323 is bifurcated from a support portion of the intermediate link 322b, and includes a pair of extending ends each having a first fork 324 for holding a wafer W. The first fork 324 supports the wafer W and is further bifurcated to allow lift pins 45 (see FIG. 3(B)), which will be described later, to pass through.

[0023] Similarly, the second transfer arm 325 also includes a base link 325a rotatably supported on the base 321, an intermediate link 325b rotatably supported on the base link 325a, and a second end effector 326 rotatably supported on the intermediate link 325b. The second end effector 326 also branches into two from the support portion of the intermediate link 325b, and includes second forks 327 at each of a pair of extended ends that hold the wafer W. The second fork 327 also supports the wafer W and is further bifurcated to allow the lift pins 45 to pass through.

[0024] The support shaft 328 extends vertically, and its lower end is connected to a lifting mechanism (not shown). The lifting mechanism raises and lowers the support shaft 328 under the control of the controller 80, thereby raising and lowering the wafer W supported by the first transfer arm 322 or the second transfer arm 325.

[0025] The transfer robot 32 configured as described above can operate the first transfer arm 322 and the second transfer arm 325 independently of each other. Therefore, for example, while two wafers W are held by the second end effector 326, the first transfer arm 322 can enter the process module PM to receive the two wafers W from the process module PM. Furthermore, after receiving the two wafers W from the process module PM, the second transfer arm 325 can enter the process module PM to transfer the two wafers W from the second end effector 326.

[0026] Returning to FIG. 1 , the pass module PASM provided between the first transfer module TM1 and the second transfer module TM2 has a pass container 41 connected to each transfer container 31. A gate 42 equipped with a valve (not shown) for airtightly closing the pass container 41 is provided between the pass module PASM and the first transfer module TM1. A gate 43 equipped with a valve (not shown) for airtightly closing the pass container 41 is provided between the pass module PASM and the second transfer module TM2. The semiconductor manufacturing system 1 may be configured such that the two transfer containers 31 and the pass container 41 communicate with each other without providing the gates 42 and 43. The pass container 41 may be configured such that a space for transferring the wafer W from the first transfer module TM1 to the second transfer module TM2 and a space for transferring the wafer W from the second transfer module TM2 to the first transfer module TM1 are separated in the up-down direction (vertical direction).

[0027] The pass module PASM is provided with a plurality of (two) stages 44 inside the pass container 41, on which two wafers W can be separately placed. The two stages 44 are arranged side by side along the long side of the pass module PASM. This allows each stage 44 to receive two wafers W from the transfer robot 32 and deliver two wafers W to the transfer robot 32. As with the load lock module LLM, the pass module PASM is not limited in the number of stages 44 provided, and it is sufficient to provide the same number of stages 44 as the number of wafers W to be transferred. The pass module PASM may be provided with a detector inside the pass container 41 that detects the storage state of the wafers W (whether or not they are stored, etc.). Information from the detector can be used for processing by the control device 80.

[0028] On the other hand, two of the process modules PM are connected to the first transfer module TM1, and three are connected to the second transfer module TM2. That is, the semiconductor manufacturing system 1 according to this embodiment includes five process modules PM.

[0029] The first process module PM1 and the second process module PM2 are connected to the first transfer module TM1 in a direction perpendicular to the direction in which the load lock module LLM and the pass module PASM are aligned. The fourth process module PM4 and the fifth process module PM5 are connected to the second transfer module TM2 in a direction perpendicular to the direction in which the pass module PASM and the second transfer module TM2 are aligned. The sixth process module PM6 is disposed on the opposite side of the second transfer module TM2 from the pass module PASM (in the direction in which the pass module PASM and the second transfer module TM2 are aligned).

[0030] Each process module PM has a processing vessel 51 that accommodates a wafer W therein and performs substrate processing. The processing vessel 51 is formed in a substantially rectangular shape in a plan view. Between the transfer vessel 31 and each processing vessel 51, a gate 52 is provided that communicates with the spaces between them and allows the wafer W to pass through. A valve (not shown) that opens and closes the processing vessel 51 is installed inside each gate 52.

[0031] Each process module PM is provided with a plurality of (two) stages 54 inside the processing vessel 51, each capable of separately placing two wafers W thereon. The two stages 54 are arranged side by side along the long side of each process module PM. This allows each stage 54 to receive two wafers W from the transfer robot 32 and transfer two wafers W to the transfer robot 32. The number of stages 54 installed in the process module PM is not limited, and the number of stages 54 may be the same as the number of wafers W to be transferred. The processing vessel 51 may be configured such that the multiple stages 54 are arranged in a common internal space, or such that the internal spaces of each of the multiple stages 54 are isolated from each other, as long as each wafer W can be loaded and unloaded through the gate 52.

[0032] The substrate processing performed by each process module PM may be any of the above-mentioned film formation processes, etching processes, ashing processes, cleaning processes, etc. However, at least the first and second process modules PM1 and PM2 constituting the front processing area FA perform the same substrate processing. Similarly, at least the fourth to sixth process modules PM4, PM5, and PM6 constituting the back processing area FB perform the same substrate processing. The semiconductor manufacturing system 1 may be configured so that the first and second process modules PM1 and PM2 and the fourth to sixth process modules PM4, PM5, and PM6 all perform the same substrate processing.

[0033] The semiconductor manufacturing system 1 also includes a position detector 33 located adjacent to each process module PM (gate 52) in each transfer module TM, which detects the positions of two wafers W transferred by the transfer robot 32. The position detector 33 has, for example, two light-shielding sensors (not shown) for the transfer path of one wafer W. When two wafers W held by the transfer robot 32 are transferred from the transfer container 31 to the processing container 51, each light-shielding sensor detects the edge of the opposing wafer W. This makes it possible to detect the position of the wafer W on the transfer robot 32 (the relative position of the wafer W with respect to the transfer robot 32). In other words, each position detector 33 can detect the amount of deviation of the position of each wafer W actually held by the transfer robot 32 with respect to the reference holding position of the transfer robot 32. The position detector 33 is communicably connected to the control device 80 and transmits detection information of the wafer W detected during transfer to the control device 80.

[0034] The position detector 33 may be installed not only adjacent to each process module PM in the transfer module TM, but also adjacent to the load lock module LLM or the pass module PASM. This allows the semiconductor manufacturing system 1 to detect the position of the wafer W even when the transfer robot 32 unloads two wafers W from the load lock module LLM or the pass module PASM. The position detector 33 is not limited to being installed in the transfer module TM, and may also be installed in the process module PM.

[0035] The control device 80 of the semiconductor manufacturing system 1 may be a computer having a processor 81, memory 82, an input / output interface (not shown), electronic circuits, etc. The processor 81 is one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a circuit made up of a plurality of discrete semiconductors, etc. The memory 82 is an appropriate combination of volatile memory and non-volatile memory (e.g., a compact disc, a digital versatile disc (DVD), a hard disk, a flash memory, etc.).

[0036] The memory 82 stores programs for operating the semiconductor manufacturing system 1 and recipes such as process conditions for substrate processing. The processor 81 controls each component of the semiconductor manufacturing system 1 by reading and executing the programs from the memory 82. The semiconductor manufacturing system 1 may be configured such that a control unit (not shown) is provided for each module and the control device 80 issues commands to each control unit to control the entire system, or such that the control device 80 centrally controls the operation of each module. The control device 80 may be configured as a host computer or multiple client computers that communicate with each other via a network.

[0037] When the transfer robot 32 transfers the two wafers W, the control device 80 detects the position of each wafer W using the position detector 33 and determines the positional deviation of each wafer W relative to the transfer robot 32. If a positional deviation occurs in at least one of the two wafers W, the control device 80 performs a correction process corresponding to the positional deviation of the wafer W. Specifically, when the wafer W is placed on the stage 44 of the path module PASM or the stage 54 of the process module PM, the control device 80 adjusts the horizontal movement of the transfer robot 32 to properly place the two wafers W on each of the stages 44, 54.

[0038] Next, a correction process corresponding to the positional deviation of the wafer W when the semiconductor manufacturing system 1 transfers the wafer W will be described. Note that, although the following describes the operation when the wafer W is placed on the two stages 44 provided in the pass module PASM, the semiconductor manufacturing system 1 can also perform a similar correction process when placing the wafer W on the two stages 54 of each process module PM. Alternatively, the semiconductor manufacturing system 1 may also perform a similar correction process when placing the wafer W on the two stages 24 of the load lock module LLM.

[0039] As shown in FIG. 3, the first end effector 323 of the transfer robot 32 enters the pass container 41 while holding two wafers W and moves the wafers W onto two stages 44 (first stage 44A, second stage 44B). In FIG. 3, the pair of first forks 324 of the first end effector 323 holds each wafer W in a state where each wafer W is misaligned. In this case, the control device 80 performs a correction process for each wafer W, correcting the position of each wafer W when placing each wafer W on each stage 44. For example, in the correction for each wafer, first, the positional deviation of the wafer W to be placed on the first stage 44A is corrected and the wafer W is transferred to the first stage 44A, and then the positional deviation of the wafer W to be placed on the second stage 44B is corrected and the wafer W is transferred to the second stage 44B.

[0040] 3A, the control device 80 controls the transfer robot 32 to move the first end effector 323 in the horizontal direction so that the center of the wafer W coincides with the center of the first stage 44A. At this time, the control device 80 ignores the relative position of the wafer W to be placed on the second stage 44B and the second stage 44B, and prioritizes the horizontal positioning of the wafer W to be placed on the first stage 44A. As a result, a corrected state is achieved in which the center of the first stage 44A coincides with the center of the wafer W, but the center of the second stage 44B is significantly misaligned with the center of the second stage 44B.

[0041] When the wafer W has reached the corrected state on the first stage 44A side, the control device 80 raises the plurality of lift pins 45 (first lift pins 45A) housed in the first stage 44A, as shown in FIG. 3(B), to lift the wafer W above the first fork 324. That is, in the pass module PASM, the wafer W is transferred to the first stage 44A. Note that the number of lift pins 45 on each stage 44 is not particularly limited, and three or more may be provided. For convenience of illustration, two lift pins 45 are shown in FIGS. 3 to 5.

[0042] 3(C), while maintaining the wafer W in a levitated state on the first stage 44A, the control device 80 moves the first end effector 323 of the transfer robot 32 in the horizontal direction to position the wafer W to be placed on the second stage 44B. This results in a corrected state in which the center of the second stage 44B and the center of the wafer W are aligned. At this time, the wafer W held by the first lift pins 45A on the first stage 44A does not move in the horizontal direction. Therefore, the positional deviation of the wafer W is corrected on both the first stage 44A and the second stage 44B.

[0043] 3(D), the control device 80 raises the plurality of lift pins 45 (second lift pins 45B) housed in the second stage 44B, thereby floating the wafer W above the first fork 324. As a result, the wafer W is transferred to the second stage 44B within the pass module PASM. Thereafter, the control device 80 causes the transfer robot 32 to retract from the pass module PASM, and after the retraction, lowers the first lift pins 45A and the second lift pins 45B, thereby placing the wafer W on each of the first stage 44A and the second stage 44B. Each wafer W is supported by each stage 44 with its position accurately corrected relative to the corresponding stage 44.

[0044] Note that the correction for each wafer is not limited to the method exemplified in Fig. 3, and other procedures are also possible for individually correcting the positions of multiple wafers W. For example, as shown in Fig. 4, in the correction for each wafer, the positional deviation of each wafer W can be corrected by providing steps in the first lift pins 45A and the second lift pins 45B.

[0045] 4(A), the first end effector 323 is moved horizontally so that the center of the wafer W on the stage 44 on which the lift pins 45 protrude most (first stage 44A) coincides with the center of the stage 44. As a result, a corrected state is achieved in which the center of the first stage 44A and the center of the wafer W coincide, but the center of the second stage 44B is significantly misaligned with respect to the center of the second stage 44B.

[0046] 4B, the controller 80 lowers the transfer robot 32 so that the first lift pins 45A hold the wafer W and separate the wafer W from the first fork 324. As a result, the wafer W is transferred to the first stage 44A in the pass module PASM.

[0047] 4(C), while maintaining the wafer W in a levitated state on the first stage 44A, the control device 80 moves the first end effector 323 of the transfer robot 32 in the horizontal direction to position the wafer W to be placed on the second stage 44B. This results in a corrected state in which the center of the second stage 44B and the center of the wafer W coincide with each other. At this time, the wafer W held by the first lift pins 45A on the first stage 44A does not move in the horizontal direction.

[0048] 4(D), the controller 80 further lowers the transfer robot 32, thereby holding the wafer W on the second lift pins 45B and separating the wafer W above the first fork 324. That is, in the pass module PASM, the wafer W is transferred to the second stage 44B. Therefore, the controller 80 causes the transfer robot 32 to retract horizontally from the pass module PASM, and after the retraction, lowers the first lift pins 45A and the second lift pins 45B, thereby placing the wafer W on each of the first stage 44A and the second stage 44B. Even in this case, each wafer W is supported by each stage 44 with its position accurately corrected relative to the corresponding stage 44.

[0049] Here, the above-described individual wafer correction involves sliding each of the multiple wafers W to adjust their horizontal positions. Therefore, in the individual wafer correction, it takes time to place each wafer W on each stage 44. For this reason, the semiconductor manufacturing system 1 is capable of performing average correction in the correction process, in which the average value of the positions of two wafers W is calculated and each wafer W is placed collectively (simultaneously) on each stage 44, as shown in FIG. 5 . In this case, although potential positional misalignment of the wafers W with respect to each stage 44 is not resolved, each wafer W can be quickly placed on each stage 44.

[0050] Specifically, the control device 80 calculates an intermediate position between the position (e.g., center position) of the wafer W to be placed on the first stage 44A and the position (e.g., center position) of the wafer W to be placed on the second stage 44B. Then, as shown in FIG. 5(A), the control device 80 moves the first end effector 323 in the horizontal direction so that the calculated intermediate position coincides with the intermediate position between the first stage 44A and the second stage 44B. As a result, the center of the wafer W is slightly shifted from the center of the first stage 44A, and the center of the wafer W is shifted by the same amount from the center of the second stage 44B. However, each wafer W is shifted to an extent that it can be placed on its respective stage 44.

[0051] Therefore, as shown in FIG. 5B, the control device 80 raises the plurality of lift pins 45 of each stage 44. When each lift pin 45 contacts each wafer W, it simultaneously lifts each wafer W from the pair of first forks 324. As a result, within the pass module PASM, the wafer W is transferred to the first stage 44A and the second stage 44B. Therefore, the control device 80 causes the transfer robot 32 to retract horizontally from the pass module PASM, and after the retraction, lowers each of the first lift pins 45A and each of the second lift pins 45B, thereby placing the wafer W on each of the first stage 44A and the second stage 44B. As a result, each wafer W is quickly positioned relative to each stage 44.

[0052] As described above, there are advantages and disadvantages to both the individual wafer correction and the average correction. While the individual wafer correction allows each wafer W to be placed accurately on each stage 44, it takes time for the placement operation. While the average correction shortens the time required to place each wafer W on each stage 44, there remains a potential for misalignment of each wafer W relative to each stage 44.

[0053] 1 performs two substrate processing operations, one in the front processing area FA and the other in the rear processing area FB, as described above. Each wafer W is transferred from the load lock module LLM, processed in two process modules PM, and then placed in various modules multiple times before returning to the load lock module LLM. An example of the transfer path of each wafer W during substrate processing in the semiconductor manufacturing system 1 will be described with reference to FIG. 6. FIG. 6 is a plan view illustrating the transfer path of two wafers W in the semiconductor manufacturing system 1.

[0054] When performing substrate processing on wafers W, the semiconductor manufacturing system 1 uses the atmospheric transfer device in the loader 12 to remove the wafers W from the FOUP set in the load port 11 of the front module FM and place the wafers W on each stage 24 of the load lock module LLM. Furthermore, the semiconductor manufacturing system 1 depressurizes the load lock container 21 from the atmospheric atmosphere to a vacuum atmosphere. After depressurization, the semiconductor manufacturing system 1 uses the first transfer robot 32A of the first transfer module TM1 to remove each unprocessed wafer W from the load lock container 21.

[0055] Before the first substrate processing, the first transfer robot 32A transfers the unprocessed wafers W taken out from the load lock module LLM into, for example, the first process module PM1 through the transfer container 31 of the first transfer module TM1. During this transfer, the first transfer robot 32A places each wafer W on each stage 54 of the first process module PM1. After placement, the first process module PM1 performs the first substrate processing on each unprocessed wafer W.

[0056] When the first substrate processing is completed, the semiconductor manufacturing system 1 causes the first transfer robot 32A to unload the wafers W after the first substrate processing from the first process module PM1 and load them into the pass module PASM via the first transfer module TM1. During this loading, the first transfer robot 32A places each wafer W on each stage 44 of the pass module PASM.

[0057] After this placement, the semiconductor manufacturing system 1 uses the second transfer robot 32B to unload the wafers W after the first substrate processing from the path module PASM and load them into the fourth process module PM4 via the second transfer module TM2. During this loading, the second transfer robot 32B places each wafer W on each stage 54 of the fourth process module PM4. After loading, the fourth process module PM4 performs second substrate processing on each wafer W after the first substrate processing.

[0058] After the second substrate processing, the semiconductor manufacturing system 1 uses the second transfer robot 32B to unload each wafer W after the second substrate processing from the second transfer module TM2 and load it into the pass module PASM via the second transfer module TM2. During this loading, the second transfer robot 32B places each wafer W on each stage 44 of the pass module PASM. Furthermore, the semiconductor manufacturing system 1 uses the first transfer robot 32A to unload each wafer W after the second substrate processing from the pass module PASM and load it into the load lock module LLM via the first transfer module TM1. During this loading, the first transfer robot 32A places each wafer W on each stage 24 of the load lock module LLM.

[0059] 6 illustrates an example in which the first substrate processing is performed in the first process module PM1 and the second substrate processing is performed in the fourth process module PM4, but it goes without saying that the semiconductor manufacturing system 1 is not limited to this procedure. There are multiple patterns for the process modules PM for the first and second substrate processing, as shown in the table in FIG. 7. That is, the second process module PM2 can be used in place of the first process module PM1, and the fifth process module PM5 and the sixth process module PM6 can be used in place of the fourth process module PM4.

[0060] 7, patterns 1-1 to 1-6 indicate that the first substrate processing is performed in the front processing area FA and the second substrate processing is performed in the rear processing area FB. In this case, after the first substrate processing in the front processing area FA, the semiconductor manufacturing system 1 transfers the wafer W in this order through the first transfer module TM1, the path module PASM, and the second transfer module TM2, and performs the second substrate processing in the rear processing area FB.

[0061] 7, patterns 2-1 to 2-6 indicate a pattern in which the first substrate processing is performed in the rear processing area FB and the second substrate processing is performed in the front processing area FA. In this case, after the first substrate processing in the rear processing area FB, the semiconductor manufacturing system 1 transfers the wafer W in this order through the second transfer module TM2, the path module PASM, and the first transfer module TM1, and performs the second substrate processing in the front processing area FA.

[0062] Here, the positional deviation of each wafer W occurs during the substrate processing (first substrate processing, second substrate processing). For example, during the first substrate processing, the wafer W placed on the stage 54 may be affected by heat, air currents, and the like during the substrate processing, and may be shifted in position in the horizontal direction relative to the mounting surface of the stage 54.

[0063] If a wafer W after the first substrate processing is transferred to another process module PM for second substrate processing while the misalignment remains, problems such as unevenness during processing, resulting in poor substrate processing, or further misalignment of the wafer W, making it impossible to retrieve the wafer, may occur. Therefore, if a wafer W is misaligned during the first substrate processing, the semiconductor manufacturing system 1 performs a correction process corresponding to the misalignment of the wafer W during transfer between the first and second substrate processing. In particular, the semiconductor manufacturing system 1 can eliminate the misalignment of each wafer W by performing correction for each wafer W, enabling each wafer W to be accurately placed on each stage 54 of the process module PM for the second substrate processing. As a result, the semiconductor manufacturing system 1 can perform the second substrate processing well and suppress the misalignment of the wafer W during the second substrate processing.

[0064] 7, during the transfer between the first substrate processing and the second substrate processing, there is an operation of placing each wafer W into the path module PASM, and an operation of unloading each wafer W from the path module PASM and placing each wafer W into a predetermined process module PM. By performing the individual correction only once during these two operations, the semiconductor manufacturing system 1 can achieve both efficient transfer of each wafer W and accurate placement of each wafer W on each stage 54. For example, in patterns 1-1 to 1-6 in FIG. 7, the individual correction is performed either when the first transfer robot 32A places each wafer W into the path module PASM or when the second transfer robot 32B places each wafer W into each process module PM in the rear processing region FB. In addition, in the patterns 2-1 to 2-6 in Figure 7, correction is performed for each wafer W either when the second transport robot 32B places each wafer W in the pass module PASM, or when the first transport robot 32A in the front processing area FA places each wafer W in each process module PM.

[0065] The control device 80 controls the transfer between the first substrate processing and the second substrate processing to perform correction for each wafer at an appropriate timing. For this reason, the processor 81 executes the program in the memory 82, and functional blocks for appropriately transferring the wafers W are constructed inside the control device 80 as shown in FIG.

[0066] For example, the control device 80 includes a position acquisition unit 91, a position deviation determination unit 92, a status acquisition unit 93, a time acquisition unit 94, a correction content setting unit 95, a first transport robot control unit 96, and a second transport robot control unit 97.

[0067] The position acquisition unit 91 acquires position detection information of the wafer W detected by each position detector 33 of the transfer module TM when each wafer is transferred out of the process module PM by the transfer robot 32. The position acquisition unit 91 stores the position detection information in the memory 82 and outputs it to the position deviation determination unit 92.

[0068] The positional deviation determination unit 92 determines the positional deviation of each wafer W relative to the transfer robot 32 based on the position detection information acquired by the position acquisition unit 91. For example, the positional deviation determination unit 92 has a threshold value for determining the amount of positional deviation obtained by subtracting reference position information from the position detection information, and determines that the wafer W is misaligned when the amount of positional deviation is equal to or greater than the threshold value, while determining that the wafer W is not misaligned when the amount of positional deviation is less than the threshold value.

[0069] As described above, the positional deviation of the wafer W occurs due to the substrate processing in each process module PM. Therefore, the positional deviation determination unit 92 determines the positional deviation of each wafer W when removing the wafer W from the process module PM after the substrate processing. If any one of the wafers W is misaligned, the positional deviation determination unit 92 determines that a correction process is required during transfer between the first substrate processing and the second substrate processing.

[0070] The status acquisition unit 93 acquires status information of the wafer W from each module (load lock module LLM, pass module PASM, process module PM) when performing correction processing based on the determination of the positional deviation determination unit 92. For example, the status information of the wafer W may include whether or not a wafer W is accommodated in each module, whether or not an unprocessed wafer W is being transferred to the load lock module LLM, and whether or not the substrate is currently being processed or has already been processed in the process module PM. The status acquisition unit 93 stores the acquired status information of the wafer W in each module in the memory 82 and outputs it to the correction content setting unit 95.

[0071] The time acquisition unit 94 acquires information on the remaining time for the currently performed substrate processing of the wafer W from each process module PM. This remaining time for the substrate processing is used to determine the timing (including the location) for performing the correction for each wafer. The time acquisition unit 94 stores the acquired information on the remaining time for the substrate processing of each process module PM in the memory 82 and outputs it to the correction content setting unit 95.

[0072] The correction content setting unit 95 determines the timing of performing correction for each substrate when performing correction processing, and sets operation contents for the first transport robot 32A and the second transport robot 32B between the first substrate processing and the second substrate processing. For example, the correction content setting unit 95 includes a determination unit 95a and an addition period calculation unit 95b.

[0073] The determination unit 95a determines the timing to perform the one-by-one correction based on the state information of the wafer W in each module acquired by the state acquisition unit 93 and the remaining period of substrate processing in each process module PM acquired by the time acquisition unit 94. In this determination, the addition period calculation unit 95b calculates the addition period by adding up multiple periods required for the determination by the determination unit 95a. The processing by the determination unit 95a and the addition period calculation unit 95b will be described in detail later in the description of the processing flow.

[0074] The first transfer robot control unit 96 controls the operation of the first transfer robot 32A. The first transfer robot control unit 96 has an individual-substrate correction control unit 96a that controls the individual-substrate correction and an average correction control unit 96b that controls the operation of the average correction.

[0075] The second transfer robot control unit 97 controls the operation of the second transfer robot 32B. This second transfer robot control unit 97 also has an individual-substrate correction control unit 97a that controls the individual-substrate correction and an average correction control unit 97b that controls the operation of the average correction.

[0076] The semiconductor manufacturing system 1 according to this embodiment is basically configured as described above, and its operation (substrate transfer method) will be described below. Note that the following will be exemplified by the case where two wafers W are transferred along the transfer path shown in FIG.

[0077] Before the first substrate processing, as described above, the control device 80 of the semiconductor manufacturing system 1 controls the operation of the first transfer module TM1 to transfer two wafers W from the load lock module LLM to the first process module PM1. After this transfer, the semiconductor manufacturing system 1 performs the first substrate processing in the first process module PM1.

[0078] 9 to transfer two wafers W between the first substrate processing and the second substrate processing. Specifically, during the first substrate processing, the controller 80 continuously acquires status information of the first process module PM1 and the remaining time of the first substrate processing using the status acquisition unit 93 and the time acquisition unit 94. When the first substrate processing is nearing completion, the controller 80 operates the first transfer robot 32A under the control of the first transfer robot control unit 96 to remove the two unprocessed wafers W to be processed next from the load lock module LLM (step S1).

[0079] After the first substrate processing in the first process module PM1 is completed, the control device 80 controls the first transport robot 32A and the first process module PM1 in cooperation with each other to receive the two wafers W after the first substrate processing from the first process module PM1 (step S2).

[0080] Thereafter, the first transfer robot control unit 96 operates the first transfer robot 32A to transfer each wafer W after the first substrate processing into the first transfer module TM1 (step S3). In addition, the controller 80 operates the first transfer robot 32A and the first process module PM1 to transfer each unprocessed wafer W removed in step S1 into the first process module PM1 and deliver each unprocessed wafer W to each stage 54. Thereafter, the first process module PM1 starts substrate processing on each unprocessed wafer W placed on each stage 54.

[0081] Then, while the semiconductor manufacturing system 1 is removing each wafer W after the first substrate processing, the position detector 33 of the first transfer module TM1 detects the position of each wafer W relative to the first transfer robot 32A. At this time, the position acquisition unit 91 of the control device 80 acquires position detection information from the position detector 33 and determines whether one or both of the wafers W are misaligned by a predetermined amount or more from the first transfer robot 32A (e.g., the first fork 324) (step S4). If at least one of the wafers W is misaligned (step S4: YES), the control device 80 determines whether to perform correction processing to correct the misalignment of each wafer W, and proceeds to step S5. On the other hand, if neither of the wafers W is misaligned (step S4: NO), the control device 80 determines not to perform correction processing for the misalignment, and proceeds to step S6, skipping step S5.

[0082] When performing the positional deviation correction process, the control device 80 performs a correction determination method for determining the timing and location of correction for each wafer W during transfer of each wafer W after the first substrate processing (step S5).

[0083] In the correction determination method, the control device 80 first checks the status of the front processing area FA. Specifically, as shown in FIG. 10, the correction content setting unit 95 compares the remaining time until the substrate processing currently being performed in the second process module PM2 in the front processing area FA is completed with the added time required for multiple operations performed by the first transfer robot 32A (step S11). The time required for multiple operations includes a pass placement period, a return period, and a removal period. The "pass placement period" refers to the time required for each wafer W held by the first transfer robot 32A after the first substrate processing to be placed in the pass module PASM. The "return period" refers to the time required for each wafer W held in the pass module PASM after the second substrate processing to be returned to the load lock module LLM. Note that if there are no wafers W in the pass module PASM, the return period is zero. The "removal period" refers to the time required for each unprocessed wafer W to be removed from the load lock module LLM and transferred to the second process module PM2. The added period calculation unit 95b of the correction content setting unit 95 calculates an added period by adding together the pass placement period, return period, and take-out period.

[0084] At this time, the addition period calculation unit 95b calculates the addition period by adding the path placement period when the first transport robot 32A performs the correction for each substrate in the path module PASM. Specifically, the control device 80 stores correction period data D (=path placement period), which is the time length when the correction for each substrate is performed, in advance in the correction storage area 98 of the memory 82. When calculating the addition period, the addition period calculation unit 95b reads out the correction period data D from the correction storage area 98 and uses it as the path placement period.

[0085] The determination unit 95a compares the remaining period with the calculated addition period to determine whether there is room for one-by-one correction in the front processing area FA. If the remaining period is shorter than the addition period (step S11: YES), the determination unit 95a determines (confirms) that one-by-one correction will not be performed when the first transfer robot 32A places each wafer W in the path module PASM (step S12). In other words, if the remaining period is shorter than the addition period, it can be said that there is not much time (no room) in the front processing area FA because the next wafer W in the front processing area FA will be processed early.

[0086] In this case, the correction content setting unit 95 commands the first transfer robot control unit 96 to perform average correction. As a result, the first transfer robot control unit 96 performs average correction when the first transfer robot 32A places each wafer W in the pass module PASM. Then, the correction content setting unit 95 commands the second transfer robot control unit 97 to perform correction for each wafer. As a result, the second transfer robot control unit 97 performs correction for each wafer W when the second transfer robot 32B places each wafer W in any of the fourth to sixth process modules PM4, PM5, and PM6.

[0087] On the other hand, if the remaining period is equal to or greater than the addition period (step S11: NO), it is considered that there is enough time to perform the wafer-by-wafer correction when each wafer W is transferred from the first transfer module TM1 to the path module PASM. Therefore, the correction content setting unit 95 then checks the status of the second transfer module TM2 based on the status information acquired by the status acquisition unit 93. First, the determination unit 95a determines whether there is an empty process module PM among the fourth to sixth process modules PM4, PM5, and PM6 that is not currently processing a wafer W (step S13). If there is an empty process module PM among the fourth to sixth process modules PM4, PM5, and PM6 (step S13: YES), the process proceeds to step S14. If there is no empty process module PM (step S13: NO), the process proceeds to step S15. Note that the presence of an empty process module among the fourth to sixth process modules PM4, PM5, and PM6 includes a state in which each processed wafer W can be removed. This prevents each processed wafer W from remaining in the process module PM for a long period of time.

[0088] In step S14, the determination unit 95a determines that the first transfer robot 32A will perform the wafer-by-wafer correction when placing each wafer W in the path module PASM. That is, if there is an empty process module PM, performing the wafer-by-wafer correction in either the first transfer module TM1 or the second transfer module TM2 will be rate-determining for the empty process module PM. Therefore, the wafer-by-wafer correction is performed in the first transfer module TM1, which is confirmed to have a surplus.

[0089] On the other hand, if there are no available spaces in the fourth to sixth process modules PM4, PM5, and PM6, another determination is made in step S15. Specifically, the correction content setting unit 95 compares the remaining substrate processing time (re-determination remaining time) of the process module PM that finishes substrate processing earliest among the process modules PM in the rear processing region FB with the added time (re-determination added time) required for the operations of the first transfer robot 32A and the second transfer robot 32B. The operation time of the first transfer robot 32A includes a first pass loading time during which the first transfer robot 32A loads the wafer W after the first substrate processing onto the path module PASM. The operation time of the second transfer robot 32B includes a second pass loading time during which the second transfer robot 32B loads the wafer W previously held by the second transfer robot 32B onto the path module PASM, and a transfer time during which the second transfer robot 32B transports the wafer W after the first substrate processing placed onto the path module PASM. When there is no wafer W on the second transfer robot 32B, the second pass placement period is zero.

[0090] The addition period calculation unit 95b calculates a redetermination addition period by adding the first-pass placement period, second-pass placement period, and transfer period when the first transfer robot 32A performs the one-by-one correction in the path module PASM. The determination unit 95a compares the redetermination remaining period of the process module PM with the calculated redetermination addition period. If the redetermination remaining period is shorter than the redetermination addition period (step S15: YES), the determination unit 95a proceeds to step S14 and determines that the first transfer robot 32A will perform one-by-one correction when placing each wafer W in the path module PASM. If the redetermination remaining period of the process module PM with the fastest substrate processing is shorter, the one-by-one correction will be rate-determining whether it is performed in the first transfer module TM1 or the second transfer module TM2. Therefore, the one-by-one correction is performed in the first transfer module TM1, which is confirmed to have sufficient margin.

[0091] On the other hand, if the redetermination remaining period for the process module PM with the fastest substrate processing time is equal to or greater than the redetermination remaining period (step S15: NO), the second transfer module TM2 determines to perform one-by-one correction (step S16). In this case, performing one-by-one correction when placing the wafer W after the first substrate processing in the process module PM in the rear processing region FB, where the workload is small, improves the overall efficiency (throughput) of the apparatus. Specifically, the first transfer robot 32A selectively transfers wafers from the load lock module LLM to each process module PM, from each process module PM to the path module PASM, and from the path module PASM to the load lock module LLM. Meanwhile, the second transfer robot 32B selectively transfers wafers from the path module PASM to each process module PM, and from each process module PM to the path module PASM. Therefore, in the semiconductor manufacturing system 1, when comparing the workload of the first transfer robot 32A in the front processing region FA with the workload of the second transfer robot 32B in the rear processing region FB, the workload of the first transfer robot 32A is greater. Therefore, by performing correction for each wafer in the rear processing area FB where the workload is small, the first transport robot 32A can easily move on to the next operation, improving the efficiency of the entire system.

[0092] Returning to FIG. 9, after the above correction determination process (step S5), the first transfer robot control unit 96 transfers each wafer W after the first substrate processing toward the path module PASM in accordance with the determination results of the correction determination process (step S6). If it is determined that the first transfer module TM1 should perform the correction for each wafer W, the first transfer robot control unit 96 performs the correction for each wafer W when the first transfer robot 32A places the wafer W in the path module PASM. On the other hand, if it is determined that the first transfer module TM1 should not perform the correction for each wafer W, the first transfer robot control unit 96 performs the average correction when the first transfer robot 32A places the wafer W in the path module PASM. Note that if step S5 is skipped, a placement operation without correction (which is essentially the same as the average correction) is performed.

[0093] Thereafter, the second transfer robot control unit 97 transfers each wafer W after the first substrate processing placed in the path module PASM toward the process module PM selected in the correction determination process (step S7). At this time, if correction has been performed on each wafer W in the first transfer module TM1, no positional deviation has occurred in each wafer W relative to each stage 44. Therefore, when the second transfer module TM2 transfers each wafer W after the first substrate processing into the process module PM, the controller 80 can place the wafer W on the stage 54 without performing any correction. At this time, the second transfer robot 32B can essentially perform average correction and immediately place each wafer W on each stage 44.

[0094] On the other hand, when the first transfer module TM1 performs the average correction, the controller 80 performs the correction for each wafer W after the first substrate processing when the second transfer module TM2 carries the wafer W into the process module PM. This allows the process module PM to perform the second substrate processing well for each wafer W that has been accurately placed on each stage 54.

[0095] The substrate transfer method (including the correction determination method) according to this embodiment is not limited to the above embodiment and may take various forms. For example, in the above substrate transfer method, an example has been described in which the first substrate processing is performed in the front processing region FA and the second substrate processing is performed in the rear processing region FB. However, the substrate transfer method may also be such that the first substrate processing is performed in the rear processing region FB and the second substrate processing is performed in the front processing region FA. Next, this substrate processing method according to another embodiment will be described with reference to FIGS. 11 and 12. In the following, an example will be described in which the fourth process module PM4 in the rear processing region FB is used for the first substrate processing.

[0096] During the first substrate processing, the control device 80 of the semiconductor manufacturing system 1 continuously acquires status information of the fourth process module PM4 and the remaining time for the first substrate processing using the status acquisition unit 93 and the time acquisition unit 94. Then, when the first substrate processing is nearing completion, the control device 80 operates the second transfer robot 32B under the control of the second transfer robot control unit 97 to remove the two unprocessed wafers W to be processed next from the pass module PASM (step S21).

[0097] After the first substrate processing in the fourth process module PM4 is completed, the control device 80 controls the second transfer robot 32B and the fourth process module PM4 in cooperation with each other to receive each wafer W after the first substrate processing in the fourth process module PM4 (step S22).

[0098] Thereafter, the second transfer robot control unit 97 operates the second transfer robot 32B to transfer each wafer W after the first substrate processing into the second transfer module TM2 (step S23). In addition, the controller 80 operates the second transfer robot 32B and the fourth process module PM4 to transfer each unprocessed wafer W removed in step S21 into the fourth process module PM4 and deliver each unprocessed wafer W to each stage 54. Thereafter, the fourth process module PM4 starts substrate processing on each unprocessed wafer W placed on each stage 54.

[0099] Then, while the semiconductor manufacturing system 1 is removing each wafer W after the first substrate processing, the position detector 33 of the second transfer module TM2 detects the position of each wafer W relative to the first transfer robot 32A. At this time, the position acquisition unit 91 of the control device 80 acquires position detection information from the position detector 33 and determines whether one or both of the wafers W are misaligned by a predetermined amount or more from the second transfer robot 32B (step S24). If at least one of the wafers W is misaligned (step S24: YES), the control device 80 determines whether to perform correction processing to correct the misalignment of each wafer W, and proceeds to step S25. On the other hand, if neither of the wafers W is misaligned (step S24: NO), the control device 80 determines not to perform correction processing for the misalignment, and proceeds to step S26, skipping step S25.

[0100] When performing the misalignment correction process, the control device 80 performs a correction determination method for determining the timing and location of correction for each wafer W during transfer of each wafer W after the first substrate processing (step S25).

[0101] As shown in FIG. 12, in the correction determination method, the correction content setting unit 95 first checks the status of the rear processing region FB. The correction content setting unit 95 compares the remaining time of the process module PM that finishes substrate processing earliest after the fifth process module PM5 and the sixth process module PM6 with the added time required for multiple operations performed by the second transfer robot 32B (step S31). The multiple operations include a path placement time and a removal time. The "path placement time" refers to the time required for each wafer W held by the second transfer robot 32B after the first substrate processing to be placed in the path module PASM. The "removal time" refers to the time required for each unprocessed wafer W to be removed from the path module PASM and transported to the fifth process module PM5 or the sixth process module PM6. Note that if there are no wafers W in the path module PASM, the removal time is zero. The added time calculation unit 95b of the correction content setting unit 95 calculates the added time by adding together the path placement time and the removal time. At this time, the addition period calculation unit 95b reads out the correction period data D (=path placement period) stored in the correction memory area 98, and calculates the addition period by adding the path placement period when the second transport robot 32B performs one-by-one correction in the path module PASM.

[0102] The determination unit 95a compares the remaining period with the calculated addition period to determine whether there is room for one-by-one correction in the rear processing region FB. If the comparison shows that the remaining period is shorter than the addition period (step S31: YES), the determination unit 95a determines (confirms) that one-by-one correction will not be performed when the second transfer robot 32B places each wafer W in the path module PASM (step S32). In other words, when the remaining period is shorter than the addition period, it can be said that there is not much time (no room) in the rear processing region FB because the next wafer W in the rear processing region FB will be processed early.

[0103] In this case, the correction content setting unit 95 commands the second transfer robot control unit 97 to perform average correction. As a result, the second transfer robot control unit 97 performs average correction when the second transfer robot 32B places each wafer W in the pass module PASM. Then, the correction content setting unit 95 commands the first transfer robot control unit 96 to perform correction for each wafer. As a result, the first transfer robot control unit 96 performs correction for each wafer W when the first transfer robot 32A places each wafer W in either the first or second process module PM1, PM2.

[0104] On the other hand, if the remaining period is equal to or greater than the addition period (step S31: NO), it is considered that there is enough time to perform individual wafer correction when transferring each wafer W from the second transfer module TM2 to the path module PASM. Therefore, the correction content setting unit 95 then checks the status of the second transfer module TM2 based on the status information acquired by the status acquisition unit 93. First, the determination unit 95a determines whether there is an empty process module PM in the first or second process module PM1, PM2 that is not currently processing a wafer W (step S33). If there is an empty process module PM in the first or second process module PM1, PM2 (step S33: YES), the process proceeds to step S34. If there is no empty process module PM (step S33: NO), the process proceeds to step S35. Note that the presence of an empty first or second process module PM1, PM2 includes a state in which each processed wafer W can be removed. This prevents each processed wafer W from remaining in the process module PM for a long period of time.

[0105] In step S34, the determination unit 95a determines that the second transfer robot 32B performs the wafer-by-wafer correction when placing each wafer W in the path module PASM. That is, whether the first transfer module TM1 or the second transfer module TM2 performs the wafer-by-wafer correction is rate-determining for the empty process module PM. Therefore, the second transfer module TM2, which is confirmed to have a surplus, performs the wafer-by-wafer correction.

[0106] On the other hand, if there is no available space in the first or second process module PM1, PM2, another determination is made in step S35. Specifically, the correction content setting unit 95 compares the remaining substrate processing time (re-determination remaining time) of the process module PM that finishes substrate processing earliest among the process modules PM in the front processing area FA with the added time (re-determination added time) required for the operation of the first transfer robot 32A and the operation of the second transfer robot 32B. The operation period of the second transfer robot 32B includes a pass placement period during which the second transfer robot 32B places the wafer W after the first substrate processing in the pass module PASM. The operation period of the first transfer robot 32A includes a load lock placement period during which the previously held wafer W is placed in the load lock module LLM, and a transfer period during which the first transfer robot 32A transfers the wafer W after the first substrate processing placed in the pass module PASM. Note that if there are no wafers W in the first transfer robot 32A, the load lock placement period is zero. Furthermore, the addition period calculation unit 95b calculates the redetermination addition period by adding the path placement period when the second transfer robot 32B performs the one-by-one correction in the path module PASM to the load lock placement period and the transfer period.

[0107] In step S35, the determination unit 95a compares the redetermination remaining period of the process module PM with the fastest substrate processing time and the redetermination addition period. If the redetermination remaining period is shorter than the redetermination addition period (step S35: YES), the determination unit 95a proceeds to step S34 and determines that the second transfer robot 32B will perform the wafer-by-wafer correction when placing each wafer W on the path module PASM. If the remaining period of the process module PM with the fastest substrate processing time is shorter, performing the wafer-by-wafer correction in either the first transfer module TM1 or the second transfer module TM2 will be rate-determining. Therefore, the wafer-by-wafer correction is performed in the second transfer module TM2, which is confirmed to have sufficient margin.

[0108] On the other hand, if the remaining redetermination period of the process module PM in which the substrate processing is fastest is equal to or greater than the redetermination addition period (step S35: NO), it is determined that the one-by-one correction is to be performed in the first transfer module TM1 (step S36). In this case, the efficiency of the system is improved by performing the one-by-one correction when the wafer W after the first substrate processing is placed in the process module PM.

[0109] 11, after the above correction determination process (step S25), the second transfer robot control unit 97 transfers the wafer W after the first substrate processing toward the path module PASM in accordance with the determination results of the correction determination process (step S26). If it is determined that the second transfer module TM2 should perform the correction for each wafer, the second transfer robot control unit 97 performs the correction for each wafer when the second transfer robot 32B places each wafer W in the path module PASM. On the other hand, if it is determined that the second transfer module TM2 should not perform the correction for each wafer, the second transfer robot control unit 97 performs the average correction when the second transfer robot 32B places each wafer W in the path module PASM. Note that if step S25 is skipped, a placement operation without correction (which is essentially the same as the average correction) is performed.

[0110] Thereafter, the second transfer robot control unit 97 transfers each wafer W after the first substrate processing placed in the path module PASM toward the process module PM selected in the correction determination process (step S27). At this time, if correction has been performed on each wafer W in the second transfer module TM2, no positional deviation has occurred in each wafer W relative to each stage 44. Therefore, when the first transfer module TM1 transfers each wafer W after the first substrate processing into the process module PM, the control device 80 can place the wafer W on the stage 54 without performing any correction. At this time, the first transfer robot 32A can essentially perform average correction and immediately place each wafer W on each stage 44.

[0111] On the other hand, when the average correction is performed in the second transfer module TM2, the control device 80 performs the correction for each wafer W after the first substrate processing when the first transfer module TM1 carries the wafer W into the process module PM. This allows the process module PM to perform the second substrate processing well for each wafer W that has been accurately placed on each stage 54.

[0112] The semiconductor manufacturing system 1 is not limited to the above embodiment and may take various modifications. For example, in the above embodiment, the semiconductor manufacturing system 1 has been described as having two processing regions and two transfer modules TM, but the semiconductor manufacturing system 1 may be configured with three or more processing regions and three or more transfer modules TM. Even in this case, by performing a determination similar to that in the substrate transfer method described above, it is possible to appropriately achieve both improved substrate transfer efficiency and improved substrate placement accuracy. Furthermore, for example, although the semiconductor manufacturing system 1 has been described as having multiple process modules PM in each processing region, it may also be configured as having one process module PM.

[0113] If there is a positional misalignment in each wafer W that is removed from the process module PM after the second substrate processing, the semiconductor manufacturing system 1 may perform a one-by-one correction or an average correction when placing each wafer W on each stage 24 of the load lock module LLM.

[0114] The technical ideas and effects of the present disclosure explained in the above embodiments will be described below.

[0115] A first aspect of the present disclosure is a substrate transport method for transporting a plurality of substrates (wafers W), comprising a plurality of transport modules TM each equipped with a transport robot 32 for transporting the plurality of substrates, a path module PASM installed between the plurality of transport modules TM, and one or more process modules PM connected to each of the plurality of transport modules TM and performing substrate processing on the plurality of substrates transported by the transport module TM, wherein the substrate transport method controls the transport robot 32 to transport a substrate from one of the plurality of transport modules TM via the path module PASM to a process module PM connected to the other of the plurality of transport modules TM, and determines, when loading the plurality of substrates into the path module PASM, whether to perform a one-by-one correction in which the positions of the plurality of substrates are corrected and placed one by one on the plurality of stages 44 of the path module PASM, or an average correction in which the positions of the plurality of substrates are averaged and the plurality of substrates are placed all at once on the plurality of stages 44.

[0116] The above-described substrate transfer method can perform individual substrate position correction at appropriate timing when transferring multiple substrates (wafers W) to multiple transfer modules TM and process modules PM via the path module PASM. Therefore, the substrate processing method can improve the substrate transfer efficiency while also increasing the substrate placement accuracy on the stages 44, 54.

[0117] Furthermore, the determination of the individual substrate correction and the average correction is made by comparing the remaining period until the process module PM finishes substrate processing in the transfer module TM in which the transfer robot 32 holding the substrate (wafer W) is located with an added period obtained by adding the periods required for multiple operations of the transfer robot 32, including the period in which the transfer robot 32 holding the substrate performs the individual substrate correction and places the substrate in the pass module PASM, and if the remaining period is shorter than the added period, it is determined that there is not enough margin for the individual substrate correction by the transfer robot 32 holding the substrate, and if the remaining period is equal to or greater than the added period, it is determined that there is enough margin for the individual substrate correction by the transfer robot 32 holding the substrate. This makes it possible for the substrate transfer method to determine the margin of the transfer module TM in which the substrate is located, and to properly determine the individual substrate correction and the average correction according to the determined margin.

[0118] Furthermore, the period required for the multiple operations of the transfer robot 32 includes a period in which the transfer robot 32 holding the substrate (wafer W) performs correction for each substrate and places the substrate in the pass module PASM, a period in which the substrate in the pass module PASM is transferred to another module (load lock module LLM), and a period in which the substrate in another module is transferred to the process module PM. This makes it possible for the substrate transfer method to make a determination that takes into account the period of the operation performed by the transfer robot 32 in the transfer module TM in which the transfer robot 32 holding the substrate is located, and to accurately determine the margin of the transfer module TM.

[0119] Furthermore, if it is determined that there is not enough margin for the individual substrate correction by the transfer robot 32 holding the substrate (wafer W), an average correction is performed when multiple substrates are placed in the pass module PASM, and the transfer module TM, which is next transferred via the pass module PASM, is set to perform the individual substrate correction when placing multiple substrates inside the process module PM. This allows the transfer robot 32 holding the substrate to place the substrate in the pass module PASM in a short time. This allows the transfer module TM to efficiently transition to the next operation.

[0120] Furthermore, when it is determined that there is room for the one-by-one correction by the transfer robot 32 holding the substrate (wafer W), it is further determined whether there is space in one or more process modules PM connected to the transfer module TM to be transferred next via the pass module PASM. This makes it possible for the substrate transfer method to select in detail the timing of the one-by-one correction during substrate transfer according to the status of the process module PM of the transfer module TM to be transferred next.

[0121] Furthermore, when one or more process modules PM are available, a setting is made to perform correction for each substrate when multiple substrates (wafers W) are placed in the pass module PASM. This allows the substrate processing method to correct positional deviations of the substrates before the next transfer module TM to which they are transferred, and allows the substrates to be placed in the subsequent process module PM in a short time and with high accuracy.

[0122] Furthermore, when one or more process modules PM are not available, the remaining redetermination period for substrate processing in one or more process modules PM connected to the transfer module TM to be transferred next via the path module PASM is compared with a redetermination addition period obtained by adding the period required for the transfer robot 32 holding the substrate (wafer W) to perform a single-substrate correction and place the substrate on the path module PASM to the period required for multiple operations of the transfer module TM to be transferred next, and if the remaining redetermination period is shorter than the redetermination addition period, it is determined that a single-substrate correction should be performed by the transfer robot 32 holding the substrate, and if the remaining redetermination period is equal to or longer than the redetermination addition period, it is determined that an average correction should be performed by the transfer robot 32 holding the substrate. This allows the substrate processing method to perform single-substrate correction at an even more appropriate timing.

[0123] Furthermore, the period required for the multiple operations of the transfer module TM to be transferred next includes the period during which the substrate (wafer W) held by the transfer robot 32 of the transfer module TM to be transferred next is placed on the path module PASM, and the period during which the transfer robot 32 of the transfer module TM to be transferred next transports the substrate placed on the path module PASM. This makes it possible for the substrate processing method to make a determination that takes into account the period of the operations performed by the transfer robot 32 of the transfer module TM to be transferred next, and to more appropriately set the timing for performing the correction for each substrate.

[0124] Furthermore, when the transfer robot 32 holds multiple substrates (wafers W) and transfers them from the process module PM to the transfer module TM, the positions of the multiple substrates relative to the transfer robot 32 are detected, and if the position of at least one of the multiple substrates is deviated by a predetermined amount or more, a determination is made as to whether individual correction or average correction is necessary, and the multiple substrates are transferred based on the determination result. Thus, in the substrate processing method, if a substrate is misaligned by the transfer robot 32, an immediate determination is made as to whether individual correction or average correction is necessary, and the substrates can be transferred successfully.

[0125] Another aspect of the present disclosure is a semiconductor manufacturing system 1 for transporting multiple substrates (wafers W), including multiple transfer modules TM each equipped with a transfer robot 32 for transporting the multiple substrates, a path module PASM installed between the multiple transfer modules TM, one or more process modules PM connected to each of the multiple transfer modules TM for performing substrate processing on the multiple substrates transported by the transfer module TM, and a control device 80 that controls the transfer robot 32 to transport a substrate from one of the multiple transfer modules TM via the path module PASM to the process module PM of the other transfer module TM, wherein the control device 80 determines, when transporting the multiple substrates into the path module PASM, whether to perform individual correction, in which the positions of the multiple substrates are corrected and placed on the multiple stages 44 of the path module PASM one by one, or whether to perform average correction, in which the positions of the multiple substrates are averaged and the multiple substrates are placed collectively on the multiple stages 44. Even in this case, the semiconductor manufacturing system 1 can improve the substrate transport efficiency while also improving the placement accuracy of the substrates on the stages 44, 54.

[0126] The substrate transfer method and semiconductor manufacturing system 1 according to the presently disclosed embodiments are illustrative in all respects and not restrictive. The embodiments may be modified and improved in various ways without departing from the spirit and scope of the appended claims. The matters described in the above-described embodiments may be configured in other ways and may be combined together without any inconsistency. [Explanation of symbols]

[0127] 1. Semiconductor manufacturing systems 32 Transport robot Stages 44 and 54 80 Control device PM Process Module PASM Path Module TM Transfer Module W wafer

Claims

1. A substrate transport method for transporting a plurality of substrates, comprising: a plurality of transfer modules each including a transfer robot for transferring a plurality of the substrates; a pass module installed between the plurality of transfer modules; one or more process modules connected to each of the plurality of transfer modules and performing substrate processing on the plurality of substrates transferred by the transfer modules; The substrate transport method includes: In a case where the transport robot is controlled to transport the substrate from one of the plurality of transport modules to the process module connected to the other of the plurality of transport modules via the path module, When carrying the plurality of substrates into the pass module, a determination is made as to whether to perform an individual correction in which the positions of the plurality of substrates are corrected one by one on the plurality of stages of the pass module and placed thereon, or whether to perform an average correction in which the positions of the plurality of substrates are averaged on the plurality of stages and the plurality of substrates are placed collectively. Substrate transport method.

2. The determination of the per-image correction and the average correction is performed by: comparing a remaining period until the process module finishes substrate processing in the transfer module where the transfer robot holding the substrate is located with a total period obtained by adding together periods required for a plurality of operations of the transfer robot, including a period for the transfer robot holding the substrate to perform the one-by-one correction and place the substrate in the pass module; When the remaining period is shorter than the addition period, it is determined that there is no margin for the substrate-by-substrate correction by the transport robot holding the substrate; If the remaining period is equal to or greater than the additional period, it is determined that there is a margin for the substrate-by-substrate correction by the transport robot holding the substrate. The substrate transfer method according to claim 1 .

3. the period required for the plurality of operations of the transport robot includes a period during which the transport robot holding the substrate performs the one-by-one correction and places the substrate in the pass module, a period during which the substrate in the pass module is transported to another module, and a period during which the substrate in the other module is transported to the process module. The substrate transport method according to claim 2 .

4. when it is determined that there is not enough margin for the individual substrate correction by the transport robot holding the substrate, the average correction is performed when the plurality of substrates are placed on the pass module, and the individual substrate correction is set to be performed when the plurality of substrates are placed inside the process module in the transport module that is next transported via the pass module.

4. The substrate transport method according to claim 2 or 3.

5. when it is determined that there is room for the one-by-one correction by the transport robot holding the substrate, it is further determined whether there is a vacancy in one or more of the process modules connected to the transport module to which the substrate is next transported via the path module. The substrate transport method according to any one of claims 2 to 4.

6. When one or more of the process modules are available, the correction for each substrate is set to be performed when the plurality of substrates are placed in the pass module. The substrate transport method according to claim 5 .

7. when there is no vacancy in one or more of the process modules, comparing a remaining redetermination period for substrate processing in one or more of the process modules connected to the transport module to be transported next via the path module with a redetermination addition period obtained by adding a period for a plurality of operations of the transport module to be transported next and a period for the transport robot holding the substrate to perform the one-by-one correction and place the substrate on the path module; When the remaining redetermination period is shorter than the redetermination addition period, the correction for each substrate performed by the transport robot holding the substrate is determined; determining the average correction by the transport robot holding the substrate when the remaining redetermination period is equal to or longer than the redetermination addition period; 7. The substrate transport method according to claim 5 or 6.

8. the period required for the plurality of operations of the transport module to be transported next includes a period for placing the substrate held by the transport robot of the transport module to be transported next onto the pass module, and a period for the transport robot of the transport module to be transported next to transport the substrate placed on the pass module. The substrate transport method according to claim 7 .

9. detecting positions of the substrates relative to the transfer robot when the transfer robot carries the substrates out of the process module to the transfer module while holding the substrates; When the position of at least one of the plurality of substrates is deviated by a predetermined amount or more, a determination is made as to whether the individual substrate correction and the average correction have been performed, and the plurality of substrates are transported based on the determination result. The substrate transport method according to any one of claims 1 to 8.

10. A semiconductor manufacturing system for transporting a plurality of substrates, a plurality of transfer modules each including a transfer robot for transferring a plurality of the substrates; a pass module installed between the plurality of transfer modules; one or more process modules connected to each of the plurality of transfer modules, each process module performing substrate processing on the plurality of substrates transferred by the transfer module; a control device that controls the transfer robot to transfer the substrate from one of the plurality of transfer modules to the process module connected to the other of the plurality of transfer modules via the path module, The control device When carrying the plurality of substrates into the pass module, a determination is made as to whether to perform an individual correction in which the positions of the plurality of substrates are corrected one by one on the plurality of stages of the pass module and placed thereon, or whether to perform an average correction in which the positions of the plurality of substrates are averaged on the plurality of stages and the plurality of substrates are placed collectively. Semiconductor manufacturing systems.

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