Wiring board, mounting board including wiring board, and method of manufacturing wiring board

Abstract

To provide a wire substrate where an organic layer can be prevented from being removed.SOLUTION: A wire substrate 10 includes: a substrate 12 having a first surface 13 and a second surface 14 located on the opposite side to the side where the first surface is located and including an inorganic material; a first wire structure part 30 including a first-surface first conductive layer 31 and a first-surface first organic layer 32 located in the first surface of the substrate; and a first-surface first underlying layer 371 located between the external edge of the first-surface first organic layer and the first surface of the substrate and including a metal material. The substrate may be provided with a through-hole 20. The wire substrate is located in the through-hole and may further include a through-hole electrode 22 electrically connected to the first-surface first conductive layer.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] An embodiment of the present disclosure relates to a wiring substrate having a first wiring structure portion including at least a first-surface first conductive layer and a first-surface first organic layer located on a first surface of a substrate. The embodiment of the present disclosure also relates to a mounting substrate including the wiring substrate, and a method for manufacturing the wiring substrate. [Background technology]

[0002] A wiring board is known that includes a substrate containing an inorganic material such as glass or silicon, and a conductive layer and an organic layer laminated on the substrate. For example, Patent Document 1 discloses a wiring board, a so-called interposer, that further includes a through electrode located in a through hole of the substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-198093 Summary of the Invention [Problem to be solved by the invention]

[0004] In wiring substrates, the organic layer serves to cover and protect the conductive layer. However, the adhesion of the organic layer to a substrate containing an inorganic material is generally lower than the adhesion of the conductive layer to the substrate. Therefore, when the outer edge of the organic layer is in direct contact with the substrate, the outer edge of the organic layer is likely to peel off from the substrate, forming a gap between the organic layer and the substrate.

[0005] An object of the embodiments of the present disclosure is to provide a wiring board that can effectively solve such problems. [Means for solving the problem]

[0006] One embodiment of the present disclosure is a wiring board comprising: a substrate having a first surface and a second surface located opposite the first surface and containing an inorganic material; a first wiring structure portion located on the first surface of the substrate and including at least a first-surface first conductive layer and a first-surface first organic layer; and a first-surface first base layer located between an outer edge of the first-surface first organic layer and the first surface of the substrate and containing a metal material.

[0007] In the wiring board according to the embodiment of the present disclosure, the dimension of the first surface first foundation layer in the direction in which the outer edge of the first surface first organic layer extends is preferably 100 μm or more.

[0008] In the wiring board according to one embodiment of the present disclosure, the dimension of the portion of the first-surface first foundation layer that overlaps with the first-surface first organic layer in a direction perpendicular to the outer edge direction is preferably 50 μm or more and 1 mm or less.

[0009] In a wiring board according to one embodiment of the present disclosure, the dimension of the portion of the first surface first underlayer exposed from the first surface first organic layer in a direction perpendicular to the outer edge direction is preferably 50 μm or more and 1 mm or less.

[0010] In a wiring board according to one embodiment of the present disclosure, the ratio of the length of the portion of the outer edge of the first surface first organic layer that overlaps with the first surface first base layer to the total length of the outer edge of the first surface first organic layer is preferably 50% or more.

[0011] In the wiring board according to the embodiment of the present disclosure, the ratio of the thickness of the first surface first foundation layer to the thickness of the first surface first organic layer is preferably 50% or more.

[0012] In a wiring board according to one embodiment of the present disclosure, the outer edge of the first-surface first organic layer may have a polygonal outline including multiple sides, and multiple first-surface first undercoating layers may be discretely arranged along at least one of the sides of the first-surface first organic layer.

[0013] In the wiring board according to the embodiment of the present disclosure, the corner where the two sides of the first organic layer on the first surface are connected preferably has a curved shape with a curvature radius of 50 μm or more.

[0014] In a wiring board according to one embodiment of the present disclosure, a gap may exist between the lower surface of the first surface first base layer and the first surface of the substrate, and the first surface first organic layer may be located in the gap.

[0015] In the wiring board according to the embodiment of the present disclosure, the first surface first organic layer may at least partially cover the first surface first conductive layer.

[0016] In the wiring board according to the embodiment of the present disclosure, the first-surface first organic layer may be located between the first-surface first conductive layer and the first surface of the substrate.

[0017] In the wiring board according to the embodiment of the present disclosure, the first surface first foundation layer may be located inside the outer edge of the substrate.

[0018] In the wiring board according to the embodiment of the present disclosure, the first surface first foundation layer may have a plurality of layers containing a metal material.

[0019] A wiring board according to one embodiment of the present disclosure may further include a first-side second organic layer located on the first-side first organic layer, and a first-side second base layer located between the outer edge of the first-side second organic layer and the upper surface of the first-side first organic layer, the first-side second base layer containing a metal material.

[0020] In the wiring board according to the embodiment of the present disclosure, the substrate may include glass.

[0021] In a wiring board according to one embodiment of the present disclosure, the board may have a through hole, and the wiring board may further include a through electrode located in the through hole and electrically connected to the first surface first conductive layer.

[0022] A wiring substrate according to one embodiment of the present disclosure may further include a second wiring structure portion including at least a second-side first conductive layer and a second-side first organic layer located on the second side of the substrate, and a second-side first base layer located between an outer edge of the second-side first organic layer and the second side of the substrate and including a metal material.

[0023] One embodiment of the present disclosure is a mounting board including the wiring board described above and an element mounted on the wiring board.

[0024] One embodiment of the present disclosure is a method for manufacturing a wiring substrate, comprising the steps of: preparing a substrate including a first surface and a second surface located on the opposite side of the first surface; forming a first-surface first base layer containing a metal material on the first surface of the substrate; forming a first-surface first organic layer that is in partial contact with the first surface of the substrate such that an outer edge of the first-surface first organic layer is at least partially located on the first-surface first base layer; and forming a first-surface first conductive layer before forming the first-surface first organic layer or after forming the first-surface first organic layer. [Effects of the Invention]

[0025] According to the embodiment of the present disclosure, peeling of the organic layer can be suppressed. [Brief explanation of the drawings]

[0026] [Figure 1] FIG. 1 is a plan view showing a wiring substrate according to an embodiment. [Figure 2] 2 is a cross-sectional view of the wiring board of FIG. 1 as viewed from the II-II direction. [Figure 3] 3 is an enlarged cross-sectional view showing a through electrode of the wiring board of FIG. 2. FIG. [Figure 4] 3 is an enlarged cross-sectional view showing a first frame of the wiring board of FIG. 2. FIG. [Figure 5] 10A to 10C are cross-sectional views showing a manufacturing process of a wiring substrate. [Figure 6] 10A to 10C are cross-sectional views showing a manufacturing process of a wiring substrate. [Figure 7]10A to 10C are cross-sectional views showing a manufacturing process of a wiring substrate. [Figure 8] 10A to 10C are cross-sectional views showing a manufacturing process of a wiring substrate. [Figure 9A] 10A to 10C are cross-sectional views showing a manufacturing process of a wiring substrate. [Figure 9B] FIG. 9B is a plan view of the substrate in the state shown in FIG. 9A. [Figure 10A] 10A to 10C are cross-sectional views showing a manufacturing process of a wiring substrate. [Figure 10B] FIG. 10B is a plan view of the substrate in the state shown in FIG. 10A. [Figure 11] 10A to 10C are cross-sectional views showing a manufacturing process of a wiring substrate. [Figure 12] 10A to 10C are cross-sectional views showing a manufacturing process of a wiring substrate. [Figure 13] 10A to 10C are cross-sectional views showing a manufacturing process of a wiring substrate. [Figure 14] FIG. 10 is a plan view showing one manufacturing process of the wiring substrate. [Figure 15] FIG. 10 is a cross-sectional view showing a wiring board according to a first modified example. [Figure 16] FIG. 10 is a plan view showing a wiring substrate according to a second modified example. [Figure 17] FIG. 2 is a plan view showing an example of a mounting substrate including a wiring substrate and an element. [Figure 18] 1A and 1B are diagrams illustrating examples of products on which a wiring substrate is mounted. DETAILED DESCRIPTION OF THE INVENTION

[0027] The configuration of a wiring board and a manufacturing method thereof according to an embodiment of the present disclosure will be described in detail below with reference to the drawings. Note that the embodiments described below are merely examples of embodiments of the present disclosure, and the present disclosure should not be construed as being limited to these embodiments. Furthermore, in this specification, terms such as "substrate," "base material," "sheet," and "film" are not distinguished from one another solely based on differences in nomenclature. For example, "substrate" and "base material" are concepts that include components that may be called sheets or films. Furthermore, terms used in this specification that specify shape, geometric conditions, and their degrees, such as "parallel" and "orthogonal," as well as values ​​of length and angle, are not limited to their strict meanings but are interpreted to include the extent to which similar functions can be expected. In addition, in the drawings referenced in this embodiment, identical or similar symbols are used to designate identical or similarly functional parts, and repeated explanations may be omitted. Also, for convenience of explanation, the dimensional ratios in the drawings may differ from the actual ratios, and some components may be omitted from the drawings.

[0028] wiring board Hereinafter, an embodiment of the present disclosure will be described. First, a configuration of a wiring board 10 according to the present embodiment will be described. Fig. 1 is a plan view showing the wiring board 10. Fig. 2 is a cross-sectional view of the wiring board 10 of Fig. 1 as viewed from the II-II direction.

[0029] The wiring board 10 includes a substrate 12, a through electrode 22, a first wiring structure 30, a first frame 37, a second wiring structure 40, and a second frame 47. Each of the components of the wiring board 10 will be described below.

[0030] (substrate) The substrate 12 includes a first surface 13 and a second surface 14 located on the opposite side of the first surface 13. The substrate 12 also has a plurality of through holes 20 extending from the first surface 13 to the second surface 14.

[0031] The substrate 12 includes an inorganic material having a certain degree of insulating properties. For example, the substrate 12 is a glass substrate, a quartz substrate, a sapphire substrate, a resin substrate, a silicon substrate, a silicon carbide substrate, an alumina (Al2O3) substrate, an aluminum nitride (AlN) substrate, a zirconia oxide (ZrO2) substrate, or a laminate of these substrates. The substrate 12 may partially include a substrate made of a conductive material, such as an aluminum substrate or a stainless steel substrate.

[0032] An example of the glass used for the substrate 12 is alkali-free glass. Alkali-free glass is glass that does not contain alkaline components such as sodium or potassium. Alkali-free glass contains, for example, boric acid instead of an alkaline component. Alkali-free glass also contains alkaline earth metal oxides such as calcium oxide or barium oxide. Examples of alkali-free glass include EN-A1 manufactured by Asahi Glass Co., Ltd. and Eagle XG manufactured by Corning Co., Ltd. When the substrate 12 contains glass, the thickness T of the substrate 12 is, for example, 0.25 mm or more and 0.45 mm or less. When the substrate 12 contains glass, the insulating properties of the substrate 12 can be improved compared to when the substrate 12 is made of silicon.

[0033] 2, symbol S1 represents the width of through hole 20 at the position where through hole 20 is connected to first surface 13. Width S1 is, for example, 40 μm or more and 150 μm or less. Furthermore, the ratio of the length of through hole 20 to width S1 of through hole 20, i.e., the aspect ratio of through hole 20, is, for example, 4 or more and 10 or less.

[0034] The through hole 20 formed in the substrate 12 may at least partially have a shape in which the width decreases from the first surface 13 to the second surface 14 of the substrate 12. In the example shown in FIG. 2, the through hole 20 has a shape in which the width decreases from the first surface 13 and the second surface 14 of the substrate 12 to the central portion in the thickness direction of the substrate 12. As a result, the width of the through hole 20 is smallest at the central portion in the thickness direction of the substrate 12, as indicated by reference symbol S2 in FIG. 2. The "central portion" includes the central position in the thickness direction of the substrate 12, as well as the range from the central position to 0.1×T toward the first surface 13 and the range from the central position to 0.1×T toward the second surface 14. The reference symbol T represents the thickness of the substrate 12, as described above.

[0035] The cross-sectional shape of through-hole 20 is not limited to the shape shown in Fig. 2. For example, although not shown, the width of through-hole 20 may decrease from the first surface 13 side toward the second surface 14 side.

[0036] (Through electrode) 3 is an enlarged cross-sectional view of a through electrode 22 provided in a through hole 20. The through electrode 22 is a conductive member that is at least partially located inside the through hole 20. In this embodiment, the thickness of the through electrode 22 is smaller than the width of the through hole 20, and therefore there is a space inside the through hole 20 where the through electrode 22 is not present. In other words, the through electrode 22 is a so-called conformal via. The thickness of the through electrode 22 is, for example, not less than 5 μm and not more than 22 μm.

[0037] As long as the through electrode 22 is conductive, the method for forming the through electrode 22 is not particularly limited. For example, the through electrode 22 may be formed by a physical film formation method such as a vapor deposition method or a sputtering method, or may be formed by a chemical film formation method or a plating method. The through electrode 22 may be composed of a single conductive layer, or may include multiple conductive layers. Here, an example will be described in which the through electrode 22 has a first layer 221 and a second layer 222, as shown in FIG. 3. The first layer 221 and the second layer 222 each include a metal material.

[0038] The first layer 221 is a conductive layer that is at least partially located on the side wall 21 of the through hole 20. The first layer 221 is formed on the side wall 21 by a physical film formation method such as a sputtering method or a vapor deposition method, or a sol-gel method. Preferably, the first layer 221 is formed on the side wall 21 by a sputtering method. This allows the first layer 221 to be firmly adhered to the side wall 21. The thickness of the first layer 221 is, for example, not less than 0.05 μm and not more than 1.0 μm. Note that another layer may be provided between the first layer 221 and the side wall 21 of the through hole 20.

[0039] When the first layer 221 is formed by a physical film formation method, the material constituting the first layer 221 can be a metal such as titanium, chromium, nickel, copper, or an alloy using these, or a laminate of these. When the first layer 221 is formed by a sol-gel method, the material constituting the first layer 221 can be zinc oxide or the like. Note that the first layer 221 may further have, in addition to the sol-gel layer formed by the sol-gel method, an electroless plating layer containing a metal such as copper formed on the sol-gel layer by an electroless plating method.

[0040] The second layer 222 is located on the first layer 221 and is a conductive layer. The second layer 222 contains, for example, copper as a main component, more specifically, 80 mass % or more of copper. The second layer 222 may also contain metals such as gold, silver, platinum, rhodium, tin, aluminum, nickel, and chromium, or alloys using these metals. The second layer 222 is formed on the first layer 221 by electrolytic plating. The composition of the second layer 222 can be analyzed using, for example, a transmission electron microscope (TEM) or an energy dispersive X-ray spectrometer (EDS). The thickness of the second layer 222 is, for example, 5 μm or more and 20 μm or less. Note that another conductive layer may be provided between the first layer 221 and the second layer 222.

[0041] Although not shown, the wiring substrate 10 may have an organic layer located closer to the center of the through hole 20 than the through electrode 22. Note that "closer to the center" means that, inside the through hole 20, the distance between the organic layer and the side wall 21 is greater than the distance between the through electrode 22 and the side wall 21. The organic layer, like the first-surface first organic layer 32 described below, contains an organic material having a dielectric loss tangent of preferably 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less.

[0042] Although not shown, the through electrode 22 may be a filled via that fills the through hole 20. In this case, the through electrode 22 extends at least partially to the center point of the through hole 20 in the planar direction of the first surface 13.

[0043] (1st wiring structure part) Next, the first wiring structure 30 will be described. The first wiring structure 30 has layers such as conductive layers and organic layers provided on the first surface 13 side of the substrate 12 so as to form an electrical circuit on the first surface 13 side. In this embodiment, the first wiring structure 30 has a first-surface first conductive layer 31, a first-surface first organic layer 32, a first-surface second conductive layer 33, a first-surface second organic layer 34, and a first-surface third conductive layer 35.

[0044] [First surface, first conductive layer] The first-surface first conductive layer 31 is a layer containing a conductive metal material located on the first surface 13 side of the substrate 12. In the present embodiment, the first-surface first conductive layer 31 is in direct contact with the first surface 13 of the substrate 12. The first-surface first conductive layer 31 may be electrically connected to the through electrode 22. The first-surface first conductive layer 31 may be composed of a single conductive layer, or may include multiple conductive layers. For example, the first-surface first conductive layer 31 may include a first layer 221 and a second layer 222 stacked in this order on the first surface 13 of the substrate 12, similar to the through electrode 22. The first-surface first conductive layer 31 may include only some of the conductive layers of the first layer 221 and the second layer 222. The material constituting the first-surface first conductive layer 31 is the same as the material constituting the through electrode 22. The thickness of the first-surface first conductive layer 31 is, for example, 100 nm or more and 20 μm or less, and may be 5 μm or more and 20 μm or less.

[0045] [First surface, first organic layer] The first-surface first organic layer 32 is located on the first surface 13 side of the substrate 12, contains an organic material, and is an insulating layer. In this embodiment, the first-surface first organic layer 32 is disposed so as to partially cover the upper surface of the first-surface first conductive layer 31. For example, as shown in FIGS. 1 and 2, the first-surface first organic layer 32 is provided over almost the entire first surface 13 of the substrate 12, except for a region close to the outer edge of the substrate 12. For example, if the substrate 12 has a polygonal outline such as a rectangle including multiple sides, the first-surface first organic layer 32 also has a polygonal outline such as a rectangle. Furthermore, as shown in FIG. 2, an opening is formed in a portion of the first-surface first organic layer 32, located above the first-surface first conductive layer 31.

[0046] The term "upper surface" refers to the surface of a layer stacked on substrate 12 that is located farther from substrate 12. The term "lower surface" refers to the surface of a layer stacked on substrate 12 that is located closer to substrate 12, and is visible when the layer is viewed from the substrate 12 side along the normal direction to first surface 13 of substrate 12. The term "side surface" refers to a surface that extends from the lower surface to the upper surface.

[0047] Examples of the organic material for the first-surface first organic layer 32 include polyimide and epoxy. The organic material for the first-surface first organic layer 32 preferably has a dielectric loss tangent of 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less. By using an organic material with a small dielectric loss tangent to form the first-surface first organic layer 32, it is possible to prevent electrical signals that should pass through the inductor 16 (described below) and other components from passing through the first-surface first organic layer 32. This allows the bandwidth of the wiring board 10, on which components such as inductors are provided, to be broadened to the high-frequency side.

[0048] However, the adhesion of the first-side first organic layer 32 containing an organic material to the substrate 12 containing an inorganic material is generally low. Therefore, when the lower surface of the first-side first organic layer 32 is in direct contact with the first surface 13 of the substrate 12, the first-side first organic layer 32 is likely to peel off from the first surface 13 of the substrate 12. Peeling is particularly likely to occur at the outer edge of the first-side organic layer 32. To solve this problem, this embodiment proposes providing a first-side first base layer 371 containing a metal material between the outer edge of the first-side organic layer 32 and the first surface 13 of the substrate 12. The first-side first base layer 371 will be described in detail later. In this specification, the "outer edge of the first-side organic layer 32" refers to the edge that defines the outer shape of the first-side organic layer 32 when the first-side organic layer 32 is viewed along the normal direction to the first surface 13 of the substrate 12. The same applies to the outer edge of the substrate 12, the outer edge of the first-side second organic layer 34, etc.

[0049] When the outer edge of the first-surface first organic layer 32 has a polygonal outline, preferably, corners 32c where two sides of the outer edge of the first-surface first organic layer 32 are connected have a curved shape, as shown in Fig. 1. This makes it possible to prevent forces such as stress from concentrating on the corners 32c, and to prevent the corners 32c from peeling off from the first surface 13 of the substrate 12. The radius of curvature of the corners 32c is preferably 50 µm or more.

[0050] [First surface, second conductive layer] The first-surface second conductive layer 33 is a layer containing a conductive metal material located on an organic layer such as the first-surface first organic layer 32. The first-surface second conductive layer 33 constitutes, for example, wiring extending on the first-surface first organic layer 32. Although not shown, the first-surface second conductive layer 33 may be electrically connected to the through electrode 22, the first-surface first conductive layer 31, the first-surface third conductive layer 35, etc. Furthermore, the first-surface second conductive layer 33 may constitute part of a component such as a capacitor or inductor formed in the first wiring structure portion 30.

[0051] The first-surface second conductive layer 33 may include a plurality of conductive layers such as a stacked first layer 221 and a second layer 222, similar to the through electrode 22 and the first-surface first conductive layer 31. The material forming the first-surface second conductive layer 33 is similar to the material forming the through electrode 22 and the first-surface first conductive layer 31. The thickness of the first-surface second conductive layer 33 is, for example, not less than 100 nm and not more than 20 μm.

[0052] [First surface, second organic layer] The first-surface second organic layer 34 is located on the first surface 13 side, contains an organic material, and is an insulating layer. In this embodiment, the first-surface second organic layer 34 is disposed so as to partially cover the upper surface of the first-surface second conductive layer 33 located on the first-surface first organic layer 32. For example, as shown in FIGS. 1 and 2, the first-surface second organic layer 34 is provided over almost the entire upper surface of the first-surface first organic layer 32, except for a region close to the outer edge of the first-surface first organic layer 32. For example, if the first-surface first organic layer 32 has a polygonal outline such as a rectangle including multiple sides, the first-surface second organic layer 34 also has a polygonal outline such as a rectangle. Furthermore, as shown in FIG. 2, an opening located above the first-surface first conductive layer 31 may be formed in a portion of the first-surface second organic layer 34.

[0053] The organic material for the first-surface second organic layer 34 can be polyimide, epoxy, or the like, as in the first-surface first organic layer 32. The organic material for the first-surface second organic layer 34 preferably has a dielectric loss tangent of 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less.

[0054] When the outer edge of the first-surface second organic layer 34 has a polygonal outline, corners 34c where two sides of the outer edge of the first-surface second organic layer 34 are connected preferably have a curved shape, as in the case of the first-surface first organic layer 32. The radius of curvature of corners 34c is preferably 50 μm or more.

[0055] [First surface, third conductive layer] The first-surface third conductive layer 35 is a conductive layer located on an organic layer such as the first-surface second organic layer 34. The first-surface second conductive layer 33 constitutes, for example, wiring extending on the first-surface second organic layer 34. The first-surface third conductive layer 35 may be electrically connected to the through electrode 22, the first-surface first conductive layer 31, the first-surface third conductive layer 35, etc. Furthermore, the first-surface third conductive layer 35 may constitute part of a component such as a capacitor or inductor formed in the first wiring structure portion 30.

[0056] The first-surface third conductive layer 35 may include a plurality of conductive layers such as a stacked first layer 221 and a second layer 222, similar to the through electrode 22 and the first-surface first conductive layer 31. The material forming the first-surface third conductive layer 35 is similar to the material forming the through electrode 22 and the first-surface first conductive layer 31. The thickness of the first-surface third conductive layer 35 is, for example, not less than 100 nm and not more than 20 μm.

[0057] (First frame) The first frame 37 is a member for preventing peeling of the organic layer included in the first wiring-structure portion 30. The first frame 37 includes a first-surface first foundation layer 371 and a first-surface second foundation layer 372. FIG. 4 is an enlarged cross-sectional view of the first frame 37.

[0058] [First surface, first base layer] The first-surface first base layer 371 is a layer containing a metal material, located between the outer edge of the first-surface first organic layer 32 and the first surface 13 of the substrate 12. As shown in Fig. 1, the first-surface first base layer 371 extends along the outer edge direction of the first-surface first organic layer 32. In the example shown in Fig. 1, the first-surface first base layer 371 extends continuously around the entire circumference of the outer edge of the first-surface first organic layer 32.

[0059] The first-side first foundation layer 371 may be located inside the outer edge of the substrate 12. In other words, an exposed portion R where the first-side first foundation layer 371 or organic layer is not present and the first side 13 is exposed may be present between the outer edge of the first-side first foundation layer 371 and the outer edge of the substrate 12. The width g of the exposed portion R is, for example, not less than 30 μm and not more than 300 μm.

[0060] The first-surface first base layer 371 may be electrically connected to the first-surface first conductive layer 31, the through electrode 22, etc. Alternatively, the first-surface first base layer 371 may be electrically floating from other conductive layers.

[0061] As long as the first-side first foundation layer 371 includes a metal material, the layer configuration of the first-side first foundation layer 371 is not particularly limited. For example, the first-side first foundation layer 371 may include a first layer 221 and a second layer 222 stacked in this order on the first surface 13 of the substrate 12, similar to the through electrode 22. The first-side first foundation layer 371 may also include only some of the conductive layers of the first layer 221 and the second layer 222. The material constituting the first-side first foundation layer 371 is the same as the material constituting the through electrode 22.

[0062] The first-surface first base layer 371 functions to prevent the outer edge of the first-surface first organic layer 32 from peeling off. The reason for this is not particularly limited, but the following reasons are considered, for example. (Reason 1) Metal materials such as titanium, chromium, nickel, and copper adhere better to inorganic materials such as glass and silicon than organic materials adhere better to inorganic materials. Therefore, by interposing first-side first base layer 371 between the outer edge of first-side organic layer 32 and first surface 13 of substrate 12, peeling of the outer edge of first-side organic layer 32 can be prevented. (Second reason) 4, the first-side first base layer 371 is locally interposed between the outer edge of the first-side first organic layer 32 and the first surface 13 of the substrate 12. In this case, the thickness of the first-side first organic layer 32 overlapping the first-side first base layer 371 is locally smaller than the thickness of the surrounding first-side first organic layer 32, thereby improving adhesion between the first-side first organic layer 32 and the first-side first base layer 371. This makes it possible to prevent the outer edge of the first-side first organic layer 32 from peeling off. In addition, in the wiring board 10 having the first surface first base layer 371, the improved adhesion may be realized for the first reason described above, or the improved adhesion may be realized for the second reason described above, or the improved adhesion may be realized for both reasons, or the improved adhesion may be realized for some other reason.

[0063] The thickness t1 of the first-side first underlayer 371 is, for example, 100 nm or more and 20 μm or less, and may be 5 μm or more and 20 μm or less. The ratio of the thickness t1 of the first-side first underlayer 371 to the thickness t2 of the first-side first organic layer 32 is preferably 50% or more. By setting the thickness t1 of the first-side first underlayer 371 in this manner, as will be described later, it is possible to prevent a layer formed on the upper surface of the first-side first organic layer 32 and the first surface 13 of the substrate 12 so as to straddle the outer edge of the first-side first organic layer 32 during the manufacturing process of the wiring substrate 10 from being interrupted by a step between the upper surface of the first-side first organic layer 32 and the first surface 13 of the substrate 12.

[0064] In FIG. 4 , the symbol W1 represents the dimension of the portion of the first-surface first underlayer 371 that overlaps with the first-surface first organic layer 32 in a direction perpendicular to the outer edge direction of the first-surface first organic layer 32. The dimension W1 is, for example, 50 μm or more and 1 mm or less, and more preferably 100 μm or more and 0.3 mm or less. By setting the dimension W1 to 50 μm or more, it is possible to prevent the outer edge of the first-surface first organic layer 32 from not overlapping with the first-surface first underlayer 371 due to alignment errors when forming the first-surface first organic layer 32 by, for example, photolithography. Furthermore, by setting the dimension W1 to 1 mm or less, it is possible to prevent the area in which the first-surface first conductive layer 31 can be formed from being narrowed by the first-surface first underlayer 371.

[0065] In FIG. 4, symbol W2 represents the dimension of the portion of the first-surface first underlayer 371 exposed from the first-surface first organic layer 32 in the direction perpendicular to the outer edge direction of the first-surface first organic layer 32. The dimension W2 is, for example, 50 μm or more and 1 mm or less, and more preferably 100 μm or more and 0.3 mm or less. By setting the dimension W2 to 50 μm or more, it is possible to prevent the outer edge of the first-surface first organic layer 32 from not overlapping with the first-surface first base layer 371 due to alignment errors when forming the first-surface first organic layer 32 by photolithography, for example. Furthermore, by setting the dimension W2 to 1 mm or less, it is possible to prevent the dead space from becoming large from the outer edge of the first-surface first organic layer 32 to the outer edge of the substrate 12.

[0066] As shown in FIG. 4 , a gap may exist between the lower surface 37a of the first-side first underlayer 371 and the first surface 13 of the substrate 12. The first-side first organic layer 32 may be located in the gap. In this case, the adhesion of the first-side first organic layer 32 to the first-side first underlayer 371 can be enhanced, for example, by an anchor effect. This is because the first-side first organic layer 32 located in the gap is anchored by the lower surface 37a of the first-side first underlayer 371, thereby suppressing displacement of the first-side first organic layer 32 in the normal direction to the first surface 13 of the substrate 12. The dimension d of the gap between the lower surface 37a of the first-side first underlayer 371 and the first surface 13 of the substrate 12 in the direction perpendicular to the outer edge direction of the first-side first organic layer 32 is, for example, 0.3 μm or more. As will be described later, a gap between the lower surface 37a of the first-side first foundation layer 371 and the first surface 13 of the substrate 12 may be caused by side etching of the first-side first foundation layer 371 when unnecessary portions of the first layer 221 constituting the first-side second conductive layer 33 are removed by etching. The "lower surface 37a of the first-side first foundation layer 371" refers to the surface of the first-side first foundation layer 371 that is visible when the first-side first foundation layer 371 is viewed from the substrate 12 side along the normal direction to the first surface 13 of the substrate 12. In the example shown in FIG. 4 , the lower surface 37a of the first-side first foundation layer 371 includes a portion that is in contact with the first surface 13 of the substrate 12 and a portion that is not in contact with the first surface 13 of the substrate 12.

[0067] When the outer edge of first-surface first base layer 371 has a polygonal outline, corner 371c where two sides of the outer edge of first-surface first base layer 371 are connected preferably has a curved shape, as in the case of first-surface first organic layer 32. The radius of curvature of corner 371c is preferably 50 μm or more.

[0068] [First side second base layer] The first-surface second base layer 372 is a layer containing a metal material located between the outer edge of the first-surface second organic layer 34 and the upper surface of the first-surface first organic layer 32. As shown in Fig. 1, the first-surface second base layer 372 extends in the direction in which the outer edge of the first-surface second organic layer 34 extends. In the example shown in Fig. 1, the first-surface second base layer 372 extends continuously around the entire circumference of the outer edge of the first-surface second organic layer 34.

[0069] The first surface second underlayer 372 may be electrically connected to a part of the first surface first conductive layer 31 or the through electrode 22, similar to the first surface first underlayer 371, or the first surface first underlayer 371 may be electrically floating from the other conductive layers.

[0070] The thickness t3 of the first-surface second underlayer 372 is, for example, 100 nm or more and 20 μm or less, and may be 5 μm or more and 20 μm or less. The ratio of the thickness t3 of the first-surface second underlayer 372 to the thickness t4 of the first-surface second organic layer 34 is preferably 50% or more. Setting the thickness t3 of the first-surface second underlayer 372 in this manner prevents the layers formed on the upper surfaces of the first-surface second organic layer 34 and the first-surface first organic layer 32 so as to straddle the outer edge of the first-surface second organic layer 34 during the manufacturing process of the wiring substrate 10 from being interrupted by a step between the upper surfaces of the first-surface second organic layer 34 and the first-surface first organic layer 32.

[0071] The dimensions of the first-side second base layer 372 in a direction perpendicular to the direction in which the outer edge of the first-side second organic layer 34 extends are the same as those of the first-side first base layer 371. Also, as in the case of the first-side first base layer 371, a gap may be formed between the lower surface of the first-side second base layer 372 and the upper surface of the first-side first organic layer 32, into which the first-side second organic layer 34 can enter.

[0072] (Second wiring structure part) Next, the second wiring structure 40 will be described. The second wiring structure 40 has layers such as a conductive layer and an organic layer provided on the second surface 14 side of the substrate 12 so as to form an electrical circuit on the second surface 14 side. In this embodiment, the second wiring structure 40 has a second-surface first conductive layer 41 and a second-surface first organic layer 42.

[0073] [Second surface, first conductive layer] The second-surface first conductive layer 41 is a layer located on the second surface 14 of the substrate 12 and containing a conductive metal material. In this embodiment, the second-surface first conductive layer 41 is in direct contact with the second surface 14 of the substrate 12. The second-surface first conductive layer 41 may be electrically connected to the through electrode 22. The second-surface first conductive layer 41 may be composed of a single conductive layer, or may include multiple conductive layers. For example, the second-surface first conductive layer 41 may include a first layer 221 and a second layer 222 stacked in this order on the second surface 14 of the substrate 12, similar to the through electrode 22. The second-surface first conductive layer 41 may include only some of the conductive layers of the first layer 221 and the second layer 222. The material constituting the second-surface first conductive layer 41 is the same as the material constituting the through electrode 22. The thickness of the second-surface first conductive layer 41 is, for example, 100 nm or more and 20 μm or less, and may be 5 μm or more and 20 μm or less.

[0074] 1 and 2, the first-surface first conductive layer 31, the through electrode 22, and a portion of the second-surface first conductive layer 41 may be connected to form a spiral member, i.e., an inductor 16. By using glass with high insulating properties as the substrate 12 and using organic materials with small dielectric tangents as the organic layers such as the first-surface first organic layer 32 and the second-surface first organic layer 42, the bandwidth of the inductor 16 can be expanded to the high-frequency side.

[0075] [Second side, first organic layer] The second-surface first organic layer 42 is located on the second surface 14 side of the substrate 12, contains an organic material, and is an insulating layer. Like the first-surface first organic layer 32 and the first-surface second organic layer 34, the second-surface first organic layer 42 contains an organic material having a dielectric loss tangent of preferably 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less. Like the first-surface first organic layer 32 and the first-surface second organic layer 34, the organic material for the second-surface first organic layer 42 can be polyimide, epoxy, or the like.

[0076] (Second frame) The second frame 47 is a member for preventing peeling of the organic layer included in the second wiring-structure portion 40. The second frame 47 includes a second-surface first base layer 471.

[0077] [Second side, first base layer] The second-surface first underlayer 471 is a layer containing a metal material, located between the outer edge of the second-surface first organic layer 42 and the second surface 14 of the substrate 12. The second-surface first underlayer 471 extends in the direction in which the outer edge of the second-surface first organic layer 42 extends. For example, the second-surface first underlayer 471 extends continuously all the way around the outer edge of the second-surface first organic layer 42.

[0078] The second surface first base layer 471 may be electrically connected to the second surface first conductive layer 41 or the through electrode 22, similar to the first surface first base layer 371, or may be electrically floating from other conductive layers.

[0079] The thickness t5 of the second-surface first base layer 471 is, for example, 100 nm or more and 20 μm or less, and may be 5 μm or more and 20 μm or less. The ratio of the thickness t5 of the second-surface first base layer 471 to the thickness t6 of the second-surface first organic layer 42 is preferably 50% or more.

[0080] The dimensions of the second-side first foundation layer 471 in a direction perpendicular to the direction in which the outer edge of the first-side organic layer 32 extends are the same as those of the first-side first foundation layer 371. Furthermore, as in the case of the first-side first foundation layer 371, a gap into which the second-side first organic layer 42 can enter may be formed between the lower surface of the second-side first foundation layer 471 and the second surface 14 of the substrate 12.

[0081] Method for manufacturing a wiring board An example of a method for manufacturing the wiring board 10 will be described below with reference to FIGS. Here, we will explain a method of forming multiple first wiring structure portions 30, first frame bodies 37, second wiring structure portions 40, and second frame bodies 47 on one substrate 12, and then cutting the substrate 12 to obtain multiple wiring substrates 10.

[0082] (Through hole formation process) First, the substrate 12 is prepared. Next, a resist layer is provided on at least one of the first surface 13 and the second surface 14. After that, an opening is provided in the resist layer at a position corresponding to the through hole 20. Next, the substrate 12 is processed at the opening in the resist layer, thereby forming the through hole 20 in the substrate 12 as shown in FIG. 5. Methods that can be used to process the substrate 12 include dry etching methods such as reactive ion etching and deep reactive ion etching, and wet etching.

[0083] The through holes 20 may be formed in the substrate 12 by irradiating the substrate 12 with a laser. In this case, a resist layer does not need to be provided. The laser used for laser processing may be an excimer laser, an Nd:YAG laser, a femtosecond laser, or the like. When an Nd:YAG laser is used, a fundamental wave with a wavelength of 1064 nm, a second harmonic with a wavelength of 532 nm, or a third harmonic with a wavelength of 355 nm may be used.

[0084] Laser irradiation and wet etching can also be combined as appropriate. Specifically, first, an altered layer is formed in the region of the substrate 12 where the through hole 20 is to be formed by laser irradiation. Next, the substrate 12 is immersed in hydrogen fluoride or the like to etch the altered layer. In this way, the through hole 20 can be formed in the substrate 12. Alternatively, the through hole 20 can be formed in the substrate 12 by blasting, in which an abrasive is sprayed onto the substrate 12.

[0085] By processing the substrate 12 from both the first surface 13 side and the second surface 14 side, it is possible to form a through hole 20 having a shape that becomes narrower toward the center of the thickness direction of the substrate 12, as shown in Figure 5.

[0086] (Through electrode formation process) Next, a through electrode 22 is formed on the side wall 21 of the through hole 20. In this embodiment, an example will be described in which a first-surface first conductive layer 31 and a first-surface first foundation layer 371 are formed on a portion of the first surface 13 of the substrate 12, and a second-surface first conductive layer 41 and a second-surface first foundation layer 471 are formed on a portion of the second surface 14 of the substrate 12, simultaneously with the formation of the through electrode 22.

[0087] First, as shown in FIG. 6 , a first layer 221 is formed on the first surface 13, the second surface 14, and the sidewalls 21 of the substrate 12 by a physical film formation method, a sol-gel method, an electroless plating method, or the like. The first layer 221 is preferably formed by a physical film formation method, and particularly preferably by a sputtering method. This allows the first layer 221 to be firmly adhered to the first surface 13, the second surface 14, and the sidewalls 21 of the substrate 12. The physical film formation method, such as a sputtering method or a vapor deposition method, is preferably performed from both the first surface 13 side and the second surface 14 side. In this case, the conductive material flying from the first surface 13 side and the conductive material flying from the second surface 14 side adhere to the sidewalls 21 of the through-holes 20.

[0088] 7, a resist layer 39 is formed partially on the first layer 221. The resist layer 39 may be made of a photosensitive material such as a dry film resist containing an acrylic resin.

[0089] 8, the second layer 222 is formed by electrolytic plating on the first layer 221 that is not covered by the resist layer 39. For example, the substrate 12 is immersed in an electrolytic plating solution containing copper. Further, a current is passed through the first layer 221. This allows the second layer 222 to be deposited on the first layer 221.

[0090] (Resist and conductive layer removal process) 9A, the resist layer 39 is then removed. Next, as shown in FIG. 9A, the portion of the first layer 221 that was covered by the resist layer 39, in other words, the portion of the first layer 221 that is exposed from the second layer 222, is removed by, for example, wet etching. In this manner, the through electrode 22 including the first layer 221 and the second layer 222, the first-side first conductive layer 31, the first-side first base layer 371, the second-side first conductive layer 41, and the second-side first base layer 471 can be formed. Then, a step of annealing the conductive layers such as the second layer 222 may be performed.

[0091] Fig. 9B is a plan view showing substrate 12 in the state shown in Fig. 9A as viewed from the first surface 13. As shown in Fig. 9B, a plurality of first-surface first foundation layers 371 and first-surface first conductive layers 31 are formed on one substrate 12. Note that Fig. 9A corresponds to a cross-sectional view of substrate 12 shown in Fig. 9B taken along line IX-IX.

[0092] Incidentally, in the step of removing the portion of the first layer 221 that was covered with the resist layer 39 by wet etching, the second layer 222 is also exposed to the etching solution, and the surface of the second layer 222 is also partially scraped away. As a result, an uneven shape is formed on the top and side surfaces of the conductive layers, such as the first-surface first conductive layer 31 and the first-surface first base layer 371. The uneven shape makes it easier for an anchor effect to occur between the first-surface first base layer 371 and the first-surface first organic layer 32. Furthermore, the uneven shape increases the contact area between the first-surface first base layer 371 and the first-surface first organic layer 32. This improves the adhesion between the first-surface first base layer 371 and the first-surface first organic layer 32. The same applies to the adhesion between the second-surface first conductive layer 41 and the second-surface first base layer 471.

[0093] (Step of forming first organic layer on first surface) Next, as shown in FIG. 10A , a first-side organic layer 32 is formed on the first surface 13 side of the substrate 12. For example, first, a first-side film (not shown) having a photosensitive layer containing an organic material and a base material is attached to the first surface 13 side of the substrate 12. Next, the first-side film is subjected to an exposure process and a development process. As a result, as shown in FIGS. 10A and 10B , a first-side organic layer 32 made of the photosensitive layer of the first-side film and having its outer edge located on the first-side base layer 371 can be formed on the first surface 13 side of the substrate 12. As shown in FIG. 10A , a second-side organic layer 42 may be formed on the second surface 14 side of the substrate 12, having its outer edge located on the second-side base layer 471.

[0094] The method for forming the first-surface first organic layer 32 and the second-surface first organic layer 42 is not limited to the method using a film. For example, first, a liquid containing an organic material such as polyimide is applied by a spin coating method or the like, and then dried to form an organic layer. Subsequently, the organic layer can be subjected to an exposure process and a development process to form the first-surface first organic layer 32 and the second-surface first organic layer 42.

[0095] Alternatively, an organic layer may be formed inside the through-hole 20 by extending a part of the first-surface first organic layer 32 or a part of the second-surface first organic layer 42 to the inside of the through-hole 20 .

[0096] 11 , a first layer 221 that functions as a seed layer for the first-side second conductive layer 33 and the first-side second underlayer 372 is formed on the upper and side surfaces of the first-side first organic layer 32, the first surface 13 of the substrate 12, the upper and side surfaces of the second-side first organic layer 42, and the second surface 14 and sidewalls 21 of the substrate 12. In this embodiment, the first-side first underlayer 371 is present between the outer edge of the first-side first organic layer 32 and the first surface 13 of the substrate 12. Therefore, compared to when the first-side first underlayer 371 is not present, the step between the upper surface of the first-side first organic layer 32 and the first surface 13 of the substrate 12 can be reduced, thereby preventing the first layer 221 from being interrupted by the step. Therefore, by connecting a power source to the first layer 221 near the outer edge of the substrate 12, power can be supplied to the first layer 221, and a second layer can be deposited on the first layer 221 by electroplating. FIG. 12 is a cross-sectional view showing a state in which the first-surface second conductive layer 33 including the first layer 221 and the second layer and the first-surface second base layer 372 are provided on the first-surface first organic layer 32.

[0097] 13, a first-surface second organic layer 34 is formed to cover the first-surface second conductive layer 33. The first-surface second organic layer 34 is formed so that its outer edge is located on the first-surface second base layer 372. Furthermore, a first-surface third conductive layer 35 is formed on the first-surface second organic layer 34. In this way, a plurality of first wiring structure portions 30 and first frames 37 can be formed on one substrate 12, as shown in FIG.

[0098] Next, the substrate 12 is cut along the cutting lines C. This allows a plurality of wiring substrates 10 to be obtained. In this case, it is preferable that the portions of the substrate 12 that overlap with the cutting lines C are free of components such as the first-surface first base layer 371 and organic layers. In other words, it is preferable that the substrate 12 is cut at the exposed portions R.

[0099] The effects brought about by this embodiment will be described below.

[0100] In the present embodiment, a first-side first base layer 371 containing an organic material is located between the outer edge of the first-side first organic layer 32 and the first surface 13 of the substrate 12. Therefore, peeling of the first-side first organic layer 32 from the substrate 12 can be suppressed compared to when the outer edge of the first-side first organic layer 32 is in direct contact with the first surface 13 of the substrate 12.

[0101] Furthermore, according to the present embodiment, by providing the first-side first base layer 371, it is possible to reduce the step between the upper surface of the first-side first organic layer 32 and the first surface 13 of the substrate 12. Therefore, when the first layer 221 functioning as a seed layer for the first-side second conductive layer 33 is formed on the upper surface of the first-side first organic layer 32 and the first surface 13 of the substrate 12, it is possible to prevent the first layer 221 from being disconnected due to the step between the upper surface of the first-side first organic layer 32 and the first surface 13 of the substrate 12.

[0102] It should be noted that various modifications can be made to the above-described embodiment. Below, modifications will be described with reference to the drawings as necessary. In the following description and the drawings used in the following description, parts that can be configured similarly to the above-described embodiment will be designated by the same reference numerals as those used for the corresponding parts in the above-described embodiment, and duplicated explanations will be omitted. Furthermore, if it is clear that the effects obtained in the above-described embodiment can also be obtained in the modified embodiment, the explanations thereof may be omitted.

[0103] (First Modification of the First Frame) In the above-described embodiment, an example has been described in which the first-side first organic layer 32, the peeling of which is suppressed by the first-side first base layer 371, is an organic layer covering the first-side first conductive layer 31 electrically connected to the through electrode 22. In other words, an example has been described in which the first-side first conductive layer 31 is formed before the first-side first organic layer 32 is formed. However, this is not limited to this, and as shown in FIG. 15 , the first-side first organic layer 32, the peeling of which is suppressed by the first-side first base layer 371, may be an organic layer located between the first-side first conductive layer 31 electrically connected to the through electrode 22 and the first surface 13 of the substrate 12. In other words, the first-side first conductive layer 31 connected to the through electrode 22 may be formed after the first-side first organic layer 32 is formed.

[0104] Furthermore, as shown in FIG. 15, the second frame 47 may further have, in addition to the above-mentioned second surface first base layer 471, a second surface second base layer 472 located between the outer edge of the second surface second organic layer 44 and the second surface first organic layer 42.

[0105] (Second Modification of the First Frame) In the above-described embodiment, an example has been described in which the first-side first underlayer 371 extends continuously around the entire periphery of the first-side first organic layer 32, but this is not limiting. As shown in FIG. 16 , a plurality of first-side first underlayers 371 may be arranged discretely along the edge of the first-side first organic layer 32. According to the example shown in FIG. 16 , the contact area between the first-side first underlayer 371 and the first-side first organic layer 32 can be increased compared to when the first-side first underlayer 371 extends continuously. This increases the adhesion between the first-side first underlayer 371 and the first-side first organic layer 32.

[0106] In the example shown in FIG. 16, the dimension L of the first-surface first foundation layer 371 in the direction in which the outer edge of the first-surface first organic layer 32 extends is preferably 100 μm or more, and more preferably 200 μm or more.

[0107] Furthermore, the ratio of the length of the portion of the outer edge of the first-surface first organic layer 32 that overlaps with the first-surface first base layer 371 to the entire length of the outer edge of the first-surface first organic layer 32 is preferably 50% or more. This makes it possible to appropriately suppress peeling of the first-surface first organic layer 32.

[0108] 16, a plurality of first-side second underlayers 372 may be discretely arranged along the side of the first-side second organic layer 34. Although not shown, a plurality of second-side first underlayers 471 may be discretely arranged along the side of the second-side first organic layer 42.

[0109] Mounting board FIG. 17 is a plan view showing an example of a mounting substrate 60 including a wiring substrate 10 and an element 50 mounted on the wiring substrate 10. The element 50 is an LSI chip such as a logic IC or a memory IC. The element 50 may also be a MEMS (Micro Electro Mechanical Systems) chip. A MEMS chip is an electronic device in which mechanical components, sensors, actuators, electronic circuits, etc. are integrated on a single substrate. The element 50 has terminals electrically connected to a conductive layer such as the third conductive layer 35 on the first surface of the wiring substrate 10.

[0110] Examples of products that incorporate wiring boards 18 is a diagram illustrating an example of a product in which the wiring board 10 according to the embodiment of the present disclosure can be mounted. The wiring board 10 according to the embodiment of the present disclosure can be used in a variety of products. For example, the wiring board 10 can be mounted in a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smartphone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, and the like. [Explanation of symbols]

[0111] 10. Wiring board 12 PCB 13 Page 1 14 Side 2 16 Inductors 20 through holes 21 Side wall 22 Through electrode 221 1st layer 222 2nd layer 30 1st wiring structure section 31 First surface first conductive layer 311 Top surface 312 Side 32 1st surface 1st organic layer 32c corner 33 First surface second conductive layer 34 1st side 2nd organic layer 35 1st surface 3rd conductive layer 36 1st side 3rd organic layer 37 First Frame 371 1st surface 1st base layer 372 1st side 2nd base layer 39 Resist layer 40 2nd wiring structure section 41 Second surface first conductive layer 42 2nd side 1st organic layer 44 2nd side 2nd organic layer 47 Second frame 471 2nd side 1st base layer 50 elements 51 terminals 60 Mounting board C cutting line

Claims

1. a substrate having a first surface and a second surface opposite to the first surface, the substrate including an inorganic material; a first wiring structure including at least a first-surface first organic layer located on the first surface of the substrate and a first-surface first conductive layer located on the first-surface first organic layer; a first-surface first underlayer located between an outer edge of the first-surface first organic layer and the first surface of the substrate, the first-surface first underlayer including a metal material; the first-surface first organic layer is located between the first-surface first conductive layer and the first surface of the substrate; the first-side first underlayer extends continuously around the entire periphery of the first-side first organic layer, or a plurality of the first-side first underlayers are discretely arranged along the periphery of the first-side first organic layer; a gap exists between a lower surface of the first-surface first underlayer and the first surface of the substrate, and the first-surface first organic layer is located in the gap.

2. A wiring board as described in claim 1, wherein the dimension of the first surface first base layer in the outer edge direction in which the outer edge of the first surface first organic layer extends is 100 μm or more.

3. A wiring board as described in claim 1 or 2, wherein the dimension of the portion of the first surface first base layer that overlaps with the first surface first organic layer in a direction perpendicular to the outer edge direction in which the outer edge of the first surface first organic layer extends is 50 μm or more and 1 mm or less.

4. A wiring board described in any one of claims 1 to 3, wherein the dimension of the portion of the first surface first base layer exposed from the first surface first organic layer in a direction perpendicular to the outer edge direction in which the outer edge of the first surface first organic layer extends is 50 μm or more and 1 mm or less.

5. A wiring board described in any one of claims 1 to 4, wherein the ratio of the length of the portion of the outer edge of the first organic layer on the first surface that overlaps with the first base layer on the first surface to the total length of the outer edge of the first organic layer on the first surface is 50% or more.

6. A wiring board described in any one of claims 1 to 5, wherein the ratio of the thickness of the first surface first base layer to the thickness of the first surface first organic layer is 50% or more.

7. An outer edge of the first organic layer on the first surface has a polygonal outline including a plurality of sides, The wiring board according to claim 1 , wherein a plurality of the first-surface first foundation layers are discretely arranged along at least one of the sides of the first-surface first organic layer.

8. A wiring board as described in Claim 7, wherein the corner where the two sides of the first organic layer of the first surface are connected has a curved shape with a radius of curvature of 50 μm or more.

9. A wiring board described in any one of claims 1 to 8, wherein the first surface first organic layer at least partially covers the first surface first conductive layer.

10. A wiring board described in any one of claims 1 to 9, wherein the first surface first base layer is located inside the outer edge of the board.

11. A wiring board described in any one of claims 1 to 10, wherein the first surface first base layer has multiple layers including a metal material.

12. A wiring board described in any one of claims 1 to 11, wherein the substrate comprises glass.

13. The substrate is provided with a through hole, The wiring board according to claim 1 , further comprising a through electrode located in the through hole and electrically connected to the first surface first conductive layer.

14. A second wiring structure portion including at least a second-surface first organic layer located on the second surface of the substrate and a second-surface first conductive layer located on the second-surface first organic layer; a second-surface first underlayer located between an outer edge of the second-surface first organic layer and the second surface of the substrate, the second-surface first underlayer including a metal material; The wiring board according to claim 1 , wherein the second-surface first organic layer is located between the second-surface first conductive layer and the second surface of the substrate.

15. A wiring board according to any one of claims 1 to 14, a mounting board comprising: an element mounted on the wiring board.

16. A method for manufacturing a substrate, comprising: preparing a substrate including a first surface and a second surface opposite the first surface; forming a first-side first underlayer containing a metal material on the first side of the substrate; forming a first-side first organic layer that is in partial contact with the first side of the substrate such that an outer edge of the first-side first organic layer is at least partially located on the first-side first underlayer; forming a first-surface first conductive layer on the first-surface first organic layer, the first-side first underlayer extends continuously around the entire periphery of the first-side first organic layer, or a plurality of the first-side first underlayers are discretely arranged along the periphery of the first-side first organic layer; a gap exists between the lower surface of the first-surface first foundation layer and the first surface of the substrate, and the first-surface first organic layer is positioned in the gap.

Images