Inductor element and integrated circuit

Abstract

To provide an inductor element capable of suppressing an increase in size thereof.SOLUTION: An inductor element includes: inductor wiring having an interruption portion in at least one place; a pair of external terminals that are connected to each of one side part and the other side part, the one end side part and the other end side part being located on both sides of the interruption portion of the inductor wiring, and that are exposed to an outside; at least one inductor variable resistance portion that is provided at the interruption portion; and at least one variable resistance terminal that is connected to the inductor variable resistance portion and that is exposed to the outside. The inductor variable resistance portion connects the one side part and the other side part, and changes a resistance value between the one side part and the other side part.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present disclosure relates to an inductor element and an integrated circuit including the inductor element. [Background technology]

[0002] In a power transmission system such as a wireless power supply system, it is desired to widen the power transmission area. To widen the power transmission area, for example, beamforming is performed by changing the phase of a phase shifter provided in the power transmission system. To change the phase of the phase shifter, for example, it is conceivable to change the impedance of an inductor element provided in the phase shifter.

[0003] To change the impedance of the inductor element, it is conceivable to implement a variable inductor as an inductor element in a phase shifter, as disclosed in, for example, Patent Documents 1 to 3. By changing the inductance of the variable inductor, the impedance of the variable inductor can be changed.

[0004] The variable inductor disclosed in Patent Document 1 includes multiple coil patterns and multiple switches connected to the multiple coil patterns via external electrodes. The combination of coil patterns through which current flows changes depending on whether each switch is turned on or off. This allows the inductance of the variable inductor to be set to a desired value.

[0005] The variable inductor disclosed in Patent Document 2 includes multiple loop-shaped wiring layers with open ends and field-effect transistors as switches that open / shorten the open ends of each wiring layer. The inductance of the variable inductor is determined according to the combination of open / shortened states of the open ends of each wiring layer.

[0006] The variable inductor disclosed in Patent Document 3 includes two inductors and a switch that establishes a conductive or non-conductive state between the two inductors. The inductance of the variable inductor is determined depending on whether the switch is turned on or off. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Patent No. 6701923 [Patent Document 2] Japanese Patent Application Publication No. 8-162331 [Patent Document 3] Japanese Patent Application Laid-Open No. 2010-272815 Summary of the Invention [Problem to be solved by the invention]

[0008] In the variable inductors disclosed in Patent Documents 1 to 3, the number of turns and the line length of the functioning coil change depending on whether the switch is turned on or off. This results in a large variable inductor. The variable inductor can be made smaller by reducing the number of coils it has. However, in this case, it is necessary to arrange the variable inductors in multiple stages to increase the variable range of inductance. This makes it impossible to avoid an increase in the size of the entire device equipped with the variable inductor.

[0009] An object of the present disclosure is to provide an inductor element that can prevent an increase in size. [Means for solving the problem]

[0010] An inductor element according to one aspect of the present disclosure includes: an inductor wiring having at least one discontinuity; a pair of external terminals connected to one side portion and the other side portion located on both sides of the discontinuity in the inductor wiring, respectively, and exposed to the outside; At least one inductor variable resistance unit provided in the discontinuous portion; at least one variable resistance terminal connected to the inductor variable resistance unit and exposed to the outside; The inductor variable resistance section connects the one side portion and the other side portion, and changes the resistance value between the one side portion and the other side portion. [Effects of the Invention]

[0011] According to the present disclosure, it is possible to provide an inductor element that can prevent an increase in size. [Brief explanation of the drawings]

[0012] [Figure 1] Functional block diagram of a phased array antenna including inductor elements of the present disclosure. [Figure 2] Equivalent circuit diagram of an inductor element according to a first embodiment of the present disclosure [Figure 3] Schematic plan view of an inductor element according to a first embodiment of the present disclosure. [Figure 4] Schematic cross-sectional view showing the AA cross section of FIG. [Figure 5] Schematic cross-sectional views illustrating a manufacturing method of an inductor element according to a first embodiment of the present disclosure. [Figure 6] Schematic cross-sectional views illustrating a manufacturing method of an inductor element according to a first embodiment of the present disclosure. [Figure 7] Schematic cross-sectional views illustrating a manufacturing method of an inductor element according to a first embodiment of the present disclosure. [Figure 8] Schematic plan view of an inductor element according to a second embodiment of the present disclosure. [Figure 9] Schematic plan view of an inductor element according to a third embodiment of the present disclosure. [Figure 10] FIG. 4 is a schematic cross-sectional view showing a cross section corresponding to the AA cross section of FIG. 3 in an inductor element according to a fourth embodiment of the present disclosure. [Figure 11] FIG. 10 is a schematic cross-sectional view showing a cross section corresponding to the cross section AA in FIG. 2 in a modified example of the inductor element according to the fourth embodiment of the present disclosure. [Figure 12] 10 is a schematic plan view of an inductor element according to a fifth embodiment of the present disclosure. [Figure 13] 10 is a schematic plan view of an integrated circuit according to a sixth embodiment of the present disclosure; [Figure 14] 14 is a schematic cross-sectional view showing the cross section BB of FIG. [Figure 15] FIG. 10 is an equivalent circuit diagram of an integrated circuit according to a sixth embodiment of the present disclosure. [Figure 16] FIG. 14 is a schematic cross-sectional view showing a cross section corresponding to the cross section BB in FIG. 13 in a modified example of the integrated circuit according to the sixth embodiment of the present disclosure. [Figure 17] FIG. 12 is a schematic cross-sectional view showing a cross section corresponding to the AA cross section of FIG. 3 in an inductor element according to a seventh embodiment of the present disclosure. [Figure 18] FIG. 13 is a schematic cross-sectional view showing a cross section corresponding to the cross section AA of FIG. 3 in an inductor element according to an eighth embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0013] An example of the present disclosure will now be described with reference to the accompanying drawings. Note that the following description is merely illustrative in nature and is not intended to limit the present disclosure, its applications, or its uses. The drawings are schematic, and the ratios of dimensions and the like do not necessarily correspond to reality. Furthermore, in the following description, terms indicating specific directions or positions (e.g., terms including "upper," "lower," "right," "left," "front," and "rear") are used as necessary. However, the use of terms indicating specific directions or positions is intended to facilitate understanding of the present disclosure with reference to the drawings, and the meanings of these terms do not limit the technical scope of the present disclosure.

[0014] First Embodiment FIG. 1 is a functional block diagram of a phased array antenna including an inductor element according to the present disclosure.

[0015] As shown in FIG. 1, the phased array antenna includes a microwave transmitter 1, a power divider 2, a plurality of phase shifters 3, and a plurality of antennas 4. The microwave transmitter 1 transmits microwaves to the power divider. The power divider 2 divides the microwaves input from the microwave transmitter 1 into a plurality of parts and outputs them to each of the plurality of phase shifters 3. Each of the plurality of phase shifters 3 changes the phase of the microwave input from the power divider 2. The microwaves output from the phase shifters 3 are transmitted to the outside via the antennas 4.

[0016] Each of the multiple phase shifters 3 includes an integrated circuit 6. The integrated circuit 6 includes an inductor element 10 and a control unit 7. The inductor element 10 will be described in detail later. The control unit 7 is configured with a known electronic circuit and controls the resistance value of the inductor variable resistance unit 30 included in the inductor element 10.

[0017] It should be noted that application of the phase shifter 3 is not limited to a phased array antenna. Application of the inductor element 10 and a capacitor element 5 (see FIGS. 13 to 16) described later is not limited to the phase shifter 3. The number of inductor elements 10 included in the integrated circuit 6 is not limited to one.

[0018] FIG. 2 is an equivalent circuit diagram of an inductor element according to the first embodiment of the present disclosure. As shown in FIG. 2(a), the inductor element 10 includes an inductor wiring 40 and an inductor variable resistance unit 30. The inductor wiring 40 is divided into two parts (one side part 41 and the other side part 42) by an interruption 43. That is, the one side part 41 and the other side part 42 of the inductor wiring 40 are located on either side of the interruption 43. The inductor variable resistance unit 30 is provided at the interruption 43. The inductor variable resistance unit 30 is connected to the one side part 41 and the other side part 42. This establishes electrical continuity between the one side part 41 and the other side part 42. As shown in FIG. 2(b), the one side part 41, the inductor variable resistance unit 30, and the other side part 42 form a single inductor.

[0019] The inductor variable resistance unit 30 changes the resistance value with respect to the current flowing through the inductor wiring 40. In the first embodiment, the inductor variable resistance unit 30 is a metal-oxide-semiconductor field-effect transistor (MOSFET), as shown in FIG. 2(c).

[0020] Fig. 3 is a schematic plan view of the inductor element according to the first embodiment of the present disclosure, and Fig. 4 is a schematic cross-sectional view showing the cross section taken along line AA in Fig. 3.

[0021] 3 and 4, the inductor element 10 includes a substrate 20, an inductor variable resistance section 30 laminated on the substrate 20, and an inductor wiring 40 and a wiring section 50 laminated on the inductor variable resistance section 30. The direction in which the substrate 20, the inductor variable resistance section 30, the inductor wiring 40, and the wiring section 50 are laminated is the thickness direction 101 of the inductor element 10. In other words, the thickness direction 101 can also be said to be the thickness direction of each of the substrate 20, the inductor variable resistance section 30, the inductor wiring 40, and the wiring section 50.

[0022] In the first embodiment, the substrate 20 has a plate shape. The main surface 21 of the substrate 20 is a rectangle extending in a longitudinal direction 102 and a lateral direction 103. The longitudinal direction 102 and the lateral direction 103 are perpendicular to the thickness direction 101. The longitudinal direction 102 is a direction parallel to the long sides of the rectangle that forms the shape of the main surface 21. The lateral direction 103 is a direction parallel to the short sides of the rectangle that forms the shape of the main surface 21. The longitudinal direction 102 and the lateral direction 103 are perpendicular to each other. In the first embodiment, the substrate 20 is formed of silicon (Si).

[0023] The inductor variable resistance section 30 will be described in detail later.

[0024] As described above, the inductor wiring 40 is broken into two parts at the break 43. One of the two parts is the one-side part 41. The other of the two parts is the other-side part 42. The break 43 refers to the space between the one-side part 41 and the other-side part 42. The one-side part 41 has an electrode 411. The other-side part 42 has an electrode 421. In FIGS. 3 and 4, the one-side part 41 and the other-side part 42 are schematically depicted as straight lines. However, the one-side part 41 and the other-side part 42 may have any shape that functions as an inductor, such as a vortex shape, a meander shape, or a spiral shape. The inductor wiring 40 is made of a conductive material. Examples of the conductive material include gold (Au), silver (Ag), nickel (Ni), copper (Cu), aluminum (Al), or alloys or compounds containing these metals. In the first embodiment, the inductor wiring 40 is made of copper (Cu).

[0025] The inductor variable resistance unit 30 is a MOSFET, and includes a gate electrode 31 , an oxide film 32 , and a channel layer 33 .

[0026] The gate electrode 31 is stacked on the main surface 21 of the substrate 20. As shown in FIG. 3, in a plan view seen from the thickness direction 101, the gate electrode 31 includes a region overlapping with the discontinuity 43 of the inductor wiring 40. That is, in a plan view, the gate electrode 31 is located at a position overlapping with the discontinuity 43 of the inductor wiring 40. As shown in FIG. 4, a portion of the gate electrode 31 faces the discontinuity 43 in the thickness direction 101, via the oxide film 32 and the channel layer 33. As shown in FIG. 3, the gate electrode 31 extends in the lateral direction 103 from the region overlapping with the discontinuity 43 in a plan view. The gate electrode is formed by doping impurities into polysilicon (Poly-Si) at a high concentration. Note that the gate electrode is not limited to polysilicon (Poly-Si) and may be made of a conductor such as copper (Cu), silver (Ag), platinum (Pt), or gold (Au).

[0027] 4, the oxide film 32 has one main surface 321 and the other main surface 322. The other main surface 322 is the surface opposite to the one main surface 321 in the thickness direction 101. The oxide film 32 is stacked on the substrate 20 so that the one main surface 321 is in contact with the main surface 21 of the substrate 20. The one main surface 321 of the oxide film 32 covers the gate electrode 31. In other words, the gate electrode 31 is provided on the one main surface 321 side of the oxide film 32 in contact with the oxide film 32.

[0028] The oxide film 32 includes a high-k material. In the first embodiment, the entire oxide film 32 is made of hafnium oxide (HfO2), which is a high-k material. The oxide film 32 may be made of a high-k material other than hafnium oxide. A part of the oxide film 32 may be made of a high-k material. The oxide film 32 may be made of a material other than a high-k material, such as silicon dioxide (SiO2) or another high-dielectric-constant material.

[0029] The channel layer 33 is stacked on the other main surface 322 of the oxide film 32. In other words, the channel layer 33 is provided on the other main surface 322 side of the oxide film 32 in contact with the oxide film 32.

[0030] In the first embodiment, the entire channel layer 33 is made of amorphous silicon. Alternatively, a part of the channel layer 33 may be made of amorphous silicon. The material making up the channel layer 33 is not limited to amorphous silicon, and may be, for example, a metal oxide semiconductor.

[0031] The channel layer 33 has an undoped region 331 and a doped region 332. The doped region 332 is a region of the channel layer 33 that has been doped with impurities by a known method to form a high-concentration impurity region. The undoped region 331 is a region of the channel layer 33 that is not doped with impurities. The impurities are elements with a valence of 5, such as phosphorus or arsenic, when the channel layer 33 is an N-type semiconductor, and elements with a valence of 3, such as boron or aluminum, when the channel layer 33 is a P-type semiconductor.

[0032] 3 and 4, in a plan view, the doped region 332 overlaps the entire discontinuity 43, a portion of the one-side portion 41, and a portion of the other-side portion 42. In the first embodiment, the portion of the one-side portion 41 is the end of the one-side portion 41 opposite the electrode 411. In the first embodiment, the portion of the other-side portion 42 is the end of the other-side portion 42 opposite the electrode 421. As a result, the doped region 332 is in contact with both the one-side portion 41 and the other-side portion 42. Therefore, the one-side portion 41 and the other-side portion 42 are connected to each other via the doped region 332.

[0033] In a plan view, the doped region 332 overlaps with the gate electrode 31. The doped region 332 faces the gate electrode 31 in the thickness direction 101 with the oxide film 32 interposed therebetween.

[0034] The inductor wiring 40 and the wiring portion 50 are laminated on the channel layer 33. The inductor wiring 40 and the wiring portion 50 are exposed to the outside relative to the substrate 20 and the inductor variable resistance portion 30. The inductor wiring 40 and the wiring portion 50 are provided on the opposite side of the channel layer 33 from the oxide film 32 in the thickness direction 101, and are in contact with the channel layer 33. Note that the inductor wiring 40 and the wiring portion 50 are integrally formed, and therefore the boundary between them is not clear. For convenience, in figures such as FIG. 3 in which both the inductor wiring 40 and the wiring portion 50 are depicted, the boundary between the inductor wiring 40 and the wiring portion 50 is indicated by a solid line.

[0035] As shown in FIG. 3, the wiring section 50 includes a gate wiring section 51, a source wiring section 52, and a drain wiring section 53.

[0036] The gate wiring portion 51 is in contact with the gate electrode 31 via a through-hole 60 that penetrates the undoped region 331 of the channel layer 33 and the oxide film 32 in the thickness direction 101. In other words, the gate wiring portion 51 is electrically connected to the gate electrode 31. The gate wiring portion 51 is an example of a variable resistance terminal.

[0037] A part of the source wiring portion 52 is covered with the electrode 411 of the one side portion 41 of the inductor wiring 40. As a result, the source wiring portion 52 is electrically connected to the one side portion 41.

[0038] A portion of the drain wiring portion 53 is covered by the electrode 421 of the other side portion 42 of the inductor wiring 40. As a result, the drain wiring portion 53 is electrically connected to the other side portion 42. The source wiring portion 52 and the drain wiring portion 53 are an example of a pair of external terminals.

[0039] The inductor variable resistance unit 30, which is a MOSFET, functions as follows: The gate electrode 31 functions as the gate of the MOSFET. One side portion 41 functions as the source of the MOSFET. The other side portion 42 functions as the drain of the MOSFET.

[0040] In the first embodiment, the inductor variable resistance unit 30, which is a MOSFET, is of a normally-on type. To make the inductor variable resistance unit 30 a normally-on type, the Fermi levels of the gate electrode 31 and the channel material may be adjusted. For example, the impurity doping type and doping amount may be adjusted. Also, for example, the gate electrode 31 may be made of aluminum gallium nitride (AlGaN), and the channel layer 33 may be made of gallium nitride (GaN). In the first embodiment, a low resistance portion is formed in the doped region 332. The low resistance portion may be, for example, 10% of the channel layer 33. -2 This is the part with a resistivity of Ω·cm or less.

[0041] Here, the low resistance portion is a portion that exhibits a resistivity that is sufficiently lower than that of a semiconductor substrate (for example, the substrate 20 made of silicon). For example, the resistivity of the substrate 20 made of silicon is 10 -3 Ω·cm. If the resistivity is 1000 times lower than the resistivity of the substrate, most of the current will flow to the low resistance part. -2 In the first embodiment, the resistivity is 10 20 cm 3For example, if the impurity is phosphorus, the low resistance part is 10 -3 It has a resistivity of about Ω·cm. For example, if the impurity is boron, the low resistance part is 5×10 -3 It has a resistivity of about Ω·cm.

[0042] Because a low resistance portion is formed in the doped region 332, a current flows in the doped region 332 even when no voltage is applied between the gate and the source. That is, even when no voltage is applied between the gate electrode 31 and the one-side portion 41, a current flows between the one-side portion 41 and the other-side portion 42 via the doped region 332. The greater the voltage applied between the gate and the source, the greater the current flows in the doped region 332. That is, the greater the voltage applied between the gate electrode 31 and the one-side portion 41, the smaller the resistance value of the low resistance portion formed in the doped region 332. That is, the inductor variable resistance unit 30 functions as a variable resistor whose resistance value changes depending on the magnitude of the voltage applied between the gate electrode 31 and the one-side portion 41.

[0043] Fig. 5 is a schematic cross-sectional view illustrating a method for manufacturing an inductor element according to a first embodiment of the present disclosure. Fig. 6 is a schematic cross-sectional view illustrating a method for manufacturing an inductor element according to a first embodiment of the present disclosure. Fig. 7 is a schematic cross-sectional view illustrating a method for manufacturing an inductor element according to a first embodiment of the present disclosure.

[0044] A method for manufacturing the inductor element 10 will be described below with reference to FIGS.

[0045] As shown in FIG. 5, a gate electrode 31 is laminated on a prepared substrate 20. A film is formed on the substrate 20 by sputtering. A resist is applied to the film. A pattern having the same shape as the gate electrode 31 described above is engraved into the resist by photolithography. The resist is then removed by etching. As a result, a gate electrode 31 having a desired shape is formed.

[0046] 6, an oxide film 32 is formed on the surface of the substrate 20 on which the gate electrode 31 is formed. The oxide film 32 is formed by, for example, CVD (chemical vapor deposition).

[0047] Next, as shown in FIG. 7, a channel layer 33 is formed on the oxide film 32. The channel layer 33 is formed by, for example, CVD. A resist is applied to the channel layer 33. A pattern of the region to be the doped region 332 is engraved into the resist by photolithography. Next, P-type and N-type impurities are doped at high concentrations. At this time, the impurities are doped into the doped region 332 not covered by the resist, but not into the undoped region 331 covered by the resist. Thereafter, the resist is removed by etching. As a result, the channel layer 33 is divided into the doped region 332 doped with the impurities and the undoped region 331 not doped with the impurities. Then, a through-hole 60 (see FIG. 3) is formed in the channel layer 33.

[0048] Next, as shown in FIG. 3, an inductor wiring 40 and a wiring portion 50 are formed on the channel layer 33. The wiring portion 50 is formed by forming a metal film (a copper film in the first embodiment) on the channel layer 33 by sputtering (e.g., seed sputtering). A resist is applied onto the metal film. A pattern having the same shape as the inductor wiring 40 and the wiring portion 50 described above is engraved into the resist by photolithography. Next, electrolytic plating is performed on the pattern and on the resist other than the pattern. Note that the plating is not shown in FIG. 3. Thereafter, the resist is removed by etching. This forms the inductor wiring 40 and the wiring portion 50 in the desired shape and covered with plating. Note that the inductor wiring 40 and the wiring portion 50 may be formed simultaneously as described above, or may be formed separately.

[0049] According to the first embodiment, the inductor wiring 40 and the inductor variable resistance section 30 form one coil. The impedance of the inductor element 10 can be changed by changing the resistance value of the inductor variable resistance section 30. In other words, to change the impedance of the inductor element, it is not necessary to prepare multiple coils and switch some or all of the multiple coils between conductive and non-conductive states. Therefore, the impedance of the inductor element 10 can be changed without changing the number of turns and the line length of the coil. As a result, it is possible to prevent the inductor element 10 from becoming larger. Furthermore, because the impedance can be changed with one inductor element 10, it is not necessary to have multiple stages of inductor elements 10 in the phase shifter 3.

[0050] In the variable inductor disclosed in Patent Document 1, the coil pattern is connected via an external electrode. Therefore, there is a risk of parasitic capacitance occurring between the external electrode and the coil pattern. According to the first embodiment, the inductor variable resistance section 30 and the inductor wiring 40 are directly connected without an external electrode or the like. Therefore, the occurrence of parasitic capacitance can be reduced.

[0051] When the inductor variable resistance unit 30 is a MOSFET as in the first embodiment, the resistance can be continuously controlled by the voltage applied to the gate electrode 31 of the MOSFET. This makes it possible to control the impedance of the inductor element 10 to a desired value. Using a MOSFET as the inductor variable resistance unit 30 makes it easy to reduce the size of the inductor element 10.

[0052] In the first embodiment, the high-k material (e.g., hafnium oxide) such as hafnium oxide (HfO2) contained in the oxide film 32 has a high dielectric constant, which allows a large number of carriers to be excited in the channel layer.

[0053] As in the first embodiment, by using a metal oxide semiconductor such as indium tin oxide (ITO) as the material of the channel layer 33 and providing it in a desired position (doped region 332), the channel layer 33 can be formed without doping. This allows the channel layer 33 to be formed inexpensively.

[0054] According to the first embodiment, the channel layer 33 contains a metal. Therefore, it is possible to prevent a low dielectric constant layer from being formed between the oxide film 32 containing a high-k material and the channel layer 33. As a result, it is possible to increase the mobility of carriers in the channel layer 33.

[0055] According to the first embodiment, the entire channel layer 33 is made of amorphous silicon, and the doped region 332 is doped with P-type and N-type impurities at high concentrations. Therefore, a low-resistance portion with low resistance can be easily formed in the doped region 332.

[0056] According to the first embodiment, the doped region 332 is in contact with both the one-side portion 41 and the other-side portion 42. Therefore, a low-resistance portion can be easily formed between the one-side portion 41 and the other-side portion 42.

[0057] According to the first embodiment, the inductor variable resistance unit 30, which is a MOSFET, is of a normally-on type. Therefore, the inductor wiring 40 can be configured so that a current flows between the one-side portion 41 and the other-side portion 42 when no voltage is applied to the gate electrode 31. As the voltage applied to the gate electrode 31 increases, the resistance between the one-side portion 41 and the other-side portion 42 can be increased.

[0058] According to the first embodiment, the impedance of the inductor element 10 can be changed by changing the resistance of the inductor variable resistance section 30 in one inductor element 10. In other words, according to the first embodiment, the integrated circuit does not need to have multiple inductors, unlike the variable inductors (variable inductors having multiple inductors) disclosed in Patent Documents 1-3, and therefore the integrated circuit 6 can be made smaller.

[0059] In the variable inductors disclosed in Patent Documents 1 to 3, the inductance of the variable inductor is adjusted by changing the number of turns and line length of the coil that functions in response to the on / off of a switch, thereby changing the impedance. In contrast, in the variable inductor of the first embodiment, the inductance of the inductor wiring 40 is not changed, and the impedance is changed by adjusting the resistance value of the inductor variable resistance unit 30. In applications such as a phase shifter provided in a power transmission system, the impact of an increase in resistance value on performance is relatively small, making a variable inductor like that of the first embodiment effective. This also applies to embodiments 2 to 6 described below.

[0060] The inductor element 10 may include a plurality of discontinuous portions 43. In this case, an inductor variable resistance portion 30 may be provided corresponding to each of the plurality of discontinuous portions 43. In other words, the inductor element 10 may include a plurality of inductor variable resistance portions 30.

[0061] Depending on the material of the channel layer 33, the channel layer 33 may not have the doped region 332. In other words, the channel layer 33 may not be doped with impurities. For example, when the channel layer 33 is made of a metal oxide semiconductor, the channel layer 33 may not have the doped region 332.

[0062] At least one of the source wiring portion 52 and the drain wiring portion 53 may be integrally formed with the gate wiring portion 51. For example, as shown by the dashed dotted line in FIG. 3, the drain wiring portion 53 may be connected to the gate wiring portion 51. Furthermore, for example, the source wiring portion 52 and the gate wiring portion 51 may be connected. Note that in a configuration in which a plurality of gate wiring portions 51 are provided, as in a second embodiment described later, at least one of the source wiring portion 52 and the drain wiring portion 53 may be integrally formed with at least one of the gate wiring portions 51.

[0063] Second Embodiment 8 is a schematic plan view of an inductor element according to a second embodiment of the present disclosure. The inductor element 10A according to the second embodiment differs from the inductor element 10 according to the first embodiment in that the inductor element 10A includes multiple inductor variable resistance units 30A, 30B, 30C, and 30D connected in series with each other. Differences from the first embodiment will be described below. Components in common with the inductor element 10 according to the first embodiment are denoted by the same reference numerals, and their description will be omitted in principle, and will be described only when necessary.

[0064] As shown in FIG. 8 , the inductor element 10A includes four inductor variable resistance units 30A, 30B, 30C, and 30D. Similar to the first embodiment, each of the four inductor variable resistance units 30A, 30B, 30C, and 30D is a MOSFET and includes a gate electrode 31, an oxide film 32, and a channel layer 33. The inductor element 10A includes four gate electrodes 31, one oxide film 32, and one channel layer 33. The one channel layer 33 has one undoped region 331 and four doped regions 332. Each of the four gate electrodes 31 and each of the four doped regions 332 are provided corresponding to the four inductor variable resistance units 30A, 30B, 30C, and 30D. The one oxide film 32 and the one undoped region 331 are shared by the four inductor variable resistance units 30A, 30B, 30C, and 30D.

[0065] The inductor wiring 40 is divided into five parts (one side part 41, the other side part 42, and three intervening parts 44) by four discontinuities 43. The three intervening parts 44 are located between the one side part 41 and the other side part 42. The five parts are arranged at intervals along the longitudinal direction 102. Four doped regions 332 are provided in each of the four discontinuities 43. In a plan view, each of the four doped regions 332 overlaps with two adjacent parts of the five parts. Each of the four gate electrodes 31 is disposed opposite one of the four doped regions 332 in the thickness direction 101. The inductor element 10A includes four gate wiring parts 51. Each of the four gate electrodes 31 is in contact with a corresponding one of the four gate wiring parts 51 via a through-hole 60. With the above-described configuration, the inductor element 10A includes a plurality of inductor variable resistance sections 30A, 30B, 30C, and 30D connected in series with one another.

[0066] According to the second embodiment, the inductor element 10A includes multiple inductor variable resistance units 30A, 30B, 30C, and 30D connected in series with each other. Therefore, the impedance of the inductor element 10A can be controlled more precisely than in an inductor element 10 that includes only one inductor variable resistance unit 30.

[0067] Third Embodiment 9 is a schematic plan view of an inductor element according to a third embodiment of the present disclosure. The inductor element 10B according to the third embodiment differs from the inductor element 10 according to the first embodiment in that the inductor element 10B includes multiple inductor variable resistance units 30E, 30F, and 30G connected in parallel with each other. Differences from the first embodiment will be described below. Components in common with the inductor element 10 according to the first embodiment are denoted by the same reference numerals, and their description will be omitted in principle, and will be described only when necessary.

[0068] As shown in FIG. 9 , the inductor element 10B includes three inductor variable resistance units 30E, 30F, and 30G. Similar to the first embodiment, each of the three inductor variable resistance units 30E, 30F, and 30G includes a gate electrode 31, an oxide film 32, and a channel layer 33. The inductor element 10B includes three gate electrodes 31, one oxide film 32, and one channel layer 33. The one channel layer 33 has one undoped region 331 and three doped regions 332. Each of the three gate electrodes 31 and each of the three doped regions 332 are provided corresponding to the three inductor variable resistance units 30E, 30F, and 30G. The one oxide film 32 and the one undoped region 331 are shared by the three inductor variable resistance units 30E, 30F, and 30G.

[0069] The inductor wiring 40 is divided into three portions (one side portion 41, the other side portion 42, and one interposed portion 44) by two discontinuous portions 43. The interposed portion 44 is located between the one side portion 41 and the other side portion 42. The three portions are spaced apart along the longitudinal direction 102. The one interposed portion 44 is divided into a first interposed portion 44A and a second interposed portion 44B that are spaced apart along the lateral direction 103. Each of the three doped regions 332 is provided across the three portions. That is, in a plan view, each of the three doped regions 332 overlaps with the three portions. Each of the three gate electrodes 31 is disposed opposite one of the three doped regions 332 in the thickness direction 101. The inductor element 10B includes three gate wiring portions 51. Each of the three gate electrodes 31 is in contact with each of the three gate wiring portions 51 via a through hole 60. With the above configuration, the inductor element 10B includes a plurality of inductor variable resistance portions 30E, 30F, and 30G connected in parallel with each other.

[0070] According to the third embodiment, the inductor element 10B includes multiple inductor variable resistance units 30E, 30F, and 30G connected in parallel to one another. Therefore, the impedance of the inductor element 10B can be controlled more precisely than in the inductor element 10 that includes only one inductor variable resistance unit 30.

[0071] <Fourth embodiment> 10 is a schematic cross-sectional view showing a cross section corresponding to cross section AA in FIG. 3 of an inductor element according to a fourth embodiment of the present disclosure. The inductor element 10C according to the fourth embodiment differs from the inductor element 10 according to the first embodiment in that the inductor element 10C further includes an intervening insulating layer 71 and a covering insulating layer 72. Differences from the first embodiment will be described below. The same reference numerals are used to denote commonalities with the inductor element 10 according to the first embodiment, and explanations thereof will be omitted in principle, and will be provided only when necessary.

[0072] As shown in FIG. 10, the inductor element 10C further includes an intervening insulating layer 71 and a covering insulating layer 72.

[0073] The intervening insulating layer 71 is interposed between the oxide film 32 and the inductor wiring 40 in the thickness direction 101. In the configuration shown in FIG. 10 , the intervening insulating layer 71 is interposed between the channel layer 33 and the inductor wiring 40 in the thickness direction 101. The intervening insulating layer 71 is stacked on the channel layer 33. The inductor wiring 40 is stacked on the intervening insulating layer 71. The intervening insulating layer 71 is in contact with the inductor wiring 40.

[0074] The intervening insulating layer 71 has two through holes 711 and 712. Each of the two through holes 711 and 712 penetrates the intervening insulating layer 71 in the thickness direction 101.

[0075] In plan view, the through-hole 711 is located so as to overlap both the one side portion 41 of the inductor wiring 40 and the doped region 332 of the channel layer 33. In plan view, the through-hole 712 is located so as to overlap both the other side portion 42 of the inductor wiring 40 and the doped region 332 of the channel layer 33.

[0076] When a metal film is formed on channel layer 33 during the manufacturing process of inductor element 10C, the metal film fills through holes 711 and 712. The metal film filling through hole 711 becomes part of one side portion 41, and the metal film filling through hole 712 becomes part of the other side portion 42. As a result, one side portion 41 contacts doped region 332 through through hole 711, and the other side portion 42 contacts doped region 332 through through hole 712. As a result, even when no voltage is applied between gate electrode 31 and one side portion 41, a current flows between one side portion 41 and the other side portion 42 through doped region 332.

[0077] With the above-described configuration, the inductor wiring 40 covers a part of the channel layer 33 via the through holes 711 and 712 .

[0078] The defect density of the channel layer 33 near the interface 33A between the intervening insulating layer 71 and the channel layer 33 is higher than the defect density of the channel layer 33 near the interface 33B between the oxide film 32 and the channel layer 33. The defect density is the proportion of crystal defects per unit volume constituting the channel layer 33 (particularly the doped region 332).

[0079] The covering insulating layer 72 is provided on the opposite side of the channel layer 33 from the oxide film 32 in the thickness direction 101. The covering insulating layer 72 is stacked on the intervening insulating layer 71. The covering insulating layer 72 covers the inductor wiring 40.

[0080] In the fourth embodiment, the intervening insulating layer 71 is an inorganic insulating layer, and the covering insulating layer 72 is an organic insulating layer. The intervening insulating layer 71 is made of, for example, silicon dioxide (SiO2) or silicon nitride (SiN). The covering insulating layer 72 is made of, for example, polyimide.

[0081] According to the fourth embodiment, the intervening insulating layer 71 that covers a portion of the channel layer 33 can reduce the possibility that the channel layer 33 and the inductor wiring 40 will be electrically connected at an unintended position.

[0082] According to the fourth embodiment, the inductor wiring 40 is in contact with the channel layer 33 via the through holes 711 and 712. Therefore, by changing the positions of the through holes 711 and 712, it is possible to change the contact position between the inductor wiring 40 and the channel layer 33. In other words, it is possible to improve the degree of freedom in designing the inductor element 10.

[0083] A path through which current flows is formed in the channel layer 33 near the interface 33A with the intervening insulating layer 71. In general, increasing the defect density near this path is undesirable because it reduces the mobility of electron and hole carriers. However, the property of the defects in the channel layer 33, which traps carriers generated on the channel layer 33, can be utilized. In other words, the defects trap carriers near the path that cause eddy current loss during high frequency characteristics. This suppresses the loss that occurs near the path. As a result, it is possible to suppress the deterioration of the Q value in the high frequency range, and to provide an inductor element 10 with good high frequency characteristics.

[0084] According to the fourth embodiment, the inductor wiring 40 is protected by the insulating covering layer 72, which reduces the possibility of damage to the inductor wiring 40. This increases the reliability of the inductor element 10.

[0085] In the configuration shown in FIG. 10, the intervening insulating layer 71 is stacked on the channel layer 33 and is spaced apart from the oxide film 32. However, the intervening insulating layer 71 may be in contact with the oxide film 32. For example, as shown in FIG. 11, the intervening insulating layer 71 may be stacked on the oxide film 32 so as to cover the channel layer 33. FIG. 11 is a schematic cross-sectional view showing a cross section corresponding to the AA cross section in FIG. 2 in a modified example of the inductor element according to the fourth embodiment of the present disclosure. In this case, the intervening insulating layer 71 covers the side surface 33C of the channel layer 33.

[0086] 11, the channel layer 33 is composed of only the doped region 332. However, the channel layer 33 may have both the undoped region 331 and the doped region 332, or may be composed of only the undoped region 331. When the channel layer 33 has the undoped region 331 and the doped region 332, for example, the doped region 332 is provided at a position overlapping the through holes 711 and 712 in a plan view, and the undoped region 331 is provided at a position overlapping the intervening insulating layer 71 in a plan view.

[0087] 11, the channel layer 33 can be formed in any region on the oxide film 32 by patterning the channel layer 33 on the oxide film 32. This improves the degree of freedom in designing the inductor element 10.

[0088] 10 and 11, the inductor element 10C includes an intervening insulating layer 71 and a covering insulating layer 72. However, the inductor element 10C may include only one of the intervening insulating layer 71 and the covering insulating layer 72.

[0089] Fifth Embodiment 12 is a schematic plan view of an inductor element according to a fifth embodiment of the present disclosure. The inductor element 10D according to the fifth embodiment differs from the inductor element 10 according to the first embodiment in the following respects. That is, the inductor element 10D includes a plurality of inductor variable resistance sections 30, and each of the plurality of inductor variable resistance sections 30 includes a first variable resistance section 81 and a second variable resistance section 82. The differences from the first embodiment will be described below. The same reference numerals are used to denote commonalities with the inductor element 10 according to the first embodiment, and explanations thereof will be omitted as a rule, and will be provided only when necessary.

[0090] As shown in FIG. 12 , the inductor wiring 40 included in the inductor element 10D extends in a meandering manner on a plane (a main surface 33D of the channel layer 33) that intersects (orthogonal to) the thickness direction 101. The main surface of the channel layer 33 is an example of an intersecting plane. The inductor wiring 40 has a meandering shape and includes thirteen straight portions 40A that extend straight and twelve curved portions 40B that are curved. The thirteen straight portions 40A and the twelve curved portions 40B are alternately and continuously arranged. Each of the thirteen straight portions 40A extends along the short-side direction 103 and is arranged side by side at intervals in the long-side direction 102. The twelve curved portions 40B include six curved portions 40Ba, each having an interruption 43, and six curved portions 40Bb, each not having an interruption 43.

[0091] In the fifth embodiment, the width of the inductor wiring 40 is 30 μm. The width of the inductor wiring 40 is the length in the direction perpendicular to the extension direction and thickness direction 101 of the inductor wiring 40. In the fifth embodiment, the thickness of the inductor wiring 40 is 30 μm. The thickness of the inductor wiring 40 is the length in the thickness direction 101 of the inductor wiring 40. In the fifth embodiment, the distance between two adjacent straight line portions 40A is 100 μm. The distance between two adjacent straight line portions 40A is the length in the longitudinal direction 102 of the space between the two adjacent straight line portions 40A.

[0092] The inductor element 10D includes eight inductor variable resistance sections 30. The eight inductor variable resistance sections 30 include six first variable resistance sections 81 and two second variable resistance sections 82 (second variable resistance section 821 and second variable resistance section 822).

[0093] The numbers of inductor variable resistance sections 30, first variable resistance sections 81, and second variable resistance sections 82 are not limited to those mentioned above. The inductor element 10D may include a plurality of inductor variable resistance sections 30. Some of the plurality of inductor variable resistance sections 30 may be first variable resistance sections 81. Other than some of the plurality of inductor variable resistance sections 30 may be second variable resistance sections 82.

[0094] As in the above-described embodiments, each of the eight inductor variable resistance units 30 is a MOSFET, and includes a gate electrode 31, an oxide film 32, and a channel layer 33. The gate electrode 31 and the doped region 332 of the channel layer 33 are provided for each of the eight inductor variable resistance units 30. The oxide film 32 and the undoped region 331 of the channel layer 33 are shared by the eight inductor variable resistance units 30.

[0095] The gate electrode 31A and doped region 332 of each of the six first variable resistance sections 81 are provided at positions overlapping with the six interruptions 43 in a plan view, similar to the inductor variable resistance section 30 in the first embodiment. As a result, similar to the inductor variable resistance section 30 in the first embodiment, two portions of the inductor wiring 40 on both sides of the interruption 43 are electrically connected via the first variable resistance section 81. The gate electrode 31A of each of the six first variable resistance sections 81 faces the doped region 332 of each of the six first variable resistance sections 81 in the thickness direction 101. The gate electrode 31A of each of the six first variable resistance sections 81 is electrically connected to the gate wiring section 51 via a through hole 60. The gate electrode 31A of each of the first variable resistance sections 81 is an example of a first gate electrode.

[0096] The gate electrodes 31 and doped regions 332 of the second variable resistance sections 821 and 822 are provided in a portion different from the discontinuous portion 43 of the inductor wiring 40. In the configuration shown in Fig. 12, the gate electrodes 31B and doped regions 332 of the second variable resistance sections 821 and 822 are provided in a portion that overlaps with the straight portion 40A of the inductor wiring 40 in a plan view.

[0097] The doped region 332 of the second variable resistance section 821 is provided across six straight line portions 40A. The doped region 332 of the second variable resistance section 822 is provided across seven straight line portions 40A. The doped region 332 of the second variable resistance section 82 may span any number of straight line portions 40A. The number of second variable resistance sections 82 is also arbitrary. For example, the doped region 332 of the second variable resistance section 82 may span only one straight line portion 40A. In this case, the inductor element 10D may include 12 second variable resistance sections 82, which is the number of spaces between two adjacent straight line portions 40A in the inductor wiring 40 shown in FIG. 12.

[0098] Here, two adjacent straight portions 40A among the 13 straight portions 40A face each other in the longitudinal direction 102. The longitudinal direction 102 is an example of a facing direction. One end of each of the 13 straight portions 40A is continuous with one end of the adjacent straight portion 40A via a curved portion 40Bb. A curved portion 40Ba is present between the other ends of two adjacent straight portions 40A among the 13 straight portions 40A. In other words, the other ends of the two adjacent straight portions 40A are separated from each other by a discontinuity 43. As described above, two adjacent straight portions 40A (between a first portion and a second portion described later) via a curved portion 40Bb are connected by the inductor wiring 40. Furthermore, two adjacent straight portions 40A (between a first portion and a second portion described later) via a curved portion 40Ba are connected by the inductor wiring 40 and the first variable resistance unit 81. The other end of one of the two straight line portions 40A located at both ends of the inductor wiring 40 is connected to the source wiring portion 52, not to the curved portion 40Ba. The other end of the two straight line portions 40A located at both ends of the inductor wiring 40 is connected to the drain wiring portion 53, not to the curved portion 40Bb.

[0099] When focusing on any two adjacent straight line portions 40A among the six straight line portions 40A, the gate electrode 31B and doped region 332 of the second variable resistance section 821 extend as follows: In other words, the gate electrode 31B and doped region 332 of the second variable resistance section 821 extend in the longitudinal direction 102 from a position overlapping one of the two straight line portions 40A to a position overlapping the other in plan view.

[0100] Similarly, when focusing on any two adjacent straight line portions 40A among the seven straight line portions 40A, the gate electrode 31B and doped region 332 of the second variable resistance section 822 extend as follows: That is, the gate electrode 31B and doped region 332 of the second variable resistance section 822 extend in the longitudinal direction 102 from a position overlapping one of the two straight line portions 40A to a position overlapping the other in plan view.

[0101] In this case, one of the two adjacent straight line portions 40A is an example of the first portion. The other of the two adjacent straight line portions 40A is an example of the second portion. The gate electrode 31B of the second variable resistance section 822 is an example of the second gate electrode.

[0102] The doped regions 332 of the second variable resistance units 821 and 822 are in contact with the linear portions 40A that overlap in a plan view, thereby connecting to the linear portions 40A. As a result, the doped regions 332 of the second variable resistance units 821 and 822 extend from the positions where they connect to the first portion along the longitudinal direction 102 to the positions where they connect to the second portion. In other words, the six linear portions 40A spanned by the doped region 332 of the second variable resistance unit 821 can be electrically connected to each other via the doped region 332 of the second variable resistance unit 821. The seven linear portions 40A spanned by the doped region 332 of the second variable resistance unit 822 can be electrically connected to each other via the doped region 332 of the second variable resistance unit 822.

[0103] The gate electrode 31B of each of the second variable resistance portions 821 and 822 faces the doped region 332 of each of the second variable resistance portions 821 and 822 in the thickness direction 101. The gate electrode 31B of each of the second variable resistance portions 821 and 822 is electrically connected to the gate wiring portion 51 via the through hole 60.

[0104] In the fifth embodiment, the first variable resistance section 81, which is a MOSFET, is of a normally-on type and functions in the same way as the inductor variable resistance section 30 in the first embodiment. Therefore, further detailed description will be omitted here.

[0105] In the fifth embodiment, the second variable resistance units 821 and 822, which are MOSFETs, are normally-off type. The second variable resistance units 821 and 822 function as follows: When no voltage is applied between the gate and source, no current flows through the doped region 332. At this time, current flows between the source wiring unit 52 and the drain wiring unit 53 along the inductor wiring 40, i.e., via the curved portion 40B. On the other hand, when a voltage is applied between the gate and source, a low-resistance portion is formed in the doped region 332. In this case, the resistance in the doped region 332 is lower than the resistance in the inductor wiring 40. Therefore, most of the current flows through the doped region 332 without passing through the curved portion 40B. As a result, the number of meanders in the meandering inductor wiring 40 decreases, and the inductance and impedance of the inductor element 10D change.

[0106] 12, when no voltage is applied to the gate electrodes 31 of both the second variable resistance units 821 and 822, the inductor wiring 40 meanders 12 times. When a voltage is applied to only one of the gate electrodes 31 of the second variable resistance units 821 and 822, the inductor wiring 40 meanders 6 times. When a voltage is applied to the gate electrodes 31 of both the second variable resistance units 821 and 822, the inductor wiring 40 meanders 0 times.

[0107] According to the fifth embodiment, the first and second portions (two adjacent straight portions 40A) can be linearly connected by changing the resistance value of the second variable resistance section 82. This changes the length and number of turns of the inductor wiring 40, thereby changing the inductance of the inductor element 10D. As a result, the impedance of the inductor element 10D can be changed.

[0108] Sixth Embodiment Fig. 13 is a schematic plan view of an integrated circuit according to a sixth embodiment of the present disclosure. Fig. 14 is a schematic cross-sectional view showing a cross section taken along line BB in Fig. 13. Fig. 15 is an equivalent circuit diagram of the integrated circuit according to the sixth embodiment of the present disclosure.

[0109] 13 and 14, an integrated circuit 6A according to the sixth embodiment differs from the integrated circuit 6 according to the first embodiment in that the integrated circuit 6A further includes a capacitor element 5 in addition to the inductor element 10. The differences from the first embodiment will be described below. The same reference numerals are used to denote commonalities with the integrated circuit 6 according to the first embodiment, and explanations thereof will be omitted in principle, and will be provided only when necessary.

[0110] As shown in FIGS. 13 to 15, the integrated circuit 6A includes an inductor element 10 and a capacitor element 5. In FIG.

[0111] As shown in FIG. 15, in the sixth embodiment, the inductor element 10 and the capacitor element 5 are connected in series. Note that the inductor element 10 and the capacitor element 5 are not limited to being connected in series, and may be connected in parallel. As shown in FIG. 14, the inductor element 10 includes an inductor variable resistance unit 30H, and the capacitor element 5 includes a capacitor variable resistance unit 30I. As in the above-described embodiments, the impedance of the inductor element 10 is variable. As will be described later, the capacitance of the capacitor element 5 is variable.

[0112] 13 and 14, the inductor variable resistance unit 30H and the capacitor variable resistance unit 30I are MOSFETs. The MOSFETs include a gate electrode 31, an oxide film 32, and a channel layer 33. The gate electrode 31 includes two gate electrodes 311 and 312. The channel layer 33 includes two doped regions 332 and 333.

[0113] The inductor variable resistance unit 30H includes a gate electrode 311, an oxide film 32, and a channel layer 33. The capacitor variable resistance unit 30I includes a gate electrode 312, an oxide film 32, and a channel layer 33. The gate electrode 312 is an example of an additional gate electrode. The oxide film 32 and the undoped region 331 of the channel layer 33 are shared by the inductor variable resistance unit 30H and the capacitor variable resistance unit 30I. The doped region 332 of the channel layer 33 is included in the inductor variable resistance unit 30H. The doped region 333 of the channel layer 33 is included in the capacitor variable resistance unit 30I.

[0114] The configuration of the inductor element 10 is the same as that of the first embodiment, so in the sixth embodiment, a description of the configuration of the inductor element 10 will be omitted.

[0115] The capacitor element 5 includes the above-described capacitor variable resistance section 30I, a pair of electrodes 91, 92, insulating resistance layers 73, 74, and a wiring section 50 (more specifically, the additional gate wiring section 56, the capacitor wiring section 57, and the source wiring section 52 of the wiring section 50). In the sixth embodiment, the source wiring section 52 is shared by the capacitor element 5 and the inductor element 10.

[0116] The electrode 91, which is one of a pair of electrodes 91, 92, is laminated on the channel layer 33. The electrode 91 is provided on the opposite side of the channel layer 33 from the oxide film 32 in the thickness direction 101 and is in contact with the channel layer 33. The electrode 91 includes an electrode 911 and an electrode 912. The electrodes 911, 912 are provided with a gap 913 between them in the longitudinal direction 102. In other words, the electrode 91 is divided into a plurality of portions via the gap 913. The electrode 92 is laminated on the insulating resistance layer 73. The electrode 92 faces the electrode 91 in the thickness direction 101.

[0117] The material forming the pair of electrodes 91, 92 is different from the material forming the inductor wiring 40 of the inductor element 10. In the sixth embodiment, the pair of electrodes 91, 92 are made of aluminum (Al), and the inductor wiring 40 is made of copper (Cu).

[0118] In plan view, the doped region 333 is located so as to overlap the gap 913. The doped region 333 is in contact with both the electrodes 911 and 912. In plan view, the gate electrode 312 is located so as to overlap the doped region 333.

[0119] The insulating resistance layer 73 is laminated on the channel layer 33 so as to cover the electrode 91. The insulating resistance layer 73 is located between the pair of electrodes 91 and 92.

[0120] The insulation resistance layer 74 is laminated on the insulation resistance layer 73 and the electrode 92 so as to cover the insulation resistance layer 73 and the electrode 92. The inductor wiring 40 is laminated on the insulation resistance layer 74. This electrically insulates the pair of electrodes 91, 92 from the inductor wiring 40.

[0121] In the sixth embodiment, the insulating resistance layer 73 is an inorganic insulating layer, and the insulating resistance layer 74 is an organic insulating layer. The insulating resistance layer 73 is made of, for example, silicon dioxide (SiO2) or silicon nitride (SiN). The insulating resistance layer 74 is made of, for example, polyimide.

[0122] An organic insulating layer can be formed thicker than an inorganic insulating layer more easily. Therefore, by providing the insulating resistance layer 74, which is an organic insulating layer, between the pair of electrodes 91, 92 and the inductor wiring 40, it is easy to increase the distance between the pair of electrodes 91, 92 and the inductor wiring 40.

[0123] The additional gate wiring portion 56 is electrically connected to the gate electrode 312 via the through hole 60. The capacitor wiring portion 57 is electrically connected to the electrode 911 via the through hole 60. The source wiring portion 52 is electrically connected to the electrode 92 via the through hole 60.

[0124] The capacitor variable resistance unit 30I, which is a MOSFET, functions as follows: The gate electrode 312 functions as the gate of the MOSFET. The electrode 911 functions as the drain of the MOSFET. The one side portion 41 of the inductor element 10 functions as the source of the MOSFET.

[0125] In the sixth embodiment, the capacitor variable resistance unit 30I, which is a MOSFET, is a normally-off type. When no voltage is applied between the gate and source, no current flows through the doped region 333. At this time, electrodes 911 and 92 of the electrode 91 form a capacitor. That is, charge is stored between the electrodes 911 and 92. On the other hand, when a voltage is applied between the gate and source, a low-resistance portion is formed in the doped region 333. Therefore, current flows from the electrode 911 to the electrode 912 via the doped region 333. At this time, the entire electrode 91 (electrodes 911 and 912) and the electrode 92 form a capacitor. That is, charge is stored between the electrodes 911 and 912 and the electrode 92. That is, the resistance value with respect to the current flowing through the electrode 91 can be changed depending on whether or not a voltage is applied to the gate electrode 312. This change in resistance value can change the capacitance of the capacitor.

[0126] The capacitor variable resistance unit 30I, which is a MOSFET, may be a normally-on type when the carrier concentration of the channel layer 33 is high. In the sixth embodiment, both the inductor variable resistance unit 30H and the capacitor variable resistance unit 30I are MOSFETs. However, the inductor variable resistance unit 30H and the capacitor variable resistance unit 30I may be transistors of different types. For example, the inductor variable resistance unit 30H may be a MOSFET, and the capacitor variable resistance unit 30I may be a bipolar transistor. Alternatively, both the inductor variable resistance unit 30H and the capacitor variable resistance unit 30I may be MOSFETs, but may have different channel widths or lengths. In the sixth embodiment, the inductor variable resistance unit 30H and the capacitor variable resistance unit 30I have a common oxide film, but each may have its own oxide film.

[0127] According to the sixth embodiment, the integrated circuit 6A includes the capacitor element 5 in addition to the inductor element 10. This improves the degree of freedom in designing the integrated circuit 6A, and makes it possible to provide an integrated circuit 6A with more diverse functions.

[0128] According to the sixth embodiment, the impedance of the capacitor element 5 can be changed by controlling the voltage applied to the gate electrode 312.

[0129] According to the sixth embodiment, the material forming the pair of electrodes 91, 92 of the capacitor element 5 is different from the material forming the inductor wiring 40 of the inductor element 10. This makes it possible to select optimal materials for each of the pair of electrodes 91, 92 and the inductor wiring 40. As a result, the cost of the integrated circuit 6A can be reduced.

[0130] A part of the channel layer 33 may also serve as one of the pair of electrodes 91 and 92 .

[0131] Fig. 16 is a schematic cross-sectional view showing a cross section corresponding to the cross section BB in Fig. 13 in a modified example of the integrated circuit according to the sixth embodiment of the present disclosure. In the configuration shown in Fig. 16, a part of the channel layer 33 also serves as an electrode 91.

[0132] The channel layer 33 has a doped region 334. The doped region 334 also serves as an electrode 91.

[0133] The capacitor element 5 has three gate electrodes 313, 314, and 315 as the gate electrode 31. The gate electrodes 313, 314, and 315 are an example of additional gate electrodes. The gate electrodes 313, 314, and 315 face the doped region 334 in the thickness direction 101. That is, in a plan view, the gate electrodes 313, 314, and 315 are positioned so as to overlap with the doped region 334. A voltage is applied to each of the three gate electrodes 313, 314, and 315. The number of gate electrodes included in the capacitor element 5 is not limited to three.

[0134] 16, the capacitor variable resistance unit 30I, which is a MOSFET, is a normally-off type. In the doped region 334, a current flows through a portion facing one of the three gate electrodes 313, 314, and 315 to which a voltage is applied. This forms a capacitor between this portion and the electrode 92. In other words, charge is stored between this portion and the electrode 92. For example, the capacitance of the capacitor when a voltage is applied to all three gate electrodes 313, 314, and 315 is greater than the capacitance of the capacitor when a voltage is applied to only two gate electrodes 313 and 314.

[0135] According to the sixth embodiment, the doped region 333, which is a part of the channel layer 33, doubles as one of a pair of electrodes. Therefore, in the manufacturing process of the integrated circuit 6A, the step of forming one of the pair of electrodes can be omitted. As a result, the cost of the integrated circuit 6A can be reduced.

[0136] The number of capacitor elements 5 included in the integrated circuit 6A is not limited to one. The number of capacitor variable resistance sections 30I included in the capacitor element 5 is not limited to one.

[0137] In each of the above-described embodiments, the inductor variable resistance section 30 (30A to 30H) is a MOSFET, but the inductor variable resistance section 30 (30A to 30H) is not limited to a MOSFET.

[0138] For example, the inductor variable resistance unit 301 included in the inductor element 10F may be a bipolar transistor as shown in Fig. 17. Fig. 17 is a schematic cross-sectional view showing a cross section corresponding to the cross section AA in Fig. 3 in the inductor element according to the seventh embodiment of the present disclosure.

[0139] As shown in FIG. 17, the inductor variable resistance unit 301 includes a substrate 20A, a collector layer 34, a base layer 35, and an emitter layer 36. The substrate 20A is made of silicon (Si) doped with P-type impurities. The collector layer 34 is formed on the substrate 20A and doped with N-type impurities. The base layer 35 is formed on the collector layer 34 and doped with P-type impurities. The emitter layer 36 is formed on the base layer 35 and doped with N-type impurities. An insulating layer 75 is stacked on the substrate 20A so as to cover the collector layer 34, the base layer 35, and the emitter layer 36. An inductor wiring 40 is stacked on the insulating layer 75. One side portion 41 of the inductor wiring 40 is electrically connected to the collector layer 34 via a through-hole 412 that penetrates the insulating layer 75 in the thickness direction 101. The other side portion 42 of the inductor wiring 40 is electrically connected to the emitter layer 36 via a through hole 422 that penetrates the insulating layer 75 in the thickness direction 101. The inductor variable resistance unit 301 having the above configuration is manufactured by a known method.

[0140] 17, the base current is amplified by controlling the potential difference between the collector and the base. By controlling the potential difference, the resistance of the inductor variable resistance unit 301 can be controlled.

[0141] For example, as shown in Fig. 18, the inductor variable resistance unit 302 included in the inductor element 10G may be a photoresistor. In other words, the inductor variable resistance unit is not limited to a transistor. Fig. 18 is a schematic cross-sectional view showing a cross section corresponding to cross section AA in Fig. 3 in the inductor element according to the eighth embodiment of the present disclosure.

[0142] 18, the inductor variable resistance unit 302 is a cadmium sulfide (CdS) layer laminated on a portion of the substrate 20. For example, the cadmium sulfide layer may be formed in necessary locations on the substrate 20 using a printing and sintering method used in the manufacture of solar cells and the like. Alternatively, for example, after the cadmium sulfide layer is formed over the entire surface of the substrate 20, the cadmium sulfide layer may be left only in necessary locations by a known method such as etching.

[0143] A portion of one side portion 41 of the inductor wiring 40 is in contact with the inductor variable resistance section 302 (cadmium sulfide layer). A portion of the other side portion 42 of the inductor wiring 40 is in contact with the inductor variable resistance section 302. The one side portion 41 and the other side portion 42 are formed with an interruption 43 between them. The inductor variable resistance section 302 is formed across the interruption 43 in a plan view.

[0144] 18, the resistance of the inductor variable resistance section 302 can be controlled in accordance with the amount of light irradiated onto the inductor variable resistance section 302. For example, the smaller the amount of light, the larger the resistance.

[0145] It should be noted that the capacitor variable resistance section 30I is not limited to a MOSFET, similar to the inductor variable resistance sections 30A to 30H.

[0146] The inductor element and integrated circuit described above can also be expressed as follows.

[0147] (1) An inductor element according to one aspect of the present disclosure includes: an inductor wiring having at least one discontinuity; a pair of external terminals connected to one side portion and the other side portion located on both sides of the discontinuity in the inductor wiring, respectively, and exposed to the outside; At least one inductor variable resistance unit provided in the discontinuous portion; at least one variable resistance terminal connected to the inductor variable resistance unit and exposed to the outside; The inductor variable resistance section connects the one side portion and the other side portion, and changes the resistance value between the one side portion and the other side portion.

[0148] (2) In the inductor element of (1), The inductor variable resistance unit may be a MOSFET, The inductor variable resistance unit is a MOSFET. An oxide film, a gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the gate electrode being positioned to overlap the discontinuity when viewed in the thickness direction of the inductor variable resistance unit which is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, The inductor wiring may be provided on the opposite side of the channel layer from the oxide film in the thickness direction and in contact with the channel layer.

[0149] (3) In the inductor element of (2), The oxide film may include a high-k material.

[0150] (4) In the inductor element of (3), The high-k material may be hafnium oxide.

[0151] (5) In any one of the inductor elements (2) to (4), The channel layer may include a metal oxide semiconductor.

[0152] (6) In any one of the inductor elements (2) to (4), The channel layer may include amorphous silicon and have a doped region doped with an impurity, When viewed in the thickness direction, the doped region may overlap the discontinuous portion.

[0153] (7) In any one of the inductor elements (2) to (4), The channel layer may include a metal oxide semiconductor and have a doped region doped with an impurity, When viewed in the thickness direction, the doped region may overlap the discontinuous portion.

[0154] (8) In the inductor element of (6) or (7), The doped region may be in contact with both the one side portion and the other side portion.

[0155] (9) In any one of the inductor elements (2) to (8), The inductor variable resistance section, which is a MOSFET, may be of a normally-on type.

[0156] (10) Any one of the inductor elements (2) to (9) is The semiconductor device may further include an intervening insulating layer that is interposed between the oxide film and the inductor wiring in the thickness direction, is in contact with the inductor wiring, and covers a part of the channel layer, The intervening insulating layer may have a through hole penetrating the intervening insulating layer in the thickness direction, The inductor wiring may be in contact with the channel layer through the through hole.

[0157] (11) In the inductor element of (10), The defect density of the channel layer near the interface between the intervening insulating layer and the channel layer may be higher than the defect density of the channel layer near the interface between the oxide film and the channel layer.

[0158] (12) In the inductor element of (10) or (11), The intervening insulating layer may cover a side surface of the channel layer.

[0159] (13) Any one of the inductor elements (2) to (12) is The semiconductor device may further include a covering insulating layer that is provided on the opposite side of the channel layer from the oxide film in the thickness direction and that covers the inductor wiring.

[0160] (14) Any one of the inductor elements (1) to (13) is The inductor variable resistance unit may include a plurality of the inductor variable resistance units, The plurality of inductor variable resistance sections may be connected in series.

[0161] (15) Any one of the inductor elements (1) to (13) is The inductor variable resistance unit may include a plurality of the inductor variable resistance units, The plurality of inductor variable resistance sections may be connected in parallel.

[0162] (16) Any one of the inductor elements (1) to (15) is The inductor variable resistance unit may include a plurality of the inductor variable resistance units, Some of the plurality of inductor variable resistance units may be first variable resistance units provided at the discontinuous portion of the inductor wiring, Other than a part of the plurality of inductor variable resistance units may be second variable resistance units provided in a portion of the inductor wiring different from the discontinuity portion, The inductor wiring may have a first portion and a second portion that is continuous with the first portion without the discontinuity and faces the first portion in a facing direction, The second variable resistance portion may extend along the opposing direction from a position where it is connected to the first portion to a position where it is connected to the second portion.

[0163] (17) In the inductor element of (16), The inductor variable resistance unit may be a MOSFET, The first variable resistance unit of the inductor variable resistance unit is a MOSFET, An oxide film, a first gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the first gate electrode being positioned so as to overlap the discontinuity when viewed in a thickness direction of the inductor variable resistance unit that is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, The second variable resistance section of the inductor variable resistance section is a MOSFET, the oxide film; a second gate electrode provided on one main surface side of the oxide film in contact with the oxide film and positioned to overlap a portion other than the discontinuous portion when viewed in the thickness direction; the channel layer, The inductor wiring may be provided on an opposite side of the channel layer from the oxide film in the thickness direction, in contact with the channel layer, and extend on an intersecting plane intersecting the opposing direction, The second gate electrode may extend from the first portion to the second portion along the opposing direction.

[0164] (18) In any one of the inductor elements (1) to (17), At least one of the external terminals and at least one of the variable resistance terminals may be integrally formed.

[0165] (19) An integrated circuit according to one aspect of the present disclosure includes: Any one of the inductor elements (1) to (18), and a control unit that controls the resistance value of the inductor variable resistance unit.

[0166] (20) The integrated circuit in (19) is The capacitor element may further include a pair of electrodes facing each other and at least one capacitor variable resistance portion, The capacitor variable resistance section may change the capacitance of the capacitor element by changing a resistance value with respect to a current flowing through the pair of electrodes.

[0167] (21) In the integrated circuit of (20), The inductor variable resistance unit may be a MOSFET, The inductor variable resistance unit is a MOSFET. An oxide film, a gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the gate electrode being positioned to overlap the discontinuity when viewed in the thickness direction of the inductor variable resistance unit which is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, The capacitor variable resistance unit may be a MOSFET, The capacitor variable resistance unit is a MOSFET. the oxide film; an additional gate electrode provided on one main surface side of the oxide film in contact with the oxide film; the channel layer, The pair of electrodes may face each other in the thickness direction, one of the pair of electrodes may be provided on an opposite side of the channel layer from the oxide film in the thickness direction, in contact with the channel layer, and divided into a plurality of portions with gaps interposed therebetween; The additional gate electrode may be located at a position overlapping the gap when viewed in the thickness direction.

[0168] (22) In the integrated circuit of (20), The inductor variable resistance unit may be a MOSFET, The inductor variable resistance unit is a MOSFET. An oxide film, a gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the gate electrode being positioned to overlap the discontinuity when viewed in the thickness direction of the inductor variable resistance unit which is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, The capacitor variable resistance unit may be a MOSFET, The capacitor variable resistance unit is a MOSFET. the oxide film; an additional gate electrode provided on one main surface side of the oxide film in contact with the oxide film; the channel layer, The pair of electrodes may face each other in the thickness direction, A part of the channel layer may also serve as one of the pair of electrodes, The additional gate electrode may be located at a position overlapping a portion of the channel layer that doubles as one of the pair of electrodes when viewed in the thickness direction.

[0169] (23) In any one of the inductor elements (20) to (22), The material forming the pair of electrodes of the capacitor element may be different from the material forming the inductor wiring of the inductor element.

[0170] Any of the various embodiments described above may be combined appropriately to achieve the effects of each of them.

[0171] While the present invention has been fully described in connection with preferred embodiments, with appropriate reference to the drawings, various changes and modifications will become apparent to those skilled in the art, and it is to be understood that such changes and modifications are included within the scope of the present invention as defined by the appended claims unless they depart therefrom. [Explanation of symbols]

[0172] 5 Capacitor elements 6. Integrated Circuits 10 Inductor element 30 Inductor variable resistance section 31 gate electrode 32 Oxide film 321 One main surface 33 Channel Layer 332 doped region 33A Interface 33B Interface 33C side 40 Inductor wiring 41 One side part 42 Other side part 43 Interrupted section 51 Gate wiring section (variable resistance terminal) 52 Source wiring section (external terminal) 53 Drain wiring part (external terminal) 71 Intervening insulating layer 711 Through hole 712 Through hole 72 Insulating coating layer 81 First variable resistor 82 Second variable resistor section 101 Thickness direction 102 Longitudinal direction (opposite direction)

Claims

1. an inductor wiring having at least one discontinuous portion; a pair of external terminals connected to one side portion and the other side portion located on both sides of the discontinuity in the inductor wiring, respectively, and exposed to the outside; at least one inductor variable resistance unit provided in the discontinuous portion; at least one variable resistance terminal connected to the inductor variable resistance unit and exposed to the outside; the inductor variable resistance unit connects the one side portion and the other side portion and changes a resistance value between the one side portion and the other side portion; the inductor variable resistance unit is a MOSFET, The inductor variable resistance unit is a MOSFET. An oxide film, a gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the gate electrode being positioned to overlap the discontinuity when viewed in a thickness direction of the inductor variable resistance unit which is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, the inductor wiring is provided on the opposite side of the channel layer from the oxide film in the thickness direction and is in contact with the channel layer; The inductor element, wherein the inductor variable resistance section is a MOSFET and is of a normally-on type.

2. An inductor wiring having at least one discontinuity; a pair of external terminals connected to one side portion and the other side portion located on both sides of the discontinuity in the inductor wiring, respectively, and exposed to the outside; at least one inductor variable resistance unit provided in the discontinuous portion; at least one variable resistance terminal connected to the inductor variable resistance unit and exposed to the outside; the inductor variable resistance unit connects the one side portion and the other side portion and changes a resistance value between the one side portion and the other side portion; the inductor variable resistance unit is a MOSFET, The inductor variable resistance unit is a MOSFET. An oxide film, a gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the gate electrode being positioned to overlap the discontinuity when viewed in a thickness direction of the inductor variable resistance unit which is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, the inductor wiring is provided on the opposite side of the channel layer from the oxide film in the thickness direction and is in contact with the channel layer; an intervening insulating layer interposed between the oxide film and the inductor wiring in the thickness direction, in contact with the inductor wiring, and covering a part of the channel layer; the intervening insulating layer has a through hole penetrating the intervening insulating layer in the thickness direction, The inductor element, wherein the inductor wiring is in contact with the channel layer through the through hole.

3. An inductor wiring having at least one discontinuity; a pair of external terminals connected to one side portion and the other side portion located on both sides of the discontinuity in the inductor wiring, respectively, and exposed to the outside; at least one inductor variable resistance unit provided in the discontinuous portion; at least one variable resistance terminal connected to the inductor variable resistance unit and exposed to the outside; the inductor variable resistance unit connects the one side portion and the other side portion and changes a resistance value between the one side portion and the other side portion; the inductor variable resistance unit is a MOSFET, The inductor variable resistance unit is a MOSFET. An oxide film, a gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the gate electrode being positioned to overlap the discontinuity when viewed in a thickness direction of the inductor variable resistance unit which is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, the inductor wiring is provided on the opposite side of the channel layer from the oxide film in the thickness direction and is in contact with the channel layer; The inductor element further comprises a covering insulating layer that is provided on the opposite side of the channel layer from the oxide film in the thickness direction and that covers the inductor wiring.

4. An inductor wiring having at least one discontinuity; a pair of external terminals connected to one side portion and the other side portion located on both sides of the discontinuity in the inductor wiring, respectively, and exposed to the outside; at least one inductor variable resistance unit provided in the discontinuous portion; at least one variable resistance terminal connected to the inductor variable resistance unit and exposed to the outside; the inductor variable resistance unit connects the one side portion and the other side portion and changes a resistance value between the one side portion and the other side portion; a plurality of the inductor variable resistance units; some of the plurality of inductor variable resistance units are first variable resistance units provided at the discontinuous portion of the inductor wiring, the remaining part of the plurality of inductor variable resistance units is a second variable resistance unit provided in a portion of the inductor wiring different from the discontinuous portion, the inductor wiring has a first portion and a second portion that faces the first portion in an opposing direction without any other portion of the inductor wiring therebetween; the first portion and the second portion of the inductor wiring are connected by the inductor wiring, or by the inductor wiring and the first variable resistance unit; the second variable resistance portion extends along the opposing direction from a position where it is connected to the first portion to a position where it is connected to the second portion, the inductor variable resistance unit is a MOSFET, The first variable resistance unit of the inductor variable resistance unit is a MOSFET, An oxide film, a first gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the first gate electrode being positioned so as to overlap the discontinuity when viewed in a thickness direction of the inductor variable resistance unit which is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, The second variable resistance section of the inductor variable resistance section is a MOSFET, the oxide film; a second gate electrode provided on one main surface side of the oxide film in contact with the oxide film and positioned to overlap a portion other than the discontinuous portion as viewed in the thickness direction; the channel layer, the inductor wiring is provided on the opposite side of the channel layer from the oxide film in the thickness direction, is in contact with the channel layer, and extends on an intersecting plane that intersects with the opposing direction; The second gate electrode is an inductor element that extends from the first portion to the second portion along the opposing direction.

5. An inductor wiring having at least one discontinuity; a pair of external terminals connected to one side portion and the other side portion located on both sides of the discontinuity in the inductor wiring, respectively, and exposed to the outside; at least one inductor variable resistance unit provided in the discontinuous portion; at least one variable resistance terminal connected to the inductor variable resistance unit and exposed to the outside; the inductor variable resistance unit connects the one side portion and the other side portion and changes a resistance value between the one side portion and the other side portion; At least one of the external terminals and at least one of the variable resistance terminals are integrally formed as an inductor element.

6. the channel layer has a doped region doped with an impurity, 4. The inductor element according to claim 1, wherein the doped region is in contact with both the one side portion and the other side portion.

7. 3. The inductor element according to claim 2, wherein the defect density of the channel layer near the interface between the intervening insulating layer and the channel layer is higher than the defect density of the channel layer near the interface between the oxide film and the channel layer.

8. The inductor element according to claim 2 , wherein the intervening insulating layer covers a side surface of the channel layer.

9. a plurality of the inductor variable resistance units; The inductor element according to claim 1 , wherein a plurality of the inductor variable resistance sections are connected in series.

10. a plurality of the inductor variable resistance units; The inductor element according to claim 1 , wherein a plurality of the inductor variable resistance sections are connected in parallel.

11. An inductor element according to any one of claims 1 to 3; a control unit that controls the resistance value of the inductor variable resistance unit.

12. An inductor element comprising: an inductor wiring having a discontinuity at at least one location; a pair of external terminals connected to one side portion and the other side portion located on both sides of the discontinuity in the inductor wiring and exposed to the outside; at least one inductor variable resistance portion provided at the discontinuity; and at least one variable resistance terminal connected to the inductor variable resistance portion and exposed to the outside, wherein the inductor variable resistance portion connects the one side portion and the other side portion and changes the resistance value between the one side portion and the other side portion; a control unit that controls the resistance value of the inductor variable resistance unit; a capacitor element having a pair of electrodes facing each other and at least one capacitor variable resistance portion; The capacitor variable resistance portion changes the capacitance of the capacitor element by changing the resistance value with respect to the current flowing through the pair of electrodes.

13. the inductor variable resistance unit is a MOSFET, The inductor variable resistance unit is a MOSFET. An oxide film, a gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the gate electrode being positioned to overlap the discontinuity when viewed in a thickness direction of the inductor variable resistance unit which is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, the capacitor variable resistance unit is a MOSFET, The capacitor variable resistance unit is a MOSFET. the oxide film; an additional gate electrode provided on one main surface side of the oxide film in contact with the oxide film; the channel layer, the pair of electrodes are opposed to each other in the thickness direction, one of the pair of electrodes is provided on the opposite side of the oxide film in the thickness direction with respect to the channel layer, is in contact with the channel layer, and is divided into a plurality of portions with gaps interposed therebetween; The integrated circuit according to claim 12 , wherein the additional gate electrode is positioned so as to overlap the gap when viewed in the thickness direction.

14. the inductor variable resistance unit is a MOSFET, The inductor variable resistance unit is a MOSFET. An oxide film, a gate electrode provided on one main surface side of the oxide film in contact with the oxide film, the gate electrode being positioned to overlap the discontinuity when viewed in a thickness direction of the inductor variable resistance unit which is a MOSFET; a channel layer provided on the other main surface side of the oxide film in contact with the oxide film, the capacitor variable resistance unit is a MOSFET, The capacitor variable resistance unit is a MOSFET. the oxide film; an additional gate electrode provided on one main surface side of the oxide film in contact with the oxide film; the channel layer, the pair of electrodes are opposed to each other in the thickness direction, a part of the channel layer is also used as one of the pair of electrodes, 13. The integrated circuit according to claim 12, wherein the additional gate electrode is located at a position overlapping a portion of the channel layer that doubles as one of the pair of electrodes when viewed in the thickness direction.

15. The integrated circuit according to claim 12 , wherein the material forming the pair of electrodes of the capacitor element is different from the material forming the inductor wiring of the inductor element.

Images